src/main.c

Wed, 01 Dec 2010 22:01:23 +0000

author
Philip Pemberton <philpem@philpem.me.uk>
date
Wed, 01 Dec 2010 22:01:23 +0000
changeset 22
95a309c51464
parent 21
e31d2ede6c6b
child 23
3d964a6aa59b
permissions
-rw-r--r--

fix unknown-register logging

philpem@0 1 #include <stdio.h>
philpem@7 2 #include <stdlib.h>
philpem@4 3 #include <stdint.h>
philpem@7 4 #include <stdbool.h>
philpem@7 5 #include <malloc.h>
philpem@7 6 #include <string.h>
philpem@18 7
philpem@20 8 #include "SDL.h"
philpem@20 9
philpem@4 10 #include "musashi/m68k.h"
philpem@7 11 #include "version.h"
philpem@18 12 #include "state.h"
philpem@7 13
philpem@7 14 void FAIL(char *err)
philpem@7 15 {
philpem@7 16 state_done();
philpem@7 17 fprintf(stderr, "ERROR: %s\nExiting...\n", err);
philpem@7 18 exit(EXIT_FAILURE);
philpem@7 19 }
philpem@7 20
philpem@4 21 // read m68k memory
philpem@4 22 uint32_t m68k_read_memory_32(uint32_t address)
philpem@4 23 {
philpem@9 24 uint32_t data = 0xFFFFFFFF;
philpem@9 25
philpem@7 26 // If ROMLMAP is set, force system to access ROM
philpem@7 27 if (!state.romlmap)
philpem@7 28 address |= 0x800000;
philpem@7 29
philpem@9 30 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@7 31 // ROM access
philpem@10 32 data = (((uint32_t)state.rom[(address + 0) & (ROM_SIZE - 1)] << 24) |
philpem@10 33 ((uint32_t)state.rom[(address + 1) & (ROM_SIZE - 1)] << 16) |
philpem@10 34 ((uint32_t)state.rom[(address + 2) & (ROM_SIZE - 1)] << 8) |
philpem@10 35 ((uint32_t)state.rom[(address + 3) & (ROM_SIZE - 1)]));
philpem@10 36 } else if (address < state.ram_size - 1) {
philpem@7 37 // RAM
philpem@10 38 data = (((uint32_t)state.ram[address + 0] << 24) |
philpem@10 39 ((uint32_t)state.ram[address + 1] << 16) |
philpem@10 40 ((uint32_t)state.ram[address + 2] << 8) |
philpem@10 41 ((uint32_t)state.ram[address + 3]));
philpem@21 42 } else {
philpem@21 43 // I/O register -- TODO
philpem@22 44 printf("RD32 0x%08X [unknown I/O register]\n", address);
philpem@7 45 }
philpem@9 46 return data;
philpem@4 47 }
philpem@4 48
philpem@4 49 uint32_t m68k_read_memory_16(uint32_t address)
philpem@4 50 {
philpem@9 51 uint16_t data = 0xFFFF;
philpem@9 52
philpem@9 53 // If ROMLMAP is set, force system to access ROM
philpem@9 54 if (!state.romlmap)
philpem@9 55 address |= 0x800000;
philpem@9 56
philpem@10 57 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@10 58 // ROM access
philpem@10 59 data = ((state.rom[(address + 0) & (ROM_SIZE - 1)] << 8) |
philpem@10 60 (state.rom[(address + 1) & (ROM_SIZE - 1)]));
philpem@10 61 } else if (address < state.ram_size - 1) {
philpem@10 62 // RAM
philpem@10 63 data = ((state.ram[address + 0] << 8) |
philpem@10 64 (state.ram[address + 1]));
philpem@21 65 } else {
philpem@21 66 // I/O register -- TODO
philpem@22 67 printf("RD16 0x%08X [unknown I/O register]\n", address);
philpem@10 68 }
philpem@9 69
philpem@9 70 return data;
philpem@4 71 }
philpem@4 72
philpem@4 73 uint32_t m68k_read_memory_8(uint32_t address)
philpem@4 74 {
philpem@9 75 uint8_t data = 0xFF;
philpem@9 76
philpem@7 77 // If ROMLMAP is set, force system to access ROM
philpem@7 78 if (!state.romlmap)
philpem@7 79 address |= 0x800000;
philpem@7 80
philpem@10 81 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@10 82 // ROM access
philpem@10 83 data = state.rom[(address + 0) & (ROM_SIZE - 1)];
philpem@10 84 } else if (address < state.ram_size) {
philpem@10 85 // RAM access
philpem@10 86 data = state.ram[address + 0];
philpem@21 87 } else {
philpem@21 88 // I/O register -- TODO
philpem@22 89 printf("RD08 0x%08X [unknown I/O register]\n", address);
philpem@10 90 }
philpem@9 91
philpem@9 92 return data;
philpem@4 93 }
philpem@4 94
philpem@4 95 // write m68k memory
philpem@4 96 void m68k_write_memory_32(uint32_t address, uint32_t value)
philpem@4 97 {
philpem@7 98 // If ROMLMAP is set, force system to access ROM
philpem@7 99 if (!state.romlmap)
philpem@7 100 address |= 0x800000;
philpem@7 101
philpem@9 102 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@7 103 // ROM access
philpem@7 104 // TODO: bus error here? can't write to rom!
philpem@10 105 } else if (address < state.ram_size) {
philpem@10 106 // RAM access
philpem@10 107 state.ram[address + 0] = (value >> 24) & 0xff;
philpem@10 108 state.ram[address + 1] = (value >> 16) & 0xff;
philpem@10 109 state.ram[address + 2] = (value >> 8) & 0xff;
philpem@10 110 state.ram[address + 3] = value & 0xff;
philpem@9 111 } else {
philpem@9 112 switch (address) {
philpem@21 113 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP
philpem@22 114 default: printf("WR32 0x%08X ==> 0x%08X\n", address, value); break;
philpem@9 115 }
philpem@7 116 }
philpem@4 117 }
philpem@4 118
philpem@4 119 void m68k_write_memory_16(uint32_t address, uint32_t value)
philpem@4 120 {
philpem@7 121 // If ROMLMAP is set, force system to access ROM
philpem@7 122 if (!state.romlmap)
philpem@7 123 address |= 0x800000;
philpem@7 124
philpem@9 125 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@7 126 // ROM access
philpem@7 127 // TODO: bus error here? can't write to rom!
philpem@10 128 } else if (address < state.ram_size) {
philpem@10 129 // RAM access
philpem@10 130 state.ram[address + 0] = (value >> 8) & 0xff;
philpem@10 131 state.ram[address + 1] = value & 0xff;
philpem@9 132 } else {
philpem@9 133 switch (address) {
philpem@21 134 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP
philpem@22 135 default: printf("WR16 0x%08X ==> 0x%04X\n", address, value); break;
philpem@9 136 }
philpem@7 137 }
philpem@4 138 }
philpem@4 139
philpem@4 140 void m68k_write_memory_8(uint32_t address, uint32_t value)
philpem@4 141 {
philpem@7 142 // If ROMLMAP is set, force system to access ROM
philpem@7 143 if (!state.romlmap)
philpem@7 144 address |= 0x800000;
philpem@7 145
philpem@9 146 if ((address >= 0x800000) && (address <= 0xBFFFFF)) {
philpem@7 147 // ROM access
philpem@7 148 // TODO: bus error here? can't write to rom!
philpem@10 149 } else if (address < state.ram_size) {
philpem@10 150 state.ram[address] = value & 0xff;
philpem@9 151 } else {
philpem@9 152 switch (address) {
philpem@21 153 case 0xE43000: state.romlmap = ((value & 0x80) == 0x80); break; // GCR3: ROMLMAP
philpem@22 154 default: printf("WR08 0x%08X ==> 0x%02X\n", address, value); break;
philpem@9 155 }
philpem@7 156 }
philpem@4 157 }
philpem@4 158
philpem@10 159 // for the disassembler
philpem@9 160 uint32_t m68k_read_disassembler_32(uint32_t addr) { return m68k_read_memory_32(addr); }
philpem@9 161 uint32_t m68k_read_disassembler_16(uint32_t addr) { return m68k_read_memory_16(addr); }
philpem@9 162 uint32_t m68k_read_disassembler_8 (uint32_t addr) { return m68k_read_memory_8 (addr); }
philpem@9 163
philpem@0 164 int main(void)
philpem@0 165 {
philpem@7 166 // copyright banner
philpem@16 167 printf("FreeBee: A Quick-and-Dirty AT&T 3B1 Emulator. Version %s, %s mode.\n", VER_FULLSTR, VER_BUILD_TYPE);
philpem@17 168 printf("Copyright (C) 2010 P. A. Pemberton. All rights reserved.\nLicensed under the Apache License Version 2.0.\n");
philpem@17 169 printf("Musashi M680x0 emulator engine developed by Karl Stenerud <kstenerud@gmail.com>\n");
philpem@16 170 printf("Built %s by %s@%s.\n", VER_COMPILE_DATETIME, VER_COMPILE_BY, VER_COMPILE_HOST);
philpem@16 171 printf("Compiler: %s\n", VER_COMPILER);
philpem@16 172 printf("CFLAGS: %s\n", VER_CFLAGS);
philpem@17 173 printf("\n");
philpem@7 174
philpem@7 175 // set up system state
philpem@7 176 // 512K of RAM
philpem@18 177 state_init(512*1024);
philpem@7 178
philpem@20 179 // set up musashi and reset the CPU
philpem@7 180 m68k_set_cpu_type(M68K_CPU_TYPE_68010);
philpem@7 181 m68k_pulse_reset();
philpem@20 182 /*
philpem@20 183 size_t i = 0x80001a;
philpem@20 184 size_t len;
philpem@20 185 do {
philpem@20 186 char dasm[512];
philpem@20 187 len = m68k_disassemble(dasm, i, M68K_CPU_TYPE_68010);
philpem@20 188 printf("%06X: %s\n", i, dasm);
philpem@20 189 i += len;
philpem@20 190 } while (i < 0x8000ff);
philpem@20 191 */
philpem@9 192
philpem@7 193 // set up SDL
philpem@20 194 if (SDL_Init(SDL_INIT_VIDEO | SDL_INIT_TIMER) == -1) {
philpem@20 195 printf("Could not initialise SDL: %s.\n", SDL_GetError());
philpem@20 196 return -1;
philpem@20 197 }
philpem@7 198
philpem@20 199 /***
philpem@20 200 * The 3B1 CPU runs at 10MHz, with DMA running at 1MHz and video refreshing at
philpem@20 201 * around 60Hz (???), with a 60Hz periodic interrupt.
philpem@20 202 */
philpem@20 203 const uint32_t TIMESLOT_FREQUENCY = 240; // Hz
philpem@20 204 const uint32_t MILLISECS_PER_TIMESLOT = 1e3 / TIMESLOT_FREQUENCY;
philpem@20 205 const uint32_t CLOCKS_PER_60HZ = (10e6 / 60);
philpem@20 206 uint32_t next_timeslot = SDL_GetTicks() + MILLISECS_PER_TIMESLOT;
philpem@20 207 uint32_t clock_cycles = 0;
philpem@16 208 bool exitEmu = false;
philpem@16 209 for (;;) {
philpem@20 210 // Run the CPU for however many cycles we need to. CPU core clock is
philpem@20 211 // 10MHz, and we're running at 240Hz/timeslot. Thus: 10e6/240 or
philpem@20 212 // 41667 cycles per timeslot.
philpem@20 213 clock_cycles += m68k_execute(10e6/TIMESLOT_FREQUENCY);
philpem@20 214
philpem@20 215 // TODO: run DMA here
philpem@16 216
philpem@20 217 // Is it time to run the 60Hz periodic interrupt yet?
philpem@20 218 if (clock_cycles > CLOCKS_PER_60HZ) {
philpem@20 219 // TODO: refresh screen
philpem@20 220 // TODO: trigger periodic interrupt (if enabled)
philpem@20 221 // decrement clock cycle counter, we've handled the intr.
philpem@20 222 clock_cycles -= CLOCKS_PER_60HZ;
philpem@16 223 }
philpem@16 224
philpem@20 225 printf("timeslot\n");
philpem@20 226
philpem@20 227 // make sure frame rate is equal to real time
philpem@20 228 uint32_t now = SDL_GetTicks();
philpem@20 229 if (now < next_timeslot) {
philpem@20 230 // timeslot finished early -- eat up some time
philpem@20 231 SDL_Delay(next_timeslot - now);
philpem@20 232 } else {
philpem@20 233 // timeslot finished late -- skip ahead to gain time
philpem@20 234 // TODO: if this happens a lot, we should let the user know
philpem@20 235 // that their PC might not be fast enough...
philpem@20 236 next_timeslot = now;
philpem@20 237 }
philpem@20 238 // advance to the next timeslot
philpem@20 239 next_timeslot += MILLISECS_PER_TIMESLOT;
philpem@20 240
philpem@20 241 // if we've been asked to exit the emulator, then do so.
philpem@16 242 if (exitEmu) break;
philpem@16 243 }
philpem@7 244
philpem@7 245 // shut down and exit
philpem@20 246 SDL_Quit();
philpem@7 247
philpem@0 248 return 0;
philpem@0 249 }