src/wd279x.h

Wed, 29 Dec 2010 03:27:35 +0000

author
Philip Pemberton <philpem@philpem.me.uk>
date
Wed, 29 Dec 2010 03:27:35 +0000
changeset 77
e7898cbae0c6
parent 76
2ef98ea1e944
child 79
674226015c8a
permissions
-rw-r--r--

discard head, need to merge some stuff back in later

philpem@48 1 #ifndef _WD279X_H
philpem@48 2 #define _WD279X_H
philpem@48 3
philpem@48 4 #include <stdbool.h>
philpem@48 5 #include <stddef.h>
philpem@48 6 #include <stdint.h>
philpem@48 7 #include <stdio.h>
philpem@48 8
philpem@49 9 /// WD279x registers
philpem@49 10 typedef enum {
philpem@49 11 WD2797_REG_STATUS = 0, ///< Status register
philpem@49 12 WD2797_REG_COMMAND = 0, ///< Command register
philpem@49 13 WD2797_REG_TRACK = 1, ///< Track register
philpem@49 14 WD2797_REG_SECTOR = 2, ///< Sector register
philpem@49 15 WD2797_REG_DATA = 3 ///< Data register
philpem@49 16 } WD2797_REG;
philpem@49 17
philpem@49 18 /// WD279x emulator error codes
philpem@49 19 typedef enum {
philpem@49 20 WD2797_ERR_OK = 0, ///< Operation succeeded
philpem@49 21 WD2797_ERR_BAD_GEOM = -1, ///< Bad geometry, or image file too small
philpem@49 22 WD2797_ERR_NO_MEMORY = -2 ///< Out of memory
philpem@49 23 } WD2797_ERR;
philpem@48 24
philpem@48 25 typedef struct {
philpem@48 26 // Current track, head and sector
philpem@48 27 int track, head, sector;
philpem@48 28 // Geometry of current disc
philpem@48 29 int geom_secsz, geom_spt, geom_heads, geom_tracks;
philpem@77 30 // IRQ status, level and edge sensitive.
philpem@77 31 // Edge sensitive is cleared when host polls the IRQ status.
philpem@77 32 // Level sensitive is cleared when emulated CPU polls the status reg or writes a new cmnd.
philpem@77 33 // No EDGE sensitive interrupts will be issued unless the LEVEL SENSITIVE IRQ is clear.
philpem@77 34 bool irql, irqe;
philpem@48 35 // Status of last command
philpem@48 36 uint8_t status;
philpem@48 37 // Last command uses DRQ bit?
philpem@48 38 bool cmd_has_drq;
philpem@48 39 // The last value written to the data register
philpem@48 40 uint8_t data_reg;
philpem@48 41 // Last step direction. -1 for "towards zero", 1 for "away from zero"
philpem@48 42 int last_step_dir;
philpem@48 43 // Data buffer, current DRQ pointer and length
philpem@49 44 uint8_t *data;
philpem@48 45 size_t data_pos, data_len;
philpem@48 46 // Current disc image file
philpem@48 47 FILE *disc_image;
philpem@49 48 } WD2797_CTX;
philpem@49 49
philpem@49 50 /**
philpem@49 51 * @brief Initialise a WD2797 context.
philpem@49 52 * @param ctx WD2797 context.
philpem@49 53 *
philpem@49 54 * This must be run once when the context is created.
philpem@49 55 */
philpem@49 56 void wd2797_init(WD2797_CTX *ctx);
philpem@49 57
philpem@49 58 /**
philpem@49 59 * @brief Reset a WD2797 context.
philpem@49 60 * @param ctx WD2797 context.
philpem@49 61 *
philpem@49 62 * This should be run if the WD2797 needs to be reset (nRST line toggled).
philpem@49 63 */
philpem@49 64 void wd2797_reset(WD2797_CTX *ctx);
philpem@49 65
philpem@49 66 /**
philpem@49 67 * Deinitialise a WD2797 context.
philpem@49 68 * @param ctx WD2797 context.
philpem@49 69 */
philpem@49 70 void wd2797_done(WD2797_CTX *ctx);
philpem@49 71
philpem@49 72 /**
philpem@49 73 * @brief Read IRQ Rising Edge status. Clears Rising Edge status if it is set.
philpem@49 74 * @note No more IRQs will be sent until the Status Register is read, or a new command is written to the CR.
philpem@49 75 * @param ctx WD2797 context.
philpem@49 76 */
philpem@49 77 bool wd2797_get_irq(WD2797_CTX *ctx);
philpem@49 78
philpem@49 79 /**
philpem@49 80 * @brief Read DRQ status.
philpem@49 81 * @param ctx WD2797 context.
philpem@49 82 */
philpem@49 83 bool wd2797_get_drq(WD2797_CTX *ctx);
philpem@49 84
philpem@49 85 /**
philpem@49 86 * @brief Assign a disc image to the WD2797.
philpem@49 87 * @param ctx WD2797 context.
philpem@49 88 * @param fp Disc image file, already opened in "r+b" mode.
philpem@49 89 * @param secsz Sector size: either 128, 256, 512 or 1024.
philpem@49 90 * @param spt Sectors per track.
philpem@49 91 * @param heads Number of heads (1 or 2).
philpem@49 92 * @return Error code; WD279X_E_OK if everything worked OK.
philpem@49 93 */
philpem@49 94 WD2797_ERR wd2797_load(WD2797_CTX *ctx, FILE *fp, int secsz, int spt, int heads);
philpem@49 95
philpem@49 96 /**
philpem@49 97 * @brief Deassign the current image file.
philpem@49 98 * @param ctx WD2797 context.
philpem@49 99 */
philpem@49 100 void wd2797_unload(WD2797_CTX *ctx);
philpem@49 101
philpem@49 102 /**
philpem@49 103 * @brief Read WD279x register.
philpem@49 104 * @param ctx WD2797 context
philpem@49 105 * @param addr Register address (0, 1, 2 or 3)
philpem@49 106 */
philpem@49 107 uint8_t wd2797_read_reg(WD2797_CTX *ctx, uint8_t addr);
philpem@49 108
philpem@49 109 /**
philpem@49 110 * @brief Write WD279X register
philpem@49 111 * @param ctx WD2797 context
philpem@49 112 * @param addr Register address (0, 1, 2 or 3)
philpem@49 113 * @param val Value to write
philpem@49 114 */
philpem@49 115 void wd2797_write_reg(WD2797_CTX *ctx, uint8_t addr, uint8_t val);
philpem@49 116
philpem@48 117
philpem@48 118 #endif