src/memory.c

changeset 102
4e1c29899aca
parent 100
d6f699f89303
child 103
b749a3356e8d
     1.1 --- a/src/memory.c	Fri Mar 04 00:41:52 2011 +0000
     1.2 +++ b/src/memory.c	Fri Mar 04 00:44:06 2011 +0000
     1.3 @@ -393,6 +393,10 @@
     1.4  					case 0x040000:		// [ef][4c]xxxx ==> General Control Register
     1.5  						switch (address & 0x077000) {
     1.6  							case 0x040000:		// [ef][4c][08]xxx ==> EE
     1.7 +								// Error Enable. If =0, Level7 intrs and bus errors are masked.
     1.8 +								ENFORCE_SIZE_W(bits, address, 16, "EE");
     1.9 +								state.ee = ((data & 0x8000) == 0x8000);
    1.10 +								handled = true;
    1.11  								break;
    1.12  							case 0x041000:		// [ef][4c][19]xxx ==> PIE
    1.13  								ENFORCE_SIZE_W(bits, address, 16, "PIE");