1.1 --- a/src/memory.c Tue Dec 28 17:31:28 2010 +0000 1.2 +++ b/src/memory.c Tue Dec 28 17:47:01 2010 +0000 1.3 @@ -561,11 +561,14 @@ 1.4 } else if (address <= 0x3fffff) { 1.5 // RAM access 1.6 uint32_t newAddr = mapAddr(address, false); 1.7 - if (newAddr <= 0x1fffff) 1.8 + if (newAddr <= 0x1fffff) { 1.9 return RD32(state.base_ram, newAddr, state.base_ram_size - 1); 1.10 - else 1.11 - return 0xFFFFFFFF; 1.12 - // TODO: expansion RAM 1.13 + } else { 1.14 + if (newAddr <= (state.exp_ram_size + 0x200000 - 1)) 1.15 + return RD32(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1); 1.16 + else 1.17 + return 0xffffffff; 1.18 + } 1.19 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.20 // I/O register space, zone A 1.21 switch (address & 0x0F0000) { 1.22 @@ -607,11 +610,14 @@ 1.23 } else if (address <= 0x3fffff) { 1.24 // RAM access 1.25 uint32_t newAddr = mapAddr(address, false); 1.26 - if (newAddr <= 0x1fffff) 1.27 + if (newAddr <= 0x1fffff) { 1.28 return RD16(state.base_ram, newAddr, state.base_ram_size - 1); 1.29 - else 1.30 - return 0xFFFF; 1.31 - // TODO: expansion RAM 1.32 + } else { 1.33 + if (newAddr <= (state.exp_ram_size + 0x200000 - 1)) 1.34 + return RD16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1); 1.35 + else 1.36 + return 0xffff; 1.37 + } 1.38 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.39 // I/O register space, zone A 1.40 switch (address & 0x0F0000) { 1.41 @@ -653,11 +659,14 @@ 1.42 } else if (address <= 0x3fffff) { 1.43 // RAM access 1.44 uint32_t newAddr = mapAddr(address, false); 1.45 - if (newAddr <= 0x1fffff) 1.46 + if (newAddr <= 0x1fffff) { 1.47 return RD8(state.base_ram, newAddr, state.base_ram_size - 1); 1.48 - else 1.49 - return 0xFFFFFFFF; 1.50 - // TODO: expansion RAM 1.51 + } else { 1.52 + if (newAddr <= (state.exp_ram_size + 0x200000 - 1)) 1.53 + return RD8(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1); 1.54 + else 1.55 + return 0xff; 1.56 + } 1.57 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.58 // I/O register space, zone A 1.59 switch (address & 0x0F0000) { 1.60 @@ -696,9 +705,11 @@ 1.61 } else if (address <= 0x3FFFFF) { 1.62 // RAM access 1.63 uint32_t newAddr = mapAddr(address, true); 1.64 - if (newAddr <= 0x1fffff) 1.65 + if (newAddr <= 0x1fffff) { 1.66 WR32(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.67 - // TODO: expansion ram 1.68 + } else { 1.69 +// WR32(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1, value); 1.70 + } 1.71 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.72 // I/O register space, zone A 1.73 switch (address & 0x0F0000) { 1.74 @@ -735,9 +746,11 @@ 1.75 } else if (address <= 0x3FFFFF) { 1.76 // RAM access 1.77 uint32_t newAddr = mapAddr(address, true); 1.78 - if (newAddr <= 0x1fffff) 1.79 + if (newAddr <= 0x1fffff) { 1.80 WR16(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.81 - // TODO: expansion ram 1.82 + } else { 1.83 +// WR16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1, value); 1.84 + } 1.85 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.86 // I/O register space, zone A 1.87 switch (address & 0x0F0000) { 1.88 @@ -774,9 +787,11 @@ 1.89 } else if (address <= 0x3FFFFF) { 1.90 // RAM access 1.91 uint32_t newAddr = mapAddr(address, true); 1.92 - if (newAddr <= 0x1fffff) 1.93 + if (newAddr <= 0x1fffff) { 1.94 WR8(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.95 - // TODO: expansion ram 1.96 + } else { 1.97 +// WR8(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1, value); 1.98 + } 1.99 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.100 // I/O register space, zone A 1.101 switch (address & 0x0F0000) {