1.1 --- a/src/memory.c Mon Dec 13 03:00:43 2010 +0000 1.2 +++ b/src/memory.c Tue Dec 14 02:41:40 2010 +0000 1.3 @@ -596,10 +596,11 @@ 1.4 if (address & 1) { 1.5 data = 0x12; // no parity error, no line printer error, no irqs from FDD or HDD 1.6 data |= (state.fdc_ctx.irql) ? 0x08 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.7 - data |= 0x04; // HDD interrupt, i.e. command complete -- HACKHACKHACK! 1.8 +// data |= 0x04; // HDD interrupt, i.e. command complete -- HACKHACKHACK! 1.9 } else { 1.10 data = 0; 1.11 } 1.12 + handled = true; 1.13 break; 1.14 case 0x080000: // Real Time Clock 1.15 break; 1.16 @@ -824,12 +825,12 @@ 1.17 case 0x0D0000: // DMA Address Register 1.18 if (address & 0x004000) { 1.19 // A14 high -- set most significant bits 1.20 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.21 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.22 } else { 1.23 // A14 low -- set least significant bits 1.24 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.25 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.26 } 1.27 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.28 + printf("WR32 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.29 handled = true; 1.30 break; 1.31 case 0x0E0000: // Disk Control Register 1.32 @@ -1031,12 +1032,12 @@ 1.33 case 0x0D0000: // DMA Address Register 1.34 if (address & 0x004000) { 1.35 // A14 high -- set most significant bits 1.36 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.37 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.38 } else { 1.39 // A14 low -- set least significant bits 1.40 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.41 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.42 } 1.43 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.44 + printf("WR16 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.45 handled = true; 1.46 break; 1.47 case 0x0E0000: // Disk Control Register 1.48 @@ -1235,12 +1236,12 @@ 1.49 case 0x0D0000: // DMA Address Register 1.50 if (address & 0x004000) { 1.51 // A14 high -- set most significant bits 1.52 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.53 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.54 } else { 1.55 // A14 low -- set least significant bits 1.56 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.57 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.58 } 1.59 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.60 + printf("WR08 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.61 handled = true; 1.62 break; 1.63 case 0x0E0000: // Disk Control Register