Wed, 01 Dec 2010 22:11:06 +0000
add VRAM emulation
src/main.c | file | annotate | diff | revisions | |
src/state.h | file | annotate | diff | revisions |
1.1 --- a/src/main.c Wed Dec 01 22:01:58 2010 +0000 1.2 +++ b/src/main.c Wed Dec 01 22:11:06 2010 +0000 1.3 @@ -39,6 +39,12 @@ 1.4 ((uint32_t)state.ram[address + 1] << 16) | 1.5 ((uint32_t)state.ram[address + 2] << 8) | 1.6 ((uint32_t)state.ram[address + 3])); 1.7 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.8 + // VRAM 1.9 + data = (((uint32_t)state.vram[(address + 0) & 0x7fff] << 24) | 1.10 + ((uint32_t)state.vram[(address + 1) & 0x7fff] << 16) | 1.11 + ((uint32_t)state.vram[(address + 2) & 0x7fff] << 8) | 1.12 + ((uint32_t)state.vram[(address + 3) & 0x7fff])); 1.13 } else { 1.14 // I/O register -- TODO 1.15 printf("RD32 0x%08X [unknown I/O register]\n", address); 1.16 @@ -62,6 +68,10 @@ 1.17 // RAM 1.18 data = ((state.ram[address + 0] << 8) | 1.19 (state.ram[address + 1])); 1.20 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.21 + // VRAM 1.22 + data = (((uint16_t)state.vram[(address + 0) & 0x7fff] << 8) | 1.23 + ((uint16_t)state.vram[(address + 1) & 0x7fff])); 1.24 } else { 1.25 // I/O register -- TODO 1.26 printf("RD16 0x%08X [unknown I/O register]\n", address); 1.27 @@ -84,6 +94,9 @@ 1.28 } else if (address < state.ram_size) { 1.29 // RAM access 1.30 data = state.ram[address + 0]; 1.31 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.32 + // VRAM 1.33 + data = state.vram[(address + 0) & 0x7fff]; 1.34 } else { 1.35 // I/O register -- TODO 1.36 printf("RD08 0x%08X [unknown I/O register]\n", address); 1.37 @@ -108,6 +121,12 @@ 1.38 state.ram[address + 1] = (value >> 16) & 0xff; 1.39 state.ram[address + 2] = (value >> 8) & 0xff; 1.40 state.ram[address + 3] = value & 0xff; 1.41 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.42 + // VRAM access 1.43 + state.vram[(address + 0) & 0x7fff] = (value >> 24) & 0xff; 1.44 + state.vram[(address + 1) & 0x7fff] = (value >> 16) & 0xff; 1.45 + state.vram[(address + 2) & 0x7fff] = (value >> 8) & 0xff; 1.46 + state.vram[(address + 3) & 0x7fff] = value & 0xff; 1.47 } else { 1.48 switch (address) { 1.49 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP 1.50 @@ -129,6 +148,10 @@ 1.51 // RAM access 1.52 state.ram[address + 0] = (value >> 8) & 0xff; 1.53 state.ram[address + 1] = value & 0xff; 1.54 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.55 + // VRAM access 1.56 + state.vram[(address + 0) & 0x7fff] = (value >> 8) & 0xff; 1.57 + state.vram[(address + 1) & 0x7fff] = value & 0xff; 1.58 } else { 1.59 switch (address) { 1.60 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP 1.61 @@ -148,6 +171,9 @@ 1.62 // TODO: bus error here? can't write to rom! 1.63 } else if (address < state.ram_size) { 1.64 state.ram[address] = value & 0xff; 1.65 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.66 + // VRAM access 1.67 + state.vram[address & 0x7fff] = value; 1.68 } else { 1.69 switch (address) { 1.70 case 0xE43000: state.romlmap = ((value & 0x80) == 0x80); break; // GCR3: ROMLMAP
2.1 --- a/src/state.h Wed Dec 01 22:01:58 2010 +0000 2.2 +++ b/src/state.h Wed Dec 01 22:11:06 2010 +0000 2.3 @@ -21,10 +21,13 @@ 2.4 uint8_t *ram; ///< RAM data buffer 2.5 size_t ram_size; ///< Size of RAM buffer in bytes 2.6 2.7 + // Video RAM 2.8 + uint8_t vram[0x8000]; ///< Video RAM 2.9 + 2.10 // GENERAL CONTROL REGISTER 2.11 /// GENCON.ROMLMAP -- false ORs the address with 0x800000, forcing the 2.12 /// 68010 to access ROM instead of RAM when booting. TRM page 2-36. 2.13 - bool romlmap; 2.14 + bool romlmap; 2.15 } S_state; 2.16 2.17 // Global emulator state. Yes, I know global variables are evil, please don't