fixed expansion ram addressing, now detects base/expansion RAM counts correctly

Tue, 28 Dec 2010 17:25:46 +0000

author
Philip Pemberton <philpem@philpem.me.uk>
date
Tue, 28 Dec 2010 17:25:46 +0000
changeset 61
8b9bb78a2794
parent 60
96f3df0b3cbb
child 62
c895256b528d

fixed expansion ram addressing, now detects base/expansion RAM counts correctly

src/memory.c file | annotate | diff | revisions
     1.1 --- a/src/memory.c	Tue Dec 28 17:23:04 2010 +0000
     1.2 +++ b/src/memory.c	Tue Dec 28 17:25:46 2010 +0000
     1.3 @@ -561,10 +561,10 @@
     1.4  	} else if (address <= 0x3fffff) {
     1.5  		// RAM access
     1.6  		uint32_t newAddr = mapAddr(address, false);
     1.7 -//		if (newAddr < state.base_ram_size)
     1.8 +		if (newAddr <= 0x1fffff)
     1.9  			return RD32(state.base_ram, newAddr, state.base_ram_size - 1);
    1.10 -//		else
    1.11 -//			return 0xFFFFFFFF;
    1.12 +		else
    1.13 +			return 0xFFFFFFFF;
    1.14  		// TODO: expansion RAM
    1.15  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.16  		// I/O register space, zone A
    1.17 @@ -607,10 +607,10 @@
    1.18  	} else if (address <= 0x3fffff) {
    1.19  		// RAM access
    1.20  		uint32_t newAddr = mapAddr(address, false);
    1.21 -//		if (newAddr < state.base_ram_size)
    1.22 +		if (newAddr <= 0x1fffff)
    1.23  			return RD16(state.base_ram, newAddr, state.base_ram_size - 1);
    1.24 -//		else
    1.25 -//			return 0xFFFFFFFF;
    1.26 +		else
    1.27 +			return 0xFFFF;
    1.28  		// TODO: expansion RAM
    1.29  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.30  		// I/O register space, zone A
    1.31 @@ -653,10 +653,10 @@
    1.32  	} else if (address <= 0x3fffff) {
    1.33  		// RAM access
    1.34  		uint32_t newAddr = mapAddr(address, false);
    1.35 -//		if (newAddr < state.base_ram_size)
    1.36 +		if (newAddr <= 0x1fffff)
    1.37  			return RD8(state.base_ram, newAddr, state.base_ram_size - 1);
    1.38 -//		else
    1.39 -//			return 0xFFFFFFFF;
    1.40 +		else
    1.41 +			return 0xFFFFFFFF;
    1.42  		// TODO: expansion RAM
    1.43  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.44  		// I/O register space, zone A
    1.45 @@ -696,8 +696,9 @@
    1.46  	} else if (address <= 0x3FFFFF) {
    1.47  		// RAM access
    1.48  		uint32_t newAddr = mapAddr(address, true);
    1.49 -		if (newAddr <= 0x1fffff) //(state.base_ram_size - 1))
    1.50 +		if (newAddr <= 0x1fffff)
    1.51  			WR32(state.base_ram, newAddr, state.base_ram_size - 1, value);
    1.52 +		// TODO: expansion ram
    1.53  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.54  		// I/O register space, zone A
    1.55  		switch (address & 0x0F0000) {
    1.56 @@ -734,8 +735,9 @@
    1.57  	} else if (address <= 0x3FFFFF) {
    1.58  		// RAM access
    1.59  		uint32_t newAddr = mapAddr(address, true);
    1.60 -		if (newAddr <= 0x1fffff) //(state.base_ram_size - 1))
    1.61 +		if (newAddr <= 0x1fffff)
    1.62  			WR16(state.base_ram, newAddr, state.base_ram_size - 1, value);
    1.63 +		// TODO: expansion ram
    1.64  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.65  		// I/O register space, zone A
    1.66  		switch (address & 0x0F0000) {
    1.67 @@ -772,8 +774,9 @@
    1.68  	} else if (address <= 0x3FFFFF) {
    1.69  		// RAM access
    1.70  		uint32_t newAddr = mapAddr(address, true);
    1.71 -		if (newAddr <= 0x1fffff) //(state.base_ram_size - 1))
    1.72 +		if (newAddr <= 0x1fffff)
    1.73  			WR8(state.base_ram, newAddr, state.base_ram_size - 1, value);
    1.74 +		// TODO: expansion ram
    1.75  	} else if ((address >= 0x400000) && (address <= 0x7FFFFF)) {
    1.76  		// I/O register space, zone A
    1.77  		switch (address & 0x0F0000) {