fix ENFORCE_SIZE to print "read from" / "write to"

Tue, 28 Dec 2010 18:58:51 +0000

author
Philip Pemberton <philpem@philpem.me.uk>
date
Tue, 28 Dec 2010 18:58:51 +0000
changeset 66
8ca92162fa89
parent 65
dc28926b353c
child 67
d6358bf2f5c2

fix ENFORCE_SIZE to print "read from" / "write to"

src/memory.c file | annotate | diff | revisions
     1.1 --- a/src/memory.c	Tue Dec 28 18:36:39 2010 +0000
     1.2 +++ b/src/memory.c	Tue Dec 28 18:58:51 2010 +0000
     1.3 @@ -195,14 +195,24 @@
     1.4  /**
     1.5   * Issue a warning if a read operation is made with an invalid size
     1.6   */
     1.7 -inline static void ENFORCE_SIZE(int bits, uint32_t address, int allowed, char *regname)
     1.8 +inline static void ENFORCE_SIZE(int bits, uint32_t address, bool read, int allowed, char *regname)
     1.9  {
    1.10  	assert((bits == 8) || (bits == 16) || (bits == 32));
    1.11  	if ((bits & allowed) == 0) {
    1.12 -		printf("WARNING: write to 0x%08X (%s) with invalid size %d!\n", address, regname, bits);
    1.13 +		printf("WARNING: %s 0x%08X (%s) with invalid size %d!\n", read ? "read from" : "write to", address, regname, bits);
    1.14  	}
    1.15  }
    1.16  
    1.17 +inline static void ENFORCE_SIZE_R(int bits, uint32_t address, int allowed, char *regname)
    1.18 +{
    1.19 +	ENFORCE_SIZE(bits, address, true, allowed, regname);
    1.20 +}
    1.21 +
    1.22 +inline static void ENFORCE_SIZE_W(int bits, uint32_t address, int allowed, char *regname)
    1.23 +{
    1.24 +	ENFORCE_SIZE(bits, address, false, allowed, regname);
    1.25 +}
    1.26 +
    1.27  void IoWrite(uint32_t address, uint32_t data, int bits)/*{{{*/
    1.28  {
    1.29  	bool handled = false;
    1.30 @@ -228,7 +238,7 @@
    1.31  			case 0x050000:				// Phone status
    1.32  				break;
    1.33  			case 0x060000:				// DMA Count
    1.34 -				ENFORCE_SIZE(bits, address, 16, "DMACOUNT");
    1.35 +				ENFORCE_SIZE_W(bits, address, 16, "DMACOUNT");
    1.36  				state.dma_count = (data & 0x3FFF);
    1.37  				state.idmarw = ((data & 0x4000) == 0x4000);
    1.38  				state.dmaen = ((data & 0x8000) == 0x8000);
    1.39 @@ -272,7 +282,7 @@
    1.40  				}
    1.41  				break;
    1.42  			case 0x0A0000:				// Miscellaneous Control Register
    1.43 -				ENFORCE_SIZE(bits, address, 16, "MISCCON");
    1.44 +				ENFORCE_SIZE_W(bits, address, 16, "MISCCON");
    1.45  				// TODO: handle the ctrl bits properly
    1.46  				// TODO: &0x8000 --> dismiss 60hz intr
    1.47  				state.dma_reading = (data & 0x4000);
    1.48 @@ -303,7 +313,7 @@
    1.49  				handled = true;
    1.50  				break;
    1.51  			case 0x0E0000:				// Disk Control Register
    1.52 -				ENFORCE_SIZE(bits, address, 16, "DISKCON");
    1.53 +				ENFORCE_SIZE_W(bits, address, 16, "DISKCON");
    1.54  				// B7 = FDD controller reset
    1.55  				if ((data & 0x80) == 0) wd2797_reset(&state.fdc_ctx);
    1.56  				// B6 = drive 0 select -- TODO
    1.57 @@ -341,7 +351,7 @@
    1.58  					case 0x000000:		// [ef][08]xxxx ==> WD1010 hard disc controller
    1.59  						break;
    1.60  					case 0x010000:		// [ef][19]xxxx ==> WD2797 floppy disc controller
    1.61 -						ENFORCE_SIZE(bits, address, 16, "FDC REGISTERS");
    1.62 +						ENFORCE_SIZE_W(bits, address, 16, "FDC REGISTERS");
    1.63  						wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, data);
    1.64  						handled = true;
    1.65  						break;
    1.66 @@ -354,28 +364,28 @@
    1.67  							case 0x040000:		// [ef][4c][08]xxx ==> EE
    1.68  								break;
    1.69  							case 0x041000:		// [ef][4c][19]xxx ==> PIE
    1.70 -								ENFORCE_SIZE(bits, address, 16, "PIE");
    1.71 +								ENFORCE_SIZE_W(bits, address, 16, "PIE");
    1.72  								state.pie = ((data & 0x8000) == 0x8000);
    1.73  								handled = true;
    1.74  								break;
    1.75  							case 0x042000:		// [ef][4c][2A]xxx ==> BP
    1.76  								break;
    1.77  							case 0x043000:		// [ef][4c][3B]xxx ==> ROMLMAP
    1.78 -								ENFORCE_SIZE(bits, address, 16, "ROMLMAP");
    1.79 +								ENFORCE_SIZE_W(bits, address, 16, "ROMLMAP");
    1.80  								state.romlmap = ((data & 0x8000) == 0x8000);
    1.81  								handled = true;
    1.82  								break;
    1.83  							case 0x044000:		// [ef][4c][4C]xxx ==> L1 MODEM
    1.84 -								ENFORCE_SIZE(bits, address, 16, "L1 MODEM");
    1.85 +								ENFORCE_SIZE_W(bits, address, 16, "L1 MODEM");
    1.86  								break;
    1.87  							case 0x045000:		// [ef][4c][5D]xxx ==> L2 MODEM
    1.88 -								ENFORCE_SIZE(bits, address, 16, "L2 MODEM");
    1.89 +								ENFORCE_SIZE_W(bits, address, 16, "L2 MODEM");
    1.90  								break;
    1.91  							case 0x046000:		// [ef][4c][6E]xxx ==> D/N CONNECT
    1.92 -								ENFORCE_SIZE(bits, address, 16, "D/N CONNECT");
    1.93 +								ENFORCE_SIZE_W(bits, address, 16, "D/N CONNECT");
    1.94  								break;
    1.95  							case 0x047000:		// [ef][4c][7F]xxx ==> Whole screen reverse video
    1.96 -								ENFORCE_SIZE(bits, address, 16, "WHOLE SCREEN REVERSE VIDEO");
    1.97 +								ENFORCE_SIZE_W(bits, address, 16, "WHOLE SCREEN REVERSE VIDEO");
    1.98  								break;
    1.99  						}
   1.100  					case 0x050000:		// [ef][5d]xxxx ==> 8274
   1.101 @@ -404,24 +414,24 @@
   1.102  		// I/O register space, zone A
   1.103  		switch (address & 0x0F0000) {
   1.104  			case 0x010000:				// General Status Register
   1.105 -				ENFORCE_SIZE(bits, address, 16, "GENSTAT");
   1.106 +				ENFORCE_SIZE_R(bits, address, 16, "GENSTAT");
   1.107  				return ((uint32_t)state.genstat << 16) + (uint32_t)state.genstat;
   1.108  				break;
   1.109  			case 0x030000:				// Bus Status Register 0
   1.110 -				ENFORCE_SIZE(bits, address, 16, "BSR0");
   1.111 +				ENFORCE_SIZE_R(bits, address, 16, "BSR0");
   1.112  				return ((uint32_t)state.bsr0 << 16) + (uint32_t)state.bsr0;
   1.113  				break;
   1.114  			case 0x040000:				// Bus Status Register 1
   1.115 -				ENFORCE_SIZE(bits, address, 16, "BSR1");
   1.116 +				ENFORCE_SIZE_R(bits, address, 16, "BSR1");
   1.117  				return ((uint32_t)state.bsr1 << 16) + (uint32_t)state.bsr1;
   1.118  				break;
   1.119  			case 0x050000:				// Phone status
   1.120 -				ENFORCE_SIZE(bits, address, 16, "PHONE STATUS");
   1.121 +				ENFORCE_SIZE_R(bits, address, 8 | 16, "PHONE STATUS");
   1.122  				break;
   1.123  			case 0x060000:				// DMA Count
   1.124  				// TODO: U/OERR- is always inactive (bit set)... or should it be = DMAEN+?
   1.125  				// Bit 14 is always unused, so leave it set
   1.126 -				ENFORCE_SIZE(bits, address, 16, "DMACOUNT");
   1.127 +				ENFORCE_SIZE_R(bits, address, 16, "DMACOUNT");
   1.128  				return (state.dma_count & 0x3fff) | 0xC000;
   1.129  				break;
   1.130  			case 0x070000:				// Line Printer Status Register
   1.131 @@ -500,7 +510,7 @@
   1.132  					case 0x000000:		// [ef][08]xxxx ==> WD1010 hard disc controller
   1.133  						break;
   1.134  					case 0x010000:		// [ef][19]xxxx ==> WD2797 floppy disc controller
   1.135 -						ENFORCE_SIZE(bits, address, 16, "FDC REGISTERS");
   1.136 +						ENFORCE_SIZE_R(bits, address, 16, "FDC REGISTERS");
   1.137  						return wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3);
   1.138  						break;
   1.139  					case 0x020000:		// [ef][2a]xxxx ==> Miscellaneous Control Register 2