Thu, 02 Dec 2010 22:27:43 +0000
add proper tracking of unhandled R/W operations
| src/main.c | file | annotate | diff | revisions |
1.1 --- a/src/main.c Thu Dec 02 20:58:12 2010 +0000 1.2 +++ b/src/main.c Thu Dec 02 22:27:43 2010 +0000 1.3 @@ -233,6 +233,18 @@ 1.4 } \ 1.5 } while (false) 1.6 1.7 +// Logging macros 1.8 +#define LOG_NOT_HANDLED_R(bits) \ 1.9 + do { \ 1.10 + if (!handled) \ 1.11 + printf("unhandled read%02d, addr=0x%08X\n", bits, address); \ 1.12 + } while (0); 1.13 + 1.14 +#define LOG_NOT_HANDLED_W(bits) \ 1.15 + do { \ 1.16 + if (!handled) \ 1.17 + printf("unhandled write%02d, addr=0x%08X, data=0x%08X\n", bits, address, value); \ 1.18 + } while (0); 1.19 1.20 /** 1.21 * @brief Read M68K memory, 32-bit 1.22 @@ -240,6 +252,7 @@ 1.23 uint32_t m68k_read_memory_32(uint32_t address) 1.24 { 1.25 uint32_t data = 0xFFFFFFFF; 1.26 + bool handled = false; 1.27 1.28 // If ROMLMAP is set, force system to access ROM 1.29 if (!state.romlmap) 1.30 @@ -251,9 +264,11 @@ 1.31 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.32 // ROM access 1.33 data = RD32(state.rom, address, ROM_SIZE - 1); 1.34 + handled = true; 1.35 } else if (address <= (state.ram_size - 1)) { 1.36 // RAM access 1.37 data = RD32(state.ram, mapAddr(address, false), state.ram_size - 1); 1.38 + handled = true; 1.39 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.40 // I/O register space, zone A 1.41 // printf("RD32 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.42 @@ -261,17 +276,24 @@ 1.43 case 0x000000: // Map RAM access 1.44 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD32 from MapRAM mirror, addr=0x%08X\n", address); 1.45 data = RD32(state.map, address, 0x7FF); 1.46 + handled = true; 1.47 break; 1.48 case 0x010000: // General Status Register 1.49 data = ((uint32_t)state.genstat << 16) + (uint32_t)state.genstat; 1.50 + handled = true; 1.51 break; 1.52 case 0x020000: // Video RAM 1.53 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD32 from VideoRAM mirror, addr=0x%08X\n", address); 1.54 data = RD32(state.vram, address, 0x7FFF); 1.55 + handled = true; 1.56 break; 1.57 case 0x030000: // Bus Status Register 0 1.58 + data = ((uint32_t)state.bsr0 << 16) + (uint32_t)state.bsr0; 1.59 + handled = true; 1.60 break; 1.61 case 0x040000: // Bus Status Register 1 1.62 + data = ((uint32_t)state.bsr1 << 16) + (uint32_t)state.bsr1; 1.63 + handled = true; 1.64 break; 1.65 case 0x050000: // Phone status 1.66 break; 1.67 @@ -324,7 +346,6 @@ 1.68 } 1.69 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.70 // I/O register space, zone B 1.71 -// printf("RD32 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.72 switch (address & 0xF00000) { 1.73 case 0xC00000: // Expansion slots 1.74 case 0xD00000: 1.75 @@ -371,7 +392,9 @@ 1.76 case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.77 break; 1.78 } 1.79 + break; 1.80 case 0x050000: // [ef][5d]xxxx ==> 8274 1.81 + break; 1.82 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.83 switch (address & 0x07F000) { 1.84 default: 1.85 @@ -379,11 +402,12 @@ 1.86 } 1.87 break; 1.88 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.89 - default: 1.90 - fprintf(stderr, "NOTE: RD32 from undefined E/F-block address 0x%08X", address); 1.91 + break; 1.92 } 1.93 } 1.94 } 1.95 + 1.96 + LOG_NOT_HANDLED_R(32); 1.97 return data; 1.98 } 1.99 1.100 @@ -393,6 +417,7 @@ 1.101 uint32_t m68k_read_memory_16(uint32_t address) 1.102 { 1.103 uint16_t data = 0xFFFF; 1.104 + bool handled = false; 1.105 1.106 // If ROMLMAP is set, force system to access ROM 1.107 if (!state.romlmap) 1.108 @@ -404,27 +429,35 @@ 1.109 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.110 // ROM access 1.111 data = RD16(state.rom, address, ROM_SIZE - 1); 1.112 + handled = true; 1.113 } else if (address <= (state.ram_size - 1)) { 1.114 // RAM access 1.115 data = RD16(state.ram, mapAddr(address, false), state.ram_size - 1); 1.116 + handled = true; 1.117 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.118 // I/O register space, zone A 1.119 -// printf("RD16 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.120 switch (address & 0x0F0000) { 1.121 case 0x000000: // Map RAM access 1.122 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD16 from MapRAM mirror, addr=0x%08X\n", address); 1.123 data = RD16(state.map, address, 0x7FF); 1.124 + handled = true; 1.125 break; 1.126 case 0x010000: // General Status Register 1.127 data = state.genstat; 1.128 + handled = true; 1.129 break; 1.130 case 0x020000: // Video RAM 1.131 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD16 from VideoRAM mirror, addr=0x%08X\n", address); 1.132 data = RD16(state.vram, address, 0x7FFF); 1.133 + handled = true; 1.134 break; 1.135 case 0x030000: // Bus Status Register 0 1.136 + data = state.bsr0; 1.137 + handled = true; 1.138 break; 1.139 case 0x040000: // Bus Status Register 1 1.140 + data = state.bsr1; 1.141 + handled = true; 1.142 break; 1.143 case 0x050000: // Phone status 1.144 break; 1.145 @@ -477,7 +510,6 @@ 1.146 } 1.147 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.148 // I/O register space, zone B 1.149 -// printf("RD16 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.150 switch (address & 0xF00000) { 1.151 case 0xC00000: // Expansion slots 1.152 case 0xD00000: 1.153 @@ -524,7 +556,9 @@ 1.154 case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.155 break; 1.156 } 1.157 + break; 1.158 case 0x050000: // [ef][5d]xxxx ==> 8274 1.159 + break; 1.160 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.161 switch (address & 0x07F000) { 1.162 default: 1.163 @@ -532,11 +566,12 @@ 1.164 } 1.165 break; 1.166 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.167 - default: 1.168 - fprintf(stderr, "NOTE: RD16 from undefined E/F-block address 0x%08X", address); 1.169 + break; 1.170 } 1.171 } 1.172 } 1.173 + 1.174 + LOG_NOT_HANDLED_R(32); 1.175 return data; 1.176 } 1.177 1.178 @@ -546,6 +581,7 @@ 1.179 uint32_t m68k_read_memory_8(uint32_t address) 1.180 { 1.181 uint8_t data = 0xFF; 1.182 + bool handled = false; 1.183 1.184 // If ROMLMAP is set, force system to access ROM 1.185 if (!state.romlmap) 1.186 @@ -557,26 +593,198 @@ 1.187 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.188 // ROM access 1.189 data = RD8(state.rom, address, ROM_SIZE - 1); 1.190 + handled = true; 1.191 } else if (address <= (state.ram_size - 1)) { 1.192 // RAM access 1.193 data = RD8(state.ram, mapAddr(address, false), state.ram_size - 1); 1.194 + handled = true; 1.195 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.196 // I/O register space, zone A 1.197 -// printf("RD8 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.198 switch (address & 0x0F0000) { 1.199 case 0x000000: // Map RAM access 1.200 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD8 from MapRAM mirror, addr=0x%08X\n", address); 1.201 data = RD8(state.map, address, 0x7FF); 1.202 + handled = true; 1.203 break; 1.204 case 0x010000: // General Status Register 1.205 if ((address & 1) == 0) 1.206 data = (state.genstat >> 8) & 0xff; 1.207 else 1.208 data = (state.genstat) & 0xff; 1.209 + handled = true; 1.210 break; 1.211 case 0x020000: // Video RAM 1.212 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD8 from VideoRAM mirror, addr=0x%08X\n", address); 1.213 data = RD8(state.vram, address, 0x7FFF); 1.214 + handled = true; 1.215 + break; 1.216 + case 0x030000: // Bus Status Register 0 1.217 + if ((address & 1) == 0) 1.218 + data = (state.bsr0 >> 8) & 0xff; 1.219 + else 1.220 + data = (state.bsr0) & 0xff; 1.221 + handled = true; 1.222 + break; 1.223 + case 0x040000: // Bus Status Register 1 1.224 + if ((address & 1) == 0) 1.225 + data = (state.bsr1 >> 8) & 0xff; 1.226 + else 1.227 + data = (state.bsr1) & 0xff; 1.228 + handled = true; 1.229 + break; 1.230 + case 0x050000: // Phone status 1.231 + break; 1.232 + case 0x060000: // DMA Count 1.233 + break; 1.234 + case 0x070000: // Line Printer Status Register 1.235 + break; 1.236 + case 0x080000: // Real Time Clock 1.237 + break; 1.238 + case 0x090000: // Phone registers 1.239 + switch (address & 0x0FF000) { 1.240 + case 0x090000: // Handset relay 1.241 + case 0x098000: 1.242 + break; 1.243 + case 0x091000: // Line select 2 1.244 + case 0x099000: 1.245 + break; 1.246 + case 0x092000: // Hook relay 1 1.247 + case 0x09A000: 1.248 + break; 1.249 + case 0x093000: // Hook relay 2 1.250 + case 0x09B000: 1.251 + break; 1.252 + case 0x094000: // Line 1 hold 1.253 + case 0x09C000: 1.254 + break; 1.255 + case 0x095000: // Line 2 hold 1.256 + case 0x09D000: 1.257 + break; 1.258 + case 0x096000: // Line 1 A-lead 1.259 + case 0x09E000: 1.260 + break; 1.261 + case 0x097000: // Line 2 A-lead 1.262 + case 0x09F000: 1.263 + break; 1.264 + } 1.265 + break; 1.266 + case 0x0A0000: // Miscellaneous Control Register 1.267 + break; 1.268 + case 0x0B0000: // TM/DIALWR 1.269 + break; 1.270 + case 0x0C0000: // CSR 1.271 + break; 1.272 + case 0x0D0000: // DMA Address Register 1.273 + break; 1.274 + case 0x0E0000: // Disk Control Register 1.275 + break; 1.276 + case 0x0F0000: // Line Printer Data Register 1.277 + break; 1.278 + } 1.279 + } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.280 + // I/O register space, zone B 1.281 + switch (address & 0xF00000) { 1.282 + case 0xC00000: // Expansion slots 1.283 + case 0xD00000: 1.284 + switch (address & 0xFC0000) { 1.285 + case 0xC00000: // Expansion slot 0 1.286 + case 0xC40000: // Expansion slot 1 1.287 + case 0xC80000: // Expansion slot 2 1.288 + case 0xCC0000: // Expansion slot 3 1.289 + case 0xD00000: // Expansion slot 4 1.290 + case 0xD40000: // Expansion slot 5 1.291 + case 0xD80000: // Expansion slot 6 1.292 + case 0xDC0000: // Expansion slot 7 1.293 + fprintf(stderr, "NOTE: RD8 from expansion card space, addr=0x%08X\n", address); 1.294 + break; 1.295 + } 1.296 + break; 1.297 + case 0xE00000: // HDC, FDC, MCR2 and RTC data bits 1.298 + case 0xF00000: 1.299 + switch (address & 0x070000) { 1.300 + case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.301 + break; 1.302 + case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.303 + break; 1.304 + case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.305 + break; 1.306 + case 0x030000: // [ef][3b]xxxx ==> Real Time Clock data bits 1.307 + break; 1.308 + case 0x040000: // [ef][4c]xxxx ==> General Control Register 1.309 + switch (address & 0x077000) { 1.310 + case 0x040000: // [ef][4c][08]xxx ==> EE 1.311 + break; 1.312 + case 0x041000: // [ef][4c][19]xxx ==> P1E 1.313 + break; 1.314 + case 0x042000: // [ef][4c][2A]xxx ==> BP 1.315 + break; 1.316 + case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.317 + break; 1.318 + case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.319 + break; 1.320 + case 0x045000: // [ef][4c][5D]xxx ==> L2 MODEM 1.321 + break; 1.322 + case 0x046000: // [ef][4c][6E]xxx ==> D/N CONNECT 1.323 + break; 1.324 + case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.325 + break; 1.326 + } 1.327 + case 0x050000: // [ef][5d]xxxx ==> 8274 1.328 + break; 1.329 + case 0x060000: // [ef][6e]xxxx ==> Control regs 1.330 + switch (address & 0x07F000) { 1.331 + default: 1.332 + break; 1.333 + } 1.334 + break; 1.335 + case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.336 + break; 1.337 + } 1.338 + } 1.339 + } 1.340 + 1.341 + LOG_NOT_HANDLED_R(8); 1.342 + 1.343 + return data; 1.344 +} 1.345 + 1.346 +/** 1.347 + * @brief Write M68K memory, 32-bit 1.348 + */ 1.349 +void m68k_write_memory_32(uint32_t address, uint32_t value) 1.350 +{ 1.351 + bool handled = false; 1.352 + 1.353 + // If ROMLMAP is set, force system to access ROM 1.354 + if (!state.romlmap) 1.355 + address |= 0x800000; 1.356 + 1.357 + // Check access permissions 1.358 + ACCESS_CHECK_WR(address, 32); 1.359 + 1.360 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.361 + // ROM access 1.362 + handled = true; 1.363 + } else if (address <= (state.ram_size - 1)) { 1.364 + // RAM access 1.365 + WR32(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.366 + handled = true; 1.367 + } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.368 + // I/O register space, zone A 1.369 + switch (address & 0x0F0000) { 1.370 + case 0x000000: // Map RAM access 1.371 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR32 to MapRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.372 + WR32(state.map, address, 0x7FF, value); 1.373 + handled = true; 1.374 + break; 1.375 + case 0x010000: // General Status Register 1.376 + state.genstat = (value & 0xffff); 1.377 + handled = true; 1.378 + break; 1.379 + case 0x020000: // Video RAM 1.380 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR32 to VideoRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.381 + WR32(state.vram, address, 0x7FFF, value); 1.382 + handled = true; 1.383 break; 1.384 case 0x030000: // Bus Status Register 0 1.385 break; 1.386 @@ -633,7 +841,6 @@ 1.387 } 1.388 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.389 // I/O register space, zone B 1.390 -// printf("RD8 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.391 switch (address & 0xF00000) { 1.392 case 0xC00000: // Expansion slots 1.393 case 0xD00000: 1.394 @@ -646,7 +853,8 @@ 1.395 case 0xD40000: // Expansion slot 5 1.396 case 0xD80000: // Expansion slot 6 1.397 case 0xDC0000: // Expansion slot 7 1.398 - fprintf(stderr, "NOTE: RD8 from expansion card space, addr=0x%08X\n", address); 1.399 + fprintf(stderr, "NOTE: WR32 to expansion card space, addr=0x%08X, data=0x%08X\n", address, value); 1.400 + handled = true; 1.401 break; 1.402 } 1.403 break; 1.404 @@ -670,6 +878,7 @@ 1.405 case 0x042000: // [ef][4c][2A]xxx ==> BP 1.406 break; 1.407 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.408 + state.romlmap = ((value & 0x8000) == 0x8000); 1.409 break; 1.410 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.411 break; 1.412 @@ -681,6 +890,7 @@ 1.413 break; 1.414 } 1.415 case 0x050000: // [ef][5d]xxxx ==> 8274 1.416 + break; 1.417 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.418 switch (address & 0x07F000) { 1.419 default: 1.420 @@ -688,50 +898,56 @@ 1.421 } 1.422 break; 1.423 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.424 - default: 1.425 - fprintf(stderr, "NOTE: RD8 from undefined E/F-block address 0x%08X", address); 1.426 + break; 1.427 } 1.428 } 1.429 } 1.430 - return data; 1.431 + 1.432 + LOG_NOT_HANDLED_W(32); 1.433 } 1.434 1.435 /** 1.436 - * @brief Write M68K memory, 32-bit 1.437 + * @brief Write M68K memory, 16-bit 1.438 */ 1.439 -void m68k_write_memory_32(uint32_t address, uint32_t value) 1.440 +void m68k_write_memory_16(uint32_t address, uint32_t value) 1.441 { 1.442 + bool handled = false; 1.443 + 1.444 // If ROMLMAP is set, force system to access ROM 1.445 if (!state.romlmap) 1.446 address |= 0x800000; 1.447 1.448 // Check access permissions 1.449 - ACCESS_CHECK_WR(address, 32); 1.450 + ACCESS_CHECK_WR(address, 16); 1.451 1.452 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.453 // ROM access 1.454 - WR32(state.rom, address, ROM_SIZE - 1, value); 1.455 + handled = true; 1.456 } else if (address <= (state.ram_size - 1)) { 1.457 // RAM access 1.458 - WR32(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.459 + WR16(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.460 + handled = true; 1.461 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.462 // I/O register space, zone A 1.463 -// printf("WR32 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.464 switch (address & 0x0F0000) { 1.465 case 0x000000: // Map RAM access 1.466 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR32 to MapRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.467 - WR32(state.map, address, 0x7FF, value); 1.468 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR16 to MapRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.469 + WR16(state.map, address, 0x7FF, value); 1.470 + handled = true; 1.471 break; 1.472 - case 0x010000: // General Status Register 1.473 - state.genstat = (value & 0xffff); 1.474 + case 0x010000: // General Status Register (read only) 1.475 + handled = true; 1.476 break; 1.477 case 0x020000: // Video RAM 1.478 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR32 to VideoRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.479 - WR32(state.vram, address, 0x7FFF, value); 1.480 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR16 to VideoRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.481 + WR16(state.vram, address, 0x7FFF, value); 1.482 + handled = true; 1.483 break; 1.484 - case 0x030000: // Bus Status Register 0 1.485 + case 0x030000: // Bus Status Register 0 (read only) 1.486 + handled = true; 1.487 break; 1.488 - case 0x040000: // Bus Status Register 1 1.489 + case 0x040000: // Bus Status Register 1 (read only) 1.490 + handled = true; 1.491 break; 1.492 case 0x050000: // Phone status 1.493 break; 1.494 @@ -784,7 +1000,6 @@ 1.495 } 1.496 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.497 // I/O register space, zone B 1.498 -// printf("WR32 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.499 switch (address & 0xF00000) { 1.500 case 0xC00000: // Expansion slots 1.501 case 0xD00000: 1.502 @@ -797,7 +1012,7 @@ 1.503 case 0xD40000: // Expansion slot 5 1.504 case 0xD80000: // Expansion slot 6 1.505 case 0xDC0000: // Expansion slot 7 1.506 - fprintf(stderr, "NOTE: WR32 to expansion card space, addr=0x%08X, data=0x%08X\n", address, value); 1.507 + fprintf(stderr, "NOTE: WR16 to expansion card space, addr=0x%08X, data=0x%04X\n", address, value); 1.508 break; 1.509 } 1.510 break; 1.511 @@ -822,6 +1037,7 @@ 1.512 break; 1.513 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.514 state.romlmap = ((value & 0x8000) == 0x8000); 1.515 + handled = true; 1.516 break; 1.517 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.518 break; 1.519 @@ -842,49 +1058,55 @@ 1.520 break; 1.521 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.522 break; 1.523 - default: 1.524 - fprintf(stderr, "NOTE: WR32 to undefined E/F-block space, addr=0x%08X, data=0x%08X\n", address, value); 1.525 } 1.526 } 1.527 } 1.528 + 1.529 + LOG_NOT_HANDLED_W(16); 1.530 } 1.531 1.532 /** 1.533 - * @brief Write M68K memory, 16-bit 1.534 + * @brief Write M68K memory, 8-bit 1.535 */ 1.536 -void m68k_write_memory_16(uint32_t address, uint32_t value) 1.537 +void m68k_write_memory_8(uint32_t address, uint32_t value) 1.538 { 1.539 + bool handled = false; 1.540 + 1.541 // If ROMLMAP is set, force system to access ROM 1.542 if (!state.romlmap) 1.543 address |= 0x800000; 1.544 1.545 // Check access permissions 1.546 - ACCESS_CHECK_WR(address, 16); 1.547 + ACCESS_CHECK_WR(address, 8); 1.548 1.549 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.550 - // ROM access 1.551 - WR16(state.rom, address, ROM_SIZE - 1, value); 1.552 + // ROM access (read only!) 1.553 + handled = true; 1.554 } else if (address <= (state.ram_size - 1)) { 1.555 // RAM access 1.556 - WR16(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.557 + WR8(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.558 + handled = true; 1.559 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.560 // I/O register space, zone A 1.561 -// printf("WR16 0x%08X ==> 0x%04X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.562 switch (address & 0x0F0000) { 1.563 case 0x000000: // Map RAM access 1.564 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR16 to MapRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.565 - WR16(state.map, address, 0x7FF, value); 1.566 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR8 to MapRAM mirror, addr=%08X, data=%02X\n", address, value); 1.567 + WR8(state.map, address, 0x7FF, value); 1.568 + handled = true; 1.569 break; 1.570 case 0x010000: // General Status Register 1.571 - state.genstat = (value & 0xffff); 1.572 + handled = true; 1.573 break; 1.574 case 0x020000: // Video RAM 1.575 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR16 to VideoRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.576 - WR16(state.vram, address, 0x7FFF, value); 1.577 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR8 to VideoRAM mirror, addr=%08X\n, data=0x%02X", address, value); 1.578 + WR8(state.vram, address, 0x7FFF, value); 1.579 + handled = true; 1.580 break; 1.581 case 0x030000: // Bus Status Register 0 1.582 + handled = true; 1.583 break; 1.584 case 0x040000: // Bus Status Register 1 1.585 + handled = true; 1.586 break; 1.587 case 0x050000: // Phone status 1.588 break; 1.589 @@ -937,160 +1159,6 @@ 1.590 } 1.591 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.592 // I/O register space, zone B 1.593 -// printf("WR16 0x%08X ==> 0x%04X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.594 - switch (address & 0xF00000) { 1.595 - case 0xC00000: // Expansion slots 1.596 - case 0xD00000: 1.597 - switch (address & 0xFC0000) { 1.598 - case 0xC00000: // Expansion slot 0 1.599 - case 0xC40000: // Expansion slot 1 1.600 - case 0xC80000: // Expansion slot 2 1.601 - case 0xCC0000: // Expansion slot 3 1.602 - case 0xD00000: // Expansion slot 4 1.603 - case 0xD40000: // Expansion slot 5 1.604 - case 0xD80000: // Expansion slot 6 1.605 - case 0xDC0000: // Expansion slot 7 1.606 - fprintf(stderr, "NOTE: WR16 to expansion card space, addr=0x%08X, data=0x%04X\n", address, value); 1.607 - break; 1.608 - } 1.609 - break; 1.610 - case 0xE00000: // HDC, FDC, MCR2 and RTC data bits 1.611 - case 0xF00000: 1.612 - switch (address & 0x070000) { 1.613 - case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.614 - break; 1.615 - case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.616 - break; 1.617 - case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.618 - break; 1.619 - case 0x030000: // [ef][3b]xxxx ==> Real Time Clock data bits 1.620 - break; 1.621 - case 0x040000: // [ef][4c]xxxx ==> General Control Register 1.622 - switch (address & 0x077000) { 1.623 - case 0x040000: // [ef][4c][08]xxx ==> EE 1.624 - break; 1.625 - case 0x041000: // [ef][4c][19]xxx ==> P1E 1.626 - break; 1.627 - case 0x042000: // [ef][4c][2A]xxx ==> BP 1.628 - break; 1.629 - case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.630 - state.romlmap = ((value & 0x8000) == 0x8000); 1.631 - break; 1.632 - case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.633 - break; 1.634 - case 0x045000: // [ef][4c][5D]xxx ==> L2 MODEM 1.635 - break; 1.636 - case 0x046000: // [ef][4c][6E]xxx ==> D/N CONNECT 1.637 - break; 1.638 - case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.639 - break; 1.640 - } 1.641 - case 0x050000: // [ef][5d]xxxx ==> 8274 1.642 - break; 1.643 - case 0x060000: // [ef][6e]xxxx ==> Control regs 1.644 - switch (address & 0x07F000) { 1.645 - default: 1.646 - break; 1.647 - } 1.648 - break; 1.649 - case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.650 - break; 1.651 - default: 1.652 - fprintf(stderr, "NOTE: WR32 to undefined E/F-block space, addr=0x%08X, data=0x%08X\n", address, value); 1.653 - } 1.654 - } 1.655 - } 1.656 -} 1.657 - 1.658 -/** 1.659 - * @brief Write M68K memory, 8-bit 1.660 - */ 1.661 -void m68k_write_memory_8(uint32_t address, uint32_t value) 1.662 -{ 1.663 - // If ROMLMAP is set, force system to access ROM 1.664 - if (!state.romlmap) 1.665 - address |= 0x800000; 1.666 - 1.667 - // Check access permissions 1.668 - ACCESS_CHECK_WR(address, 8); 1.669 - 1.670 - if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.671 - // ROM access 1.672 - WR8(state.rom, address, ROM_SIZE - 1, value); 1.673 - } else if (address <= (state.ram_size - 1)) { 1.674 - // RAM access 1.675 - WR8(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.676 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.677 - // I/O register space, zone A 1.678 -// printf("WR8 0x%08X ==> %02X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.679 - switch (address & 0x0F0000) { 1.680 - case 0x000000: // Map RAM access 1.681 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR8 to MapRAM mirror, addr=%08X, data=%02X\n", address, value); 1.682 - WR8(state.map, address, 0x7FF, value); 1.683 - break; 1.684 - case 0x010000: // General Status Register 1.685 - state.genstat = (value & 0xffff); 1.686 - break; 1.687 - case 0x020000: // Video RAM 1.688 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR8 to VideoRAM mirror, addr=%08X\n, data=0x%02X", address, value); 1.689 - WR8(state.vram, address, 0x7FFF, value); 1.690 - break; 1.691 - case 0x030000: // Bus Status Register 0 1.692 - break; 1.693 - case 0x040000: // Bus Status Register 1 1.694 - break; 1.695 - case 0x050000: // Phone status 1.696 - break; 1.697 - case 0x060000: // DMA Count 1.698 - break; 1.699 - case 0x070000: // Line Printer Status Register 1.700 - break; 1.701 - case 0x080000: // Real Time Clock 1.702 - break; 1.703 - case 0x090000: // Phone registers 1.704 - switch (address & 0x0FF000) { 1.705 - case 0x090000: // Handset relay 1.706 - case 0x098000: 1.707 - break; 1.708 - case 0x091000: // Line select 2 1.709 - case 0x099000: 1.710 - break; 1.711 - case 0x092000: // Hook relay 1 1.712 - case 0x09A000: 1.713 - break; 1.714 - case 0x093000: // Hook relay 2 1.715 - case 0x09B000: 1.716 - break; 1.717 - case 0x094000: // Line 1 hold 1.718 - case 0x09C000: 1.719 - break; 1.720 - case 0x095000: // Line 2 hold 1.721 - case 0x09D000: 1.722 - break; 1.723 - case 0x096000: // Line 1 A-lead 1.724 - case 0x09E000: 1.725 - break; 1.726 - case 0x097000: // Line 2 A-lead 1.727 - case 0x09F000: 1.728 - break; 1.729 - } 1.730 - break; 1.731 - case 0x0A0000: // Miscellaneous Control Register 1.732 - break; 1.733 - case 0x0B0000: // TM/DIALWR 1.734 - break; 1.735 - case 0x0C0000: // CSR 1.736 - break; 1.737 - case 0x0D0000: // DMA Address Register 1.738 - break; 1.739 - case 0x0E0000: // Disk Control Register 1.740 - break; 1.741 - case 0x0F0000: // Line Printer Data Register 1.742 - break; 1.743 - } 1.744 - } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.745 - // I/O register space, zone B 1.746 -// printf("WR8 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.747 switch (address & 0xF00000) { 1.748 case 0xC00000: // Expansion slots 1.749 case 0xD00000: 1.750 @@ -1128,7 +1196,8 @@ 1.751 break; 1.752 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.753 if ((address & 1) == 0) 1.754 - state.romlmap = ((value & 0x8000) == 0x8000); 1.755 + state.romlmap = ((value & 0x80) == 0x80); 1.756 + handled = true; 1.757 break; 1.758 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.759 break; 1.760 @@ -1155,6 +1224,8 @@ 1.761 } 1.762 } 1.763 } 1.764 + 1.765 + LOG_NOT_HANDLED_W(8); 1.766 } 1.767 1.768