Sun, 06 Mar 2011 21:03:32 +0000
Commit GSI patches from Wesley Terpstra
- Add JTAG capture pin
==> allows removing sensitivity to reg_update which caused clocking problems making JTAG unstable
- Use register file backed by RAM blocks
==> saves quite some area and speed on altera
... be sure to enable it using `define CFG_EBR_POSEDGE_REGISTER_FILE
- Fix a minor problem where compilation fails when interrupts are not supported
- Add support to flush icache and dcache per JTAG
- Fix wrong width assignments for PC
Multiplier patch has been left out for now; don't the design synthesizers (Quartus / Xst) split the multiply automatically?
Original-Author: Wesley Terpstra <w.terpsta gsi.de>
Original-Source: Milkymist mailing list postings, 2011-02-28 (11:19 and 13:32) and 2011-03-01
Original-Message-Ids: <4D6B84B5.9040604@gsi.de> <4D6BA3E4.3020609@gsi.de> <4D6CFFF2.6030703@gsi.de>
| philpem@16 | 1 | |
| philpem@16 | 2 | module jtag_tap( |
| philpem@16 | 3 | output tck, |
| philpem@16 | 4 | output tdi, |
| philpem@16 | 5 | input tdo, |
| philpem@18 | 6 | output capture, |
| philpem@16 | 7 | output shift, |
| philpem@18 | 8 | output e1dr, |
| philpem@16 | 9 | output update, |
| philpem@16 | 10 | output reset |
| philpem@16 | 11 | ); |
| philpem@16 | 12 | |
| philpem@18 | 13 | // Unfortunately the exit1 state for DR (e1dr) is mising |
| philpem@18 | 14 | // We can simulate it by interpretting 'update' as e1dr and delaying 'update' |
| philpem@18 | 15 | wire g_capture; |
| philpem@17 | 16 | wire g_shift; |
| philpem@17 | 17 | wire g_update; |
| philpem@18 | 18 | reg update_delay; |
| philpem@17 | 19 | |
| philpem@18 | 20 | assign capture = g_capture & sel; |
| philpem@17 | 21 | assign shift = g_shift & sel; |
| philpem@18 | 22 | assign e1dr = g_update & sel; |
| philpem@18 | 23 | assign update = update_delay; |
| philpem@17 | 24 | |
| philpem@16 | 25 | BSCAN_SPARTAN6 #( |
| philpem@16 | 26 | .JTAG_CHAIN(1) |
| philpem@16 | 27 | ) bscan ( |
| philpem@18 | 28 | .CAPTURE(g_capture), |
| philpem@16 | 29 | .DRCK(tck), |
| philpem@16 | 30 | .RESET(reset), |
| philpem@16 | 31 | .RUNTEST(), |
| philpem@16 | 32 | .SEL(sel), |
| philpem@17 | 33 | .SHIFT(g_shift), |
| philpem@16 | 34 | .TCK(), |
| philpem@16 | 35 | .TDI(tdi), |
| philpem@16 | 36 | .TMS(), |
| philpem@17 | 37 | .UPDATE(g_update), |
| philpem@16 | 38 | .TDO(tdo) |
| philpem@16 | 39 | ); |
| philpem@16 | 40 | |
| philpem@18 | 41 | update_delay <= g_update; |
| philpem@18 | 42 | |
| philpem@16 | 43 | endmodule |