Sun, 04 Apr 2010 20:40:03 +0100
add lm32 source
| philpem@0 | 1 | // ============================================================================ |
| philpem@0 | 2 | // COPYRIGHT NOTICE |
| philpem@0 | 3 | // Copyright 2006 (c) Lattice Semiconductor Corporation |
| philpem@0 | 4 | // ALL RIGHTS RESERVED |
| philpem@0 | 5 | // This confidential and proprietary software may be used only as authorised by |
| philpem@0 | 6 | // a licensing agreement from Lattice Semiconductor Corporation. |
| philpem@0 | 7 | // The entire notice above must be reproduced on all authorized copies and |
| philpem@0 | 8 | // copies may only be made to the extent permitted by a licensing agreement from |
| philpem@0 | 9 | // Lattice Semiconductor Corporation. |
| philpem@0 | 10 | // |
| philpem@0 | 11 | // Lattice Semiconductor Corporation TEL : 1-800-Lattice (USA and Canada) |
| philpem@0 | 12 | // 5555 NE Moore Court 408-826-6000 (other locations) |
| philpem@0 | 13 | // Hillsboro, OR 97124 web : http://www.latticesemi.com/ |
| philpem@0 | 14 | // U.S.A email: techsupport@latticesemi.com |
| philpem@0 | 15 | // ============================================================================/ |
| philpem@0 | 16 | // FILE DETAILS |
| philpem@0 | 17 | // Project : LatticeMico32 |
| philpem@0 | 18 | // File : jtag_cores.v |
| philpem@0 | 19 | // Title : Instantiates all IP cores on JTAG chain. |
| philpem@0 | 20 | // Dependencies : system_conf.v |
| philpem@0 | 21 | // Version : 6.0.14 |
| philpem@0 | 22 | // : modified to use jtagconn for LM32, |
| philpem@0 | 23 | // : all technologies 7/10/07 |
| philpem@0 | 24 | // Version : 7.0SP2, 3.0 |
| philpem@0 | 25 | // : No Change |
| philpem@0 | 26 | // Version : 3.1 |
| philpem@0 | 27 | // : No Change |
| philpem@0 | 28 | // ============================================================================ |
| philpem@0 | 29 | |
| philpem@0 | 30 | `include "system_conf.v" |
| philpem@0 | 31 | |
| philpem@0 | 32 | ///////////////////////////////////////////////////// |
| philpem@0 | 33 | // jtagconn16 Module Definition |
| philpem@0 | 34 | ///////////////////////////////////////////////////// |
| philpem@0 | 35 | |
| philpem@0 | 36 | module jtagconn16 (er2_tdo, jtck, jtdi, jshift, jupdate, jrstn, jce2, ip_enable) ; |
| philpem@0 | 37 | input er2_tdo ; |
| philpem@0 | 38 | output jtck ; |
| philpem@0 | 39 | output jtdi ; |
| philpem@0 | 40 | output jshift ; |
| philpem@0 | 41 | output jupdate ; |
| philpem@0 | 42 | output jrstn ; |
| philpem@0 | 43 | output jce2 ; |
| philpem@0 | 44 | output ip_enable ; |
| philpem@0 | 45 | endmodule |
| philpem@0 | 46 | |
| philpem@0 | 47 | ///////////////////////////////////////////////////// |
| philpem@0 | 48 | // Module interface |
| philpem@0 | 49 | ///////////////////////////////////////////////////// |
| philpem@0 | 50 | |
| philpem@0 | 51 | (* syn_hier="hard" *) module jtag_cores ( |
| philpem@0 | 52 | // ----- Inputs ------- |
| philpem@0 | 53 | reg_d, |
| philpem@0 | 54 | reg_addr_d, |
| philpem@0 | 55 | // ----- Outputs ------- |
| philpem@0 | 56 | reg_update, |
| philpem@0 | 57 | reg_q, |
| philpem@0 | 58 | reg_addr_q, |
| philpem@0 | 59 | jtck, |
| philpem@0 | 60 | jrstn |
| philpem@0 | 61 | ); |
| philpem@0 | 62 | |
| philpem@0 | 63 | ///////////////////////////////////////////////////// |
| philpem@0 | 64 | // Inputs |
| philpem@0 | 65 | ///////////////////////////////////////////////////// |
| philpem@0 | 66 | |
| philpem@0 | 67 | input [7:0] reg_d; |
| philpem@0 | 68 | input [2:0] reg_addr_d; |
| philpem@0 | 69 | |
| philpem@0 | 70 | ///////////////////////////////////////////////////// |
| philpem@0 | 71 | // Outputs |
| philpem@0 | 72 | ///////////////////////////////////////////////////// |
| philpem@0 | 73 | |
| philpem@0 | 74 | output reg_update; |
| philpem@0 | 75 | wire reg_update; |
| philpem@0 | 76 | output [7:0] reg_q; |
| philpem@0 | 77 | wire [7:0] reg_q; |
| philpem@0 | 78 | output [2:0] reg_addr_q; |
| philpem@0 | 79 | wire [2:0] reg_addr_q; |
| philpem@0 | 80 | |
| philpem@0 | 81 | output jtck; |
| philpem@0 | 82 | wire jtck; /* synthesis syn_keep=1 */ |
| philpem@0 | 83 | output jrstn; |
| philpem@0 | 84 | wire jrstn; /* synthesis syn_keep=1 */ |
| philpem@0 | 85 | |
| philpem@0 | 86 | ///////////////////////////////////////////////////// |
| philpem@0 | 87 | // Instantiations |
| philpem@0 | 88 | ///////////////////////////////////////////////////// |
| philpem@0 | 89 | |
| philpem@0 | 90 | wire jtdi; /* synthesis syn_keep=1 */ |
| philpem@0 | 91 | wire er2_tdo2; /* synthesis syn_keep=1 */ |
| philpem@0 | 92 | wire jshift; /* synthesis syn_keep=1 */ |
| philpem@0 | 93 | wire jupdate; /* synthesis syn_keep=1 */ |
| philpem@0 | 94 | wire jce2; /* synthesis syn_keep=1 */ |
| philpem@0 | 95 | wire ip_enable; /* synthesis syn_keep=1 */ |
| philpem@0 | 96 | |
| philpem@0 | 97 | (* JTAG_IP="LM32", IP_ID="0", HUB_ID="0", syn_noprune=1 *) jtagconn16 jtagconn16_lm32_inst ( |
| philpem@0 | 98 | .er2_tdo (er2_tdo2), |
| philpem@0 | 99 | .jtck (jtck), |
| philpem@0 | 100 | .jtdi (jtdi), |
| philpem@0 | 101 | .jshift (jshift), |
| philpem@0 | 102 | .jupdate (jupdate), |
| philpem@0 | 103 | .jrstn (jrstn), |
| philpem@0 | 104 | .jce2 (jce2), |
| philpem@0 | 105 | .ip_enable (ip_enable) |
| philpem@0 | 106 | ); |
| philpem@0 | 107 | |
| philpem@0 | 108 | (* syn_noprune=1 *) jtag_lm32 jtag_lm32_inst ( |
| philpem@0 | 109 | .JTCK (jtck), |
| philpem@0 | 110 | .JTDI (jtdi), |
| philpem@0 | 111 | .JTDO2 (er2_tdo2), |
| philpem@0 | 112 | .JSHIFT (jshift), |
| philpem@0 | 113 | .JUPDATE (jupdate), |
| philpem@0 | 114 | .JRSTN (jrstn), |
| philpem@0 | 115 | .JCE2 (jce2), |
| philpem@0 | 116 | .JTAGREG_ENABLE (ip_enable), |
| philpem@0 | 117 | .CONTROL_DATAN (), |
| philpem@0 | 118 | .REG_UPDATE (reg_update), |
| philpem@0 | 119 | .REG_D (reg_d), |
| philpem@0 | 120 | .REG_ADDR_D (reg_addr_d), |
| philpem@0 | 121 | .REG_Q (reg_q), |
| philpem@0 | 122 | .REG_ADDR_Q (reg_addr_q) |
| philpem@0 | 123 | ); |
| philpem@0 | 124 | |
| philpem@0 | 125 | endmodule |