1.1 --- a/jtag_cores.v Sun Mar 06 19:31:09 2011 +0000 1.2 +++ b/jtag_cores.v Sun Mar 06 19:32:57 2011 +0000 1.3 @@ -27,8 +27,6 @@ 1.4 output jrstn; 1.5 wire jrstn; 1.6 1.7 -assign reg_d = 8'hxx; 1.8 -assign reg_addr_d = 3'bxxx; 1.9 assign reg_update = 1'b0; 1.10 assign reg_q = 8'hxx; 1.11 assign reg_addr_q = 3'bxxx;