lm32_icache.v

changeset 2
a61bb364ae1f
parent 0
cd0b58aa6f83
child 3
b153470d41c5
     1.1 --- a/lm32_icache.v	Sun Apr 04 20:42:58 2010 +0100
     1.2 +++ b/lm32_icache.v	Sun Apr 04 20:52:32 2010 +0100
     1.3 @@ -199,18 +199,20 @@
     1.4  	       // ----- Parameters -------
     1.5  	       .data_width                 (32),
     1.6  	       .address_width              (`LM32_IC_DMEM_ADDR_WIDTH),
     1.7 -`ifdef CFG_ICACHE_DAT_USE_DP_TRUE
     1.8 +`ifdef PLATFORM_LATTICE
     1.9 + `ifdef CFG_ICACHE_DAT_USE_DP_TRUE
    1.10  	       .RAM_IMPLEMENTATION         ("EBR"),
    1.11  	       .RAM_TYPE                   ("RAM_DP_TRUE")
    1.12 -`else
    1.13 - `ifdef CFG_ICACHE_DAT_USE_DP
    1.14 + `else
    1.15 +  `ifdef CFG_ICACHE_DAT_USE_DP
    1.16  	       .RAM_IMPLEMENTATION         ("EBR"),
    1.17  	       .RAM_TYPE                   ("RAM_DP")
    1.18 - `else
    1.19 -  `ifdef CFG_ICACHE_DAT_USE_SLICE
    1.20 +  `else
    1.21 +   `ifdef CFG_ICACHE_DAT_USE_SLICE
    1.22  	       .RAM_IMPLEMENTATION         ("SLICE")
    1.23 -  `else
    1.24 +   `else
    1.25  	       .RAM_IMPLEMENTATION         ("AUTO")
    1.26 +   `endif
    1.27    `endif
    1.28   `endif
    1.29  `endif