lm32_dcache.v

changeset 3
b153470d41c5
parent 2
a61bb364ae1f
     1.1 --- a/lm32_dcache.v	Sun Apr 04 20:52:32 2010 +0100
     1.2 +++ b/lm32_dcache.v	Sun Apr 04 22:05:07 2010 +0100
     1.3 @@ -195,8 +195,9 @@
     1.4  		  #(
     1.5  		    // ----- Parameters -------
     1.6  		    .data_width (32),
     1.7 -		    .address_width (`LM32_DC_DMEM_ADDR_WIDTH),
     1.8 +		    .address_width (`LM32_DC_DMEM_ADDR_WIDTH)
     1.9  `ifdef PLATFORM_LATTICE
    1.10 +			,
    1.11   `ifdef CFG_DCACHE_DAT_USE_DP_TRUE
    1.12  		    .RAM_IMPLEMENTATION ("EBR"),
    1.13  		    .RAM_TYPE ("RAM_DP_TRUE")
    1.14 @@ -232,15 +233,18 @@
    1.15  		       #(
    1.16  			 // ----- Parameters -------
    1.17  			 .data_width (8),
    1.18 -			 .address_width (`LM32_DC_DMEM_ADDR_WIDTH),
    1.19 -`ifdef CFG_DCACHE_DAT_USE_DP_TRUE
    1.20 +			 .address_width (`LM32_DC_DMEM_ADDR_WIDTH)
    1.21 +`ifdef PLATFORM_LATTICE
    1.22 +			 ,
    1.23 + `ifdef CFG_DCACHE_DAT_USE_DP_TRUE
    1.24  			 .RAM_IMPLEMENTATION ("EBR"),
    1.25  			 .RAM_TYPE ("RAM_DP_TRUE")
    1.26 -`else
    1.27 - `ifdef CFG_DCACHE_DAT_USE_SLICE
    1.28 + `else
    1.29 +  `ifdef CFG_DCACHE_DAT_USE_SLICE
    1.30  			 .RAM_IMPLEMENTATION ("SLICE")
    1.31 - `else
    1.32 +  `else
    1.33  			 .RAM_IMPLEMENTATION ("AUTO")
    1.34 +  `endif
    1.35   `endif
    1.36  `endif
    1.37  			 ) way_0_data_ram 
    1.38 @@ -266,15 +270,18 @@
    1.39  	     #(
    1.40  	       // ----- Parameters -------
    1.41  	       .data_width (`LM32_DC_TAGS_WIDTH),
    1.42 -	       .address_width (`LM32_DC_TMEM_ADDR_WIDTH),
    1.43 -`ifdef CFG_DCACHE_DAT_USE_DP_TRUE
    1.44 +	       .address_width (`LM32_DC_TMEM_ADDR_WIDTH)
    1.45 +`ifdef PLATFORM_LATTICE
    1.46 +			 ,
    1.47 + `ifdef CFG_DCACHE_DAT_USE_DP_TRUE
    1.48  	       .RAM_IMPLEMENTATION ("EBR"),
    1.49  	       .RAM_TYPE ("RAM_DP_TRUE")
    1.50 -`else
    1.51 - `ifdef CFG_DCACHE_DAT_USE_SLICE
    1.52 + `else
    1.53 +  `ifdef CFG_DCACHE_DAT_USE_SLICE
    1.54  	       .RAM_IMPLEMENTATION ("SLICE")
    1.55 - `else
    1.56 +  `else
    1.57  	       .RAM_IMPLEMENTATION ("AUTO")
    1.58 +  `endif
    1.59   `endif
    1.60  `endif
    1.61  	       ) way_0_tag_ram