lm32_icache.v

changeset 3
b153470d41c5
parent 2
a61bb364ae1f
     1.1 --- a/lm32_icache.v	Sun Apr 04 20:52:32 2010 +0100
     1.2 +++ b/lm32_icache.v	Sun Apr 04 22:05:07 2010 +0100
     1.3 @@ -198,8 +198,9 @@
     1.4  	     #(
     1.5  	       // ----- Parameters -------
     1.6  	       .data_width                 (32),
     1.7 -	       .address_width              (`LM32_IC_DMEM_ADDR_WIDTH),
     1.8 +	       .address_width              (`LM32_IC_DMEM_ADDR_WIDTH)
     1.9  `ifdef PLATFORM_LATTICE
    1.10 +			,
    1.11   `ifdef CFG_ICACHE_DAT_USE_DP_TRUE
    1.12  	       .RAM_IMPLEMENTATION         ("EBR"),
    1.13  	       .RAM_TYPE                   ("RAM_DP_TRUE")
    1.14 @@ -237,19 +238,22 @@
    1.15  	     #(
    1.16  	       // ----- Parameters -------
    1.17  	       .data_width                 (`LM32_IC_TAGS_WIDTH),
    1.18 -	       .address_width              (`LM32_IC_TMEM_ADDR_WIDTH),
    1.19 -`ifdef CFG_ICACHE_DAT_USE_DP_TRUE
    1.20 +	       .address_width              (`LM32_IC_TMEM_ADDR_WIDTH)
    1.21 +`ifdef PLATFORM_LATTICE
    1.22 +			,
    1.23 + `ifdef CFG_ICACHE_DAT_USE_DP_TRUE
    1.24  	       .RAM_IMPLEMENTATION         ("EBR"),
    1.25  	       .RAM_TYPE                   ("RAM_DP_TRUE")
    1.26 -`else
    1.27 - `ifdef CFG_ICACHE_DAT_USE_DP
    1.28 + `else
    1.29 +  `ifdef CFG_ICACHE_DAT_USE_DP
    1.30  	       .RAM_IMPLEMENTATION         ("EBR"),
    1.31  	       .RAM_TYPE                   ("RAM_DP")
    1.32 - `else
    1.33 -  `ifdef CFG_ICACHE_DAT_USE_SLICE
    1.34 +  `else
    1.35 +   `ifdef CFG_ICACHE_DAT_USE_SLICE
    1.36  	       .RAM_IMPLEMENTATION         ("SLICE")
    1.37 -  `else
    1.38 +   `else
    1.39  	       .RAM_IMPLEMENTATION         ("AUTO")
    1.40 +   `endif
    1.41    `endif
    1.42   `endif
    1.43  `endif