lm32_dp_ram.v

changeset 18
cc945f778cd7
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/lm32_dp_ram.v	Sun Mar 06 21:03:32 2011 +0000
     1.3 @@ -0,0 +1,35 @@
     1.4 +module lm32_dp_ram(
     1.5 +	clk_i,
     1.6 +	rst_i,
     1.7 +	we_i,
     1.8 +	waddr_i,
     1.9 +	wdata_i,
    1.10 +	raddr_i,
    1.11 +	rdata_o);
    1.12 +
    1.13 +parameter addr_width = 32;
    1.14 +parameter addr_depth = 1024;
    1.15 +parameter data_width = 8;
    1.16 +
    1.17 +input clk_i;
    1.18 +input rst_i;
    1.19 +input we_i;
    1.20 +input [addr_width-1:0] waddr_i;
    1.21 +input [data_width-1:0] wdata_i;
    1.22 +input [addr_width-1:0] raddr_i;
    1.23 +output [data_width-1:0] rdata_o;
    1.24 +
    1.25 +reg [data_width-1:0] ram[addr_depth-1:0];
    1.26 +
    1.27 +reg [addr_width-1:0] raddr_r;
    1.28 +assign rdata_o = ram[raddr_r];
    1.29 +
    1.30 +always @ (posedge clk_i)
    1.31 +begin
    1.32 +	if (we_i)
    1.33 +		ram[waddr_i] <= wdata_i;
    1.34 +	raddr_r <= raddr_i;
    1.35 +end
    1.36 +
    1.37 +endmodule
    1.38 +