IPCores/lm32_cpu / file diff

     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/typeb.v	Sun Apr 04 20:40:03 2010 +0100
     1.3 @@ -0,0 +1,58 @@
     1.4 +// =============================================================================
     1.5 +//                           COPYRIGHT NOTICE
     1.6 +// Copyright 2006 (c) Lattice Semiconductor Corporation
     1.7 +// ALL RIGHTS RESERVED
     1.8 +// This confidential and proprietary software may be used only as authorised by
     1.9 +// a licensing agreement from Lattice Semiconductor Corporation.
    1.10 +// The entire notice above must be reproduced on all authorized copies and
    1.11 +// copies may only be made to the extent permitted by a licensing agreement from
    1.12 +// Lattice Semiconductor Corporation.
    1.13 +//
    1.14 +// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    1.15 +// 5555 NE Moore Court                            408-826-6000 (other locations)
    1.16 +// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    1.17 +// U.S.A                                   email: techsupport@latticesemi.com
    1.18 +// =============================================================================/
    1.19 +//                         FILE DETAILS
    1.20 +// Project          : LatticeMico32
    1.21 +// File             : TYPEB.v
    1.22 +// Description:
    1.23 +//    This is one of the two types of cells that are used to create ER1/ER2
    1.24 +//    register bits.
    1.25 +// Dependencies     : None
    1.26 +// Version          : 6.1.17
    1.27 +//   Modified typeb module to remove redundant DATA_OUT port.
    1.28 +// Version          : 7.0SP2, 3.0
    1.29 +//                  : No Change
    1.30 +// Version          : 3.1
    1.31 +//                  : No Change
    1.32 +// =============================================================================
    1.33 +module TYPEB
    1.34 +   (
    1.35 +      input CLK,
    1.36 +      input RESET_N,
    1.37 +      input CLKEN,
    1.38 +      input TDI,
    1.39 +      output TDO,
    1.40 +      input DATA_IN,
    1.41 +      input CAPTURE_DR
    1.42 +   );
    1.43 +
    1.44 +   reg tdoInt;
    1.45 +
    1.46 +   always @ (negedge CLK or negedge RESET_N)
    1.47 +   begin
    1.48 +      if (RESET_N== 1'b0)
    1.49 +         tdoInt <= 1'b0;
    1.50 +      else if (CLK == 1'b0)
    1.51 +         if (CLKEN==1'b1)
    1.52 +            if (CAPTURE_DR==1'b0)
    1.53 +               tdoInt <= TDI;
    1.54 +            else
    1.55 +               tdoInt <= DATA_IN;
    1.56 +   end
    1.57 +
    1.58 +   assign TDO = tdoInt;
    1.59 +
    1.60 +endmodule
    1.61 +