Sat, 06 Aug 2011 00:02:46 +0100
[UPSTREAM PULL] Update baseline to LatticeMico32 v3.8 from Diamond 1.3-lm32 distribution package (datestamp May 2011)
1 // ==================================================================
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37 // FILE DETAILS
38 // Project : LatticeMico32
39 // File : lm32_shifter.v
40 // Title : Barrel shifter
41 // Dependencies : lm32_include.v
42 // Version : 6.1.17
43 // : Initial Release
44 // Version : 7.0SP2, 3.0
45 // : No Change
46 // Version : 3.1
47 // : No Change
48 // =============================================================================
50 `include "lm32_include.v"
52 /////////////////////////////////////////////////////
53 // Module interface
54 /////////////////////////////////////////////////////
56 module lm32_shifter (
57 // ----- Inputs -------
58 clk_i,
59 rst_i,
60 stall_x,
61 direction_x,
62 sign_extend_x,
63 operand_0_x,
64 operand_1_x,
65 // ----- Outputs -------
66 shifter_result_m
67 );
69 /////////////////////////////////////////////////////
70 // Inputs
71 /////////////////////////////////////////////////////
73 input clk_i; // Clock
74 input rst_i; // Reset
75 input stall_x; // Stall instruction in X stage
76 input direction_x; // Direction to shift
77 input sign_extend_x; // Whether shift is arithmetic (1'b1) or logical (1'b0)
78 input [`LM32_WORD_RNG] operand_0_x; // Operand to shift
79 input [`LM32_WORD_RNG] operand_1_x; // Operand that specifies how many bits to shift by
81 /////////////////////////////////////////////////////
82 // Outputs
83 /////////////////////////////////////////////////////
85 output [`LM32_WORD_RNG] shifter_result_m; // Result of shift
86 wire [`LM32_WORD_RNG] shifter_result_m;
88 /////////////////////////////////////////////////////
89 // Internal nets and registers
90 /////////////////////////////////////////////////////
92 reg direction_m;
93 reg [`LM32_WORD_RNG] left_shift_result;
94 reg [`LM32_WORD_RNG] right_shift_result;
95 reg [`LM32_WORD_RNG] left_shift_operand;
96 wire [`LM32_WORD_RNG] right_shift_operand;
97 wire fill_value;
98 wire [`LM32_WORD_RNG] right_shift_in;
100 integer shift_idx_0;
101 integer shift_idx_1;
103 /////////////////////////////////////////////////////
104 // Combinational Logic
105 /////////////////////////////////////////////////////
107 // Select operands - To perform a left shift, we reverse the bits and perform a right shift
108 always @(*)
109 begin
110 for (shift_idx_0 = 0; shift_idx_0 < `LM32_WORD_WIDTH; shift_idx_0 = shift_idx_0 + 1)
111 left_shift_operand[`LM32_WORD_WIDTH-1-shift_idx_0] = operand_0_x[shift_idx_0];
112 end
113 assign right_shift_operand = direction_x == `LM32_SHIFT_OP_LEFT ? left_shift_operand : operand_0_x;
115 // Determine fill value for right shift - Sign bit for arithmetic shift, or zero for logical shift
116 assign fill_value = (sign_extend_x == `TRUE) && (direction_x == `LM32_SHIFT_OP_RIGHT)
117 ? operand_0_x[`LM32_WORD_WIDTH-1]
118 : 1'b0;
120 // Determine bits to shift in for right shift or rotate
121 assign right_shift_in = {`LM32_WORD_WIDTH{fill_value}};
123 // Reverse bits to get left shift result
124 always @(*)
125 begin
126 for (shift_idx_1 = 0; shift_idx_1 < `LM32_WORD_WIDTH; shift_idx_1 = shift_idx_1 + 1)
127 left_shift_result[`LM32_WORD_WIDTH-1-shift_idx_1] = right_shift_result[shift_idx_1];
128 end
130 // Select result
131 assign shifter_result_m = direction_m == `LM32_SHIFT_OP_LEFT ? left_shift_result : right_shift_result;
133 /////////////////////////////////////////////////////
134 // Sequential Logic
135 /////////////////////////////////////////////////////
137 // Perform right shift
138 always @(posedge clk_i `CFG_RESET_SENSITIVITY)
139 begin
140 if (rst_i == `TRUE)
141 begin
142 right_shift_result <= #1 {`LM32_WORD_WIDTH{1'b0}};
143 direction_m <= #1 `FALSE;
144 end
145 else
146 begin
147 if (stall_x == `FALSE)
148 begin
149 right_shift_result <= #1 {right_shift_in, right_shift_operand} >> operand_1_x[`LM32_SHIFT_RNG];
150 direction_m <= #1 direction_x;
151 end
152 end
153 end
155 endmodule