Sun, 06 Mar 2011 21:03:32 +0000
Commit GSI patches from Wesley Terpstra
- Add JTAG capture pin
==> allows removing sensitivity to reg_update which caused clocking problems making JTAG unstable
- Use register file backed by RAM blocks
==> saves quite some area and speed on altera
... be sure to enable it using `define CFG_EBR_POSEDGE_REGISTER_FILE
- Fix a minor problem where compilation fails when interrupts are not supported
- Add support to flush icache and dcache per JTAG
- Fix wrong width assignments for PC
Multiplier patch has been left out for now; don't the design synthesizers (Quartus / Xst) split the multiply automatically?
Original-Author: Wesley Terpstra <w.terpsta gsi.de>
Original-Source: Milkymist mailing list postings, 2011-02-28 (11:19 and 13:32) and 2011-03-01
Original-Message-Ids: <4D6B84B5.9040604@gsi.de> <4D6BA3E4.3020609@gsi.de> <4D6CFFF2.6030703@gsi.de>
1 // =============================================================================
2 // COPYRIGHT NOTICE
3 // Copyright 2006 (c) Lattice Semiconductor Corporation
4 // ALL RIGHTS RESERVED
5 // This confidential and proprietary software may be used only as authorised by
6 // a licensing agreement from Lattice Semiconductor Corporation.
7 // The entire notice above must be reproduced on all authorized copies and
8 // copies may only be made to the extent permitted by a licensing agreement from
9 // Lattice Semiconductor Corporation.
10 //
11 // Lattice Semiconductor Corporation TEL : 1-800-Lattice (USA and Canada)
12 // 5555 NE Moore Court 408-826-6000 (other locations)
13 // Hillsboro, OR 97124 web : http://www.latticesemi.com/
14 // U.S.A email: techsupport@latticesemi.com
15 // =============================================================================/
16 // FILE DETAILS
17 // Project : LatticeMico32
18 // File : lm32_shifter.v
19 // Title : Barrel shifter
20 // Dependencies : lm32_include.v
21 // Version : 6.1.17
22 // : Initial Release
23 // Version : 7.0SP2, 3.0
24 // : No Change
25 // Version : 3.1
26 // : No Change
27 // =============================================================================
29 `include "lm32_include.v"
31 /////////////////////////////////////////////////////
32 // Module interface
33 /////////////////////////////////////////////////////
35 module lm32_shifter (
36 // ----- Inputs -------
37 clk_i,
38 rst_i,
39 stall_x,
40 direction_x,
41 sign_extend_x,
42 operand_0_x,
43 operand_1_x,
44 // ----- Outputs -------
45 shifter_result_m
46 );
48 /////////////////////////////////////////////////////
49 // Inputs
50 /////////////////////////////////////////////////////
52 input clk_i; // Clock
53 input rst_i; // Reset
54 input stall_x; // Stall instruction in X stage
55 input direction_x; // Direction to shift
56 input sign_extend_x; // Whether shift is arithmetic (1'b1) or logical (1'b0)
57 input [`LM32_WORD_RNG] operand_0_x; // Operand to shift
58 input [`LM32_WORD_RNG] operand_1_x; // Operand that specifies how many bits to shift by
60 /////////////////////////////////////////////////////
61 // Outputs
62 /////////////////////////////////////////////////////
64 output [`LM32_WORD_RNG] shifter_result_m; // Result of shift
65 wire [`LM32_WORD_RNG] shifter_result_m;
67 /////////////////////////////////////////////////////
68 // Internal nets and registers
69 /////////////////////////////////////////////////////
71 reg direction_m;
72 reg [`LM32_WORD_RNG] left_shift_result;
73 reg [`LM32_WORD_RNG] right_shift_result;
74 reg [`LM32_WORD_RNG] left_shift_operand;
75 wire [`LM32_WORD_RNG] right_shift_operand;
76 wire fill_value;
77 wire [`LM32_WORD_RNG] right_shift_in;
79 integer shift_idx_0;
80 integer shift_idx_1;
82 /////////////////////////////////////////////////////
83 // Combinational Logic
84 /////////////////////////////////////////////////////
86 // Select operands - To perform a left shift, we reverse the bits and perform a right shift
87 always @(*)
88 begin
89 for (shift_idx_0 = 0; shift_idx_0 < `LM32_WORD_WIDTH; shift_idx_0 = shift_idx_0 + 1)
90 left_shift_operand[`LM32_WORD_WIDTH-1-shift_idx_0] = operand_0_x[shift_idx_0];
91 end
92 assign right_shift_operand = direction_x == `LM32_SHIFT_OP_LEFT ? left_shift_operand : operand_0_x;
94 // Determine fill value for right shift - Sign bit for arithmetic shift, or zero for logical shift
95 assign fill_value = (sign_extend_x == `TRUE) && (direction_x == `LM32_SHIFT_OP_RIGHT)
96 ? operand_0_x[`LM32_WORD_WIDTH-1]
97 : 1'b0;
99 // Determine bits to shift in for right shift or rotate
100 assign right_shift_in = {`LM32_WORD_WIDTH{fill_value}};
102 // Reverse bits to get left shift result
103 always @(*)
104 begin
105 for (shift_idx_1 = 0; shift_idx_1 < `LM32_WORD_WIDTH; shift_idx_1 = shift_idx_1 + 1)
106 left_shift_result[`LM32_WORD_WIDTH-1-shift_idx_1] = right_shift_result[shift_idx_1];
107 end
109 // Select result
110 assign shifter_result_m = direction_m == `LM32_SHIFT_OP_LEFT ? left_shift_result : right_shift_result;
112 /////////////////////////////////////////////////////
113 // Sequential Logic
114 /////////////////////////////////////////////////////
116 // Perform right shift
117 always @(posedge clk_i `CFG_RESET_SENSITIVITY)
118 begin
119 if (rst_i == `TRUE)
120 begin
121 right_shift_result <= {`LM32_WORD_WIDTH{1'b0}};
122 direction_m <= `FALSE;
123 end
124 else
125 begin
126 if (stall_x == `FALSE)
127 begin
128 right_shift_result <= {right_shift_in, right_shift_operand} >> operand_1_x[`LM32_SHIFT_RNG];
129 direction_m <= direction_x;
130 end
131 end
132 end
134 endmodule