Sun, 04 Apr 2010 20:40:03 +0100
add lm32 source
| philpem@0 | 1 | // ============================================================================= |
| philpem@0 | 2 | // COPYRIGHT NOTICE |
| philpem@0 | 3 | // Copyright 2006 (c) Lattice Semiconductor Corporation |
| philpem@0 | 4 | // ALL RIGHTS RESERVED |
| philpem@0 | 5 | // This confidential and proprietary software may be used only as authorised by |
| philpem@0 | 6 | // a licensing agreement from Lattice Semiconductor Corporation. |
| philpem@0 | 7 | // The entire notice above must be reproduced on all authorized copies and |
| philpem@0 | 8 | // copies may only be made to the extent permitted by a licensing agreement from |
| philpem@0 | 9 | // Lattice Semiconductor Corporation. |
| philpem@0 | 10 | // |
| philpem@0 | 11 | // Lattice Semiconductor Corporation TEL : 1-800-Lattice (USA and Canada) |
| philpem@0 | 12 | // 5555 NE Moore Court 408-826-6000 (other locations) |
| philpem@0 | 13 | // Hillsboro, OR 97124 web : http://www.latticesemi.com/ |
| philpem@0 | 14 | // U.S.A email: techsupport@latticesemi.com |
| philpem@0 | 15 | // =============================================================================/ |
| philpem@0 | 16 | // FILE DETAILS |
| philpem@0 | 17 | // Project : LatticeMico32 |
| philpem@0 | 18 | // File : lm32_logic_op.v |
| philpem@0 | 19 | // Title : Logic operations (and / or / not etc) |
| philpem@0 | 20 | // Dependencies : lm32_include.v |
| philpem@0 | 21 | // Version : 6.1.17 |
| philpem@0 | 22 | // : Initial Release |
| philpem@0 | 23 | // Version : 7.0SP2, 3.0 |
| philpem@0 | 24 | // : No Change |
| philpem@0 | 25 | // Version : 3.1 |
| philpem@0 | 26 | // : No Change |
| philpem@0 | 27 | // ============================================================================= |
| philpem@0 | 28 | |
| philpem@0 | 29 | `include "lm32_include.v" |
| philpem@0 | 30 | |
| philpem@0 | 31 | ///////////////////////////////////////////////////// |
| philpem@0 | 32 | // Module interface |
| philpem@0 | 33 | ///////////////////////////////////////////////////// |
| philpem@0 | 34 | |
| philpem@0 | 35 | module lm32_logic_op ( |
| philpem@0 | 36 | // ----- Inputs ------- |
| philpem@0 | 37 | logic_op_x, |
| philpem@0 | 38 | operand_0_x, |
| philpem@0 | 39 | operand_1_x, |
| philpem@0 | 40 | // ----- Outputs ------- |
| philpem@0 | 41 | logic_result_x |
| philpem@0 | 42 | ); |
| philpem@0 | 43 | |
| philpem@0 | 44 | ///////////////////////////////////////////////////// |
| philpem@0 | 45 | // Inputs |
| philpem@0 | 46 | ///////////////////////////////////////////////////// |
| philpem@0 | 47 | |
| philpem@0 | 48 | input [`LM32_LOGIC_OP_RNG] logic_op_x; |
| philpem@0 | 49 | input [`LM32_WORD_RNG] operand_0_x; |
| philpem@0 | 50 | input [`LM32_WORD_RNG] operand_1_x; |
| philpem@0 | 51 | |
| philpem@0 | 52 | ///////////////////////////////////////////////////// |
| philpem@0 | 53 | // Outputs |
| philpem@0 | 54 | ///////////////////////////////////////////////////// |
| philpem@0 | 55 | |
| philpem@0 | 56 | output [`LM32_WORD_RNG] logic_result_x; |
| philpem@0 | 57 | reg [`LM32_WORD_RNG] logic_result_x; |
| philpem@0 | 58 | |
| philpem@0 | 59 | ///////////////////////////////////////////////////// |
| philpem@0 | 60 | // Internal nets and registers |
| philpem@0 | 61 | ///////////////////////////////////////////////////// |
| philpem@0 | 62 | |
| philpem@0 | 63 | integer logic_idx; |
| philpem@0 | 64 | |
| philpem@0 | 65 | ///////////////////////////////////////////////////// |
| philpem@0 | 66 | // Combinational Logic |
| philpem@0 | 67 | ///////////////////////////////////////////////////// |
| philpem@0 | 68 | |
| philpem@0 | 69 | always @(*) |
| philpem@0 | 70 | begin |
| philpem@0 | 71 | for(logic_idx = 0; logic_idx < `LM32_WORD_WIDTH; logic_idx = logic_idx + 1) |
| philpem@0 | 72 | logic_result_x[logic_idx] = logic_op_x[{operand_1_x[logic_idx], operand_0_x[logic_idx]}]; |
| philpem@0 | 73 | end |
| philpem@0 | 74 | |
| philpem@0 | 75 | endmodule |
| philpem@0 | 76 |