IPCores/lm32_cpu / file diff

     1.1 diff -r cd0b58aa6f83 -r 07be9df9fee8 lm32_cpu.v
     1.2 --- a/lm32_cpu.v	Sun Apr 04 20:40:03 2010 +0100
     1.3 +++ b/lm32_cpu.v	Fri Aug 13 01:13:04 2010 +0100
     1.4 @@ -536,7 +536,6 @@
     1.5  `endif
     1.6  wire direction_d;                               // Which direction to shift in
     1.7  reg direction_x;                                        
     1.8 -reg direction_m;
     1.9  wire [`LM32_WORD_RNG] shifter_result_m;         // Result of shifter
    1.10  `endif
    1.11  `ifdef CFG_MC_BARREL_SHIFT_ENABLED
    1.12 @@ -789,7 +788,6 @@
    1.13      .i_dat_i                (I_DAT_I),
    1.14      .i_ack_i                (I_ACK_I),
    1.15      .i_err_i                (I_ERR_I),
    1.16 -    .i_rty_i                (I_RTY_I),
    1.17  `endif
    1.18  `ifdef CFG_HW_DEBUG_ENABLED
    1.19      .jtag_read_enable       (jtag_read_enable),
    1.20 @@ -932,7 +930,6 @@
    1.21      .stall_a                (stall_a),
    1.22      .stall_x                (stall_x),
    1.23      .stall_m                (stall_m),
    1.24 -    .kill_x                 (kill_x),
    1.25      .kill_m                 (kill_m),
    1.26      .exception_m            (exception_m),
    1.27      .store_operand_x        (store_operand_x),
    1.28 @@ -957,7 +954,6 @@
    1.29      .d_dat_i                (D_DAT_I),
    1.30      .d_ack_i                (D_ACK_I),
    1.31      .d_err_i                (D_ERR_I),
    1.32 -    .d_rty_i                (D_RTY_I),
    1.33      // ----- Outputs -------
    1.34      // To pipeline
    1.35  `ifdef CFG_DCACHE_ENABLED
    1.36 @@ -2264,8 +2260,8 @@
    1.37  `endif
    1.38  `ifdef CFG_SIGN_EXTEND_ENABLED
    1.39          x_result_sel_sext_x <= `FALSE;
    1.40 -`endif    
    1.41 -        x_result_sel_logic_x <= `FALSE;
    1.42 +`endif  
    1.43 +	x_result_sel_logic_x <= `FALSE;
    1.44  `ifdef CFG_USER_ENABLED
    1.45          x_result_sel_user_x <= `FALSE;
    1.46  `endif
    1.47 @@ -2331,9 +2327,6 @@
    1.48          exception_m <= `FALSE;
    1.49          load_m <= `FALSE;
    1.50          store_m <= `FALSE;
    1.51 -`ifdef CFG_PL_BARREL_SHIFT_ENABLED
    1.52 -        direction_m <= `FALSE;
    1.53 -`endif
    1.54          write_enable_m <= `FALSE;            
    1.55          write_idx_m <= {`LM32_REG_IDX_WIDTH{1'b0}};
    1.56          condition_met_m <= `FALSE;
    1.57 @@ -2384,7 +2377,7 @@
    1.58  `ifdef CFG_SIGN_EXTEND_ENABLED
    1.59              x_result_sel_sext_x <= x_result_sel_sext_d;
    1.60  `endif    
    1.61 -            x_result_sel_logic_x <= x_result_sel_logic_d;
    1.62 +	    x_result_sel_logic_x <= x_result_sel_logic_d;
    1.63  `ifdef CFG_USER_ENABLED
    1.64              x_result_sel_user_x <= x_result_sel_user_d;
    1.65  `endif
    1.66 @@ -2458,7 +2451,6 @@
    1.67              end
    1.68              m_bypass_enable_m <= m_bypass_enable_x;
    1.69  `ifdef CFG_PL_BARREL_SHIFT_ENABLED
    1.70 -            direction_m <= direction_x;
    1.71  `endif
    1.72              load_m <= load_x;
    1.73              store_m <= store_x;