Merge LM32 v3.8 into local mainline

Sat, 06 Aug 2011 01:32:07 +0100

author
Philip Pemberton <philpem@philpem.me.uk>
date
Sat, 06 Aug 2011 01:32:07 +0100
changeset 28
da23ab8ef7b4
parent 25
7422134cbfea
parent 27
d6c693415d59
child 30
614f58128bcc

Merge LM32 v3.8 into local mainline

Changes in this release:
FEATURE: Support for dynamically switching EBA to DEBA via a GPIO
BUGFIX: EA now reports instruction which caused the data abort, rather than the instruction following it
STYLE: Update comments to refer to latest Lattice license

rtl/jtag_cores.v file | annotate | diff | revisions
rtl/lm32_adder.v file | annotate | diff | revisions
rtl/lm32_addsub.v file | annotate | diff | revisions
rtl/lm32_cpu.v file | annotate | diff | revisions
rtl/lm32_dcache.v file | annotate | diff | revisions
rtl/lm32_debug.v file | annotate | diff | revisions
rtl/lm32_decoder.v file | annotate | diff | revisions
rtl/lm32_functions.v file | annotate | diff | revisions
rtl/lm32_icache.v file | annotate | diff | revisions
rtl/lm32_include.v file | annotate | diff | revisions
rtl/lm32_instruction_unit.v file | annotate | diff | revisions
rtl/lm32_interrupt.v file | annotate | diff | revisions
rtl/lm32_jtag.v file | annotate | diff | revisions
rtl/lm32_load_store_unit.v file | annotate | diff | revisions
rtl/lm32_logic_op.v file | annotate | diff | revisions
rtl/lm32_mc_arithmetic.v file | annotate | diff | revisions
rtl/lm32_multiplier.v file | annotate | diff | revisions
rtl/lm32_ram.v file | annotate | diff | revisions
rtl/lm32_shifter.v file | annotate | diff | revisions
rtl/lm32_top.v file | annotate | diff | revisions
     1.1 --- a/rtl/jtag_cores.v	Tue Mar 08 09:59:34 2011 +0000
     1.2 +++ b/rtl/jtag_cores.v	Sat Aug 06 01:32:07 2011 +0100
     1.3 @@ -1,66 +1,146 @@
     1.4 -// Modified by GSI to use simple positive edge clocking and the JTAG capture state
     1.5 -
     1.6 -module jtag_cores (
     1.7 -    input [7:0] reg_d,
     1.8 -    input [2:0] reg_addr_d,
     1.9 -    output reg_update,
    1.10 -    output [7:0] reg_q,
    1.11 -    output [2:0] reg_addr_q,
    1.12 -    output jtck,
    1.13 -    output jrstn
    1.14 -);
    1.15 +//   ==================================================================
    1.16 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    1.17 +//   ------------------------------------------------------------------
    1.18 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    1.19 +//   ALL RIGHTS RESERVED 
    1.20 +//   ------------------------------------------------------------------
    1.21 +//
    1.22 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    1.23 +//
    1.24 +//   Permission:
    1.25 +//
    1.26 +//      Lattice Semiconductor grants permission to use this code
    1.27 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    1.28 +//      Open Source License Agreement.  
    1.29 +//
    1.30 +//   Disclaimer:
    1.31 +//
    1.32 +//      Lattice Semiconductor provides no warranty regarding the use or
    1.33 +//      functionality of this code. It is the user's responsibility to
    1.34 +//      verify the userÔŅĹs design for consistency and functionality through
    1.35 +//      the use of formal verification methods.
    1.36 +//
    1.37 +//   --------------------------------------------------------------------
    1.38 +//
    1.39 +//                  Lattice Semiconductor Corporation
    1.40 +//                  5555 NE Moore Court
    1.41 +//                  Hillsboro, OR 97214
    1.42 +//                  U.S.A
    1.43 +//
    1.44 +//                  TEL: 1-800-Lattice (USA and Canada)
    1.45 +//                         503-286-8001 (other locations)
    1.46 +//
    1.47 +//                  web: http://www.latticesemi.com/
    1.48 +//                  email: techsupport@latticesemi.com
    1.49 +//
    1.50 +//   --------------------------------------------------------------------
    1.51 +//                         FILE DETAILS
    1.52 +// Project          : LatticeMico32
    1.53 +// File             : jtag_cores.v
    1.54 +// Title            : Instantiates all IP cores on JTAG chain.
    1.55 +// Dependencies     : system_conf.v
    1.56 +// Version          : 6.0.14
    1.57 +//                  : modified to use jtagconn for LM32,
    1.58 +//                  : all technologies 7/10/07
    1.59 +// Version          : 7.0SP2, 3.0
    1.60 +//                  : No Change
    1.61 +// Version          : 3.1
    1.62 +//                  : No Change
    1.63 +// ============================================================================
    1.64  
    1.65 -wire tck;
    1.66 -wire tdi;
    1.67 -wire tdo;
    1.68 -wire capture;
    1.69 -wire shift;
    1.70 -wire update;
    1.71 -wire e1dr;
    1.72 -wire reset;
    1.73 +`include "system_conf.v"
    1.74 +
    1.75 +/////////////////////////////////////////////////////
    1.76 +// jtagconn16 Module Definition
    1.77 +/////////////////////////////////////////////////////
    1.78  
    1.79 -jtag_tap jtag_tap (
    1.80 -	.tck(tck),
    1.81 -	.tdi(tdi),
    1.82 -	.tdo(tdo),
    1.83 -	.capture(capture),
    1.84 -	.shift(shift),
    1.85 -	.e1dr(e1dr),
    1.86 -	.update(update),
    1.87 -	.reset(reset)
    1.88 -);
    1.89 +module jtagconn16 (er2_tdo, jtck, jtdi, jshift, jupdate, jrstn, jce2, ip_enable) ;
    1.90 +    input  er2_tdo ; 
    1.91 +    output jtck ; 
    1.92 +    output jtdi ; 
    1.93 +    output jshift ; 
    1.94 +    output jupdate ; 
    1.95 +    output jrstn ; 
    1.96 +    output jce2 ; 
    1.97 +    output ip_enable ; 
    1.98 +endmodule
    1.99 +
   1.100 +/////////////////////////////////////////////////////
   1.101 +// Module interface
   1.102 +/////////////////////////////////////////////////////
   1.103  
   1.104 -reg [10:0] jtag_shift;
   1.105 -reg [10:0] jtag_latched;
   1.106 +(* syn_hier="hard" *) module jtag_cores (
   1.107 +    // ----- Inputs -------
   1.108 +    reg_d,
   1.109 +    reg_addr_d,
   1.110 +    // ----- Outputs -------    
   1.111 +    reg_update,
   1.112 +    reg_q,
   1.113 +    reg_addr_q,
   1.114 +    jtck,
   1.115 +    jrstn
   1.116 +    );
   1.117 +    
   1.118 +/////////////////////////////////////////////////////
   1.119 +// Inputs
   1.120 +/////////////////////////////////////////////////////
   1.121  
   1.122 -always @(posedge tck)
   1.123 -begin
   1.124 -	if(reset)
   1.125 -		jtag_shift <= 11'b0;
   1.126 -	else begin
   1.127 -		if (shift)
   1.128 -			jtag_shift <= {tdi, jtag_shift[10:1]};
   1.129 -		else if (capture)
   1.130 -			jtag_shift <= {reg_d, reg_addr_d};
   1.131 -	end
   1.132 -end
   1.133 +input [7:0] reg_d;
   1.134 +input [2:0] reg_addr_d;
   1.135  
   1.136 -assign tdo = jtag_shift[0];
   1.137 +/////////////////////////////////////////////////////
   1.138 +// Outputs
   1.139 +/////////////////////////////////////////////////////
   1.140 +   
   1.141 +output reg_update;
   1.142 +wire   reg_update;
   1.143 +output [7:0] reg_q;
   1.144 +wire   [7:0] reg_q;
   1.145 +output [2:0] reg_addr_q;
   1.146 +wire   [2:0] reg_addr_q;
   1.147 +
   1.148 +output jtck;
   1.149 +wire   jtck; 	/* synthesis syn_keep=1 */
   1.150 +output jrstn;
   1.151 +wire   jrstn;  /* synthesis syn_keep=1 */	
   1.152  
   1.153 -always @(posedge tck)
   1.154 -begin
   1.155 -	if(reset)
   1.156 -		jtag_latched <= 11'b0;
   1.157 -	else begin
   1.158 -	   if (e1dr)
   1.159 -		   jtag_latched <= jtag_shift;
   1.160 -	end
   1.161 -end
   1.162 +/////////////////////////////////////////////////////
   1.163 +// Instantiations
   1.164 +/////////////////////////////////////////////////////
   1.165  
   1.166 -assign reg_update = update;
   1.167 -assign reg_q = jtag_latched[10:3];
   1.168 -assign reg_addr_q = jtag_latched[2:0];
   1.169 -assign jtck = tck;
   1.170 -assign jrstn = ~reset;
   1.171 -
   1.172 +wire jtdi;          /* synthesis syn_keep=1 */
   1.173 +wire er2_tdo2;      /* synthesis syn_keep=1 */
   1.174 +wire jshift;        /* synthesis syn_keep=1 */
   1.175 +wire jupdate;       /* synthesis syn_keep=1 */
   1.176 +wire jce2;          /* synthesis syn_keep=1 */
   1.177 +wire ip_enable;     /* synthesis syn_keep=1 */
   1.178 +    
   1.179 +(* JTAG_IP="LM32", IP_ID="0", HUB_ID="0", syn_noprune=1 *) jtagconn16 jtagconn16_lm32_inst (
   1.180 +    .er2_tdo        (er2_tdo2),
   1.181 +    .jtck           (jtck),
   1.182 +    .jtdi           (jtdi),
   1.183 +    .jshift         (jshift),
   1.184 +    .jupdate        (jupdate),
   1.185 +    .jrstn          (jrstn),
   1.186 +    .jce2           (jce2),
   1.187 +    .ip_enable      (ip_enable)
   1.188 +);
   1.189 +    
   1.190 +(* syn_noprune=1 *) jtag_lm32 jtag_lm32_inst (
   1.191 +    .JTCK           (jtck),
   1.192 +    .JTDI           (jtdi),
   1.193 +    .JTDO2          (er2_tdo2),
   1.194 +    .JSHIFT         (jshift),
   1.195 +    .JUPDATE        (jupdate),
   1.196 +    .JRSTN          (jrstn),
   1.197 +    .JCE2           (jce2),
   1.198 +    .JTAGREG_ENABLE (ip_enable),
   1.199 +    .CONTROL_DATAN  (),
   1.200 +    .REG_UPDATE     (reg_update),
   1.201 +    .REG_D          (reg_d),
   1.202 +    .REG_ADDR_D     (reg_addr_d),
   1.203 +    .REG_Q          (reg_q),
   1.204 +    .REG_ADDR_Q     (reg_addr_q)
   1.205 +    );
   1.206 +    
   1.207  endmodule
     2.1 --- a/rtl/lm32_adder.v	Tue Mar 08 09:59:34 2011 +0000
     2.2 +++ b/rtl/lm32_adder.v	Sat Aug 06 01:32:07 2011 +0100
     2.3 @@ -1,18 +1,39 @@
     2.4 -// =============================================================================
     2.5 -//                           COPYRIGHT NOTICE
     2.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     2.7 -// ALL RIGHTS RESERVED
     2.8 -// This confidential and proprietary software may be used only as authorised by
     2.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    2.10 -// The entire notice above must be reproduced on all authorized copies and
    2.11 -// copies may only be made to the extent permitted by a licensing agreement from
    2.12 -// Lattice Semiconductor Corporation.
    2.13 +//   ==================================================================
    2.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    2.15 +//   ------------------------------------------------------------------
    2.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    2.17 +//   ALL RIGHTS RESERVED 
    2.18 +//   ------------------------------------------------------------------
    2.19 +//
    2.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    2.21 +//
    2.22 +//   Permission:
    2.23 +//
    2.24 +//      Lattice Semiconductor grants permission to use this code
    2.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    2.26 +//      Open Source License Agreement.  
    2.27 +//
    2.28 +//   Disclaimer:
    2.29  //
    2.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    2.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    2.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    2.33 -// U.S.A                                   email: techsupport@latticesemi.com
    2.34 -// ============================================================================/
    2.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    2.36 +//      functionality of this code. It is the user's responsibility to
    2.37 +//      verify the userís design for consistency and functionality through
    2.38 +//      the use of formal verification methods.
    2.39 +//
    2.40 +//   --------------------------------------------------------------------
    2.41 +//
    2.42 +//                  Lattice Semiconductor Corporation
    2.43 +//                  5555 NE Moore Court
    2.44 +//                  Hillsboro, OR 97214
    2.45 +//                  U.S.A
    2.46 +//
    2.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    2.48 +//                         503-286-8001 (other locations)
    2.49 +//
    2.50 +//                  web: http://www.latticesemi.com/
    2.51 +//                  email: techsupport@latticesemi.com
    2.52 +//
    2.53 +//   --------------------------------------------------------------------
    2.54  //                         FILE DETAILS
    2.55  // Project          : LatticeMico32
    2.56  // File             : lm32_adder.v
     3.1 --- a/rtl/lm32_addsub.v	Tue Mar 08 09:59:34 2011 +0000
     3.2 +++ b/rtl/lm32_addsub.v	Sat Aug 06 01:32:07 2011 +0100
     3.3 @@ -1,18 +1,39 @@
     3.4 -// =============================================================================
     3.5 -//                           COPYRIGHT NOTICE
     3.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     3.7 -// ALL RIGHTS RESERVED
     3.8 -// This confidential and proprietary software may be used only as authorised by
     3.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    3.10 -// The entire notice above must be reproduced on all authorized copies and
    3.11 -// copies may only be made to the extent permitted by a licensing agreement from
    3.12 -// Lattice Semiconductor Corporation.
    3.13 +//   ==================================================================
    3.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    3.15 +//   ------------------------------------------------------------------
    3.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    3.17 +//   ALL RIGHTS RESERVED 
    3.18 +//   ------------------------------------------------------------------
    3.19 +//
    3.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    3.21 +//
    3.22 +//   Permission:
    3.23 +//
    3.24 +//      Lattice Semiconductor grants permission to use this code
    3.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    3.26 +//      Open Source License Agreement.  
    3.27 +//
    3.28 +//   Disclaimer:
    3.29  //
    3.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    3.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    3.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    3.33 -// U.S.A                                   email: techsupport@latticesemi.com
    3.34 -// =============================================================================/
    3.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    3.36 +//      functionality of this code. It is the user's responsibility to
    3.37 +//      verify the userís design for consistency and functionality through
    3.38 +//      the use of formal verification methods.
    3.39 +//
    3.40 +//   --------------------------------------------------------------------
    3.41 +//
    3.42 +//                  Lattice Semiconductor Corporation
    3.43 +//                  5555 NE Moore Court
    3.44 +//                  Hillsboro, OR 97214
    3.45 +//                  U.S.A
    3.46 +//
    3.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    3.48 +//                         503-286-8001 (other locations)
    3.49 +//
    3.50 +//                  web: http://www.latticesemi.com/
    3.51 +//                  email: techsupport@latticesemi.com
    3.52 +//
    3.53 +//   --------------------------------------------------------------------
    3.54  //                         FILE DETAILS
    3.55  // Project          : LatticeMico32
    3.56  // File             : lm32_addsub.v
     4.1 --- a/rtl/lm32_cpu.v	Tue Mar 08 09:59:34 2011 +0000
     4.2 +++ b/rtl/lm32_cpu.v	Sat Aug 06 01:32:07 2011 +0100
     4.3 @@ -1,24 +1,50 @@
     4.4 -// =============================================================================
     4.5 -//                           COPYRIGHT NOTICE
     4.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     4.7 -// ALL RIGHTS RESERVED
     4.8 -// This confidential and proprietary software may be used only as authorised by
     4.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    4.10 -// The entire notice above must be reproduced on all authorized copies and
    4.11 -// copies may only be made to the extent permitted by a licensing agreement from
    4.12 -// Lattice Semiconductor Corporation.
    4.13 +//   ==================================================================
    4.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    4.15 +//   ------------------------------------------------------------------
    4.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    4.17 +//   ALL RIGHTS RESERVED 
    4.18 +//   ------------------------------------------------------------------
    4.19 +//
    4.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    4.21 +//
    4.22 +//   Permission:
    4.23 +//
    4.24 +//      Lattice Semiconductor grants permission to use this code
    4.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    4.26 +//      Open Source License Agreement.  
    4.27 +//
    4.28 +//   Disclaimer:
    4.29  //
    4.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    4.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    4.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    4.33 -// U.S.A                                   email: techsupport@latticesemi.com
    4.34 -// =============================================================================/
    4.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    4.36 +//      functionality of this code. It is the user's responsibility to
    4.37 +//      verify the userís design for consistency and functionality through
    4.38 +//      the use of formal verification methods.
    4.39 +//
    4.40 +//   --------------------------------------------------------------------
    4.41 +//
    4.42 +//                  Lattice Semiconductor Corporation
    4.43 +//                  5555 NE Moore Court
    4.44 +//                  Hillsboro, OR 97214
    4.45 +//                  U.S.A
    4.46 +//
    4.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    4.48 +//                         503-286-8001 (other locations)
    4.49 +//
    4.50 +//                  web: http://www.latticesemi.com/
    4.51 +//                  email: techsupport@latticesemi.com
    4.52 +//
    4.53 +//   --------------------------------------------------------------------
    4.54  //                         FILE DETAILS
    4.55  // Project          : LatticeMico32
    4.56  // File             : lm32_cpu.v
    4.57  // Title            : Top-level of CPU.
    4.58  // Dependencies     : lm32_include.v
    4.59  //
    4.60 +// Version 3.8
    4.61 +// 1. Feature: Support for dynamically switching EBA to DEBA via a GPIO.
    4.62 +// 2. Bug: EA now reports instruction that caused the data abort, rather than
    4.63 +//    next instruction.
    4.64 +//
    4.65  // Version 3.4
    4.66  // 1. Bug Fix: In a tight infinite loop (add, sw, bi) incoming interrupts were 
    4.67  //    never serviced.
    4.68 @@ -75,6 +101,11 @@
    4.69      clk_n_i,
    4.70  `endif    
    4.71      rst_i,
    4.72 +`ifdef CFG_DEBUG_ENABLED
    4.73 + `ifdef CFG_ALTERNATE_EBA
    4.74 +    at_debug,
    4.75 + `endif
    4.76 +`endif
    4.77      // From external devices
    4.78  `ifdef CFG_INTERRUPTS_ENABLED
    4.79      interrupt,
    4.80 @@ -212,6 +243,12 @@
    4.81  `endif    
    4.82  input rst_i;                                    // Reset
    4.83  
    4.84 +`ifdef CFG_DEBUG_ENABLED
    4.85 + `ifdef CFG_ALTERNATE_EBA
    4.86 +   input at_debug;                              // GPIO input that maps EBA to DEBA
    4.87 + `endif
    4.88 +`endif
    4.89 +
    4.90  `ifdef CFG_INTERRUPTS_ENABLED
    4.91  input [`LM32_INTERRUPT_RNG] interrupt;          // Interrupt pins
    4.92  `endif
    4.93 @@ -751,6 +788,11 @@
    4.94      // ----- Inputs -------
    4.95      .clk_i                  (clk_i),
    4.96      .rst_i                  (rst_i),
    4.97 +`ifdef CFG_DEBUG_ENABLED
    4.98 + `ifdef CFG_ALTERNATE_EBA
    4.99 +    .at_debug               (at_debug),
   4.100 + `endif
   4.101 +`endif
   4.102      // From pipeline
   4.103      .stall_a                (stall_a),
   4.104      .stall_f                (stall_f),
   4.105 @@ -2476,6 +2518,9 @@
   4.106  `ifdef CFG_DEBUG_ENABLED
   4.107  	   if (exception_x == `TRUE)
   4.108  	     if ((dc_re == `TRUE)
   4.109 + `ifdef CFG_ALTERNATE_EBA
   4.110 +		 || (at_debug == `TRUE)
   4.111 + `endif
   4.112  		 || ((debug_exception_x == `TRUE) 
   4.113  		     && (non_debug_exception_x == `FALSE)))
   4.114  	       branch_target_m <= {deba, eid_x, {3{1'b0}}};
   4.115 @@ -2546,6 +2591,7 @@
   4.116  `endif
   4.117  `ifdef CFG_BUS_ERRORS_ENABLED
   4.118          if (   (stall_m == `FALSE)
   4.119 +	    && (data_bus_error_exception == `FALSE)
   4.120              && (   (load_q_m == `TRUE) 
   4.121                  || (store_q_m == `TRUE)
   4.122                 )
     5.1 --- a/rtl/lm32_dcache.v	Tue Mar 08 09:59:34 2011 +0000
     5.2 +++ b/rtl/lm32_dcache.v	Sat Aug 06 01:32:07 2011 +0100
     5.3 @@ -1,18 +1,39 @@
     5.4 -// =============================================================================
     5.5 -//                           COPYRIGHT NOTICE
     5.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     5.7 -// ALL RIGHTS RESERVED
     5.8 -// This confidential and proprietary software may be used only as authorised by
     5.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    5.10 -// The entire notice above must be reproduced on all authorized copies and
    5.11 -// copies may only be made to the extent permitted by a licensing agreement from
    5.12 -// Lattice Semiconductor Corporation.
    5.13 +//   ==================================================================
    5.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    5.15 +//   ------------------------------------------------------------------
    5.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    5.17 +//   ALL RIGHTS RESERVED 
    5.18 +//   ------------------------------------------------------------------
    5.19 +//
    5.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    5.21 +//
    5.22 +//   Permission:
    5.23 +//
    5.24 +//      Lattice Semiconductor grants permission to use this code
    5.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    5.26 +//      Open Source License Agreement.  
    5.27 +//
    5.28 +//   Disclaimer:
    5.29  //
    5.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    5.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    5.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    5.33 -// U.S.A                                   email: techsupport@latticesemi.com
    5.34 -// =============================================================================/
    5.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    5.36 +//      functionality of this code. It is the user's responsibility to
    5.37 +//      verify the userís design for consistency and functionality through
    5.38 +//      the use of formal verification methods.
    5.39 +//
    5.40 +//   --------------------------------------------------------------------
    5.41 +//
    5.42 +//                  Lattice Semiconductor Corporation
    5.43 +//                  5555 NE Moore Court
    5.44 +//                  Hillsboro, OR 97214
    5.45 +//                  U.S.A
    5.46 +//
    5.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    5.48 +//                         503-286-8001 (other locations)
    5.49 +//
    5.50 +//                  web: http://www.latticesemi.com/
    5.51 +//                  email: techsupport@latticesemi.com
    5.52 +//
    5.53 +//   --------------------------------------------------------------------
    5.54  //                         FILE DETAILS
    5.55  // Project          : LatticeMico32
    5.56  // File             : lm32_dcache.v
     6.1 --- a/rtl/lm32_debug.v	Tue Mar 08 09:59:34 2011 +0000
     6.2 +++ b/rtl/lm32_debug.v	Sat Aug 06 01:32:07 2011 +0100
     6.3 @@ -1,18 +1,39 @@
     6.4 -// =============================================================================
     6.5 -//                           COPYRIGHT NOTICE
     6.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     6.7 -// ALL RIGHTS RESERVED
     6.8 -// This confidential and proprietary software may be used only as authorised by
     6.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    6.10 -// The entire notice above must be reproduced on all authorized copies and
    6.11 -// copies may only be made to the extent permitted by a licensing agreement from
    6.12 -// Lattice Semiconductor Corporation.
    6.13 +//   ==================================================================
    6.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    6.15 +//   ------------------------------------------------------------------
    6.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    6.17 +//   ALL RIGHTS RESERVED 
    6.18 +//   ------------------------------------------------------------------
    6.19 +//
    6.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    6.21 +//
    6.22 +//   Permission:
    6.23 +//
    6.24 +//      Lattice Semiconductor grants permission to use this code
    6.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    6.26 +//      Open Source License Agreement.  
    6.27 +//
    6.28 +//   Disclaimer:
    6.29  //
    6.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    6.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    6.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    6.33 -// U.S.A                                   email: techsupport@latticesemi.com
    6.34 -// =============================================================================/
    6.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    6.36 +//      functionality of this code. It is the user's responsibility to
    6.37 +//      verify the userís design for consistency and functionality through
    6.38 +//      the use of formal verification methods.
    6.39 +//
    6.40 +//   --------------------------------------------------------------------
    6.41 +//
    6.42 +//                  Lattice Semiconductor Corporation
    6.43 +//                  5555 NE Moore Court
    6.44 +//                  Hillsboro, OR 97214
    6.45 +//                  U.S.A
    6.46 +//
    6.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    6.48 +//                         503-286-8001 (other locations)
    6.49 +//
    6.50 +//                  web: http://www.latticesemi.com/
    6.51 +//                  email: techsupport@latticesemi.com
    6.52 +//
    6.53 +//   --------------------------------------------------------------------
    6.54  //                         FILE DETAILS
    6.55  // Project          : LatticeMico32
    6.56  // File             : lm32_debug.v
     7.1 --- a/rtl/lm32_decoder.v	Tue Mar 08 09:59:34 2011 +0000
     7.2 +++ b/rtl/lm32_decoder.v	Sat Aug 06 01:32:07 2011 +0100
     7.3 @@ -1,18 +1,39 @@
     7.4 -// =============================================================================
     7.5 -//                           COPYRIGHT NOTICE
     7.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     7.7 -// ALL RIGHTS RESERVED
     7.8 -// This confidential and proprietary software may be used only as authorised by
     7.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    7.10 -// The entire notice above must be reproduced on all authorized copies and
    7.11 -// copies may only be made to the extent permitted by a licensing agreement from
    7.12 -// Lattice Semiconductor Corporation.
    7.13 +//   ==================================================================
    7.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    7.15 +//   ------------------------------------------------------------------
    7.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    7.17 +//   ALL RIGHTS RESERVED 
    7.18 +//   ------------------------------------------------------------------
    7.19 +//
    7.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    7.21 +//
    7.22 +//   Permission:
    7.23 +//
    7.24 +//      Lattice Semiconductor grants permission to use this code
    7.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    7.26 +//      Open Source License Agreement.  
    7.27 +//
    7.28 +//   Disclaimer:
    7.29  //
    7.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    7.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    7.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    7.33 -// U.S.A                                   email: techsupport@latticesemi.com
    7.34 -// =============================================================================/
    7.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    7.36 +//      functionality of this code. It is the user's responsibility to
    7.37 +//      verify the userís design for consistency and functionality through
    7.38 +//      the use of formal verification methods.
    7.39 +//
    7.40 +//   --------------------------------------------------------------------
    7.41 +//
    7.42 +//                  Lattice Semiconductor Corporation
    7.43 +//                  5555 NE Moore Court
    7.44 +//                  Hillsboro, OR 97214
    7.45 +//                  U.S.A
    7.46 +//
    7.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    7.48 +//                         503-286-8001 (other locations)
    7.49 +//
    7.50 +//                  web: http://www.latticesemi.com/
    7.51 +//                  email: techsupport@latticesemi.com
    7.52 +//
    7.53 +//   --------------------------------------------------------------------
    7.54  //                         FILE DETAILS
    7.55  // Project          : LatticeMico32
    7.56  // File             : lm32_decoder.v
     8.1 --- a/rtl/lm32_functions.v	Tue Mar 08 09:59:34 2011 +0000
     8.2 +++ b/rtl/lm32_functions.v	Sat Aug 06 01:32:07 2011 +0100
     8.3 @@ -1,18 +1,39 @@
     8.4 -// =============================================================================
     8.5 -//                           COPYRIGHT NOTICE
     8.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     8.7 -// ALL RIGHTS RESERVED
     8.8 -// This confidential and proprietary software may be used only as authorised by
     8.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    8.10 -// The entire notice above must be reproduced on all authorized copies and
    8.11 -// copies may only be made to the extent permitted by a licensing agreement from
    8.12 -// Lattice Semiconductor Corporation.
    8.13 +//   ==================================================================
    8.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    8.15 +//   ------------------------------------------------------------------
    8.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    8.17 +//   ALL RIGHTS RESERVED 
    8.18 +//   ------------------------------------------------------------------
    8.19 +//
    8.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    8.21 +//
    8.22 +//   Permission:
    8.23 +//
    8.24 +//      Lattice Semiconductor grants permission to use this code
    8.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    8.26 +//      Open Source License Agreement.  
    8.27 +//
    8.28 +//   Disclaimer:
    8.29  //
    8.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    8.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    8.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    8.33 -// U.S.A                                   email: techsupport@latticesemi.com
    8.34 -// =============================================================================/
    8.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    8.36 +//      functionality of this code. It is the user's responsibility to
    8.37 +//      verify the userís design for consistency and functionality through
    8.38 +//      the use of formal verification methods.
    8.39 +//
    8.40 +//   --------------------------------------------------------------------
    8.41 +//
    8.42 +//                  Lattice Semiconductor Corporation
    8.43 +//                  5555 NE Moore Court
    8.44 +//                  Hillsboro, OR 97214
    8.45 +//                  U.S.A
    8.46 +//
    8.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    8.48 +//                         503-286-8001 (other locations)
    8.49 +//
    8.50 +//                  web: http://www.latticesemi.com/
    8.51 +//                  email: techsupport@latticesemi.com
    8.52 +//
    8.53 +//   --------------------------------------------------------------------
    8.54  //                         FILE DETAILS
    8.55  // Project      : LatticeMico32
    8.56  // File         : lm32_functions.v
     9.1 --- a/rtl/lm32_icache.v	Tue Mar 08 09:59:34 2011 +0000
     9.2 +++ b/rtl/lm32_icache.v	Sat Aug 06 01:32:07 2011 +0100
     9.3 @@ -1,18 +1,39 @@
     9.4 -// =============================================================================
     9.5 -//                           COPYRIGHT NOTICE
     9.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
     9.7 -// ALL RIGHTS RESERVED
     9.8 -// This confidential and proprietary software may be used only as authorised by
     9.9 -// a licensing agreement from Lattice Semiconductor Corporation.
    9.10 -// The entire notice above must be reproduced on all authorized copies and
    9.11 -// copies may only be made to the extent permitted by a licensing agreement from
    9.12 -// Lattice Semiconductor Corporation.
    9.13 +//   ==================================================================
    9.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
    9.15 +//   ------------------------------------------------------------------
    9.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
    9.17 +//   ALL RIGHTS RESERVED 
    9.18 +//   ------------------------------------------------------------------
    9.19 +//
    9.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
    9.21 +//
    9.22 +//   Permission:
    9.23 +//
    9.24 +//      Lattice Semiconductor grants permission to use this code
    9.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
    9.26 +//      Open Source License Agreement.  
    9.27 +//
    9.28 +//   Disclaimer:
    9.29  //
    9.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    9.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
    9.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    9.33 -// U.S.A                                   email: techsupport@latticesemi.com
    9.34 -// =============================================================================/
    9.35 +//      Lattice Semiconductor provides no warranty regarding the use or
    9.36 +//      functionality of this code. It is the user's responsibility to
    9.37 +//      verify the userís design for consistency and functionality through
    9.38 +//      the use of formal verification methods.
    9.39 +//
    9.40 +//   --------------------------------------------------------------------
    9.41 +//
    9.42 +//                  Lattice Semiconductor Corporation
    9.43 +//                  5555 NE Moore Court
    9.44 +//                  Hillsboro, OR 97214
    9.45 +//                  U.S.A
    9.46 +//
    9.47 +//                  TEL: 1-800-Lattice (USA and Canada)
    9.48 +//                         503-286-8001 (other locations)
    9.49 +//
    9.50 +//                  web: http://www.latticesemi.com/
    9.51 +//                  email: techsupport@latticesemi.com
    9.52 +//
    9.53 +//   --------------------------------------------------------------------
    9.54  //                         FILE DETAILS
    9.55  // Project          : LatticeMico32
    9.56  // File             : lm32_icache.v
    10.1 --- a/rtl/lm32_include.v	Tue Mar 08 09:59:34 2011 +0000
    10.2 +++ b/rtl/lm32_include.v	Sat Aug 06 01:32:07 2011 +0100
    10.3 @@ -1,18 +1,39 @@
    10.4 -// =============================================================================
    10.5 -//                           COPYRIGHT NOTICE
    10.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    10.7 -// ALL RIGHTS RESERVED
    10.8 -// This confidential and proprietary software may be used only as authorised by
    10.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   10.10 -// The entire notice above must be reproduced on all authorized copies and
   10.11 -// copies may only be made to the extent permitted by a licensing agreement from
   10.12 -// Lattice Semiconductor Corporation.
   10.13 +//   ==================================================================
   10.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   10.15 +//   ------------------------------------------------------------------
   10.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   10.17 +//   ALL RIGHTS RESERVED 
   10.18 +//   ------------------------------------------------------------------
   10.19 +//
   10.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   10.21 +//
   10.22 +//   Permission:
   10.23 +//
   10.24 +//      Lattice Semiconductor grants permission to use this code
   10.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   10.26 +//      Open Source License Agreement.  
   10.27 +//
   10.28 +//   Disclaimer:
   10.29  //
   10.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   10.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   10.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   10.33 -// U.S.A                                   email: techsupport@latticesemi.com
   10.34 -// =============================================================================/
   10.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   10.36 +//      functionality of this code. It is the user's responsibility to
   10.37 +//      verify the userís design for consistency and functionality through
   10.38 +//      the use of formal verification methods.
   10.39 +//
   10.40 +//   --------------------------------------------------------------------
   10.41 +//
   10.42 +//                  Lattice Semiconductor Corporation
   10.43 +//                  5555 NE Moore Court
   10.44 +//                  Hillsboro, OR 97214
   10.45 +//                  U.S.A
   10.46 +//
   10.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   10.48 +//                         503-286-8001 (other locations)
   10.49 +//
   10.50 +//                  web: http://www.latticesemi.com/
   10.51 +//                  email: techsupport@latticesemi.com
   10.52 +//
   10.53 +//   --------------------------------------------------------------------
   10.54  //                         FILE DETAILS
   10.55  // Project          : LatticeMico32
   10.56  // File             : lm32_include.v
    11.1 --- a/rtl/lm32_instruction_unit.v	Tue Mar 08 09:59:34 2011 +0000
    11.2 +++ b/rtl/lm32_instruction_unit.v	Sat Aug 06 01:32:07 2011 +0100
    11.3 @@ -1,18 +1,39 @@
    11.4 -// =============================================================================
    11.5 -//                           COPYRIGHT NOTICE
    11.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    11.7 -// ALL RIGHTS RESERVED
    11.8 -// This confidential and proprietary software may be used only as authorised by
    11.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   11.10 -// The entire notice above must be reproduced on all authorized copies and
   11.11 -// copies may only be made to the extent permitted by a licensing agreement from
   11.12 -// Lattice Semiconductor Corporation.
   11.13 +//   ==================================================================
   11.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   11.15 +//   ------------------------------------------------------------------
   11.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   11.17 +//   ALL RIGHTS RESERVED 
   11.18 +//   ------------------------------------------------------------------
   11.19 +//
   11.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   11.21 +//
   11.22 +//   Permission:
   11.23 +//
   11.24 +//      Lattice Semiconductor grants permission to use this code
   11.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   11.26 +//      Open Source License Agreement.  
   11.27 +//
   11.28 +//   Disclaimer:
   11.29  //
   11.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   11.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   11.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   11.33 -// U.S.A                                   email: techsupport@latticesemi.com
   11.34 -// =============================================================================/
   11.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   11.36 +//      functionality of this code. It is the user's responsibility to
   11.37 +//      verify the userís design for consistency and functionality through
   11.38 +//      the use of formal verification methods.
   11.39 +//
   11.40 +//   --------------------------------------------------------------------
   11.41 +//
   11.42 +//                  Lattice Semiconductor Corporation
   11.43 +//                  5555 NE Moore Court
   11.44 +//                  Hillsboro, OR 97214
   11.45 +//                  U.S.A
   11.46 +//
   11.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   11.48 +//                         503-286-8001 (other locations)
   11.49 +//
   11.50 +//                  web: http://www.latticesemi.com/
   11.51 +//                  email: techsupport@latticesemi.com
   11.52 +//
   11.53 +//   --------------------------------------------------------------------
   11.54  //                         FILE DETAILS
   11.55  // Project      : LatticeMico32
   11.56  // File         : lm32_instruction_unit.v
   11.57 @@ -42,6 +63,9 @@
   11.58  //              : instruction cache) to lock up in to an infinite loop due to a 
   11.59  //              : instruction bus error when EBA was set to instruction inline
   11.60  //              : memory.
   11.61 +// Version      : 3.8 
   11.62 +//              : Feature: Support for dynamically switching EBA to DEBA via a 
   11.63 +//              : GPIO.
   11.64  // =============================================================================
   11.65  
   11.66  `include "lm32_include.v"
   11.67 @@ -54,6 +78,11 @@
   11.68      // ----- Inputs -------
   11.69      clk_i,
   11.70      rst_i,
   11.71 +`ifdef CFG_DEBUG_ENABLED
   11.72 + `ifdef CFG_ALTERNATE_EBA
   11.73 +    at_debug,
   11.74 + `endif
   11.75 +`endif
   11.76      // From pipeline
   11.77      stall_a,
   11.78      stall_f,
   11.79 @@ -161,6 +190,12 @@
   11.80  input clk_i;                                            // Clock
   11.81  input rst_i;                                            // Reset
   11.82  
   11.83 +`ifdef CFG_DEBUG_ENABLED
   11.84 + `ifdef CFG_ALTERNATE_EBA
   11.85 +   input at_debug;                                      // GPIO input that maps EBA to DEBA
   11.86 + `endif
   11.87 +`endif
   11.88 +
   11.89  input stall_a;                                          // Stall A stage instruction
   11.90  input stall_f;                                          // Stall F stage instruction
   11.91  input stall_d;                                          // Stall D stage instruction
   11.92 @@ -334,6 +369,10 @@
   11.93  reg jtag_access;                                        // Indicates if a JTAG WB access is in progress
   11.94  `endif
   11.95  
   11.96 +`ifdef CFG_ALTERNATE_EBA
   11.97 +	reg alternate_eba_taken;
   11.98 +`endif
   11.99 +
  11.100  /////////////////////////////////////////////////////
  11.101  // Functions
  11.102  /////////////////////////////////////////////////////
  11.103 @@ -381,8 +420,8 @@
  11.104  	    .ResetB                 (rst_i),
  11.105  	    .DataInA                ({32{1'b0}}),
  11.106  	    .DataInB                (irom_store_data_m),
  11.107 -	    .AddressA               (pc_a[(clogb2(`CFG_IROM_LIMIT/4-`CFG_IROM_BASE_ADDRESS/4+1)-1)+2-1:2]),
  11.108 -	    .AddressB               (irom_address_xm[(clogb2(`CFG_IROM_LIMIT/4-`CFG_IROM_BASE_ADDRESS/4+1)-1)+2-1:2]),
  11.109 +	    .AddressA               (pc_a[clogb2_v1(`CFG_IROM_LIMIT/4-`CFG_IROM_BASE_ADDRESS/4+1)+2-1:2]),
  11.110 +	    .AddressB               (irom_address_xm[clogb2_v1(`CFG_IROM_LIMIT/4-`CFG_IROM_BASE_ADDRESS/4+1)+2-1:2]),
  11.111  	    .ClockEnA               (!stall_a),
  11.112  	    .ClockEnB               (!stall_x || !stall_m),
  11.113  	    .WrA                    (`FALSE),
  11.114 @@ -469,7 +508,7 @@
  11.115              pc_a = restart_address;
  11.116  	  else 
  11.117  `endif        
  11.118 -            pc_a = pc_f + 1'b1;
  11.119 +	    pc_a = pc_f + 1'b1;
  11.120  end
  11.121  
  11.122  // Select where instruction should be fetched from
  11.123 @@ -542,28 +581,39 @@
  11.124  
  11.125  // PC 
  11.126  always @(posedge clk_i `CFG_RESET_SENSITIVITY)
  11.127 -begin
  11.128 -    if (rst_i == `TRUE)
  11.129 -    begin
  11.130 -        pc_f <= (`CFG_EBA_RESET-4)/4;
  11.131 -        pc_d <= {`LM32_PC_WIDTH{1'b0}};
  11.132 -        pc_x <= {`LM32_PC_WIDTH{1'b0}};
  11.133 -        pc_m <= {`LM32_PC_WIDTH{1'b0}};
  11.134 -        pc_w <= {`LM32_PC_WIDTH{1'b0}};
  11.135 -    end
  11.136 -    else
  11.137 -    begin
  11.138 -        if (stall_f == `FALSE)
  11.139 +  begin
  11.140 +     if (rst_i == `TRUE)
  11.141 +       begin
  11.142 +`ifdef CFG_DEBUG_ENABLED
  11.143 + `ifdef CFG_ALTERNATE_EBA
  11.144 +	  if (at_debug == `TRUE)
  11.145 +	    pc_f <= (`CFG_DEBA_RESET-4)/4;
  11.146 +	  else
  11.147 +	    pc_f <= (`CFG_EBA_RESET-4)/4;
  11.148 + `else
  11.149 +	  pc_f <= (`CFG_EBA_RESET-4)/4;
  11.150 + `endif
  11.151 +`else
  11.152 +          pc_f <= (`CFG_EBA_RESET-4)/4;
  11.153 +`endif
  11.154 +          pc_d <= {`LM32_PC_WIDTH{1'b0}};
  11.155 +          pc_x <= {`LM32_PC_WIDTH{1'b0}};
  11.156 +          pc_m <= {`LM32_PC_WIDTH{1'b0}};
  11.157 +          pc_w <= {`LM32_PC_WIDTH{1'b0}};
  11.158 +       end
  11.159 +     else
  11.160 +       begin
  11.161 +          if (stall_f == `FALSE)
  11.162              pc_f <= pc_a;
  11.163 -        if (stall_d == `FALSE)
  11.164 +          if (stall_d == `FALSE)
  11.165              pc_d <= pc_f;
  11.166 -        if (stall_x == `FALSE)
  11.167 +          if (stall_x == `FALSE)
  11.168              pc_x <= pc_d;
  11.169 -        if (stall_m == `FALSE)
  11.170 +          if (stall_m == `FALSE)
  11.171              pc_m <= pc_x;
  11.172 -        pc_w <= pc_m;
  11.173 -    end
  11.174 -end
  11.175 +          pc_w <= pc_m;
  11.176 +       end
  11.177 +  end
  11.178  
  11.179  `ifdef LM32_CACHE_ENABLED
  11.180  // Address to restart from after a cache miss has been handled
    12.1 --- a/rtl/lm32_interrupt.v	Tue Mar 08 09:59:34 2011 +0000
    12.2 +++ b/rtl/lm32_interrupt.v	Sat Aug 06 01:32:07 2011 +0100
    12.3 @@ -1,18 +1,39 @@
    12.4 -// =============================================================================
    12.5 -//                           COPYRIGHT NOTICE
    12.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    12.7 -// ALL RIGHTS RESERVED
    12.8 -// This confidential and proprietary software may be used only as authorised by
    12.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   12.10 -// The entire notice above must be reproduced on all authorized copies and
   12.11 -// copies may only be made to the extent permitted by a licensing agreement from
   12.12 -// Lattice Semiconductor Corporation.
   12.13 +//   ==================================================================
   12.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   12.15 +//   ------------------------------------------------------------------
   12.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   12.17 +//   ALL RIGHTS RESERVED 
   12.18 +//   ------------------------------------------------------------------
   12.19 +//
   12.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   12.21 +//
   12.22 +//   Permission:
   12.23 +//
   12.24 +//      Lattice Semiconductor grants permission to use this code
   12.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   12.26 +//      Open Source License Agreement.  
   12.27 +//
   12.28 +//   Disclaimer:
   12.29  //
   12.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   12.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   12.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   12.33 -// U.S.A                                   email: techsupport@latticesemi.com
   12.34 -// =============================================================================/
   12.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   12.36 +//      functionality of this code. It is the user's responsibility to
   12.37 +//      verify the userís design for consistency and functionality through
   12.38 +//      the use of formal verification methods.
   12.39 +//
   12.40 +//   --------------------------------------------------------------------
   12.41 +//
   12.42 +//                  Lattice Semiconductor Corporation
   12.43 +//                  5555 NE Moore Court
   12.44 +//                  Hillsboro, OR 97214
   12.45 +//                  U.S.A
   12.46 +//
   12.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   12.48 +//                         503-286-8001 (other locations)
   12.49 +//
   12.50 +//                  web: http://www.latticesemi.com/
   12.51 +//                  email: techsupport@latticesemi.com
   12.52 +//
   12.53 +//   --------------------------------------------------------------------
   12.54  //                         FILE DETAILS
   12.55  // Project          : LatticeMico32
   12.56  // File             : lm32_interrupt.v
    13.1 --- a/rtl/lm32_jtag.v	Tue Mar 08 09:59:34 2011 +0000
    13.2 +++ b/rtl/lm32_jtag.v	Sat Aug 06 01:32:07 2011 +0100
    13.3 @@ -1,18 +1,39 @@
    13.4 -// =============================================================================
    13.5 -//                           COPYRIGHT NOTICE
    13.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    13.7 -// ALL RIGHTS RESERVED
    13.8 -// This confidential and proprietary software may be used only as authorised by
    13.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   13.10 -// The entire notice above must be reproduced on all authorized copies and
   13.11 -// copies may only be made to the extent permitted by a licensing agreement from
   13.12 -// Lattice Semiconductor Corporation.
   13.13 +//   ==================================================================
   13.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   13.15 +//   ------------------------------------------------------------------
   13.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   13.17 +//   ALL RIGHTS RESERVED 
   13.18 +//   ------------------------------------------------------------------
   13.19 +//
   13.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   13.21 +//
   13.22 +//   Permission:
   13.23 +//
   13.24 +//      Lattice Semiconductor grants permission to use this code
   13.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   13.26 +//      Open Source License Agreement.  
   13.27 +//
   13.28 +//   Disclaimer:
   13.29  //
   13.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   13.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   13.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   13.33 -// U.S.A                                   email: techsupport@latticesemi.com
   13.34 -// =============================================================================/
   13.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   13.36 +//      functionality of this code. It is the user's responsibility to
   13.37 +//      verify the userís design for consistency and functionality through
   13.38 +//      the use of formal verification methods.
   13.39 +//
   13.40 +//   --------------------------------------------------------------------
   13.41 +//
   13.42 +//                  Lattice Semiconductor Corporation
   13.43 +//                  5555 NE Moore Court
   13.44 +//                  Hillsboro, OR 97214
   13.45 +//                  U.S.A
   13.46 +//
   13.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   13.48 +//                         503-286-8001 (other locations)
   13.49 +//
   13.50 +//                  web: http://www.latticesemi.com/
   13.51 +//                  email: techsupport@latticesemi.com
   13.52 +//
   13.53 +//   --------------------------------------------------------------------
   13.54  //                         FILE DETAILS
   13.55  // Project          : LatticeMico32
   13.56  // File             : lm32_jtag.v
    14.1 --- a/rtl/lm32_load_store_unit.v	Tue Mar 08 09:59:34 2011 +0000
    14.2 +++ b/rtl/lm32_load_store_unit.v	Sat Aug 06 01:32:07 2011 +0100
    14.3 @@ -1,18 +1,39 @@
    14.4 -// =============================================================================
    14.5 -//                           COPYRIGHT NOTICE
    14.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    14.7 -// ALL RIGHTS RESERVED
    14.8 -// This confidential and proprietary software may be used only as authorised by
    14.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   14.10 -// The entire notice above must be reproduced on all authorized copies and
   14.11 -// copies may only be made to the extent permitted by a licensing agreement from
   14.12 -// Lattice Semiconductor Corporation.
   14.13 +//   ==================================================================
   14.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   14.15 +//   ------------------------------------------------------------------
   14.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   14.17 +//   ALL RIGHTS RESERVED 
   14.18 +//   ------------------------------------------------------------------
   14.19 +//
   14.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   14.21 +//
   14.22 +//   Permission:
   14.23 +//
   14.24 +//      Lattice Semiconductor grants permission to use this code
   14.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   14.26 +//      Open Source License Agreement.  
   14.27 +//
   14.28 +//   Disclaimer:
   14.29  //
   14.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   14.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   14.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   14.33 -// U.S.A                                   email: techsupport@latticesemi.com
   14.34 -// =============================================================================/
   14.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   14.36 +//      functionality of this code. It is the user's responsibility to
   14.37 +//      verify the userís design for consistency and functionality through
   14.38 +//      the use of formal verification methods.
   14.39 +//
   14.40 +//   --------------------------------------------------------------------
   14.41 +//
   14.42 +//                  Lattice Semiconductor Corporation
   14.43 +//                  5555 NE Moore Court
   14.44 +//                  Hillsboro, OR 97214
   14.45 +//                  U.S.A
   14.46 +//
   14.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   14.48 +//                         503-286-8001 (other locations)
   14.49 +//
   14.50 +//                  web: http://www.latticesemi.com/
   14.51 +//                  email: techsupport@latticesemi.com
   14.52 +//
   14.53 +//   --------------------------------------------------------------------
   14.54  //                         FILE DETAILS
   14.55  // Project      : LatticeMico32
   14.56  // File         : lm32_load_store_unit.v
   14.57 @@ -302,8 +323,8 @@
   14.58  	    .ResetB                 (rst_i),
   14.59  	    .DataInA                ({32{1'b0}}),
   14.60  	    .DataInB                (dram_store_data_m),
   14.61 -	    .AddressA               (load_store_address_x[(clogb2(`CFG_DRAM_LIMIT/4-`CFG_DRAM_BASE_ADDRESS/4+1)-1)+2-1:2]),
   14.62 -	    .AddressB               (load_store_address_m[(clogb2(`CFG_DRAM_LIMIT/4-`CFG_DRAM_BASE_ADDRESS/4+1)-1)+2-1:2]),
   14.63 +	    .AddressA               (load_store_address_x[clogb2_v1(`CFG_DRAM_LIMIT/4-`CFG_DRAM_BASE_ADDRESS/4+1)+2-1:2]),
   14.64 +	    .AddressB               (load_store_address_m[clogb2_v1(`CFG_DRAM_LIMIT/4-`CFG_DRAM_BASE_ADDRESS/4+1)+2-1:2]),
   14.65  	    // .ClockEnA               (!stall_x & (load_x | store_x)),
   14.66  	    .ClockEnA               (!stall_x),
   14.67  	    .ClockEnB               (!stall_m),
    15.1 --- a/rtl/lm32_logic_op.v	Tue Mar 08 09:59:34 2011 +0000
    15.2 +++ b/rtl/lm32_logic_op.v	Sat Aug 06 01:32:07 2011 +0100
    15.3 @@ -1,18 +1,39 @@
    15.4 -// =============================================================================
    15.5 -//                           COPYRIGHT NOTICE
    15.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    15.7 -// ALL RIGHTS RESERVED
    15.8 -// This confidential and proprietary software may be used only as authorised by
    15.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   15.10 -// The entire notice above must be reproduced on all authorized copies and
   15.11 -// copies may only be made to the extent permitted by a licensing agreement from
   15.12 -// Lattice Semiconductor Corporation.
   15.13 +//   ==================================================================
   15.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   15.15 +//   ------------------------------------------------------------------
   15.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   15.17 +//   ALL RIGHTS RESERVED 
   15.18 +//   ------------------------------------------------------------------
   15.19 +//
   15.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   15.21 +//
   15.22 +//   Permission:
   15.23 +//
   15.24 +//      Lattice Semiconductor grants permission to use this code
   15.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   15.26 +//      Open Source License Agreement.  
   15.27 +//
   15.28 +//   Disclaimer:
   15.29  //
   15.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   15.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   15.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   15.33 -// U.S.A                                   email: techsupport@latticesemi.com
   15.34 -// =============================================================================/
   15.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   15.36 +//      functionality of this code. It is the user's responsibility to
   15.37 +//      verify the userís design for consistency and functionality through
   15.38 +//      the use of formal verification methods.
   15.39 +//
   15.40 +//   --------------------------------------------------------------------
   15.41 +//
   15.42 +//                  Lattice Semiconductor Corporation
   15.43 +//                  5555 NE Moore Court
   15.44 +//                  Hillsboro, OR 97214
   15.45 +//                  U.S.A
   15.46 +//
   15.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   15.48 +//                         503-286-8001 (other locations)
   15.49 +//
   15.50 +//                  web: http://www.latticesemi.com/
   15.51 +//                  email: techsupport@latticesemi.com
   15.52 +//
   15.53 +//   --------------------------------------------------------------------
   15.54  //                         FILE DETAILS
   15.55  // Project          : LatticeMico32
   15.56  // File             : lm32_logic_op.v
    16.1 --- a/rtl/lm32_mc_arithmetic.v	Tue Mar 08 09:59:34 2011 +0000
    16.2 +++ b/rtl/lm32_mc_arithmetic.v	Sat Aug 06 01:32:07 2011 +0100
    16.3 @@ -1,18 +1,39 @@
    16.4 -// =============================================================================
    16.5 -//                           COPYRIGHT NOTICE
    16.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    16.7 -// ALL RIGHTS RESERVED
    16.8 -// This confidential and proprietary software may be used only as authorised by
    16.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   16.10 -// The entire notice above must be reproduced on all authorized copies and
   16.11 -// copies may only be made to the extent permitted by a licensing agreement from
   16.12 -// Lattice Semiconductor Corporation.
   16.13 +//   ==================================================================
   16.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   16.15 +//   ------------------------------------------------------------------
   16.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   16.17 +//   ALL RIGHTS RESERVED 
   16.18 +//   ------------------------------------------------------------------
   16.19 +//
   16.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   16.21 +//
   16.22 +//   Permission:
   16.23 +//
   16.24 +//      Lattice Semiconductor grants permission to use this code
   16.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   16.26 +//      Open Source License Agreement.  
   16.27 +//
   16.28 +//   Disclaimer:
   16.29  //
   16.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   16.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   16.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   16.33 -// U.S.A                                   email: techsupport@latticesemi.com
   16.34 -// =============================================================================/
   16.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   16.36 +//      functionality of this code. It is the user's responsibility to
   16.37 +//      verify the userís design for consistency and functionality through
   16.38 +//      the use of formal verification methods.
   16.39 +//
   16.40 +//   --------------------------------------------------------------------
   16.41 +//
   16.42 +//                  Lattice Semiconductor Corporation
   16.43 +//                  5555 NE Moore Court
   16.44 +//                  Hillsboro, OR 97214
   16.45 +//                  U.S.A
   16.46 +//
   16.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   16.48 +//                         503-286-8001 (other locations)
   16.49 +//
   16.50 +//                  web: http://www.latticesemi.com/
   16.51 +//                  email: techsupport@latticesemi.com
   16.52 +//
   16.53 +//   --------------------------------------------------------------------
   16.54  //                         FILE DETAILS
   16.55  // Project          : LatticeMico32
   16.56  // File             : lm_mc_arithmetic.v
    17.1 --- a/rtl/lm32_multiplier.v	Tue Mar 08 09:59:34 2011 +0000
    17.2 +++ b/rtl/lm32_multiplier.v	Sat Aug 06 01:32:07 2011 +0100
    17.3 @@ -1,18 +1,39 @@
    17.4 -// =============================================================================
    17.5 -//                           COPYRIGHT NOTICE
    17.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    17.7 -// ALL RIGHTS RESERVED
    17.8 -// This confidential and proprietary software may be used only as authorised by
    17.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   17.10 -// The entire notice above must be reproduced on all authorized copies and
   17.11 -// copies may only be made to the extent permitted by a licensing agreement from
   17.12 -// Lattice Semiconductor Corporation.
   17.13 +//   ==================================================================
   17.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   17.15 +//   ------------------------------------------------------------------
   17.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   17.17 +//   ALL RIGHTS RESERVED 
   17.18 +//   ------------------------------------------------------------------
   17.19 +//
   17.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   17.21 +//
   17.22 +//   Permission:
   17.23 +//
   17.24 +//      Lattice Semiconductor grants permission to use this code
   17.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   17.26 +//      Open Source License Agreement.  
   17.27 +//
   17.28 +//   Disclaimer:
   17.29  //
   17.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   17.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   17.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   17.33 -// U.S.A                                   email: techsupport@latticesemi.com
   17.34 -// =============================================================================/
   17.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   17.36 +//      functionality of this code. It is the user's responsibility to
   17.37 +//      verify the userís design for consistency and functionality through
   17.38 +//      the use of formal verification methods.
   17.39 +//
   17.40 +//   --------------------------------------------------------------------
   17.41 +//
   17.42 +//                  Lattice Semiconductor Corporation
   17.43 +//                  5555 NE Moore Court
   17.44 +//                  Hillsboro, OR 97214
   17.45 +//                  U.S.A
   17.46 +//
   17.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   17.48 +//                         503-286-8001 (other locations)
   17.49 +//
   17.50 +//                  web: http://www.latticesemi.com/
   17.51 +//                  email: techsupport@latticesemi.com
   17.52 +//
   17.53 +//   --------------------------------------------------------------------
   17.54  //                         FILE DETAILS
   17.55  // Project          : LatticeMico32
   17.56  // File             : lm32_multiplier.v
    18.1 --- a/rtl/lm32_ram.v	Tue Mar 08 09:59:34 2011 +0000
    18.2 +++ b/rtl/lm32_ram.v	Sat Aug 06 01:32:07 2011 +0100
    18.3 @@ -1,18 +1,39 @@
    18.4 -// =============================================================================
    18.5 -//                           COPYRIGHT NOTICE
    18.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    18.7 -// ALL RIGHTS RESERVED
    18.8 -// This confidential and proprietary software may be used only as authorised by
    18.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   18.10 -// The entire notice above must be reproduced on all authorized copies and
   18.11 -// copies may only be made to the extent permitted by a licensing agreement from
   18.12 -// Lattice Semiconductor Corporation.
   18.13 +//   ==================================================================
   18.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   18.15 +//   ------------------------------------------------------------------
   18.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   18.17 +//   ALL RIGHTS RESERVED 
   18.18 +//   ------------------------------------------------------------------
   18.19 +//
   18.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   18.21 +//
   18.22 +//   Permission:
   18.23 +//
   18.24 +//      Lattice Semiconductor grants permission to use this code
   18.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   18.26 +//      Open Source License Agreement.  
   18.27 +//
   18.28 +//   Disclaimer:
   18.29  //
   18.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   18.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   18.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   18.33 -// U.S.A                                   email: techsupport@latticesemi.com
   18.34 -// =============================================================================/
   18.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   18.36 +//      functionality of this code. It is the user's responsibility to
   18.37 +//      verify the userís design for consistency and functionality through
   18.38 +//      the use of formal verification methods.
   18.39 +//
   18.40 +//   --------------------------------------------------------------------
   18.41 +//
   18.42 +//                  Lattice Semiconductor Corporation
   18.43 +//                  5555 NE Moore Court
   18.44 +//                  Hillsboro, OR 97214
   18.45 +//                  U.S.A
   18.46 +//
   18.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   18.48 +//                         503-286-8001 (other locations)
   18.49 +//
   18.50 +//                  web: http://www.latticesemi.com/
   18.51 +//                  email: techsupport@latticesemi.com
   18.52 +//
   18.53 +//   --------------------------------------------------------------------
   18.54  //                         FILE DETAILS
   18.55  // Project          : LatticeMico32
   18.56  // File             : lm32_ram.v
   18.57 @@ -173,13 +194,13 @@
   18.58  		always @(posedge read_clk)
   18.59  		  if (reset)
   18.60  		    begin
   18.61 -		       raw_data <= #1 0;
   18.62 -		       raw <= #1 1'b0;
   18.63 +		       raw_data <= 0;
   18.64 +		       raw <= 1'b0;
   18.65  		    end
   18.66  		  else
   18.67  		    begin
   18.68 -		       raw_data <= #1 raw_data_nxt;
   18.69 -		       raw <= #1 raw_nxt;
   18.70 +		       raw_data <= raw_data_nxt;
   18.71 +		       raw <= raw_nxt;
   18.72  		    end
   18.73  		
   18.74  		pmi_ram_dp_true 
    19.1 --- a/rtl/lm32_shifter.v	Tue Mar 08 09:59:34 2011 +0000
    19.2 +++ b/rtl/lm32_shifter.v	Sat Aug 06 01:32:07 2011 +0100
    19.3 @@ -1,18 +1,39 @@
    19.4 -// =============================================================================
    19.5 -//                           COPYRIGHT NOTICE
    19.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    19.7 -// ALL RIGHTS RESERVED
    19.8 -// This confidential and proprietary software may be used only as authorised by
    19.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   19.10 -// The entire notice above must be reproduced on all authorized copies and
   19.11 -// copies may only be made to the extent permitted by a licensing agreement from
   19.12 -// Lattice Semiconductor Corporation.
   19.13 +//   ==================================================================
   19.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   19.15 +//   ------------------------------------------------------------------
   19.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   19.17 +//   ALL RIGHTS RESERVED 
   19.18 +//   ------------------------------------------------------------------
   19.19 +//
   19.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   19.21 +//
   19.22 +//   Permission:
   19.23 +//
   19.24 +//      Lattice Semiconductor grants permission to use this code
   19.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   19.26 +//      Open Source License Agreement.  
   19.27 +//
   19.28 +//   Disclaimer:
   19.29  //
   19.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   19.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   19.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   19.33 -// U.S.A                                   email: techsupport@latticesemi.com
   19.34 -// =============================================================================/
   19.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   19.36 +//      functionality of this code. It is the user's responsibility to
   19.37 +//      verify the userís design for consistency and functionality through
   19.38 +//      the use of formal verification methods.
   19.39 +//
   19.40 +//   --------------------------------------------------------------------
   19.41 +//
   19.42 +//                  Lattice Semiconductor Corporation
   19.43 +//                  5555 NE Moore Court
   19.44 +//                  Hillsboro, OR 97214
   19.45 +//                  U.S.A
   19.46 +//
   19.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   19.48 +//                         503-286-8001 (other locations)
   19.49 +//
   19.50 +//                  web: http://www.latticesemi.com/
   19.51 +//                  email: techsupport@latticesemi.com
   19.52 +//
   19.53 +//   --------------------------------------------------------------------
   19.54  //                         FILE DETAILS
   19.55  // Project          : LatticeMico32
   19.56  // File             : lm32_shifter.v
    20.1 --- a/rtl/lm32_top.v	Tue Mar 08 09:59:34 2011 +0000
    20.2 +++ b/rtl/lm32_top.v	Sat Aug 06 01:32:07 2011 +0100
    20.3 @@ -1,18 +1,39 @@
    20.4 -// =============================================================================
    20.5 -//                           COPYRIGHT NOTICE
    20.6 -// Copyright 2006 (c) Lattice Semiconductor Corporation
    20.7 -// ALL RIGHTS RESERVED
    20.8 -// This confidential and proprietary software may be used only as authorised by
    20.9 -// a licensing agreement from Lattice Semiconductor Corporation.
   20.10 -// The entire notice above must be reproduced on all authorized copies and
   20.11 -// copies may only be made to the extent permitted by a licensing agreement from
   20.12 -// Lattice Semiconductor Corporation.
   20.13 +//   ==================================================================
   20.14 +//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
   20.15 +//   ------------------------------------------------------------------
   20.16 +//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
   20.17 +//   ALL RIGHTS RESERVED 
   20.18 +//   ------------------------------------------------------------------
   20.19 +//
   20.20 +//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
   20.21 +//
   20.22 +//   Permission:
   20.23 +//
   20.24 +//      Lattice Semiconductor grants permission to use this code
   20.25 +//      pursuant to the terms of the Lattice Semiconductor Corporation
   20.26 +//      Open Source License Agreement.  
   20.27 +//
   20.28 +//   Disclaimer:
   20.29  //
   20.30 -// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
   20.31 -// 5555 NE Moore Court                            408-826-6000 (other locations)
   20.32 -// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
   20.33 -// U.S.A                                   email: techsupport@latticesemi.com
   20.34 -// =============================================================================/
   20.35 +//      Lattice Semiconductor provides no warranty regarding the use or
   20.36 +//      functionality of this code. It is the user's responsibility to
   20.37 +//      verify the userís design for consistency and functionality through
   20.38 +//      the use of formal verification methods.
   20.39 +//
   20.40 +//   --------------------------------------------------------------------
   20.41 +//
   20.42 +//                  Lattice Semiconductor Corporation
   20.43 +//                  5555 NE Moore Court
   20.44 +//                  Hillsboro, OR 97214
   20.45 +//                  U.S.A
   20.46 +//
   20.47 +//                  TEL: 1-800-Lattice (USA and Canada)
   20.48 +//                         503-286-8001 (other locations)
   20.49 +//
   20.50 +//                  web: http://www.latticesemi.com/
   20.51 +//                  email: techsupport@latticesemi.com
   20.52 +//
   20.53 +//   --------------------------------------------------------------------
   20.54  //                         FILE DETAILS
   20.55  // Project          : LatticeMico32
   20.56  // File             : lm32_top.v
   20.57 @@ -36,6 +57,11 @@
   20.58      // ----- Inputs -------
   20.59      clk_i,
   20.60      rst_i,
   20.61 +`ifdef CFG_DEBUG_ENABLED
   20.62 + `ifdef CFG_ALTERNATE_EBA
   20.63 +    at_debug,
   20.64 + `endif
   20.65 +`endif
   20.66      // From external devices
   20.67  `ifdef CFG_INTERRUPTS_ENABLED
   20.68      interrupt,
   20.69 @@ -95,6 +121,12 @@
   20.70  input clk_i;                                    // Clock
   20.71  input rst_i;                                    // Reset
   20.72  
   20.73 +`ifdef CFG_DEBUG_ENABLED
   20.74 + `ifdef CFG_ALTERNATE_EBA
   20.75 +   input at_debug;                              // GPIO input that maps EBA to DEBA
   20.76 + `endif
   20.77 +`endif
   20.78 +
   20.79  `ifdef CFG_INTERRUPTS_ENABLED
   20.80  input [`LM32_INTERRUPT_RNG] interrupt;          // Interrupt pins
   20.81  `endif
   20.82 @@ -216,6 +248,11 @@
   20.83      .clk_n_i               (clk_n),
   20.84  `endif
   20.85      .rst_i                 (rst_i),
   20.86 +`ifdef CFG_DEBUG_ENABLED
   20.87 + `ifdef CFG_ALTERNATE_EBA
   20.88 +    .at_debug              (at_debug),
   20.89 + `endif
   20.90 +`endif
   20.91      // From external devices
   20.92  `ifdef CFG_INTERRUPTS_ENABLED
   20.93      .interrupt             (interrupt),