IPCores/lm32_cpu / files

     1.1 --- a/lm32_cpu.v	Fri Aug 13 01:16:35 2010 +0100
     1.2 +++ b/lm32_cpu.v	Sun Mar 06 19:22:27 2011 +0000
     1.3 @@ -77,7 +77,7 @@
     1.4      rst_i,
     1.5      // From external devices
     1.6  `ifdef CFG_INTERRUPTS_ENABLED
     1.7 -    interrupt_n,
     1.8 +    interrupt,
     1.9  `endif
    1.10      // From user logic
    1.11  `ifdef CFG_USER_ENABLED
    1.12 @@ -213,7 +213,7 @@
    1.13  input rst_i;                                    // Reset
    1.14  
    1.15  `ifdef CFG_INTERRUPTS_ENABLED
    1.16 -input [`LM32_INTERRUPT_RNG] interrupt_n;        // Interrupt pins, active-low
    1.17 +input [`LM32_INTERRUPT_RNG] interrupt;          // Interrupt pins
    1.18  `endif
    1.19  
    1.20  `ifdef CFG_USER_ENABLED
    1.21 @@ -1072,17 +1072,17 @@
    1.22  // Interrupt unit
    1.23  lm32_interrupt interrupt (
    1.24      // ----- Inputs -------
    1.25 -    .clk_i                  (clk_i), 
    1.26 +    .clk_i                  (clk_i),
    1.27      .rst_i                  (rst_i),
    1.28      // From external devices
    1.29 -    .interrupt_n            (interrupt_n),
    1.30 +    .interrupt              (interrupt),
    1.31      // From pipeline
    1.32      .stall_x                (stall_x),
    1.33  `ifdef CFG_DEBUG_ENABLED
    1.34 -    .non_debug_exception    (non_debug_exception_q_w), 
    1.35 +    .non_debug_exception    (non_debug_exception_q_w),
    1.36      .debug_exception        (debug_exception_q_w),
    1.37  `else
    1.38 -    .exception              (exception_q_w), 
    1.39 +    .exception              (exception_q_w),
    1.40  `endif
    1.41      .eret_q_x               (eret_q_x),
    1.42  `ifdef CFG_DEBUG_ENABLED

     2.1 --- a/lm32_include.v	Fri Aug 13 01:16:35 2010 +0100
     2.2 +++ b/lm32_include.v	Sun Mar 06 19:22:27 2011 +0000
     2.3 @@ -339,7 +339,7 @@
     2.4  // Bizarre - Removing this increases LUT count!
     2.5  `define CFG_DEBUG_EXCEPTIONS_ENABLED
     2.6  
     2.7 -// Wishbone defines 
     2.8 +// Wishbone defines
     2.9  // Refer to Wishbone System-on-Chip Interconnection Architecture
    2.10  // These should probably be moved to a Wishbone common file
    2.11  

     3.1 --- a/lm32_interrupt.v	Fri Aug 13 01:16:35 2010 +0100
     3.2 +++ b/lm32_interrupt.v	Sun Mar 06 19:22:27 2011 +0000
     3.3 @@ -37,7 +37,7 @@
     3.4      clk_i, 
     3.5      rst_i,
     3.6      // From external devices
     3.7 -    interrupt_n,
     3.8 +    interrupt,
     3.9      // From pipeline
    3.10      stall_x,
    3.11  `ifdef CFG_DEBUG_ENABLED
    3.12 @@ -72,8 +72,8 @@
    3.13  input clk_i;                                    // Clock
    3.14  input rst_i;                                    // Reset
    3.15  
    3.16 -input [interrupts-1:0] interrupt_n;             // Interrupt pins, active-low
    3.17 -                           
    3.18 +input [interrupts-1:0] interrupt;               // Interrupt pins, active-low
    3.19 +
    3.20  input stall_x;                                  // Stall X pipeline stage
    3.21  
    3.22  `ifdef CFG_DEBUG_ENABLED
    3.23 @@ -130,7 +130,7 @@
    3.24  assign interrupt_exception = (|interrupt_n_exception) & ie;
    3.25  
    3.26  // Determine which interrupts are currently being asserted (active-low) or are already pending
    3.27 -assign asserted = ip | ~interrupt_n;
    3.28 +assign asserted = ip | interrupt;
    3.29         
    3.30  assign ie_csr_read_data = {{`LM32_WORD_WIDTH-3{1'b0}}, 
    3.31  `ifdef CFG_DEBUG_ENABLED

     4.1 --- a/lm32_top.v	Fri Aug 13 01:16:35 2010 +0100
     4.2 +++ b/lm32_top.v	Sun Mar 06 19:22:27 2011 +0000
     4.3 @@ -38,7 +38,7 @@
     4.4      rst_i,
     4.5      // From external devices
     4.6  `ifdef CFG_INTERRUPTS_ENABLED
     4.7 -    interrupt_n,
     4.8 +    interrupt,
     4.9  `endif
    4.10      // From user logic
    4.11  `ifdef CFG_USER_ENABLED
    4.12 @@ -111,7 +111,7 @@
    4.13  input rst_i;                                    // Reset
    4.14  
    4.15  `ifdef CFG_INTERRUPTS_ENABLED
    4.16 -input [`LM32_INTERRUPT_RNG] interrupt_n;        // Interrupt pins, active-low
    4.17 +input [`LM32_INTERRUPT_RNG] interrupt;          // Interrupt pins
    4.18  `endif
    4.19  
    4.20  `ifdef CFG_USER_ENABLED
    4.21 @@ -240,8 +240,8 @@
    4.22  /////////////////////////////////////////////////////
    4.23  // Instantiations
    4.24  ///////////////////////////////////////////////////// 
    4.25 -   
    4.26 -// LM32 CPU   
    4.27 +
    4.28 +// LM32 CPU
    4.29  lm32_cpu cpu (
    4.30      // ----- Inputs -------
    4.31      .clk_i                 (clk_i),
    4.32 @@ -251,7 +251,7 @@
    4.33      .rst_i                 (rst_i),
    4.34      // From external devices
    4.35  `ifdef CFG_INTERRUPTS_ENABLED
    4.36 -    .interrupt_n           (interrupt_n),
    4.37 +    .interrupt             (interrupt),
    4.38  `endif
    4.39      // From user logic
    4.40  `ifdef CFG_USER_ENABLED