1.1 --- a/wb_sdram.v Mon Aug 09 20:45:49 2010 +0100 1.2 +++ b/wb_sdram.v Tue Aug 10 12:58:34 2010 +0100 1.3 @@ -135,7 +135,7 @@ 1.4 if (timer == 32'd0) begin 1.5 // Timer hit zero. Send a NOP. 1.6 state <= ST_NOP; 1.7 - end else if (timer <= 32'd50) begin 1.8 + end else if (timer < 32'd50) begin 1.9 // Timer value is more than zero but less than 50; CKE is on, but 1.10 // keep waiting for the timer to actually expire. 1.11 sdram_cke <= 1'b1; 1.12 @@ -148,6 +148,7 @@ 1.13 ST_NOP: begin 1.14 // Spinstate. Hold SDRAM in NOP. 1.15 debug <= 3'd7; 1.16 + sdram_mode <= M_Nop; 1.17 state <= ST_NOP; 1.18 end 1.19 endcase