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src/musashi/m68k_in.c@a350dfa92895 (annotated)

src/musashi/m68k_in.c

Sun, 05 Dec 2010 16:20:00 +0000

author

Philip Pemberton <philpem@philpem.me.uk>

date

Sun, 05 Dec 2010 16:20:00 +0000

changeset 52

a350dfa92895

parent 0

8bf1bf91a36d

child 110

acea4b2f396f

permissions

-rw-r--r--

add preliminary WD279x emulation to core

philpem@0	1	/* ======================================================================== */
philpem@0	2	/* ========================= LICENSING & COPYRIGHT ======================== */
philpem@0	3	/* ======================================================================== */
philpem@0	4	/*
philpem@0	5	* MUSASHI
philpem@0	6	* Version 3.3
philpem@0	7	*
philpem@0	8	* A portable Motorola M680x0 processor emulation engine.
philpem@0	9	* Copyright 1998-2001 Karl Stenerud. All rights reserved.
philpem@0	10	*
philpem@0	11	* This code may be freely used for non-commercial purposes as long as this
philpem@0	12	* copyright notice remains unaltered in the source code and any binary files
philpem@0	13	* containing this code in compiled form.
philpem@0	14	*
philpem@0	15	* All other lisencing terms must be negotiated with the author
philpem@0	16	* (Karl Stenerud).
philpem@0	17	*
philpem@0	18	* The latest version of this code can be obtained at:
philpem@0	19	* http://kstenerud.cjb.net
philpem@0	20	*/
philpem@0	21
philpem@0	22
philpem@0	23
philpem@0	24	/* Input file for m68kmake
philpem@0	25	* -----------------------
philpem@0	26	*
philpem@0	27	* All sections begin with 80 X's in a row followed by an end-of-line
philpem@0	28	* sequence.
philpem@0	29	* After this, m68kmake will expect to find one of the following section
philpem@0	30	* identifiers:
philpem@0	31	* M68KMAKE_PROTOTYPE_HEADER - header for opcode handler prototypes
philpem@0	32	* M68KMAKE_PROTOTYPE_FOOTER - footer for opcode handler prototypes
philpem@0	33	* M68KMAKE_TABLE_HEADER - header for opcode handler jumptable
philpem@0	34	* M68KMAKE_TABLE_FOOTER - footer for opcode handler jumptable
philpem@0	35	* M68KMAKE_TABLE_BODY - the table itself
philpem@0	36	* M68KMAKE_OPCODE_HANDLER_HEADER - header for opcode handler implementation
philpem@0	37	* M68KMAKE_OPCODE_HANDLER_FOOTER - footer for opcode handler implementation
philpem@0	38	* M68KMAKE_OPCODE_HANDLER_BODY - body section for opcode handler implementation
philpem@0	39	*
philpem@0	40	* NOTE: M68KMAKE_OPCODE_HANDLER_BODY must be last in the file and
philpem@0	41	* M68KMAKE_TABLE_BODY must be second last in the file.
philpem@0	42	*
philpem@0	43	* The M68KMAKE_OPHANDLER_BODY section contains the opcode handler
philpem@0	44	* primitives themselves. Each opcode handler begins with:
philpem@0	45	* M68KMAKE_OP(A, B, C, D)
philpem@0	46	*
philpem@0	47	* where A is the opcode handler name, B is the size of the operation,
philpem@0	48	* C denotes any special processing mode, and D denotes a specific
philpem@0	49	* addressing mode.
philpem@0	50	* For C and D where nothing is specified, use "."
philpem@0	51	*
philpem@0	52	* Example:
philpem@0	53	* M68KMAKE_OP(abcd, 8, rr, .) abcd, size 8, register to register, default EA
philpem@0	54	* M68KMAKE_OP(abcd, 8, mm, ax7) abcd, size 8, memory to memory, register X is A7
philpem@0	55	* M68KMAKE_OP(tst, 16, ., pcix) tst, size 16, PCIX addressing
philpem@0	56	*
philpem@0	57	* All opcode handler primitives end with a closing curly brace "}" at column 1
philpem@0	58	*
philpem@0	59	* NOTE: Do not place a M68KMAKE_OP() directive inside the opcode handler,
philpem@0	60	* and do not put a closing curly brace at column 1 unless it is
philpem@0	61	* marking the end of the handler!
philpem@0	62	*
philpem@0	63	* Inside the handler, m68kmake will recognize M68KMAKE_GET_OPER_xx_xx,
philpem@0	64	* M68KMAKE_GET_EA_xx_xx, and M68KMAKE_CC directives, and create multiple
philpem@0	65	* opcode handlers to handle variations in the opcode handler.
philpem@0	66	* Note: M68KMAKE_CC will only be interpreted in condition code opcodes.
philpem@0	67	* As well, M68KMAKE_GET_EA_xx_xx and M68KMAKE_GET_OPER_xx_xx will only
philpem@0	68	* be interpreted on instructions where the corresponding table entry
philpem@0	69	* specifies multiple effective addressing modes.
philpem@0	70	* Example:
philpem@0	71	* clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
philpem@0	72	*
philpem@0	73	* This table entry says that the clr.l opcde has 7 variations (A+-DXWL).
philpem@0	74	* It is run in user or supervisor mode for all CPUs, and uses 12 cycles for
philpem@0	75	* 68000, 6 cycles for 68010, and 4 cycles for 68020.
philpem@0	76	*/
philpem@0	77
philpem@0	78	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	79	M68KMAKE_PROTOTYPE_HEADER
philpem@0	80
philpem@0	81	#ifndef M68KOPS__HEADER
philpem@0	82	#define M68KOPS__HEADER
philpem@0	83
philpem@0	84	/* ======================================================================== */
philpem@0	85	/* ============================ OPCODE HANDLERS =========================== */
philpem@0	86	/* ======================================================================== */
philpem@0	87
philpem@0	88
philpem@0	89
philpem@0	90	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	91	M68KMAKE_PROTOTYPE_FOOTER
philpem@0	92
philpem@0	93
philpem@0	94	/* Build the opcode handler table */
philpem@0	95	void m68ki_build_opcode_table(void);
philpem@0	96
philpem@0	97	extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
philpem@0	98	extern unsigned char m68ki_cycles[][0x10000];
philpem@0	99
philpem@0	100
philpem@0	101	/* ======================================================================== */
philpem@0	102	/* ============================== END OF FILE ============================= */
philpem@0	103	/* ======================================================================== */
philpem@0	104
philpem@0	105	#endif /* M68KOPS__HEADER */
philpem@0	106
philpem@0	107
philpem@0	108
philpem@0	109	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	110	M68KMAKE_TABLE_HEADER
philpem@0	111
philpem@0	112	/* ======================================================================== */
philpem@0	113	/* ========================= OPCODE TABLE BUILDER ========================= */
philpem@0	114	/* ======================================================================== */
philpem@0	115
philpem@0	116	#include "m68kops.h"
philpem@0	117
philpem@0	118	#define NUM_CPU_TYPES 3
philpem@0	119
philpem@0	120	void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
philpem@0	121	unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
philpem@0	122
philpem@0	123	/* This is used to generate the opcode handler jump table */
philpem@0	124	typedef struct
philpem@0	125	{
philpem@0	126	void (*opcode_handler)(void); /* handler function */
philpem@0	127	unsigned int mask; /* mask on opcode */
philpem@0	128	unsigned int match; /* what to match after masking */
philpem@0	129	unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
philpem@0	130	} opcode_handler_struct;
philpem@0	131
philpem@0	132
philpem@0	133	/* Opcode handler table */
philpem@0	134	static opcode_handler_struct m68k_opcode_handler_table[] =
philpem@0	135	{
philpem@0	136	/* function mask match 000 010 020 */
philpem@0	137
philpem@0	138
philpem@0	139
philpem@0	140	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	141	M68KMAKE_TABLE_FOOTER
philpem@0	142
philpem@0	143	{0, 0, 0, {0, 0, 0}}
philpem@0	144	};
philpem@0	145
philpem@0	146
philpem@0	147	/* Build the opcode handler jump table */
philpem@0	148	void m68ki_build_opcode_table(void)
philpem@0	149	{
philpem@0	150	opcode_handler_struct *ostruct;
philpem@0	151	int instr;
philpem@0	152	int i;
philpem@0	153	int j;
philpem@0	154	int k;
philpem@0	155
philpem@0	156	for(i = 0; i < 0x10000; i++)
philpem@0	157	{
philpem@0	158	/* default to illegal */
philpem@0	159	m68ki_instruction_jump_table[i] = m68k_op_illegal;
philpem@0	160	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	161	m68ki_cycles[k][i] = 0;
philpem@0	162	}
philpem@0	163
philpem@0	164	ostruct = m68k_opcode_handler_table;
philpem@0	165	while(ostruct->mask != 0xff00)
philpem@0	166	{
philpem@0	167	for(i = 0;i < 0x10000;i++)
philpem@0	168	{
philpem@0	169	if((i & ostruct->mask) == ostruct->match)
philpem@0	170	{
philpem@0	171	m68ki_instruction_jump_table[i] = ostruct->opcode_handler;
philpem@0	172	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	173	m68ki_cycles[k][i] = ostruct->cycles[k];
philpem@0	174	}
philpem@0	175	}
philpem@0	176	ostruct++;
philpem@0	177	}
philpem@0	178	while(ostruct->mask == 0xff00)
philpem@0	179	{
philpem@0	180	for(i = 0;i <= 0xff;i++)
philpem@0	181	{
philpem@0	182	m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
philpem@0	183	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	184	m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
philpem@0	185	}
philpem@0	186	ostruct++;
philpem@0	187	}
philpem@0	188	while(ostruct->mask == 0xf1f8)
philpem@0	189	{
philpem@0	190	for(i = 0;i < 8;i++)
philpem@0	191	{
philpem@0	192	for(j = 0;j < 8;j++)
philpem@0	193	{
philpem@0	194	instr = ostruct->match | (i << 9) | j;
philpem@0	195	m68ki_instruction_jump_table[instr] = ostruct->opcode_handler;
philpem@0	196	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	197	m68ki_cycles[k][instr] = ostruct->cycles[k];
philpem@0	198	if((instr & 0xf000) == 0xe000 && (!(instr & 0x20)))
philpem@0	199	m68ki_cycles[0][instr] = m68ki_cycles[1][instr] = ostruct->cycles[k] + ((((j-1)&7)+1)<<1);
philpem@0	200	}
philpem@0	201	}
philpem@0	202	ostruct++;
philpem@0	203	}
philpem@0	204	while(ostruct->mask == 0xfff0)
philpem@0	205	{
philpem@0	206	for(i = 0;i <= 0x0f;i++)
philpem@0	207	{
philpem@0	208	m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
philpem@0	209	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	210	m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
philpem@0	211	}
philpem@0	212	ostruct++;
philpem@0	213	}
philpem@0	214	while(ostruct->mask == 0xf1ff)
philpem@0	215	{
philpem@0	216	for(i = 0;i <= 0x07;i++)
philpem@0	217	{
philpem@0	218	m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler;
philpem@0	219	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	220	m68ki_cycles[k][ostruct->match | (i << 9)] = ostruct->cycles[k];
philpem@0	221	}
philpem@0	222	ostruct++;
philpem@0	223	}
philpem@0	224	while(ostruct->mask == 0xfff8)
philpem@0	225	{
philpem@0	226	for(i = 0;i <= 0x07;i++)
philpem@0	227	{
philpem@0	228	m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
philpem@0	229	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	230	m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
philpem@0	231	}
philpem@0	232	ostruct++;
philpem@0	233	}
philpem@0	234	while(ostruct->mask == 0xffff)
philpem@0	235	{
philpem@0	236	m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler;
philpem@0	237	for(k=0;k<NUM_CPU_TYPES;k++)
philpem@0	238	m68ki_cycles[k][ostruct->match] = ostruct->cycles[k];
philpem@0	239	ostruct++;
philpem@0	240	}
philpem@0	241	}
philpem@0	242
philpem@0	243
philpem@0	244	/* ======================================================================== */
philpem@0	245	/* ============================== END OF FILE ============================= */
philpem@0	246	/* ======================================================================== */
philpem@0	247
philpem@0	248
philpem@0	249
philpem@0	250	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	251	M68KMAKE_OPCODE_HANDLER_HEADER
philpem@0	252
philpem@0	253	#include "m68kcpu.h"
philpem@0	254
philpem@0	255	/* ======================================================================== */
philpem@0	256	/* ========================= INSTRUCTION HANDLERS ========================= */
philpem@0	257	/* ======================================================================== */
philpem@0	258
philpem@0	259
philpem@0	260
philpem@0	261	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	262	M68KMAKE_OPCODE_HANDLER_FOOTER
philpem@0	263
philpem@0	264	/* ======================================================================== */
philpem@0	265	/* ============================== END OF FILE ============================= */
philpem@0	266	/* ======================================================================== */
philpem@0	267
philpem@0	268
philpem@0	269
philpem@0	270	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	271	M68KMAKE_TABLE_BODY
philpem@0	272
philpem@0	273	The following table is arranged as follows:
philpem@0	274
philpem@0	275	name: Opcode mnemonic
philpem@0	276
philpem@0	277	size: Operation size
philpem@0	278
philpem@0	279	spec proc: Special processing mode:
philpem@0	280	.: normal
philpem@0	281	s: static operand
philpem@0	282	r: register operand
philpem@0	283	rr: register to register
philpem@0	284	mm: memory to memory
philpem@0	285	er: effective address to register
philpem@0	286	re: register to effective address
philpem@0	287	dd: data register to data register
philpem@0	288	da: data register to address register
philpem@0	289	aa: address register to address register
philpem@0	290	cr: control register to register
philpem@0	291	rc: register to control register
philpem@0	292	toc: to condition code register
philpem@0	293	tos: to status register
philpem@0	294	tou: to user stack pointer
philpem@0	295	frc: from condition code register
philpem@0	296	frs: from status register
philpem@0	297	fru: from user stack pointer
philpem@0	298	* for move.x, the special processing mode is a specific
philpem@0	299	destination effective addressing mode.
philpem@0	300
philpem@0	301	spec ea: Specific effective addressing mode:
philpem@0	302	.: normal
philpem@0	303	i: immediate
philpem@0	304	d: data register
philpem@0	305	a: address register
philpem@0	306	ai: address register indirect
philpem@0	307	pi: address register indirect with postincrement
philpem@0	308	pd: address register indirect with predecrement
philpem@0	309	di: address register indirect with displacement
philpem@0	310	ix: address register indirect with index
philpem@0	311	aw: absolute word address
philpem@0	312	al: absolute long address
philpem@0	313	pcdi: program counter relative with displacement
philpem@0	314	pcix: program counter relative with index
philpem@0	315	a7: register specified in instruction is A7
philpem@0	316	ax7: register field X of instruction is A7
philpem@0	317	ay7: register field Y of instruction is A7
philpem@0	318	axy7: register fields X and Y of instruction are A7
philpem@0	319
philpem@0	320	bit pattern: Pattern to recognize this opcode. "." means don't care.
philpem@0	321
philpem@0	322	allowed ea: List of allowed addressing modes:
philpem@0	323	.: not present
philpem@0	324	A: address register indirect
philpem@0	325	+: ARI (address register indirect) with postincrement
philpem@0	326	-: ARI with predecrement
philpem@0	327	D: ARI with displacement
philpem@0	328	X: ARI with index
philpem@0	329	W: absolute word address
philpem@0	330	L: absolute long address
philpem@0	331	d: program counter indirect with displacement
philpem@0	332	x: program counter indirect with index
philpem@0	333	I: immediate
philpem@0	334	mode: CPU operating mode for each cpu type. U = user or supervisor,
philpem@0	335	S = supervisor only, "." = opcode not present.
philpem@0	336
philpem@0	337	cpu cycles: Base number of cycles required to execute this opcode on the
philpem@0	338	specified CPU type.
philpem@0	339	Use "." if CPU does not have this opcode.
philpem@0	340
philpem@0	341
philpem@0	342
philpem@0	343	spec spec allowed ea mode cpu cycles
philpem@0	344	name size proc ea bit pattern A+-DXWLdxI 0 1 2 000 010 020 comments
philpem@0	345	====== ==== ==== ==== ================ ========== = = = === === === =============
philpem@0	346	M68KMAKE_TABLE_START
philpem@0	347	1010 0 . . 1010............ .......... U U U 4 4 4
philpem@0	348	1111 0 . . 1111............ .......... U U U 4 4 4
philpem@0	349	abcd 8 rr . 1100...100000... .......... U U U 6 6 4
philpem@0	350	abcd 8 mm ax7 1100111100001... .......... U U U 18 18 16
philpem@0	351	abcd 8 mm ay7 1100...100001111 .......... U U U 18 18 16
philpem@0	352	abcd 8 mm axy7 1100111100001111 .......... U U U 18 18 16
philpem@0	353	abcd 8 mm . 1100...100001... .......... U U U 18 18 16
philpem@0	354	add 8 er d 1101...000000... .......... U U U 4 4 2
philpem@0	355	add 8 er . 1101...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	356	add 16 er d 1101...001000... .......... U U U 4 4 2
philpem@0	357	add 16 er a 1101...001001... .......... U U U 4 4 2
philpem@0	358	add 16 er . 1101...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	359	add 32 er d 1101...010000... .......... U U U 6 6 2
philpem@0	360	add 32 er a 1101...010001... .......... U U U 6 6 2
philpem@0	361	add 32 er . 1101...010...... A+-DXWLdxI U U U 6 6 2
philpem@0	362	add 8 re . 1101...100...... A+-DXWL... U U U 8 8 4
philpem@0	363	add 16 re . 1101...101...... A+-DXWL... U U U 8 8 4
philpem@0	364	add 32 re . 1101...110...... A+-DXWL... U U U 12 12 4
philpem@0	365	adda 16 . d 1101...011000... .......... U U U 8 8 2
philpem@0	366	adda 16 . a 1101...011001... .......... U U U 8 8 2
philpem@0	367	adda 16 . . 1101...011...... A+-DXWLdxI U U U 8 8 2
philpem@0	368	adda 32 . d 1101...111000... .......... U U U 6 6 2
philpem@0	369	adda 32 . a 1101...111001... .......... U U U 6 6 2
philpem@0	370	adda 32 . . 1101...111...... A+-DXWLdxI U U U 6 6 2
philpem@0	371	addi 8 . d 0000011000000... .......... U U U 8 8 2
philpem@0	372	addi 8 . . 0000011000...... A+-DXWL... U U U 12 12 4
philpem@0	373	addi 16 . d 0000011001000... .......... U U U 8 8 2
philpem@0	374	addi 16 . . 0000011001...... A+-DXWL... U U U 12 12 4
philpem@0	375	addi 32 . d 0000011010000... .......... U U U 16 14 2
philpem@0	376	addi 32 . . 0000011010...... A+-DXWL... U U U 20 20 4
philpem@0	377	addq 8 . d 0101...000000... .......... U U U 4 4 2
philpem@0	378	addq 8 . . 0101...000...... A+-DXWL... U U U 8 8 4
philpem@0	379	addq 16 . d 0101...001000... .......... U U U 4 4 2
philpem@0	380	addq 16 . a 0101...001001... .......... U U U 4 4 2
philpem@0	381	addq 16 . . 0101...001...... A+-DXWL... U U U 8 8 4
philpem@0	382	addq 32 . d 0101...010000... .......... U U U 8 8 2
philpem@0	383	addq 32 . a 0101...010001... .......... U U U 8 8 2
philpem@0	384	addq 32 . . 0101...010...... A+-DXWL... U U U 12 12 4
philpem@0	385	addx 8 rr . 1101...100000... .......... U U U 4 4 2
philpem@0	386	addx 16 rr . 1101...101000... .......... U U U 4 4 2
philpem@0	387	addx 32 rr . 1101...110000... .......... U U U 8 6 2
philpem@0	388	addx 8 mm ax7 1101111100001... .......... U U U 18 18 12
philpem@0	389	addx 8 mm ay7 1101...100001111 .......... U U U 18 18 12
philpem@0	390	addx 8 mm axy7 1101111100001111 .......... U U U 18 18 12
philpem@0	391	addx 8 mm . 1101...100001... .......... U U U 18 18 12
philpem@0	392	addx 16 mm . 1101...101001... .......... U U U 18 18 12
philpem@0	393	addx 32 mm . 1101...110001... .......... U U U 30 30 12
philpem@0	394	and 8 er d 1100...000000... .......... U U U 4 4 2
philpem@0	395	and 8 er . 1100...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	396	and 16 er d 1100...001000... .......... U U U 4 4 2
philpem@0	397	and 16 er . 1100...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	398	and 32 er d 1100...010000... .......... U U U 6 6 2
philpem@0	399	and 32 er . 1100...010...... A+-DXWLdxI U U U 6 6 2
philpem@0	400	and 8 re . 1100...100...... A+-DXWL... U U U 8 8 4
philpem@0	401	and 16 re . 1100...101...... A+-DXWL... U U U 8 8 4
philpem@0	402	and 32 re . 1100...110...... A+-DXWL... U U U 12 12 4
philpem@0	403	andi 16 toc . 0000001000111100 .......... U U U 20 16 12
philpem@0	404	andi 16 tos . 0000001001111100 .......... S S S 20 16 12
philpem@0	405	andi 8 . d 0000001000000... .......... U U U 8 8 2
philpem@0	406	andi 8 . . 0000001000...... A+-DXWL... U U U 12 12 4
philpem@0	407	andi 16 . d 0000001001000... .......... U U U 8 8 2
philpem@0	408	andi 16 . . 0000001001...... A+-DXWL... U U U 12 12 4
philpem@0	409	andi 32 . d 0000001010000... .......... U U U 14 14 2
philpem@0	410	andi 32 . . 0000001010...... A+-DXWL... U U U 20 20 4
philpem@0	411	asr 8 s . 1110...000000... .......... U U U 6 6 6
philpem@0	412	asr 16 s . 1110...001000... .......... U U U 6 6 6
philpem@0	413	asr 32 s . 1110...010000... .......... U U U 8 8 6
philpem@0	414	asr 8 r . 1110...000100... .......... U U U 6 6 6
philpem@0	415	asr 16 r . 1110...001100... .......... U U U 6 6 6
philpem@0	416	asr 32 r . 1110...010100... .......... U U U 8 8 6
philpem@0	417	asr 16 . . 1110000011...... A+-DXWL... U U U 8 8 5
philpem@0	418	asl 8 s . 1110...100000... .......... U U U 6 6 8
philpem@0	419	asl 16 s . 1110...101000... .......... U U U 6 6 8
philpem@0	420	asl 32 s . 1110...110000... .......... U U U 8 8 8
philpem@0	421	asl 8 r . 1110...100100... .......... U U U 6 6 8
philpem@0	422	asl 16 r . 1110...101100... .......... U U U 6 6 8
philpem@0	423	asl 32 r . 1110...110100... .......... U U U 8 8 8
philpem@0	424	asl 16 . . 1110000111...... A+-DXWL... U U U 8 8 6
philpem@0	425	bcc 8 . . 0110............ .......... U U U 8 8 6
philpem@0	426	bcc 16 . . 0110....00000000 .......... U U U 10 10 6
philpem@0	427	bcc 32 . . 0110....11111111 .......... . . U . . 6
philpem@0	428	bchg 8 r . 0000...101...... A+-DXWL... U U U 8 8 4
philpem@0	429	bchg 32 r d 0000...101000... .......... U U U 8 8 4
philpem@0	430	bchg 8 s . 0000100001...... A+-DXWL... U U U 12 12 4
philpem@0	431	bchg 32 s d 0000100001000... .......... U U U 12 12 4
philpem@0	432	bclr 8 r . 0000...110...... A+-DXWL... U U U 8 10 4
philpem@0	433	bclr 32 r d 0000...110000... .......... U U U 10 10 4
philpem@0	434	bclr 8 s . 0000100010...... A+-DXWL... U U U 12 12 4
philpem@0	435	bclr 32 s d 0000100010000... .......... U U U 14 14 4
philpem@0	436	bfchg 32 . d 1110101011000... .......... . . U . . 12 timing not quite correct
philpem@0	437	bfchg 32 . . 1110101011...... A..DXWL... . . U . . 20
philpem@0	438	bfclr 32 . d 1110110011000... .......... . . U . . 12
philpem@0	439	bfclr 32 . . 1110110011...... A..DXWL... . . U . . 20
philpem@0	440	bfexts 32 . d 1110101111000... .......... . . U . . 8
philpem@0	441	bfexts 32 . . 1110101111...... A..DXWLdx. . . U . . 15
philpem@0	442	bfextu 32 . d 1110100111000... .......... . . U . . 8
philpem@0	443	bfextu 32 . . 1110100111...... A..DXWLdx. . . U . . 15
philpem@0	444	bfffo 32 . d 1110110111000... .......... . . U . . 18
philpem@0	445	bfffo 32 . . 1110110111...... A..DXWLdx. . . U . . 28
philpem@0	446	bfins 32 . d 1110111111000... .......... . . U . . 10
philpem@0	447	bfins 32 . . 1110111111...... A..DXWL... . . U . . 17
philpem@0	448	bfset 32 . d 1110111011000... .......... . . U . . 12
philpem@0	449	bfset 32 . . 1110111011...... A..DXWL... . . U . . 20
philpem@0	450	bftst 32 . d 1110100011000... .......... . . U . . 6
philpem@0	451	bftst 32 . . 1110100011...... A..DXWLdx. . . U . . 13
philpem@0	452	bkpt 0 . . 0100100001001... .......... . U U . 10 10
philpem@0	453	bra 8 . . 01100000........ .......... U U U 10 10 10
philpem@0	454	bra 16 . . 0110000000000000 .......... U U U 10 10 10
philpem@0	455	bra 32 . . 0110000011111111 .......... U U U . . 10
philpem@0	456	bset 32 r d 0000...111000... .......... U U U 8 8 4
philpem@0	457	bset 8 r . 0000...111...... A+-DXWL... U U U 8 8 4
philpem@0	458	bset 8 s . 0000100011...... A+-DXWL... U U U 12 12 4
philpem@0	459	bset 32 s d 0000100011000... .......... U U U 12 12 4
philpem@0	460	bsr 8 . . 01100001........ .......... U U U 18 18 7
philpem@0	461	bsr 16 . . 0110000100000000 .......... U U U 18 18 7
philpem@0	462	bsr 32 . . 0110000111111111 .......... . . U . . 7
philpem@0	463	btst 8 r . 0000...100...... A+-DXWLdxI U U U 4 4 4
philpem@0	464	btst 32 r d 0000...100000... .......... U U U 6 6 4
philpem@0	465	btst 8 s . 0000100000...... A+-DXWLdx. U U U 8 8 4
philpem@0	466	btst 32 s d 0000100000000... .......... U U U 10 10 4
philpem@0	467	callm 32 . . 0000011011...... A..DXWLdx. . . U . . 60 not properly emulated
philpem@0	468	cas 8 . . 0000101011...... A+-DXWL... . . U . . 12
philpem@0	469	cas 16 . . 0000110011...... A+-DXWL... . . U . . 12
philpem@0	470	cas 32 . . 0000111011...... A+-DXWL... . . U . . 12
philpem@0	471	cas2 16 . . 0000110011111100 .......... . . U . . 12
philpem@0	472	cas2 32 . . 0000111011111100 .......... . . U . . 12
philpem@0	473	chk 16 . d 0100...110000... .......... U U U 10 8 8
philpem@0	474	chk 16 . . 0100...110...... A+-DXWLdxI U U U 10 8 8
philpem@0	475	chk 32 . d 0100...100000... .......... . . U . . 8
philpem@0	476	chk 32 . . 0100...100...... A+-DXWLdxI . . U . . 8
philpem@0	477	chk2cmp2 8 . . 0000000011...... A..DXWLdx. . . U . . 18
philpem@0	478	chk2cmp2 16 . . 0000001011...... A..DXWLdx. . . U . . 18
philpem@0	479	chk2cmp2 32 . . 0000010011...... A..DXWLdx. . . U . . 18
philpem@0	480	clr 8 . d 0100001000000... .......... U U U 4 4 2
philpem@0	481	clr 8 . . 0100001000...... A+-DXWL... U U U 8 4 4
philpem@0	482	clr 16 . d 0100001001000... .......... U U U 4 4 2
philpem@0	483	clr 16 . . 0100001001...... A+-DXWL... U U U 8 4 4
philpem@0	484	clr 32 . d 0100001010000... .......... U U U 6 6 2
philpem@0	485	clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
philpem@0	486	cmp 8 . d 1011...000000... .......... U U U 4 4 2
philpem@0	487	cmp 8 . . 1011...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	488	cmp 16 . d 1011...001000... .......... U U U 4 4 2
philpem@0	489	cmp 16 . a 1011...001001... .......... U U U 4 4 2
philpem@0	490	cmp 16 . . 1011...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	491	cmp 32 . d 1011...010000... .......... U U U 6 6 2
philpem@0	492	cmp 32 . a 1011...010001... .......... U U U 6 6 2
philpem@0	493	cmp 32 . . 1011...010...... A+-DXWLdxI U U U 6 6 2
philpem@0	494	cmpa 16 . d 1011...011000... .......... U U U 6 6 4
philpem@0	495	cmpa 16 . a 1011...011001... .......... U U U 6 6 4
philpem@0	496	cmpa 16 . . 1011...011...... A+-DXWLdxI U U U 6 6 4
philpem@0	497	cmpa 32 . d 1011...111000... .......... U U U 6 6 4
philpem@0	498	cmpa 32 . a 1011...111001... .......... U U U 6 6 4
philpem@0	499	cmpa 32 . . 1011...111...... A+-DXWLdxI U U U 6 6 4
philpem@0	500	cmpi 8 . d 0000110000000... .......... U U U 8 8 2
philpem@0	501	cmpi 8 . . 0000110000...... A+-DXWL... U U U 8 8 2
philpem@0	502	cmpi 8 . pcdi 0000110000111010 .......... . . U . . 7
philpem@0	503	cmpi 8 . pcix 0000110000111011 .......... . . U . . 9
philpem@0	504	cmpi 16 . d 0000110001000... .......... U U U 8 8 2
philpem@0	505	cmpi 16 . . 0000110001...... A+-DXWL... U U U 8 8 2
philpem@0	506	cmpi 16 . pcdi 0000110001111010 .......... . . U . . 7
philpem@0	507	cmpi 16 . pcix 0000110001111011 .......... . . U . . 9
philpem@0	508	cmpi 32 . d 0000110010000... .......... U U U 14 12 2
philpem@0	509	cmpi 32 . . 0000110010...... A+-DXWL... U U U 12 12 2
philpem@0	510	cmpi 32 . pcdi 0000110010111010 .......... . . U . . 7
philpem@0	511	cmpi 32 . pcix 0000110010111011 .......... . . U . . 9
philpem@0	512	cmpm 8 . ax7 1011111100001... .......... U U U 12 12 9
philpem@0	513	cmpm 8 . ay7 1011...100001111 .......... U U U 12 12 9
philpem@0	514	cmpm 8 . axy7 1011111100001111 .......... U U U 12 12 9
philpem@0	515	cmpm 8 . . 1011...100001... .......... U U U 12 12 9
philpem@0	516	cmpm 16 . . 1011...101001... .......... U U U 12 12 9
philpem@0	517	cmpm 32 . . 1011...110001... .......... U U U 20 20 9
philpem@0	518	cpbcc 32 . . 1111...01....... .......... . . U . . 4 unemulated
philpem@0	519	cpdbcc 32 . . 1111...001001... .......... . . U . . 4 unemulated
philpem@0	520	cpgen 32 . . 1111...000...... .......... . . U . . 4 unemulated
philpem@0	521	cpscc 32 . . 1111...001...... .......... . . U . . 4 unemulated
philpem@0	522	cptrapcc 32 . . 1111...001111... .......... . . U . . 4 unemulated
philpem@0	523	dbt 16 . . 0101000011001... .......... U U U 12 12 6
philpem@0	524	dbf 16 . . 0101000111001... .......... U U U 14 14 6
philpem@0	525	dbcc 16 . . 0101....11001... .......... U U U 12 12 6
philpem@0	526	divs 16 . d 1000...111000... .......... U U U 158 122 56
philpem@0	527	divs 16 . . 1000...111...... A+-DXWLdxI U U U 158 122 56
philpem@0	528	divu 16 . d 1000...011000... .......... U U U 140 108 44
philpem@0	529	divu 16 . . 1000...011...... A+-DXWLdxI U U U 140 108 44
philpem@0	530	divl 32 . d 0100110001000... .......... . . U . . 84
philpem@0	531	divl 32 . . 0100110001...... A+-DXWLdxI . . U . . 84
philpem@0	532	eor 8 . d 1011...100000... .......... U U U 4 4 2
philpem@0	533	eor 8 . . 1011...100...... A+-DXWL... U U U 8 8 4
philpem@0	534	eor 16 . d 1011...101000... .......... U U U 4 4 2
philpem@0	535	eor 16 . . 1011...101...... A+-DXWL... U U U 8 8 4
philpem@0	536	eor 32 . d 1011...110000... .......... U U U 8 6 2
philpem@0	537	eor 32 . . 1011...110...... A+-DXWL... U U U 12 12 4
philpem@0	538	eori 16 toc . 0000101000111100 .......... U U U 20 16 12
philpem@0	539	eori 16 tos . 0000101001111100 .......... S S S 20 16 12
philpem@0	540	eori 8 . d 0000101000000... .......... U U U 8 8 2
philpem@0	541	eori 8 . . 0000101000...... A+-DXWL... U U U 12 12 4
philpem@0	542	eori 16 . d 0000101001000... .......... U U U 8 8 2
philpem@0	543	eori 16 . . 0000101001...... A+-DXWL... U U U 12 12 4
philpem@0	544	eori 32 . d 0000101010000... .......... U U U 16 14 2
philpem@0	545	eori 32 . . 0000101010...... A+-DXWL... U U U 20 20 4
philpem@0	546	exg 32 dd . 1100...101000... .......... U U U 6 6 2
philpem@0	547	exg 32 aa . 1100...101001... .......... U U U 6 6 2
philpem@0	548	exg 32 da . 1100...110001... .......... U U U 6 6 2
philpem@0	549	ext 16 . . 0100100010000... .......... U U U 4 4 4
philpem@0	550	ext 32 . . 0100100011000... .......... U U U 4 4 4
philpem@0	551	extb 32 . . 0100100111000... .......... . . U . . 4
philpem@0	552	illegal 0 . . 0100101011111100 .......... U U U 4 4 4
philpem@0	553	jmp 32 . . 0100111011...... A..DXWLdx. U U U 4 4 0
philpem@0	554	jsr 32 . . 0100111010...... A..DXWLdx. U U U 12 12 0
philpem@0	555	lea 32 . . 0100...111...... A..DXWLdx. U U U 0 0 2
philpem@0	556	link 16 . a7 0100111001010111 .......... U U U 16 16 5
philpem@0	557	link 16 . . 0100111001010... .......... U U U 16 16 5
philpem@0	558	link 32 . a7 0100100000001111 .......... . . U . . 6
philpem@0	559	link 32 . . 0100100000001... .......... . . U . . 6
philpem@0	560	lsr 8 s . 1110...000001... .......... U U U 6 6 4
philpem@0	561	lsr 16 s . 1110...001001... .......... U U U 6 6 4
philpem@0	562	lsr 32 s . 1110...010001... .......... U U U 8 8 4
philpem@0	563	lsr 8 r . 1110...000101... .......... U U U 6 6 6
philpem@0	564	lsr 16 r . 1110...001101... .......... U U U 6 6 6
philpem@0	565	lsr 32 r . 1110...010101... .......... U U U 8 8 6
philpem@0	566	lsr 16 . . 1110001011...... A+-DXWL... U U U 8 8 5
philpem@0	567	lsl 8 s . 1110...100001... .......... U U U 6 6 4
philpem@0	568	lsl 16 s . 1110...101001... .......... U U U 6 6 4
philpem@0	569	lsl 32 s . 1110...110001... .......... U U U 8 8 4
philpem@0	570	lsl 8 r . 1110...100101... .......... U U U 6 6 6
philpem@0	571	lsl 16 r . 1110...101101... .......... U U U 6 6 6
philpem@0	572	lsl 32 r . 1110...110101... .......... U U U 8 8 6
philpem@0	573	lsl 16 . . 1110001111...... A+-DXWL... U U U 8 8 5
philpem@0	574	move 8 d d 0001...000000... .......... U U U 4 4 2
philpem@0	575	move 8 d . 0001...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	576	move 8 ai d 0001...010000... .......... U U U 8 8 4
philpem@0	577	move 8 ai . 0001...010...... A+-DXWLdxI U U U 8 8 4
philpem@0	578	move 8 pi d 0001...011000... .......... U U U 8 8 4
philpem@0	579	move 8 pi . 0001...011...... A+-DXWLdxI U U U 8 8 4
philpem@0	580	move 8 pi7 d 0001111011000... .......... U U U 8 8 4
philpem@0	581	move 8 pi7 . 0001111011...... A+-DXWLdxI U U U 8 8 4
philpem@0	582	move 8 pd d 0001...100000... .......... U U U 8 8 5
philpem@0	583	move 8 pd . 0001...100...... A+-DXWLdxI U U U 8 8 5
philpem@0	584	move 8 pd7 d 0001111100000... .......... U U U 8 8 5
philpem@0	585	move 8 pd7 . 0001111100...... A+-DXWLdxI U U U 8 8 5
philpem@0	586	move 8 di d 0001...101000... .......... U U U 12 12 5
philpem@0	587	move 8 di . 0001...101...... A+-DXWLdxI U U U 12 12 5
philpem@0	588	move 8 ix d 0001...110000... .......... U U U 14 14 7
philpem@0	589	move 8 ix . 0001...110...... A+-DXWLdxI U U U 14 14 7
philpem@0	590	move 8 aw d 0001000111000... .......... U U U 12 12 4
philpem@0	591	move 8 aw . 0001000111...... A+-DXWLdxI U U U 12 12 4
philpem@0	592	move 8 al d 0001001111000... .......... U U U 16 16 6
philpem@0	593	move 8 al . 0001001111...... A+-DXWLdxI U U U 16 16 6
philpem@0	594	move 16 d d 0011...000000... .......... U U U 4 4 2
philpem@0	595	move 16 d a 0011...000001... .......... U U U 4 4 2
philpem@0	596	move 16 d . 0011...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	597	move 16 ai d 0011...010000... .......... U U U 8 8 4
philpem@0	598	move 16 ai a 0011...010001... .......... U U U 8 8 4
philpem@0	599	move 16 ai . 0011...010...... A+-DXWLdxI U U U 8 8 4
philpem@0	600	move 16 pi d 0011...011000... .......... U U U 8 8 4
philpem@0	601	move 16 pi a 0011...011001... .......... U U U 8 8 4
philpem@0	602	move 16 pi . 0011...011...... A+-DXWLdxI U U U 8 8 4
philpem@0	603	move 16 pd d 0011...100000... .......... U U U 8 8 5
philpem@0	604	move 16 pd a 0011...100001... .......... U U U 8 8 5
philpem@0	605	move 16 pd . 0011...100...... A+-DXWLdxI U U U 8 8 5
philpem@0	606	move 16 di d 0011...101000... .......... U U U 12 12 5
philpem@0	607	move 16 di a 0011...101001... .......... U U U 12 12 5
philpem@0	608	move 16 di . 0011...101...... A+-DXWLdxI U U U 12 12 5
philpem@0	609	move 16 ix d 0011...110000... .......... U U U 14 14 7
philpem@0	610	move 16 ix a 0011...110001... .......... U U U 14 14 7
philpem@0	611	move 16 ix . 0011...110...... A+-DXWLdxI U U U 14 14 7
philpem@0	612	move 16 aw d 0011000111000... .......... U U U 12 12 4
philpem@0	613	move 16 aw a 0011000111001... .......... U U U 12 12 4
philpem@0	614	move 16 aw . 0011000111...... A+-DXWLdxI U U U 12 12 4
philpem@0	615	move 16 al d 0011001111000... .......... U U U 16 16 6
philpem@0	616	move 16 al a 0011001111001... .......... U U U 16 16 6
philpem@0	617	move 16 al . 0011001111...... A+-DXWLdxI U U U 16 16 6
philpem@0	618	move 32 d d 0010...000000... .......... U U U 4 4 2
philpem@0	619	move 32 d a 0010...000001... .......... U U U 4 4 2
philpem@0	620	move 32 d . 0010...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	621	move 32 ai d 0010...010000... .......... U U U 12 12 4
philpem@0	622	move 32 ai a 0010...010001... .......... U U U 12 12 4
philpem@0	623	move 32 ai . 0010...010...... A+-DXWLdxI U U U 12 12 4
philpem@0	624	move 32 pi d 0010...011000... .......... U U U 12 12 4
philpem@0	625	move 32 pi a 0010...011001... .......... U U U 12 12 4
philpem@0	626	move 32 pi . 0010...011...... A+-DXWLdxI U U U 12 12 4
philpem@0	627	move 32 pd d 0010...100000... .......... U U U 12 14 5
philpem@0	628	move 32 pd a 0010...100001... .......... U U U 12 14 5
philpem@0	629	move 32 pd . 0010...100...... A+-DXWLdxI U U U 12 14 5
philpem@0	630	move 32 di d 0010...101000... .......... U U U 16 16 5
philpem@0	631	move 32 di a 0010...101001... .......... U U U 16 16 5
philpem@0	632	move 32 di . 0010...101...... A+-DXWLdxI U U U 16 16 5
philpem@0	633	move 32 ix d 0010...110000... .......... U U U 18 18 7
philpem@0	634	move 32 ix a 0010...110001... .......... U U U 18 18 7
philpem@0	635	move 32 ix . 0010...110...... A+-DXWLdxI U U U 18 18 7
philpem@0	636	move 32 aw d 0010000111000... .......... U U U 16 16 4
philpem@0	637	move 32 aw a 0010000111001... .......... U U U 16 16 4
philpem@0	638	move 32 aw . 0010000111...... A+-DXWLdxI U U U 16 16 4
philpem@0	639	move 32 al d 0010001111000... .......... U U U 20 20 6
philpem@0	640	move 32 al a 0010001111001... .......... U U U 20 20 6
philpem@0	641	move 32 al . 0010001111...... A+-DXWLdxI U U U 20 20 6
philpem@0	642	movea 16 . d 0011...001000... .......... U U U 4 4 2
philpem@0	643	movea 16 . a 0011...001001... .......... U U U 4 4 2
philpem@0	644	movea 16 . . 0011...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	645	movea 32 . d 0010...001000... .......... U U U 4 4 2
philpem@0	646	movea 32 . a 0010...001001... .......... U U U 4 4 2
philpem@0	647	movea 32 . . 0010...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	648	move 16 frc d 0100001011000... .......... . U U . 4 4
philpem@0	649	move 16 frc . 0100001011...... A+-DXWL... . U U . 8 4
philpem@0	650	move 16 toc d 0100010011000... .......... U U U 12 12 4
philpem@0	651	move 16 toc . 0100010011...... A+-DXWLdxI U U U 12 12 4
philpem@0	652	move 16 frs d 0100000011000... .......... U S S 6 4 8 U only for 000
philpem@0	653	move 16 frs . 0100000011...... A+-DXWL... U S S 8 8 8 U only for 000
philpem@0	654	move 16 tos d 0100011011000... .......... S S S 12 12 8
philpem@0	655	move 16 tos . 0100011011...... A+-DXWLdxI S S S 12 12 8
philpem@0	656	move 32 fru . 0100111001101... .......... S S S 4 6 2
philpem@0	657	move 32 tou . 0100111001100... .......... S S S 4 6 2
philpem@0	658	movec 32 cr . 0100111001111010 .......... . S S . 12 6
philpem@0	659	movec 32 rc . 0100111001111011 .......... . S S . 10 12
philpem@0	660	movem 16 re pd 0100100010100... .......... U U U 8 8 4
philpem@0	661	movem 16 re . 0100100010...... A..DXWL... U U U 8 8 4
philpem@0	662	movem 32 re pd 0100100011100... .......... U U U 8 8 4
philpem@0	663	movem 32 re . 0100100011...... A..DXWL... U U U 8 8 4
philpem@0	664	movem 16 er pi 0100110010011... .......... U U U 12 12 8
philpem@0	665	movem 16 er . 0100110010...... A..DXWLdx. U U U 12 12 8
philpem@0	666	movem 32 er pi 0100110011011... .......... U U U 12 12 8
philpem@0	667	movem 32 er . 0100110011...... A..DXWLdx. U U U 12 12 8
philpem@0	668	movep 16 er . 0000...100001... .......... U U U 16 16 12
philpem@0	669	movep 32 er . 0000...101001... .......... U U U 24 24 18
philpem@0	670	movep 16 re . 0000...110001... .......... U U U 16 16 11
philpem@0	671	movep 32 re . 0000...111001... .......... U U U 24 24 17
philpem@0	672	moveq 32 . . 0111...0........ .......... U U U 4 4 2
philpem@0	673	moves 8 . . 0000111000...... A+-DXWL... . S S . 14 5
philpem@0	674	moves 16 . . 0000111001...... A+-DXWL... . S S . 14 5
philpem@0	675	moves 32 . . 0000111010...... A+-DXWL... . S S . 16 5
philpem@0	676	muls 16 . d 1100...111000... .......... U U U 54 32 27
philpem@0	677	muls 16 . . 1100...111...... A+-DXWLdxI U U U 54 32 27
philpem@0	678	mulu 16 . d 1100...011000... .......... U U U 54 30 27
philpem@0	679	mulu 16 . . 1100...011...... A+-DXWLdxI U U U 54 30 27
philpem@0	680	mull 32 . d 0100110000000... .......... . . U . . 43
philpem@0	681	mull 32 . . 0100110000...... A+-DXWLdxI . . U . . 43
philpem@0	682	nbcd 8 . d 0100100000000... .......... U U U 6 6 6
philpem@0	683	nbcd 8 . . 0100100000...... A+-DXWL... U U U 8 8 6
philpem@0	684	neg 8 . d 0100010000000... .......... U U U 4 4 2
philpem@0	685	neg 8 . . 0100010000...... A+-DXWL... U U U 8 8 4
philpem@0	686	neg 16 . d 0100010001000... .......... U U U 4 4 2
philpem@0	687	neg 16 . . 0100010001...... A+-DXWL... U U U 8 8 4
philpem@0	688	neg 32 . d 0100010010000... .......... U U U 6 6 2
philpem@0	689	neg 32 . . 0100010010...... A+-DXWL... U U U 12 12 4
philpem@0	690	negx 8 . d 0100000000000... .......... U U U 4 4 2
philpem@0	691	negx 8 . . 0100000000...... A+-DXWL... U U U 8 8 4
philpem@0	692	negx 16 . d 0100000001000... .......... U U U 4 4 2
philpem@0	693	negx 16 . . 0100000001...... A+-DXWL... U U U 8 8 4
philpem@0	694	negx 32 . d 0100000010000... .......... U U U 6 6 2
philpem@0	695	negx 32 . . 0100000010...... A+-DXWL... U U U 12 12 4
philpem@0	696	nop 0 . . 0100111001110001 .......... U U U 4 4 2
philpem@0	697	not 8 . d 0100011000000... .......... U U U 4 4 2
philpem@0	698	not 8 . . 0100011000...... A+-DXWL... U U U 8 8 4
philpem@0	699	not 16 . d 0100011001000... .......... U U U 4 4 2
philpem@0	700	not 16 . . 0100011001...... A+-DXWL... U U U 8 8 4
philpem@0	701	not 32 . d 0100011010000... .......... U U U 6 6 2
philpem@0	702	not 32 . . 0100011010...... A+-DXWL... U U U 12 12 4
philpem@0	703	or 8 er d 1000...000000... .......... U U U 4 4 2
philpem@0	704	or 8 er . 1000...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	705	or 16 er d 1000...001000... .......... U U U 4 4 2
philpem@0	706	or 16 er . 1000...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	707	or 32 er d 1000...010000... .......... U U U 6 6 2
philpem@0	708	or 32 er . 1000...010...... A+-DXWLdxI U U U 6 6 2
philpem@0	709	or 8 re . 1000...100...... A+-DXWL... U U U 8 8 4
philpem@0	710	or 16 re . 1000...101...... A+-DXWL... U U U 8 8 4
philpem@0	711	or 32 re . 1000...110...... A+-DXWL... U U U 12 12 4
philpem@0	712	ori 16 toc . 0000000000111100 .......... U U U 20 16 12
philpem@0	713	ori 16 tos . 0000000001111100 .......... S S S 20 16 12
philpem@0	714	ori 8 . d 0000000000000... .......... U U U 8 8 2
philpem@0	715	ori 8 . . 0000000000...... A+-DXWL... U U U 12 12 4
philpem@0	716	ori 16 . d 0000000001000... .......... U U U 8 8 2
philpem@0	717	ori 16 . . 0000000001...... A+-DXWL... U U U 12 12 4
philpem@0	718	ori 32 . d 0000000010000... .......... U U U 16 14 2
philpem@0	719	ori 32 . . 0000000010...... A+-DXWL... U U U 20 20 4
philpem@0	720	pack 16 rr . 1000...101000... .......... . . U . . 6
philpem@0	721	pack 16 mm ax7 1000111101001... .......... . . U . . 13
philpem@0	722	pack 16 mm ay7 1000...101001111 .......... . . U . . 13
philpem@0	723	pack 16 mm axy7 1000111101001111 .......... . . U . . 13
philpem@0	724	pack 16 mm . 1000...101001... .......... . . U . . 13
philpem@0	725	pea 32 . . 0100100001...... A..DXWLdx. U U U 6 6 5
philpem@0	726	reset 0 . . 0100111001110000 .......... S S S 0 0 0
philpem@0	727	ror 8 s . 1110...000011... .......... U U U 6 6 8
philpem@0	728	ror 16 s . 1110...001011... .......... U U U 6 6 8
philpem@0	729	ror 32 s . 1110...010011... .......... U U U 8 8 8
philpem@0	730	ror 8 r . 1110...000111... .......... U U U 6 6 8
philpem@0	731	ror 16 r . 1110...001111... .......... U U U 6 6 8
philpem@0	732	ror 32 r . 1110...010111... .......... U U U 8 8 8
philpem@0	733	ror 16 . . 1110011011...... A+-DXWL... U U U 8 8 7
philpem@0	734	rol 8 s . 1110...100011... .......... U U U 6 6 8
philpem@0	735	rol 16 s . 1110...101011... .......... U U U 6 6 8
philpem@0	736	rol 32 s . 1110...110011... .......... U U U 8 8 8
philpem@0	737	rol 8 r . 1110...100111... .......... U U U 6 6 8
philpem@0	738	rol 16 r . 1110...101111... .......... U U U 6 6 8
philpem@0	739	rol 32 r . 1110...110111... .......... U U U 8 8 8
philpem@0	740	rol 16 . . 1110011111...... A+-DXWL... U U U 8 8 7
philpem@0	741	roxr 8 s . 1110...000010... .......... U U U 6 6 12
philpem@0	742	roxr 16 s . 1110...001010... .......... U U U 6 6 12
philpem@0	743	roxr 32 s . 1110...010010... .......... U U U 8 8 12
philpem@0	744	roxr 8 r . 1110...000110... .......... U U U 6 6 12
philpem@0	745	roxr 16 r . 1110...001110... .......... U U U 6 6 12
philpem@0	746	roxr 32 r . 1110...010110... .......... U U U 8 8 12
philpem@0	747	roxr 16 . . 1110010011...... A+-DXWL... U U U 8 8 5
philpem@0	748	roxl 8 s . 1110...100010... .......... U U U 6 6 12
philpem@0	749	roxl 16 s . 1110...101010... .......... U U U 6 6 12
philpem@0	750	roxl 32 s . 1110...110010... .......... U U U 8 8 12
philpem@0	751	roxl 8 r . 1110...100110... .......... U U U 6 6 12
philpem@0	752	roxl 16 r . 1110...101110... .......... U U U 6 6 12
philpem@0	753	roxl 32 r . 1110...110110... .......... U U U 8 8 12
philpem@0	754	roxl 16 . . 1110010111...... A+-DXWL... U U U 8 8 5
philpem@0	755	rtd 32 . . 0100111001110100 .......... . U U . 16 10
philpem@0	756	rte 32 . . 0100111001110011 .......... S S S 20 24 20 bus fault not emulated
philpem@0	757	rtm 32 . . 000001101100.... .......... . . U . . 19 not properly emulated
philpem@0	758	rtr 32 . . 0100111001110111 .......... U U U 20 20 14
philpem@0	759	rts 32 . . 0100111001110101 .......... U U U 16 16 10
philpem@0	760	sbcd 8 rr . 1000...100000... .......... U U U 6 6 4
philpem@0	761	sbcd 8 mm ax7 1000111100001... .......... U U U 18 18 16
philpem@0	762	sbcd 8 mm ay7 1000...100001111 .......... U U U 18 18 16
philpem@0	763	sbcd 8 mm axy7 1000111100001111 .......... U U U 18 18 16
philpem@0	764	sbcd 8 mm . 1000...100001... .......... U U U 18 18 16
philpem@0	765	st 8 . d 0101000011000... .......... U U U 6 4 4
philpem@0	766	st 8 . . 0101000011...... A+-DXWL... U U U 8 8 6
philpem@0	767	sf 8 . d 0101000111000... .......... U U U 4 4 4
philpem@0	768	sf 8 . . 0101000111...... A+-DXWL... U U U 8 8 6
philpem@0	769	scc 8 . d 0101....11000... .......... U U U 4 4 4
philpem@0	770	scc 8 . . 0101....11...... A+-DXWL... U U U 8 8 6
philpem@0	771	stop 0 . . 0100111001110010 .......... S S S 4 4 8
philpem@0	772	sub 8 er d 1001...000000... .......... U U U 4 4 2
philpem@0	773	sub 8 er . 1001...000...... A+-DXWLdxI U U U 4 4 2
philpem@0	774	sub 16 er d 1001...001000... .......... U U U 4 4 2
philpem@0	775	sub 16 er a 1001...001001... .......... U U U 4 4 2
philpem@0	776	sub 16 er . 1001...001...... A+-DXWLdxI U U U 4 4 2
philpem@0	777	sub 32 er d 1001...010000... .......... U U U 6 6 2
philpem@0	778	sub 32 er a 1001...010001... .......... U U U 6 6 2
philpem@0	779	sub 32 er . 1001...010...... A+-DXWLdxI U U U 6 6 2
philpem@0	780	sub 8 re . 1001...100...... A+-DXWL... U U U 8 8 4
philpem@0	781	sub 16 re . 1001...101...... A+-DXWL... U U U 8 8 4
philpem@0	782	sub 32 re . 1001...110...... A+-DXWL... U U U 12 12 4
philpem@0	783	suba 16 . d 1001...011000... .......... U U U 8 8 2
philpem@0	784	suba 16 . a 1001...011001... .......... U U U 8 8 2
philpem@0	785	suba 16 . . 1001...011...... A+-DXWLdxI U U U 8 8 2
philpem@0	786	suba 32 . d 1001...111000... .......... U U U 6 6 2
philpem@0	787	suba 32 . a 1001...111001... .......... U U U 6 6 2
philpem@0	788	suba 32 . . 1001...111...... A+-DXWLdxI U U U 6 6 2
philpem@0	789	subi 8 . d 0000010000000... .......... U U U 8 8 2
philpem@0	790	subi 8 . . 0000010000...... A+-DXWL... U U U 12 12 4
philpem@0	791	subi 16 . d 0000010001000... .......... U U U 8 8 2
philpem@0	792	subi 16 . . 0000010001...... A+-DXWL... U U U 12 12 4
philpem@0	793	subi 32 . d 0000010010000... .......... U U U 16 14 2
philpem@0	794	subi 32 . . 0000010010...... A+-DXWL... U U U 20 20 4
philpem@0	795	subq 8 . d 0101...100000... .......... U U U 4 4 2
philpem@0	796	subq 8 . . 0101...100...... A+-DXWL... U U U 8 8 4
philpem@0	797	subq 16 . d 0101...101000... .......... U U U 4 4 2
philpem@0	798	subq 16 . a 0101...101001... .......... U U U 8 4 2
philpem@0	799	subq 16 . . 0101...101...... A+-DXWL... U U U 8 8 4
philpem@0	800	subq 32 . d 0101...110000... .......... U U U 8 8 2
philpem@0	801	subq 32 . a 0101...110001... .......... U U U 8 8 2
philpem@0	802	subq 32 . . 0101...110...... A+-DXWL... U U U 12 12 4
philpem@0	803	subx 8 rr . 1001...100000... .......... U U U 4 4 2
philpem@0	804	subx 16 rr . 1001...101000... .......... U U U 4 4 2
philpem@0	805	subx 32 rr . 1001...110000... .......... U U U 8 6 2
philpem@0	806	subx 8 mm ax7 1001111100001... .......... U U U 18 18 12
philpem@0	807	subx 8 mm ay7 1001...100001111 .......... U U U 18 18 12
philpem@0	808	subx 8 mm axy7 1001111100001111 .......... U U U 18 18 12
philpem@0	809	subx 8 mm . 1001...100001... .......... U U U 18 18 12
philpem@0	810	subx 16 mm . 1001...101001... .......... U U U 18 18 12
philpem@0	811	subx 32 mm . 1001...110001... .......... U U U 30 30 12
philpem@0	812	swap 32 . . 0100100001000... .......... U U U 4 4 4
philpem@0	813	tas 8 . d 0100101011000... .......... U U U 4 4 4
philpem@0	814	tas 8 . . 0100101011...... A+-DXWL... U U U 14 14 12
philpem@0	815	trap 0 . . 010011100100.... .......... U U U 4 4 4
philpem@0	816	trapt 0 . . 0101000011111100 .......... . . U . . 4
philpem@0	817	trapt 16 . . 0101000011111010 .......... . . U . . 6
philpem@0	818	trapt 32 . . 0101000011111011 .......... . . U . . 8
philpem@0	819	trapf 0 . . 0101000111111100 .......... . . U . . 4
philpem@0	820	trapf 16 . . 0101000111111010 .......... . . U . . 6
philpem@0	821	trapf 32 . . 0101000111111011 .......... . . U . . 8
philpem@0	822	trapcc 0 . . 0101....11111100 .......... . . U . . 4
philpem@0	823	trapcc 16 . . 0101....11111010 .......... . . U . . 6
philpem@0	824	trapcc 32 . . 0101....11111011 .......... . . U . . 8
philpem@0	825	trapv 0 . . 0100111001110110 .......... U U U 4 4 4
philpem@0	826	tst 8 . d 0100101000000... .......... U U U 4 4 2
philpem@0	827	tst 8 . . 0100101000...... A+-DXWL... U U U 4 4 2
philpem@0	828	tst 8 . pcdi 0100101000111010 .......... . . U . . 7
philpem@0	829	tst 8 . pcix 0100101000111011 .......... . . U . . 9
philpem@0	830	tst 8 . i 0100101000111100 .......... . . U . . 6
philpem@0	831	tst 16 . d 0100101001000... .......... U U U 4 4 2
philpem@0	832	tst 16 . a 0100101001001... .......... . . U . . 2
philpem@0	833	tst 16 . . 0100101001...... A+-DXWL... U U U 4 4 2
philpem@0	834	tst 16 . pcdi 0100101001111010 .......... . . U . . 7
philpem@0	835	tst 16 . pcix 0100101001111011 .......... . . U . . 9
philpem@0	836	tst 16 . i 0100101001111100 .......... . . U . . 6
philpem@0	837	tst 32 . d 0100101010000... .......... U U U 4 4 2
philpem@0	838	tst 32 . a 0100101010001... .......... . . U . . 2
philpem@0	839	tst 32 . . 0100101010...... A+-DXWL... U U U 4 4 2
philpem@0	840	tst 32 . pcdi 0100101010111010 .......... . . U . . 7
philpem@0	841	tst 32 . pcix 0100101010111011 .......... . . U . . 9
philpem@0	842	tst 32 . i 0100101010111100 .......... . . U . . 6
philpem@0	843	unlk 32 . a7 0100111001011111 .......... U U U 12 12 6
philpem@0	844	unlk 32 . . 0100111001011... .......... U U U 12 12 6
philpem@0	845	unpk 16 rr . 1000...110000... .......... . . U . . 8
philpem@0	846	unpk 16 mm ax7 1000111110001... .......... . . U . . 13
philpem@0	847	unpk 16 mm ay7 1000...110001111 .......... . . U . . 13
philpem@0	848	unpk 16 mm axy7 1000111110001111 .......... . . U . . 13
philpem@0	849	unpk 16 mm . 1000...110001... .......... . . U . . 13
philpem@0	850
philpem@0	851
philpem@0	852
philpem@0	853	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	854	M68KMAKE_OPCODE_HANDLER_BODY
philpem@0	855
philpem@0	856	M68KMAKE_OP(1010, 0, ., .)
philpem@0	857	{
philpem@0	858	m68ki_exception_1010();
philpem@0	859	}
philpem@0	860
philpem@0	861
philpem@0	862	M68KMAKE_OP(1111, 0, ., .)
philpem@0	863	{
philpem@0	864	m68ki_exception_1111();
philpem@0	865	}
philpem@0	866
philpem@0	867
philpem@0	868	M68KMAKE_OP(abcd, 8, rr, .)
philpem@0	869	{
philpem@0	870	uint* r_dst = &DX;
philpem@0	871	uint src = DY;
philpem@0	872	uint dst = *r_dst;
philpem@0	873	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
philpem@0	874
philpem@0	875	if(res > 9)
philpem@0	876	res += 6;
philpem@0	877	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
philpem@0	878	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	879	if(FLAG_C)
philpem@0	880	res -= 0xa0;
philpem@0	881
philpem@0	882	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	883
philpem@0	884	res = MASK_OUT_ABOVE_8(res);
philpem@0	885	FLAG_Z |= res;
philpem@0	886
philpem@0	887	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	888	}
philpem@0	889
philpem@0	890
philpem@0	891	M68KMAKE_OP(abcd, 8, mm, ax7)
philpem@0	892	{
philpem@0	893	uint src = OPER_AY_PD_8();
philpem@0	894	uint ea = EA_A7_PD_8();
philpem@0	895	uint dst = m68ki_read_8(ea);
philpem@0	896	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
philpem@0	897
philpem@0	898	if(res > 9)
philpem@0	899	res += 6;
philpem@0	900	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
philpem@0	901	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	902	if(FLAG_C)
philpem@0	903	res -= 0xa0;
philpem@0	904
philpem@0	905	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	906
philpem@0	907	res = MASK_OUT_ABOVE_8(res);
philpem@0	908	FLAG_Z |= res;
philpem@0	909
philpem@0	910	m68ki_write_8(ea, res);
philpem@0	911	}
philpem@0	912
philpem@0	913
philpem@0	914	M68KMAKE_OP(abcd, 8, mm, ay7)
philpem@0	915	{
philpem@0	916	uint src = OPER_A7_PD_8();
philpem@0	917	uint ea = EA_AX_PD_8();
philpem@0	918	uint dst = m68ki_read_8(ea);
philpem@0	919	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
philpem@0	920
philpem@0	921	if(res > 9)
philpem@0	922	res += 6;
philpem@0	923	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
philpem@0	924	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	925	if(FLAG_C)
philpem@0	926	res -= 0xa0;
philpem@0	927
philpem@0	928	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	929
philpem@0	930	res = MASK_OUT_ABOVE_8(res);
philpem@0	931	FLAG_Z |= res;
philpem@0	932
philpem@0	933	m68ki_write_8(ea, res);
philpem@0	934	}
philpem@0	935
philpem@0	936
philpem@0	937	M68KMAKE_OP(abcd, 8, mm, axy7)
philpem@0	938	{
philpem@0	939	uint src = OPER_A7_PD_8();
philpem@0	940	uint ea = EA_A7_PD_8();
philpem@0	941	uint dst = m68ki_read_8(ea);
philpem@0	942	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
philpem@0	943
philpem@0	944	if(res > 9)
philpem@0	945	res += 6;
philpem@0	946	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
philpem@0	947	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	948	if(FLAG_C)
philpem@0	949	res -= 0xa0;
philpem@0	950
philpem@0	951	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	952
philpem@0	953	res = MASK_OUT_ABOVE_8(res);
philpem@0	954	FLAG_Z |= res;
philpem@0	955
philpem@0	956	m68ki_write_8(ea, res);
philpem@0	957	}
philpem@0	958
philpem@0	959
philpem@0	960	M68KMAKE_OP(abcd, 8, mm, .)
philpem@0	961	{
philpem@0	962	uint src = OPER_AY_PD_8();
philpem@0	963	uint ea = EA_AX_PD_8();
philpem@0	964	uint dst = m68ki_read_8(ea);
philpem@0	965	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
philpem@0	966
philpem@0	967	if(res > 9)
philpem@0	968	res += 6;
philpem@0	969	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
philpem@0	970	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	971	if(FLAG_C)
philpem@0	972	res -= 0xa0;
philpem@0	973
philpem@0	974	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	975
philpem@0	976	res = MASK_OUT_ABOVE_8(res);
philpem@0	977	FLAG_Z |= res;
philpem@0	978
philpem@0	979	m68ki_write_8(ea, res);
philpem@0	980	}
philpem@0	981
philpem@0	982
philpem@0	983	M68KMAKE_OP(add, 8, er, d)
philpem@0	984	{
philpem@0	985	uint* r_dst = &DX;
philpem@0	986	uint src = MASK_OUT_ABOVE_8(DY);
philpem@0	987	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	988	uint res = src + dst;
philpem@0	989
philpem@0	990	FLAG_N = NFLAG_8(res);
philpem@0	991	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	992	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	993	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	994
philpem@0	995	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	996	}
philpem@0	997
philpem@0	998
philpem@0	999	M68KMAKE_OP(add, 8, er, .)
philpem@0	1000	{
philpem@0	1001	uint* r_dst = &DX;
philpem@0	1002	uint src = M68KMAKE_GET_OPER_AY_8;
philpem@0	1003	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1004	uint res = src + dst;
philpem@0	1005
philpem@0	1006	FLAG_N = NFLAG_8(res);
philpem@0	1007	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1008	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1009	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1010
philpem@0	1011	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	1012	}
philpem@0	1013
philpem@0	1014
philpem@0	1015	M68KMAKE_OP(add, 16, er, d)
philpem@0	1016	{
philpem@0	1017	uint* r_dst = &DX;
philpem@0	1018	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	1019	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1020	uint res = src + dst;
philpem@0	1021
philpem@0	1022	FLAG_N = NFLAG_16(res);
philpem@0	1023	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1024	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1025	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1026
philpem@0	1027	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	1028	}
philpem@0	1029
philpem@0	1030
philpem@0	1031	M68KMAKE_OP(add, 16, er, a)
philpem@0	1032	{
philpem@0	1033	uint* r_dst = &DX;
philpem@0	1034	uint src = MASK_OUT_ABOVE_16(AY);
philpem@0	1035	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1036	uint res = src + dst;
philpem@0	1037
philpem@0	1038	FLAG_N = NFLAG_16(res);
philpem@0	1039	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1040	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1041	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1042
philpem@0	1043	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	1044	}
philpem@0	1045
philpem@0	1046
philpem@0	1047	M68KMAKE_OP(add, 16, er, .)
philpem@0	1048	{
philpem@0	1049	uint* r_dst = &DX;
philpem@0	1050	uint src = M68KMAKE_GET_OPER_AY_16;
philpem@0	1051	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1052	uint res = src + dst;
philpem@0	1053
philpem@0	1054	FLAG_N = NFLAG_16(res);
philpem@0	1055	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1056	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1057	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1058
philpem@0	1059	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	1060	}
philpem@0	1061
philpem@0	1062
philpem@0	1063	M68KMAKE_OP(add, 32, er, d)
philpem@0	1064	{
philpem@0	1065	uint* r_dst = &DX;
philpem@0	1066	uint src = DY;
philpem@0	1067	uint dst = *r_dst;
philpem@0	1068	uint res = src + dst;
philpem@0	1069
philpem@0	1070	FLAG_N = NFLAG_32(res);
philpem@0	1071	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1072	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1073	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1074
philpem@0	1075	*r_dst = FLAG_Z;
philpem@0	1076	}
philpem@0	1077
philpem@0	1078
philpem@0	1079	M68KMAKE_OP(add, 32, er, a)
philpem@0	1080	{
philpem@0	1081	uint* r_dst = &DX;
philpem@0	1082	uint src = AY;
philpem@0	1083	uint dst = *r_dst;
philpem@0	1084	uint res = src + dst;
philpem@0	1085
philpem@0	1086	FLAG_N = NFLAG_32(res);
philpem@0	1087	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1088	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1089	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1090
philpem@0	1091	*r_dst = FLAG_Z;
philpem@0	1092	}
philpem@0	1093
philpem@0	1094
philpem@0	1095	M68KMAKE_OP(add, 32, er, .)
philpem@0	1096	{
philpem@0	1097	uint* r_dst = &DX;
philpem@0	1098	uint src = M68KMAKE_GET_OPER_AY_32;
philpem@0	1099	uint dst = *r_dst;
philpem@0	1100	uint res = src + dst;
philpem@0	1101
philpem@0	1102	FLAG_N = NFLAG_32(res);
philpem@0	1103	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1104	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1105	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1106
philpem@0	1107	*r_dst = FLAG_Z;
philpem@0	1108	}
philpem@0	1109
philpem@0	1110
philpem@0	1111	M68KMAKE_OP(add, 8, re, .)
philpem@0	1112	{
philpem@0	1113	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	1114	uint src = MASK_OUT_ABOVE_8(DX);
philpem@0	1115	uint dst = m68ki_read_8(ea);
philpem@0	1116	uint res = src + dst;
philpem@0	1117
philpem@0	1118	FLAG_N = NFLAG_8(res);
philpem@0	1119	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1120	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1121	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1122
philpem@0	1123	m68ki_write_8(ea, FLAG_Z);
philpem@0	1124	}
philpem@0	1125
philpem@0	1126
philpem@0	1127	M68KMAKE_OP(add, 16, re, .)
philpem@0	1128	{
philpem@0	1129	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1130	uint src = MASK_OUT_ABOVE_16(DX);
philpem@0	1131	uint dst = m68ki_read_16(ea);
philpem@0	1132	uint res = src + dst;
philpem@0	1133
philpem@0	1134	FLAG_N = NFLAG_16(res);
philpem@0	1135	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1136	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1137	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1138
philpem@0	1139	m68ki_write_16(ea, FLAG_Z);
philpem@0	1140	}
philpem@0	1141
philpem@0	1142
philpem@0	1143	M68KMAKE_OP(add, 32, re, .)
philpem@0	1144	{
philpem@0	1145	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	1146	uint src = DX;
philpem@0	1147	uint dst = m68ki_read_32(ea);
philpem@0	1148	uint res = src + dst;
philpem@0	1149
philpem@0	1150	FLAG_N = NFLAG_32(res);
philpem@0	1151	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1152	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1153	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1154
philpem@0	1155	m68ki_write_32(ea, FLAG_Z);
philpem@0	1156	}
philpem@0	1157
philpem@0	1158
philpem@0	1159	M68KMAKE_OP(adda, 16, ., d)
philpem@0	1160	{
philpem@0	1161	uint* r_dst = &AX;
philpem@0	1162
philpem@0	1163	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));
philpem@0	1164	}
philpem@0	1165
philpem@0	1166
philpem@0	1167	M68KMAKE_OP(adda, 16, ., a)
philpem@0	1168	{
philpem@0	1169	uint* r_dst = &AX;
philpem@0	1170
philpem@0	1171	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));
philpem@0	1172	}
philpem@0	1173
philpem@0	1174
philpem@0	1175	M68KMAKE_OP(adda, 16, ., .)
philpem@0	1176	{
philpem@0	1177	uint* r_dst = &AX;
philpem@0	1178
philpem@0	1179	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
philpem@0	1180	}
philpem@0	1181
philpem@0	1182
philpem@0	1183	M68KMAKE_OP(adda, 32, ., d)
philpem@0	1184	{
philpem@0	1185	uint* r_dst = &AX;
philpem@0	1186
philpem@0	1187	*r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);
philpem@0	1188	}
philpem@0	1189
philpem@0	1190
philpem@0	1191	M68KMAKE_OP(adda, 32, ., a)
philpem@0	1192	{
philpem@0	1193	uint* r_dst = &AX;
philpem@0	1194
philpem@0	1195	*r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);
philpem@0	1196	}
philpem@0	1197
philpem@0	1198
philpem@0	1199	M68KMAKE_OP(adda, 32, ., .)
philpem@0	1200	{
philpem@0	1201	uint* r_dst = &AX;
philpem@0	1202
philpem@0	1203	*r_dst = MASK_OUT_ABOVE_32(*r_dst + M68KMAKE_GET_OPER_AY_32);
philpem@0	1204	}
philpem@0	1205
philpem@0	1206
philpem@0	1207	M68KMAKE_OP(addi, 8, ., d)
philpem@0	1208	{
philpem@0	1209	uint* r_dst = &DY;
philpem@0	1210	uint src = OPER_I_8();
philpem@0	1211	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1212	uint res = src + dst;
philpem@0	1213
philpem@0	1214	FLAG_N = NFLAG_8(res);
philpem@0	1215	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1216	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1217	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1218
philpem@0	1219	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	1220	}
philpem@0	1221
philpem@0	1222
philpem@0	1223	M68KMAKE_OP(addi, 8, ., .)
philpem@0	1224	{
philpem@0	1225	uint src = OPER_I_8();
philpem@0	1226	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	1227	uint dst = m68ki_read_8(ea);
philpem@0	1228	uint res = src + dst;
philpem@0	1229
philpem@0	1230	FLAG_N = NFLAG_8(res);
philpem@0	1231	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1232	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1233	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1234
philpem@0	1235	m68ki_write_8(ea, FLAG_Z);
philpem@0	1236	}
philpem@0	1237
philpem@0	1238
philpem@0	1239	M68KMAKE_OP(addi, 16, ., d)
philpem@0	1240	{
philpem@0	1241	uint* r_dst = &DY;
philpem@0	1242	uint src = OPER_I_16();
philpem@0	1243	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1244	uint res = src + dst;
philpem@0	1245
philpem@0	1246	FLAG_N = NFLAG_16(res);
philpem@0	1247	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1248	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1249	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1250
philpem@0	1251	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	1252	}
philpem@0	1253
philpem@0	1254
philpem@0	1255	M68KMAKE_OP(addi, 16, ., .)
philpem@0	1256	{
philpem@0	1257	uint src = OPER_I_16();
philpem@0	1258	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1259	uint dst = m68ki_read_16(ea);
philpem@0	1260	uint res = src + dst;
philpem@0	1261
philpem@0	1262	FLAG_N = NFLAG_16(res);
philpem@0	1263	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1264	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1265	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1266
philpem@0	1267	m68ki_write_16(ea, FLAG_Z);
philpem@0	1268	}
philpem@0	1269
philpem@0	1270
philpem@0	1271	M68KMAKE_OP(addi, 32, ., d)
philpem@0	1272	{
philpem@0	1273	uint* r_dst = &DY;
philpem@0	1274	uint src = OPER_I_32();
philpem@0	1275	uint dst = *r_dst;
philpem@0	1276	uint res = src + dst;
philpem@0	1277
philpem@0	1278	FLAG_N = NFLAG_32(res);
philpem@0	1279	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1280	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1281	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1282
philpem@0	1283	*r_dst = FLAG_Z;
philpem@0	1284	}
philpem@0	1285
philpem@0	1286
philpem@0	1287	M68KMAKE_OP(addi, 32, ., .)
philpem@0	1288	{
philpem@0	1289	uint src = OPER_I_32();
philpem@0	1290	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	1291	uint dst = m68ki_read_32(ea);
philpem@0	1292	uint res = src + dst;
philpem@0	1293
philpem@0	1294	FLAG_N = NFLAG_32(res);
philpem@0	1295	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1296	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1297	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1298
philpem@0	1299	m68ki_write_32(ea, FLAG_Z);
philpem@0	1300	}
philpem@0	1301
philpem@0	1302
philpem@0	1303	M68KMAKE_OP(addq, 8, ., d)
philpem@0	1304	{
philpem@0	1305	uint* r_dst = &DY;
philpem@0	1306	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1307	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1308	uint res = src + dst;
philpem@0	1309
philpem@0	1310	FLAG_N = NFLAG_8(res);
philpem@0	1311	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1312	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1313	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1314
philpem@0	1315	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	1316	}
philpem@0	1317
philpem@0	1318
philpem@0	1319	M68KMAKE_OP(addq, 8, ., .)
philpem@0	1320	{
philpem@0	1321	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1322	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	1323	uint dst = m68ki_read_8(ea);
philpem@0	1324	uint res = src + dst;
philpem@0	1325
philpem@0	1326	FLAG_N = NFLAG_8(res);
philpem@0	1327	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1328	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1329	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1330
philpem@0	1331	m68ki_write_8(ea, FLAG_Z);
philpem@0	1332	}
philpem@0	1333
philpem@0	1334
philpem@0	1335	M68KMAKE_OP(addq, 16, ., d)
philpem@0	1336	{
philpem@0	1337	uint* r_dst = &DY;
philpem@0	1338	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1339	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1340	uint res = src + dst;
philpem@0	1341
philpem@0	1342	FLAG_N = NFLAG_16(res);
philpem@0	1343	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1344	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1345	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1346
philpem@0	1347	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	1348	}
philpem@0	1349
philpem@0	1350
philpem@0	1351	M68KMAKE_OP(addq, 16, ., a)
philpem@0	1352	{
philpem@0	1353	uint* r_dst = &AY;
philpem@0	1354
philpem@0	1355	*r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
philpem@0	1356	}
philpem@0	1357
philpem@0	1358
philpem@0	1359	M68KMAKE_OP(addq, 16, ., .)
philpem@0	1360	{
philpem@0	1361	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1362	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1363	uint dst = m68ki_read_16(ea);
philpem@0	1364	uint res = src + dst;
philpem@0	1365
philpem@0	1366	FLAG_N = NFLAG_16(res);
philpem@0	1367	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1368	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1369	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1370
philpem@0	1371	m68ki_write_16(ea, FLAG_Z);
philpem@0	1372	}
philpem@0	1373
philpem@0	1374
philpem@0	1375	M68KMAKE_OP(addq, 32, ., d)
philpem@0	1376	{
philpem@0	1377	uint* r_dst = &DY;
philpem@0	1378	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1379	uint dst = *r_dst;
philpem@0	1380	uint res = src + dst;
philpem@0	1381
philpem@0	1382	FLAG_N = NFLAG_32(res);
philpem@0	1383	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1384	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1385	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1386
philpem@0	1387	*r_dst = FLAG_Z;
philpem@0	1388	}
philpem@0	1389
philpem@0	1390
philpem@0	1391	M68KMAKE_OP(addq, 32, ., a)
philpem@0	1392	{
philpem@0	1393	uint* r_dst = &AY;
philpem@0	1394
philpem@0	1395	*r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
philpem@0	1396	}
philpem@0	1397
philpem@0	1398
philpem@0	1399	M68KMAKE_OP(addq, 32, ., .)
philpem@0	1400	{
philpem@0	1401	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1402	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	1403	uint dst = m68ki_read_32(ea);
philpem@0	1404	uint res = src + dst;
philpem@0	1405
philpem@0	1406
philpem@0	1407	FLAG_N = NFLAG_32(res);
philpem@0	1408	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1409	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1410	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	1411
philpem@0	1412	m68ki_write_32(ea, FLAG_Z);
philpem@0	1413	}
philpem@0	1414
philpem@0	1415
philpem@0	1416	M68KMAKE_OP(addx, 8, rr, .)
philpem@0	1417	{
philpem@0	1418	uint* r_dst = &DX;
philpem@0	1419	uint src = MASK_OUT_ABOVE_8(DY);
philpem@0	1420	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1421	uint res = src + dst + XFLAG_AS_1();
philpem@0	1422
philpem@0	1423	FLAG_N = NFLAG_8(res);
philpem@0	1424	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1425	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1426
philpem@0	1427	res = MASK_OUT_ABOVE_8(res);
philpem@0	1428	FLAG_Z |= res;
philpem@0	1429
philpem@0	1430	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	1431	}
philpem@0	1432
philpem@0	1433
philpem@0	1434	M68KMAKE_OP(addx, 16, rr, .)
philpem@0	1435	{
philpem@0	1436	uint* r_dst = &DX;
philpem@0	1437	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	1438	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1439	uint res = src + dst + XFLAG_AS_1();
philpem@0	1440
philpem@0	1441	FLAG_N = NFLAG_16(res);
philpem@0	1442	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1443	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1444
philpem@0	1445	res = MASK_OUT_ABOVE_16(res);
philpem@0	1446	FLAG_Z |= res;
philpem@0	1447
philpem@0	1448	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	1449	}
philpem@0	1450
philpem@0	1451
philpem@0	1452	M68KMAKE_OP(addx, 32, rr, .)
philpem@0	1453	{
philpem@0	1454	uint* r_dst = &DX;
philpem@0	1455	uint src = DY;
philpem@0	1456	uint dst = *r_dst;
philpem@0	1457	uint res = src + dst + XFLAG_AS_1();
philpem@0	1458
philpem@0	1459	FLAG_N = NFLAG_32(res);
philpem@0	1460	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1461	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1462
philpem@0	1463	res = MASK_OUT_ABOVE_32(res);
philpem@0	1464	FLAG_Z |= res;
philpem@0	1465
philpem@0	1466	*r_dst = res;
philpem@0	1467	}
philpem@0	1468
philpem@0	1469
philpem@0	1470	M68KMAKE_OP(addx, 8, mm, ax7)
philpem@0	1471	{
philpem@0	1472	uint src = OPER_AY_PD_8();
philpem@0	1473	uint ea = EA_A7_PD_8();
philpem@0	1474	uint dst = m68ki_read_8(ea);
philpem@0	1475	uint res = src + dst + XFLAG_AS_1();
philpem@0	1476
philpem@0	1477	FLAG_N = NFLAG_8(res);
philpem@0	1478	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1479	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1480
philpem@0	1481	res = MASK_OUT_ABOVE_8(res);
philpem@0	1482	FLAG_Z |= res;
philpem@0	1483
philpem@0	1484	m68ki_write_8(ea, res);
philpem@0	1485	}
philpem@0	1486
philpem@0	1487
philpem@0	1488	M68KMAKE_OP(addx, 8, mm, ay7)
philpem@0	1489	{
philpem@0	1490	uint src = OPER_A7_PD_8();
philpem@0	1491	uint ea = EA_AX_PD_8();
philpem@0	1492	uint dst = m68ki_read_8(ea);
philpem@0	1493	uint res = src + dst + XFLAG_AS_1();
philpem@0	1494
philpem@0	1495	FLAG_N = NFLAG_8(res);
philpem@0	1496	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1497	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1498
philpem@0	1499	res = MASK_OUT_ABOVE_8(res);
philpem@0	1500	FLAG_Z |= res;
philpem@0	1501
philpem@0	1502	m68ki_write_8(ea, res);
philpem@0	1503	}
philpem@0	1504
philpem@0	1505
philpem@0	1506	M68KMAKE_OP(addx, 8, mm, axy7)
philpem@0	1507	{
philpem@0	1508	uint src = OPER_A7_PD_8();
philpem@0	1509	uint ea = EA_A7_PD_8();
philpem@0	1510	uint dst = m68ki_read_8(ea);
philpem@0	1511	uint res = src + dst + XFLAG_AS_1();
philpem@0	1512
philpem@0	1513	FLAG_N = NFLAG_8(res);
philpem@0	1514	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1515	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1516
philpem@0	1517	res = MASK_OUT_ABOVE_8(res);
philpem@0	1518	FLAG_Z |= res;
philpem@0	1519
philpem@0	1520	m68ki_write_8(ea, res);
philpem@0	1521	}
philpem@0	1522
philpem@0	1523
philpem@0	1524	M68KMAKE_OP(addx, 8, mm, .)
philpem@0	1525	{
philpem@0	1526	uint src = OPER_AY_PD_8();
philpem@0	1527	uint ea = EA_AX_PD_8();
philpem@0	1528	uint dst = m68ki_read_8(ea);
philpem@0	1529	uint res = src + dst + XFLAG_AS_1();
philpem@0	1530
philpem@0	1531	FLAG_N = NFLAG_8(res);
philpem@0	1532	FLAG_V = VFLAG_ADD_8(src, dst, res);
philpem@0	1533	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	1534
philpem@0	1535	res = MASK_OUT_ABOVE_8(res);
philpem@0	1536	FLAG_Z |= res;
philpem@0	1537
philpem@0	1538	m68ki_write_8(ea, res);
philpem@0	1539	}
philpem@0	1540
philpem@0	1541
philpem@0	1542	M68KMAKE_OP(addx, 16, mm, .)
philpem@0	1543	{
philpem@0	1544	uint src = OPER_AY_PD_16();
philpem@0	1545	uint ea = EA_AX_PD_16();
philpem@0	1546	uint dst = m68ki_read_16(ea);
philpem@0	1547	uint res = src + dst + XFLAG_AS_1();
philpem@0	1548
philpem@0	1549	FLAG_N = NFLAG_16(res);
philpem@0	1550	FLAG_V = VFLAG_ADD_16(src, dst, res);
philpem@0	1551	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	1552
philpem@0	1553	res = MASK_OUT_ABOVE_16(res);
philpem@0	1554	FLAG_Z |= res;
philpem@0	1555
philpem@0	1556	m68ki_write_16(ea, res);
philpem@0	1557	}
philpem@0	1558
philpem@0	1559
philpem@0	1560	M68KMAKE_OP(addx, 32, mm, .)
philpem@0	1561	{
philpem@0	1562	uint src = OPER_AY_PD_32();
philpem@0	1563	uint ea = EA_AX_PD_32();
philpem@0	1564	uint dst = m68ki_read_32(ea);
philpem@0	1565	uint res = src + dst + XFLAG_AS_1();
philpem@0	1566
philpem@0	1567	FLAG_N = NFLAG_32(res);
philpem@0	1568	FLAG_V = VFLAG_ADD_32(src, dst, res);
philpem@0	1569	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
philpem@0	1570
philpem@0	1571	res = MASK_OUT_ABOVE_32(res);
philpem@0	1572	FLAG_Z |= res;
philpem@0	1573
philpem@0	1574	m68ki_write_32(ea, res);
philpem@0	1575	}
philpem@0	1576
philpem@0	1577
philpem@0	1578	M68KMAKE_OP(and, 8, er, d)
philpem@0	1579	{
philpem@0	1580	FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));
philpem@0	1581
philpem@0	1582	FLAG_N = NFLAG_8(FLAG_Z);
philpem@0	1583	FLAG_C = CFLAG_CLEAR;
philpem@0	1584	FLAG_V = VFLAG_CLEAR;
philpem@0	1585	}
philpem@0	1586
philpem@0	1587
philpem@0	1588	M68KMAKE_OP(and, 8, er, .)
philpem@0	1589	{
philpem@0	1590	FLAG_Z = MASK_OUT_ABOVE_8(DX &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
philpem@0	1591
philpem@0	1592	FLAG_N = NFLAG_8(FLAG_Z);
philpem@0	1593	FLAG_C = CFLAG_CLEAR;
philpem@0	1594	FLAG_V = VFLAG_CLEAR;
philpem@0	1595	}
philpem@0	1596
philpem@0	1597
philpem@0	1598	M68KMAKE_OP(and, 16, er, d)
philpem@0	1599	{
philpem@0	1600	FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));
philpem@0	1601
philpem@0	1602	FLAG_N = NFLAG_16(FLAG_Z);
philpem@0	1603	FLAG_C = CFLAG_CLEAR;
philpem@0	1604	FLAG_V = VFLAG_CLEAR;
philpem@0	1605	}
philpem@0	1606
philpem@0	1607
philpem@0	1608	M68KMAKE_OP(and, 16, er, .)
philpem@0	1609	{
philpem@0	1610	FLAG_Z = MASK_OUT_ABOVE_16(DX &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
philpem@0	1611
philpem@0	1612	FLAG_N = NFLAG_16(FLAG_Z);
philpem@0	1613	FLAG_C = CFLAG_CLEAR;
philpem@0	1614	FLAG_V = VFLAG_CLEAR;
philpem@0	1615	}
philpem@0	1616
philpem@0	1617
philpem@0	1618	M68KMAKE_OP(and, 32, er, d)
philpem@0	1619	{
philpem@0	1620	FLAG_Z = DX &= DY;
philpem@0	1621
philpem@0	1622	FLAG_N = NFLAG_32(FLAG_Z);
philpem@0	1623	FLAG_C = CFLAG_CLEAR;
philpem@0	1624	FLAG_V = VFLAG_CLEAR;
philpem@0	1625	}
philpem@0	1626
philpem@0	1627
philpem@0	1628	M68KMAKE_OP(and, 32, er, .)
philpem@0	1629	{
philpem@0	1630	FLAG_Z = DX &= M68KMAKE_GET_OPER_AY_32;
philpem@0	1631
philpem@0	1632	FLAG_N = NFLAG_32(FLAG_Z);
philpem@0	1633	FLAG_C = CFLAG_CLEAR;
philpem@0	1634	FLAG_V = VFLAG_CLEAR;
philpem@0	1635	}
philpem@0	1636
philpem@0	1637
philpem@0	1638	M68KMAKE_OP(and, 8, re, .)
philpem@0	1639	{
philpem@0	1640	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	1641	uint res = DX & m68ki_read_8(ea);
philpem@0	1642
philpem@0	1643	FLAG_N = NFLAG_8(res);
philpem@0	1644	FLAG_C = CFLAG_CLEAR;
philpem@0	1645	FLAG_V = VFLAG_CLEAR;
philpem@0	1646	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	1647
philpem@0	1648	m68ki_write_8(ea, FLAG_Z);
philpem@0	1649	}
philpem@0	1650
philpem@0	1651
philpem@0	1652	M68KMAKE_OP(and, 16, re, .)
philpem@0	1653	{
philpem@0	1654	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1655	uint res = DX & m68ki_read_16(ea);
philpem@0	1656
philpem@0	1657	FLAG_N = NFLAG_16(res);
philpem@0	1658	FLAG_C = CFLAG_CLEAR;
philpem@0	1659	FLAG_V = VFLAG_CLEAR;
philpem@0	1660	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	1661
philpem@0	1662	m68ki_write_16(ea, FLAG_Z);
philpem@0	1663	}
philpem@0	1664
philpem@0	1665
philpem@0	1666	M68KMAKE_OP(and, 32, re, .)
philpem@0	1667	{
philpem@0	1668	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	1669	uint res = DX & m68ki_read_32(ea);
philpem@0	1670
philpem@0	1671	FLAG_N = NFLAG_32(res);
philpem@0	1672	FLAG_Z = res;
philpem@0	1673	FLAG_C = CFLAG_CLEAR;
philpem@0	1674	FLAG_V = VFLAG_CLEAR;
philpem@0	1675
philpem@0	1676	m68ki_write_32(ea, res);
philpem@0	1677	}
philpem@0	1678
philpem@0	1679
philpem@0	1680	M68KMAKE_OP(andi, 8, ., d)
philpem@0	1681	{
philpem@0	1682	FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
philpem@0	1683
philpem@0	1684	FLAG_N = NFLAG_8(FLAG_Z);
philpem@0	1685	FLAG_C = CFLAG_CLEAR;
philpem@0	1686	FLAG_V = VFLAG_CLEAR;
philpem@0	1687	}
philpem@0	1688
philpem@0	1689
philpem@0	1690	M68KMAKE_OP(andi, 8, ., .)
philpem@0	1691	{
philpem@0	1692	uint src = OPER_I_8();
philpem@0	1693	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	1694	uint res = src & m68ki_read_8(ea);
philpem@0	1695
philpem@0	1696	FLAG_N = NFLAG_8(res);
philpem@0	1697	FLAG_Z = res;
philpem@0	1698	FLAG_C = CFLAG_CLEAR;
philpem@0	1699	FLAG_V = VFLAG_CLEAR;
philpem@0	1700
philpem@0	1701	m68ki_write_8(ea, res);
philpem@0	1702	}
philpem@0	1703
philpem@0	1704
philpem@0	1705	M68KMAKE_OP(andi, 16, ., d)
philpem@0	1706	{
philpem@0	1707	FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
philpem@0	1708
philpem@0	1709	FLAG_N = NFLAG_16(FLAG_Z);
philpem@0	1710	FLAG_C = CFLAG_CLEAR;
philpem@0	1711	FLAG_V = VFLAG_CLEAR;
philpem@0	1712	}
philpem@0	1713
philpem@0	1714
philpem@0	1715	M68KMAKE_OP(andi, 16, ., .)
philpem@0	1716	{
philpem@0	1717	uint src = OPER_I_16();
philpem@0	1718	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1719	uint res = src & m68ki_read_16(ea);
philpem@0	1720
philpem@0	1721	FLAG_N = NFLAG_16(res);
philpem@0	1722	FLAG_Z = res;
philpem@0	1723	FLAG_C = CFLAG_CLEAR;
philpem@0	1724	FLAG_V = VFLAG_CLEAR;
philpem@0	1725
philpem@0	1726	m68ki_write_16(ea, res);
philpem@0	1727	}
philpem@0	1728
philpem@0	1729
philpem@0	1730	M68KMAKE_OP(andi, 32, ., d)
philpem@0	1731	{
philpem@0	1732	FLAG_Z = DY &= (OPER_I_32());
philpem@0	1733
philpem@0	1734	FLAG_N = NFLAG_32(FLAG_Z);
philpem@0	1735	FLAG_C = CFLAG_CLEAR;
philpem@0	1736	FLAG_V = VFLAG_CLEAR;
philpem@0	1737	}
philpem@0	1738
philpem@0	1739
philpem@0	1740	M68KMAKE_OP(andi, 32, ., .)
philpem@0	1741	{
philpem@0	1742	uint src = OPER_I_32();
philpem@0	1743	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	1744	uint res = src & m68ki_read_32(ea);
philpem@0	1745
philpem@0	1746	FLAG_N = NFLAG_32(res);
philpem@0	1747	FLAG_Z = res;
philpem@0	1748	FLAG_C = CFLAG_CLEAR;
philpem@0	1749	FLAG_V = VFLAG_CLEAR;
philpem@0	1750
philpem@0	1751	m68ki_write_32(ea, res);
philpem@0	1752	}
philpem@0	1753
philpem@0	1754
philpem@0	1755	M68KMAKE_OP(andi, 16, toc, .)
philpem@0	1756	{
philpem@0	1757	m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
philpem@0	1758	}
philpem@0	1759
philpem@0	1760
philpem@0	1761	M68KMAKE_OP(andi, 16, tos, .)
philpem@0	1762	{
philpem@0	1763	if(FLAG_S)
philpem@0	1764	{
philpem@0	1765	uint src = OPER_I_16();
philpem@0	1766	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	1767	m68ki_set_sr(m68ki_get_sr() & src);
philpem@0	1768	return;
philpem@0	1769	}
philpem@0	1770	m68ki_exception_privilege_violation();
philpem@0	1771	}
philpem@0	1772
philpem@0	1773
philpem@0	1774	M68KMAKE_OP(asr, 8, s, .)
philpem@0	1775	{
philpem@0	1776	uint* r_dst = &DY;
philpem@0	1777	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1778	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1779	uint res = src >> shift;
philpem@0	1780
philpem@0	1781	if(GET_MSB_8(src))
philpem@0	1782	res |= m68ki_shift_8_table[shift];
philpem@0	1783
philpem@0	1784	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	1785
philpem@0	1786	FLAG_N = NFLAG_8(res);
philpem@0	1787	FLAG_Z = res;
philpem@0	1788	FLAG_V = VFLAG_CLEAR;
philpem@0	1789	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	1790	}
philpem@0	1791
philpem@0	1792
philpem@0	1793	M68KMAKE_OP(asr, 16, s, .)
philpem@0	1794	{
philpem@0	1795	uint* r_dst = &DY;
philpem@0	1796	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1797	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1798	uint res = src >> shift;
philpem@0	1799
philpem@0	1800	if(GET_MSB_16(src))
philpem@0	1801	res |= m68ki_shift_16_table[shift];
philpem@0	1802
philpem@0	1803	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	1804
philpem@0	1805	FLAG_N = NFLAG_16(res);
philpem@0	1806	FLAG_Z = res;
philpem@0	1807	FLAG_V = VFLAG_CLEAR;
philpem@0	1808	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	1809	}
philpem@0	1810
philpem@0	1811
philpem@0	1812	M68KMAKE_OP(asr, 32, s, .)
philpem@0	1813	{
philpem@0	1814	uint* r_dst = &DY;
philpem@0	1815	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	1816	uint src = *r_dst;
philpem@0	1817	uint res = src >> shift;
philpem@0	1818
philpem@0	1819	if(GET_MSB_32(src))
philpem@0	1820	res |= m68ki_shift_32_table[shift];
philpem@0	1821
philpem@0	1822	*r_dst = res;
philpem@0	1823
philpem@0	1824	FLAG_N = NFLAG_32(res);
philpem@0	1825	FLAG_Z = res;
philpem@0	1826	FLAG_V = VFLAG_CLEAR;
philpem@0	1827	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	1828	}
philpem@0	1829
philpem@0	1830
philpem@0	1831	M68KMAKE_OP(asr, 8, r, .)
philpem@0	1832	{
philpem@0	1833	uint* r_dst = &DY;
philpem@0	1834	uint shift = DX & 0x3f;
philpem@0	1835	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	1836	uint res = src >> shift;
philpem@0	1837
philpem@0	1838	if(shift != 0)
philpem@0	1839	{
philpem@0	1840	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	1841
philpem@0	1842	if(shift < 8)
philpem@0	1843	{
philpem@0	1844	if(GET_MSB_8(src))
philpem@0	1845	res |= m68ki_shift_8_table[shift];
philpem@0	1846
philpem@0	1847	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	1848
philpem@0	1849	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	1850	FLAG_N = NFLAG_8(res);
philpem@0	1851	FLAG_Z = res;
philpem@0	1852	FLAG_V = VFLAG_CLEAR;
philpem@0	1853	return;
philpem@0	1854	}
philpem@0	1855
philpem@0	1856	if(GET_MSB_8(src))
philpem@0	1857	{
philpem@0	1858	*r_dst |= 0xff;
philpem@0	1859	FLAG_C = CFLAG_SET;
philpem@0	1860	FLAG_X = XFLAG_SET;
philpem@0	1861	FLAG_N = NFLAG_SET;
philpem@0	1862	FLAG_Z = ZFLAG_CLEAR;
philpem@0	1863	FLAG_V = VFLAG_CLEAR;
philpem@0	1864	return;
philpem@0	1865	}
philpem@0	1866
philpem@0	1867	*r_dst &= 0xffffff00;
philpem@0	1868	FLAG_C = CFLAG_CLEAR;
philpem@0	1869	FLAG_X = XFLAG_CLEAR;
philpem@0	1870	FLAG_N = NFLAG_CLEAR;
philpem@0	1871	FLAG_Z = ZFLAG_SET;
philpem@0	1872	FLAG_V = VFLAG_CLEAR;
philpem@0	1873	return;
philpem@0	1874	}
philpem@0	1875
philpem@0	1876	FLAG_C = CFLAG_CLEAR;
philpem@0	1877	FLAG_N = NFLAG_8(src);
philpem@0	1878	FLAG_Z = src;
philpem@0	1879	FLAG_V = VFLAG_CLEAR;
philpem@0	1880	}
philpem@0	1881
philpem@0	1882
philpem@0	1883	M68KMAKE_OP(asr, 16, r, .)
philpem@0	1884	{
philpem@0	1885	uint* r_dst = &DY;
philpem@0	1886	uint shift = DX & 0x3f;
philpem@0	1887	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	1888	uint res = src >> shift;
philpem@0	1889
philpem@0	1890	if(shift != 0)
philpem@0	1891	{
philpem@0	1892	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	1893
philpem@0	1894	if(shift < 16)
philpem@0	1895	{
philpem@0	1896	if(GET_MSB_16(src))
philpem@0	1897	res |= m68ki_shift_16_table[shift];
philpem@0	1898
philpem@0	1899	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	1900
philpem@0	1901	FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
philpem@0	1902	FLAG_N = NFLAG_16(res);
philpem@0	1903	FLAG_Z = res;
philpem@0	1904	FLAG_V = VFLAG_CLEAR;
philpem@0	1905	return;
philpem@0	1906	}
philpem@0	1907
philpem@0	1908	if(GET_MSB_16(src))
philpem@0	1909	{
philpem@0	1910	*r_dst |= 0xffff;
philpem@0	1911	FLAG_C = CFLAG_SET;
philpem@0	1912	FLAG_X = XFLAG_SET;
philpem@0	1913	FLAG_N = NFLAG_SET;
philpem@0	1914	FLAG_Z = ZFLAG_CLEAR;
philpem@0	1915	FLAG_V = VFLAG_CLEAR;
philpem@0	1916	return;
philpem@0	1917	}
philpem@0	1918
philpem@0	1919	*r_dst &= 0xffff0000;
philpem@0	1920	FLAG_C = CFLAG_CLEAR;
philpem@0	1921	FLAG_X = XFLAG_CLEAR;
philpem@0	1922	FLAG_N = NFLAG_CLEAR;
philpem@0	1923	FLAG_Z = ZFLAG_SET;
philpem@0	1924	FLAG_V = VFLAG_CLEAR;
philpem@0	1925	return;
philpem@0	1926	}
philpem@0	1927
philpem@0	1928	FLAG_C = CFLAG_CLEAR;
philpem@0	1929	FLAG_N = NFLAG_16(src);
philpem@0	1930	FLAG_Z = src;
philpem@0	1931	FLAG_V = VFLAG_CLEAR;
philpem@0	1932	}
philpem@0	1933
philpem@0	1934
philpem@0	1935	M68KMAKE_OP(asr, 32, r, .)
philpem@0	1936	{
philpem@0	1937	uint* r_dst = &DY;
philpem@0	1938	uint shift = DX & 0x3f;
philpem@0	1939	uint src = *r_dst;
philpem@0	1940	uint res = src >> shift;
philpem@0	1941
philpem@0	1942	if(shift != 0)
philpem@0	1943	{
philpem@0	1944	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	1945
philpem@0	1946	if(shift < 32)
philpem@0	1947	{
philpem@0	1948	if(GET_MSB_32(src))
philpem@0	1949	res |= m68ki_shift_32_table[shift];
philpem@0	1950
philpem@0	1951	*r_dst = res;
philpem@0	1952
philpem@0	1953	FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
philpem@0	1954	FLAG_N = NFLAG_32(res);
philpem@0	1955	FLAG_Z = res;
philpem@0	1956	FLAG_V = VFLAG_CLEAR;
philpem@0	1957	return;
philpem@0	1958	}
philpem@0	1959
philpem@0	1960	if(GET_MSB_32(src))
philpem@0	1961	{
philpem@0	1962	*r_dst = 0xffffffff;
philpem@0	1963	FLAG_C = CFLAG_SET;
philpem@0	1964	FLAG_X = XFLAG_SET;
philpem@0	1965	FLAG_N = NFLAG_SET;
philpem@0	1966	FLAG_Z = ZFLAG_CLEAR;
philpem@0	1967	FLAG_V = VFLAG_CLEAR;
philpem@0	1968	return;
philpem@0	1969	}
philpem@0	1970
philpem@0	1971	*r_dst = 0;
philpem@0	1972	FLAG_C = CFLAG_CLEAR;
philpem@0	1973	FLAG_X = XFLAG_CLEAR;
philpem@0	1974	FLAG_N = NFLAG_CLEAR;
philpem@0	1975	FLAG_Z = ZFLAG_SET;
philpem@0	1976	FLAG_V = VFLAG_CLEAR;
philpem@0	1977	return;
philpem@0	1978	}
philpem@0	1979
philpem@0	1980	FLAG_C = CFLAG_CLEAR;
philpem@0	1981	FLAG_N = NFLAG_32(src);
philpem@0	1982	FLAG_Z = src;
philpem@0	1983	FLAG_V = VFLAG_CLEAR;
philpem@0	1984	}
philpem@0	1985
philpem@0	1986
philpem@0	1987	M68KMAKE_OP(asr, 16, ., .)
philpem@0	1988	{
philpem@0	1989	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	1990	uint src = m68ki_read_16(ea);
philpem@0	1991	uint res = src >> 1;
philpem@0	1992
philpem@0	1993	if(GET_MSB_16(src))
philpem@0	1994	res |= 0x8000;
philpem@0	1995
philpem@0	1996	m68ki_write_16(ea, res);
philpem@0	1997
philpem@0	1998	FLAG_N = NFLAG_16(res);
philpem@0	1999	FLAG_Z = res;
philpem@0	2000	FLAG_V = VFLAG_CLEAR;
philpem@0	2001	FLAG_C = FLAG_X = src << 8;
philpem@0	2002	}
philpem@0	2003
philpem@0	2004
philpem@0	2005	M68KMAKE_OP(asl, 8, s, .)
philpem@0	2006	{
philpem@0	2007	uint* r_dst = &DY;
philpem@0	2008	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	2009	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	2010	uint res = MASK_OUT_ABOVE_8(src << shift);
philpem@0	2011
philpem@0	2012	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	2013
philpem@0	2014	FLAG_X = FLAG_C = src << shift;
philpem@0	2015	FLAG_N = NFLAG_8(res);
philpem@0	2016	FLAG_Z = res;
philpem@0	2017	src &= m68ki_shift_8_table[shift + 1];
philpem@0	2018	FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;
philpem@0	2019	}
philpem@0	2020
philpem@0	2021
philpem@0	2022	M68KMAKE_OP(asl, 16, s, .)
philpem@0	2023	{
philpem@0	2024	uint* r_dst = &DY;
philpem@0	2025	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	2026	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	2027	uint res = MASK_OUT_ABOVE_16(src << shift);
philpem@0	2028
philpem@0	2029	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	2030
philpem@0	2031	FLAG_N = NFLAG_16(res);
philpem@0	2032	FLAG_Z = res;
philpem@0	2033	FLAG_X = FLAG_C = src >> (8-shift);
philpem@0	2034	src &= m68ki_shift_16_table[shift + 1];
philpem@0	2035	FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
philpem@0	2036	}
philpem@0	2037
philpem@0	2038
philpem@0	2039	M68KMAKE_OP(asl, 32, s, .)
philpem@0	2040	{
philpem@0	2041	uint* r_dst = &DY;
philpem@0	2042	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	2043	uint src = *r_dst;
philpem@0	2044	uint res = MASK_OUT_ABOVE_32(src << shift);
philpem@0	2045
philpem@0	2046	*r_dst = res;
philpem@0	2047
philpem@0	2048	FLAG_N = NFLAG_32(res);
philpem@0	2049	FLAG_Z = res;
philpem@0	2050	FLAG_X = FLAG_C = src >> (24-shift);
philpem@0	2051	src &= m68ki_shift_32_table[shift + 1];
philpem@0	2052	FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
philpem@0	2053	}
philpem@0	2054
philpem@0	2055
philpem@0	2056	M68KMAKE_OP(asl, 8, r, .)
philpem@0	2057	{
philpem@0	2058	uint* r_dst = &DY;
philpem@0	2059	uint shift = DX & 0x3f;
philpem@0	2060	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	2061	uint res = MASK_OUT_ABOVE_8(src << shift);
philpem@0	2062
philpem@0	2063	if(shift != 0)
philpem@0	2064	{
philpem@0	2065	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	2066
philpem@0	2067	if(shift < 8)
philpem@0	2068	{
philpem@0	2069	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	2070	FLAG_X = FLAG_C = src << shift;
philpem@0	2071	FLAG_N = NFLAG_8(res);
philpem@0	2072	FLAG_Z = res;
philpem@0	2073	src &= m68ki_shift_8_table[shift + 1];
philpem@0	2074	FLAG_V = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;
philpem@0	2075	return;
philpem@0	2076	}
philpem@0	2077
philpem@0	2078	*r_dst &= 0xffffff00;
philpem@0	2079	FLAG_X = FLAG_C = ((shift == 8 ? src & 1 : 0))<<8;
philpem@0	2080	FLAG_N = NFLAG_CLEAR;
philpem@0	2081	FLAG_Z = ZFLAG_SET;
philpem@0	2082	FLAG_V = (!(src == 0))<<7;
philpem@0	2083	return;
philpem@0	2084	}
philpem@0	2085
philpem@0	2086	FLAG_C = CFLAG_CLEAR;
philpem@0	2087	FLAG_N = NFLAG_8(src);
philpem@0	2088	FLAG_Z = src;
philpem@0	2089	FLAG_V = VFLAG_CLEAR;
philpem@0	2090	}
philpem@0	2091
philpem@0	2092
philpem@0	2093	M68KMAKE_OP(asl, 16, r, .)
philpem@0	2094	{
philpem@0	2095	uint* r_dst = &DY;
philpem@0	2096	uint shift = DX & 0x3f;
philpem@0	2097	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	2098	uint res = MASK_OUT_ABOVE_16(src << shift);
philpem@0	2099
philpem@0	2100	if(shift != 0)
philpem@0	2101	{
philpem@0	2102	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	2103
philpem@0	2104	if(shift < 16)
philpem@0	2105	{
philpem@0	2106	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	2107	FLAG_X = FLAG_C = (src << shift) >> 8;
philpem@0	2108	FLAG_N = NFLAG_16(res);
philpem@0	2109	FLAG_Z = res;
philpem@0	2110	src &= m68ki_shift_16_table[shift + 1];
philpem@0	2111	FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
philpem@0	2112	return;
philpem@0	2113	}
philpem@0	2114
philpem@0	2115	*r_dst &= 0xffff0000;
philpem@0	2116	FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;
philpem@0	2117	FLAG_N = NFLAG_CLEAR;
philpem@0	2118	FLAG_Z = ZFLAG_SET;
philpem@0	2119	FLAG_V = (!(src == 0))<<7;
philpem@0	2120	return;
philpem@0	2121	}
philpem@0	2122
philpem@0	2123	FLAG_C = CFLAG_CLEAR;
philpem@0	2124	FLAG_N = NFLAG_16(src);
philpem@0	2125	FLAG_Z = src;
philpem@0	2126	FLAG_V = VFLAG_CLEAR;
philpem@0	2127	}
philpem@0	2128
philpem@0	2129
philpem@0	2130	M68KMAKE_OP(asl, 32, r, .)
philpem@0	2131	{
philpem@0	2132	uint* r_dst = &DY;
philpem@0	2133	uint shift = DX & 0x3f;
philpem@0	2134	uint src = *r_dst;
philpem@0	2135	uint res = MASK_OUT_ABOVE_32(src << shift);
philpem@0	2136
philpem@0	2137	if(shift != 0)
philpem@0	2138	{
philpem@0	2139	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	2140
philpem@0	2141	if(shift < 32)
philpem@0	2142	{
philpem@0	2143	*r_dst = res;
philpem@0	2144	FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
philpem@0	2145	FLAG_N = NFLAG_32(res);
philpem@0	2146	FLAG_Z = res;
philpem@0	2147	src &= m68ki_shift_32_table[shift + 1];
philpem@0	2148	FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
philpem@0	2149	return;
philpem@0	2150	}
philpem@0	2151
philpem@0	2152	*r_dst = 0;
philpem@0	2153	FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
philpem@0	2154	FLAG_N = NFLAG_CLEAR;
philpem@0	2155	FLAG_Z = ZFLAG_SET;
philpem@0	2156	FLAG_V = (!(src == 0))<<7;
philpem@0	2157	return;
philpem@0	2158	}
philpem@0	2159
philpem@0	2160	FLAG_C = CFLAG_CLEAR;
philpem@0	2161	FLAG_N = NFLAG_32(src);
philpem@0	2162	FLAG_Z = src;
philpem@0	2163	FLAG_V = VFLAG_CLEAR;
philpem@0	2164	}
philpem@0	2165
philpem@0	2166
philpem@0	2167	M68KMAKE_OP(asl, 16, ., .)
philpem@0	2168	{
philpem@0	2169	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	2170	uint src = m68ki_read_16(ea);
philpem@0	2171	uint res = MASK_OUT_ABOVE_16(src << 1);
philpem@0	2172
philpem@0	2173	m68ki_write_16(ea, res);
philpem@0	2174
philpem@0	2175	FLAG_N = NFLAG_16(res);
philpem@0	2176	FLAG_Z = res;
philpem@0	2177	FLAG_X = FLAG_C = src >> 7;
philpem@0	2178	src &= 0xc000;
philpem@0	2179	FLAG_V = (!(src == 0 || src == 0xc000))<<7;
philpem@0	2180	}
philpem@0	2181
philpem@0	2182
philpem@0	2183	M68KMAKE_OP(bcc, 8, ., .)
philpem@0	2184	{
philpem@0	2185	if(M68KMAKE_CC)
philpem@0	2186	{
philpem@0	2187	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	2188	m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
philpem@0	2189	return;
philpem@0	2190	}
philpem@0	2191	USE_CYCLES(CYC_BCC_NOTAKE_B);
philpem@0	2192	}
philpem@0	2193
philpem@0	2194
philpem@0	2195	M68KMAKE_OP(bcc, 16, ., .)
philpem@0	2196	{
philpem@0	2197	if(M68KMAKE_CC)
philpem@0	2198	{
philpem@0	2199	uint offset = OPER_I_16();
philpem@0	2200	REG_PC -= 2;
philpem@0	2201	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	2202	m68ki_branch_16(offset);
philpem@0	2203	return;
philpem@0	2204	}
philpem@0	2205	REG_PC += 2;
philpem@0	2206	USE_CYCLES(CYC_BCC_NOTAKE_W);
philpem@0	2207	}
philpem@0	2208
philpem@0	2209
philpem@0	2210	M68KMAKE_OP(bcc, 32, ., .)
philpem@0	2211	{
philpem@0	2212	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2213	{
philpem@0	2214	if(M68KMAKE_CC)
philpem@0	2215	{
philpem@0	2216	uint offset = OPER_I_32();
philpem@0	2217	REG_PC -= 4;
philpem@0	2218	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	2219	m68ki_branch_32(offset);
philpem@0	2220	return;
philpem@0	2221	}
philpem@0	2222	REG_PC += 4;
philpem@0	2223	return;
philpem@0	2224	}
philpem@0	2225	m68ki_exception_illegal();
philpem@0	2226	}
philpem@0	2227
philpem@0	2228
philpem@0	2229	M68KMAKE_OP(bchg, 32, r, d)
philpem@0	2230	{
philpem@0	2231	uint* r_dst = &DY;
philpem@0	2232	uint mask = 1 << (DX & 0x1f);
philpem@0	2233
philpem@0	2234	FLAG_Z = *r_dst & mask;
philpem@0	2235	*r_dst ^= mask;
philpem@0	2236	}
philpem@0	2237
philpem@0	2238
philpem@0	2239	M68KMAKE_OP(bchg, 8, r, .)
philpem@0	2240	{
philpem@0	2241	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2242	uint src = m68ki_read_8(ea);
philpem@0	2243	uint mask = 1 << (DX & 7);
philpem@0	2244
philpem@0	2245	FLAG_Z = src & mask;
philpem@0	2246	m68ki_write_8(ea, src ^ mask);
philpem@0	2247	}
philpem@0	2248
philpem@0	2249
philpem@0	2250	M68KMAKE_OP(bchg, 32, s, d)
philpem@0	2251	{
philpem@0	2252	uint* r_dst = &DY;
philpem@0	2253	uint mask = 1 << (OPER_I_8() & 0x1f);
philpem@0	2254
philpem@0	2255	FLAG_Z = *r_dst & mask;
philpem@0	2256	*r_dst ^= mask;
philpem@0	2257	}
philpem@0	2258
philpem@0	2259
philpem@0	2260	M68KMAKE_OP(bchg, 8, s, .)
philpem@0	2261	{
philpem@0	2262	uint mask = 1 << (OPER_I_8() & 7);
philpem@0	2263	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2264	uint src = m68ki_read_8(ea);
philpem@0	2265
philpem@0	2266	FLAG_Z = src & mask;
philpem@0	2267	m68ki_write_8(ea, src ^ mask);
philpem@0	2268	}
philpem@0	2269
philpem@0	2270
philpem@0	2271	M68KMAKE_OP(bclr, 32, r, d)
philpem@0	2272	{
philpem@0	2273	uint* r_dst = &DY;
philpem@0	2274	uint mask = 1 << (DX & 0x1f);
philpem@0	2275
philpem@0	2276	FLAG_Z = *r_dst & mask;
philpem@0	2277	*r_dst &= ~mask;
philpem@0	2278	}
philpem@0	2279
philpem@0	2280
philpem@0	2281	M68KMAKE_OP(bclr, 8, r, .)
philpem@0	2282	{
philpem@0	2283	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2284	uint src = m68ki_read_8(ea);
philpem@0	2285	uint mask = 1 << (DX & 7);
philpem@0	2286
philpem@0	2287	FLAG_Z = src & mask;
philpem@0	2288	m68ki_write_8(ea, src & ~mask);
philpem@0	2289	}
philpem@0	2290
philpem@0	2291
philpem@0	2292	M68KMAKE_OP(bclr, 32, s, d)
philpem@0	2293	{
philpem@0	2294	uint* r_dst = &DY;
philpem@0	2295	uint mask = 1 << (OPER_I_8() & 0x1f);
philpem@0	2296
philpem@0	2297	FLAG_Z = *r_dst & mask;
philpem@0	2298	*r_dst &= ~mask;
philpem@0	2299	}
philpem@0	2300
philpem@0	2301
philpem@0	2302	M68KMAKE_OP(bclr, 8, s, .)
philpem@0	2303	{
philpem@0	2304	uint mask = 1 << (OPER_I_8() & 7);
philpem@0	2305	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2306	uint src = m68ki_read_8(ea);
philpem@0	2307
philpem@0	2308	FLAG_Z = src & mask;
philpem@0	2309	m68ki_write_8(ea, src & ~mask);
philpem@0	2310	}
philpem@0	2311
philpem@0	2312
philpem@0	2313	M68KMAKE_OP(bfchg, 32, ., d)
philpem@0	2314	{
philpem@0	2315	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2316	{
philpem@0	2317	uint word2 = OPER_I_16();
philpem@0	2318	uint offset = (word2>>6)&31;
philpem@0	2319	uint width = word2;
philpem@0	2320	uint* data = &DY;
philpem@0	2321	uint64 mask;
philpem@0	2322
philpem@0	2323
philpem@0	2324	if(BIT_B(word2))
philpem@0	2325	offset = REG_D[offset&7];
philpem@0	2326	if(BIT_5(word2))
philpem@0	2327	width = REG_D[width&7];
philpem@0	2328
philpem@0	2329	offset &= 31;
philpem@0	2330	width = ((width-1) & 31) + 1;
philpem@0	2331
philpem@0	2332	mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2333	mask = ROR_32(mask, offset);
philpem@0	2334
philpem@0	2335	FLAG_N = NFLAG_32(*data<<offset);
philpem@0	2336	FLAG_Z = *data & mask;
philpem@0	2337	FLAG_V = VFLAG_CLEAR;
philpem@0	2338	FLAG_C = CFLAG_CLEAR;
philpem@0	2339
philpem@0	2340	*data ^= mask;
philpem@0	2341
philpem@0	2342	return;
philpem@0	2343	}
philpem@0	2344	m68ki_exception_illegal();
philpem@0	2345	}
philpem@0	2346
philpem@0	2347
philpem@0	2348	M68KMAKE_OP(bfchg, 32, ., .)
philpem@0	2349	{
philpem@0	2350	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2351	{
philpem@0	2352	uint word2 = OPER_I_16();
philpem@0	2353	sint offset = (word2>>6)&31;
philpem@0	2354	uint width = word2;
philpem@0	2355	uint mask_base;
philpem@0	2356	uint data_long;
philpem@0	2357	uint mask_long;
philpem@0	2358	uint data_byte = 0;
philpem@0	2359	uint mask_byte = 0;
philpem@0	2360	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2361
philpem@0	2362
philpem@0	2363	if(BIT_B(word2))
philpem@0	2364	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2365	if(BIT_5(word2))
philpem@0	2366	width = REG_D[width&7];
philpem@0	2367
philpem@0	2368	/* Offset is signed so we have to use ugly math =( */
philpem@0	2369	ea += offset / 8;
philpem@0	2370	offset %= 8;
philpem@0	2371	if(offset < 0)
philpem@0	2372	{
philpem@0	2373	offset += 8;
philpem@0	2374	ea--;
philpem@0	2375	}
philpem@0	2376	width = ((width-1) & 31) + 1;
philpem@0	2377
philpem@0	2378	mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2379	mask_long = mask_base >> offset;
philpem@0	2380
philpem@0	2381	data_long = m68ki_read_32(ea);
philpem@0	2382	FLAG_N = NFLAG_32(data_long << offset);
philpem@0	2383	FLAG_Z = data_long & mask_long;
philpem@0	2384	FLAG_V = VFLAG_CLEAR;
philpem@0	2385	FLAG_C = CFLAG_CLEAR;
philpem@0	2386
philpem@0	2387	m68ki_write_32(ea, data_long ^ mask_long);
philpem@0	2388
philpem@0	2389	if((width + offset) > 32)
philpem@0	2390	{
philpem@0	2391	mask_byte = MASK_OUT_ABOVE_8(mask_base);
philpem@0	2392	data_byte = m68ki_read_8(ea+4);
philpem@0	2393	FLAG_Z |= (data_byte & mask_byte);
philpem@0	2394	m68ki_write_8(ea+4, data_byte ^ mask_byte);
philpem@0	2395	}
philpem@0	2396	return;
philpem@0	2397	}
philpem@0	2398	m68ki_exception_illegal();
philpem@0	2399	}
philpem@0	2400
philpem@0	2401
philpem@0	2402	M68KMAKE_OP(bfclr, 32, ., d)
philpem@0	2403	{
philpem@0	2404	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2405	{
philpem@0	2406	uint word2 = OPER_I_16();
philpem@0	2407	uint offset = (word2>>6)&31;
philpem@0	2408	uint width = word2;
philpem@0	2409	uint* data = &DY;
philpem@0	2410	uint64 mask;
philpem@0	2411
philpem@0	2412
philpem@0	2413	if(BIT_B(word2))
philpem@0	2414	offset = REG_D[offset&7];
philpem@0	2415	if(BIT_5(word2))
philpem@0	2416	width = REG_D[width&7];
philpem@0	2417
philpem@0	2418
philpem@0	2419	offset &= 31;
philpem@0	2420	width = ((width-1) & 31) + 1;
philpem@0	2421
philpem@0	2422
philpem@0	2423	mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2424	mask = ROR_32(mask, offset);
philpem@0	2425
philpem@0	2426	FLAG_N = NFLAG_32(*data<<offset);
philpem@0	2427	FLAG_Z = *data & mask;
philpem@0	2428	FLAG_V = VFLAG_CLEAR;
philpem@0	2429	FLAG_C = CFLAG_CLEAR;
philpem@0	2430
philpem@0	2431	*data &= ~mask;
philpem@0	2432
philpem@0	2433	return;
philpem@0	2434	}
philpem@0	2435	m68ki_exception_illegal();
philpem@0	2436	}
philpem@0	2437
philpem@0	2438
philpem@0	2439	M68KMAKE_OP(bfclr, 32, ., .)
philpem@0	2440	{
philpem@0	2441	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2442	{
philpem@0	2443	uint word2 = OPER_I_16();
philpem@0	2444	sint offset = (word2>>6)&31;
philpem@0	2445	uint width = word2;
philpem@0	2446	uint mask_base;
philpem@0	2447	uint data_long;
philpem@0	2448	uint mask_long;
philpem@0	2449	uint data_byte = 0;
philpem@0	2450	uint mask_byte = 0;
philpem@0	2451	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2452
philpem@0	2453
philpem@0	2454	if(BIT_B(word2))
philpem@0	2455	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2456	if(BIT_5(word2))
philpem@0	2457	width = REG_D[width&7];
philpem@0	2458
philpem@0	2459	/* Offset is signed so we have to use ugly math =( */
philpem@0	2460	ea += offset / 8;
philpem@0	2461	offset %= 8;
philpem@0	2462	if(offset < 0)
philpem@0	2463	{
philpem@0	2464	offset += 8;
philpem@0	2465	ea--;
philpem@0	2466	}
philpem@0	2467	width = ((width-1) & 31) + 1;
philpem@0	2468
philpem@0	2469	mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2470	mask_long = mask_base >> offset;
philpem@0	2471
philpem@0	2472	data_long = m68ki_read_32(ea);
philpem@0	2473	FLAG_N = NFLAG_32(data_long << offset);
philpem@0	2474	FLAG_Z = data_long & mask_long;
philpem@0	2475	FLAG_V = VFLAG_CLEAR;
philpem@0	2476	FLAG_C = CFLAG_CLEAR;
philpem@0	2477
philpem@0	2478	m68ki_write_32(ea, data_long & ~mask_long);
philpem@0	2479
philpem@0	2480	if((width + offset) > 32)
philpem@0	2481	{
philpem@0	2482	mask_byte = MASK_OUT_ABOVE_8(mask_base);
philpem@0	2483	data_byte = m68ki_read_8(ea+4);
philpem@0	2484	FLAG_Z |= (data_byte & mask_byte);
philpem@0	2485	m68ki_write_8(ea+4, data_byte & ~mask_byte);
philpem@0	2486	}
philpem@0	2487	return;
philpem@0	2488	}
philpem@0	2489	m68ki_exception_illegal();
philpem@0	2490	}
philpem@0	2491
philpem@0	2492
philpem@0	2493	M68KMAKE_OP(bfexts, 32, ., d)
philpem@0	2494	{
philpem@0	2495	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2496	{
philpem@0	2497	uint word2 = OPER_I_16();
philpem@0	2498	uint offset = (word2>>6)&31;
philpem@0	2499	uint width = word2;
philpem@0	2500	uint64 data = DY;
philpem@0	2501
philpem@0	2502
philpem@0	2503	if(BIT_B(word2))
philpem@0	2504	offset = REG_D[offset&7];
philpem@0	2505	if(BIT_5(word2))
philpem@0	2506	width = REG_D[width&7];
philpem@0	2507
philpem@0	2508	offset &= 31;
philpem@0	2509	width = ((width-1) & 31) + 1;
philpem@0	2510
philpem@0	2511	data = ROL_32(data, offset);
philpem@0	2512	FLAG_N = NFLAG_32(data);
philpem@0	2513	data = MAKE_INT_32(data) >> (32 - width);
philpem@0	2514
philpem@0	2515	FLAG_Z = data;
philpem@0	2516	FLAG_V = VFLAG_CLEAR;
philpem@0	2517	FLAG_C = CFLAG_CLEAR;
philpem@0	2518
philpem@0	2519	REG_D[(word2>>12)&7] = data;
philpem@0	2520
philpem@0	2521	return;
philpem@0	2522	}
philpem@0	2523	m68ki_exception_illegal();
philpem@0	2524	}
philpem@0	2525
philpem@0	2526
philpem@0	2527	M68KMAKE_OP(bfexts, 32, ., .)
philpem@0	2528	{
philpem@0	2529	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2530	{
philpem@0	2531	uint word2 = OPER_I_16();
philpem@0	2532	sint offset = (word2>>6)&31;
philpem@0	2533	uint width = word2;
philpem@0	2534	uint data;
philpem@0	2535	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2536
philpem@0	2537
philpem@0	2538	if(BIT_B(word2))
philpem@0	2539	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2540	if(BIT_5(word2))
philpem@0	2541	width = REG_D[width&7];
philpem@0	2542
philpem@0	2543	/* Offset is signed so we have to use ugly math =( */
philpem@0	2544	ea += offset / 8;
philpem@0	2545	offset %= 8;
philpem@0	2546	if(offset < 0)
philpem@0	2547	{
philpem@0	2548	offset += 8;
philpem@0	2549	ea--;
philpem@0	2550	}
philpem@0	2551	width = ((width-1) & 31) + 1;
philpem@0	2552
philpem@0	2553	data = m68ki_read_32(ea);
philpem@0	2554
philpem@0	2555	data = MASK_OUT_ABOVE_32(data<<offset);
philpem@0	2556
philpem@0	2557	if((offset+width) > 32)
philpem@0	2558	data |= (m68ki_read_8(ea+4) << offset) >> 8;
philpem@0	2559
philpem@0	2560	FLAG_N = NFLAG_32(data);
philpem@0	2561	data = MAKE_INT_32(data) >> (32 - width);
philpem@0	2562
philpem@0	2563	FLAG_Z = data;
philpem@0	2564	FLAG_V = VFLAG_CLEAR;
philpem@0	2565	FLAG_C = CFLAG_CLEAR;
philpem@0	2566
philpem@0	2567	REG_D[(word2 >> 12) & 7] = data;
philpem@0	2568
philpem@0	2569	return;
philpem@0	2570	}
philpem@0	2571	m68ki_exception_illegal();
philpem@0	2572	}
philpem@0	2573
philpem@0	2574
philpem@0	2575	M68KMAKE_OP(bfextu, 32, ., d)
philpem@0	2576	{
philpem@0	2577	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2578	{
philpem@0	2579	uint word2 = OPER_I_16();
philpem@0	2580	uint offset = (word2>>6)&31;
philpem@0	2581	uint width = word2;
philpem@0	2582	uint64 data = DY;
philpem@0	2583
philpem@0	2584
philpem@0	2585	if(BIT_B(word2))
philpem@0	2586	offset = REG_D[offset&7];
philpem@0	2587	if(BIT_5(word2))
philpem@0	2588	width = REG_D[width&7];
philpem@0	2589
philpem@0	2590	offset &= 31;
philpem@0	2591	width = ((width-1) & 31) + 1;
philpem@0	2592
philpem@0	2593	data = ROL_32(data, offset);
philpem@0	2594	FLAG_N = NFLAG_32(data);
philpem@0	2595	data >>= 32 - width;
philpem@0	2596
philpem@0	2597	FLAG_Z = data;
philpem@0	2598	FLAG_V = VFLAG_CLEAR;
philpem@0	2599	FLAG_C = CFLAG_CLEAR;
philpem@0	2600
philpem@0	2601	REG_D[(word2>>12)&7] = data;
philpem@0	2602
philpem@0	2603	return;
philpem@0	2604	}
philpem@0	2605	m68ki_exception_illegal();
philpem@0	2606	}
philpem@0	2607
philpem@0	2608
philpem@0	2609	M68KMAKE_OP(bfextu, 32, ., .)
philpem@0	2610	{
philpem@0	2611	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2612	{
philpem@0	2613	uint word2 = OPER_I_16();
philpem@0	2614	sint offset = (word2>>6)&31;
philpem@0	2615	uint width = word2;
philpem@0	2616	uint data;
philpem@0	2617	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2618
philpem@0	2619
philpem@0	2620	if(BIT_B(word2))
philpem@0	2621	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2622	if(BIT_5(word2))
philpem@0	2623	width = REG_D[width&7];
philpem@0	2624
philpem@0	2625	/* Offset is signed so we have to use ugly math =( */
philpem@0	2626	ea += offset / 8;
philpem@0	2627	offset %= 8;
philpem@0	2628	if(offset < 0)
philpem@0	2629	{
philpem@0	2630	offset += 8;
philpem@0	2631	ea--;
philpem@0	2632	}
philpem@0	2633	width = ((width-1) & 31) + 1;
philpem@0	2634
philpem@0	2635	data = m68ki_read_32(ea);
philpem@0	2636	data = MASK_OUT_ABOVE_32(data<<offset);
philpem@0	2637
philpem@0	2638	if((offset+width) > 32)
philpem@0	2639	data |= (m68ki_read_8(ea+4) << offset) >> 8;
philpem@0	2640
philpem@0	2641	FLAG_N = NFLAG_32(data);
philpem@0	2642	data >>= (32 - width);
philpem@0	2643
philpem@0	2644	FLAG_Z = data;
philpem@0	2645	FLAG_V = VFLAG_CLEAR;
philpem@0	2646	FLAG_C = CFLAG_CLEAR;
philpem@0	2647
philpem@0	2648	REG_D[(word2 >> 12) & 7] = data;
philpem@0	2649
philpem@0	2650	return;
philpem@0	2651	}
philpem@0	2652	m68ki_exception_illegal();
philpem@0	2653	}
philpem@0	2654
philpem@0	2655
philpem@0	2656	M68KMAKE_OP(bfffo, 32, ., d)
philpem@0	2657	{
philpem@0	2658	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2659	{
philpem@0	2660	uint word2 = OPER_I_16();
philpem@0	2661	uint offset = (word2>>6)&31;
philpem@0	2662	uint width = word2;
philpem@0	2663	uint64 data = DY;
philpem@0	2664	uint bit;
philpem@0	2665
philpem@0	2666
philpem@0	2667	if(BIT_B(word2))
philpem@0	2668	offset = REG_D[offset&7];
philpem@0	2669	if(BIT_5(word2))
philpem@0	2670	width = REG_D[width&7];
philpem@0	2671
philpem@0	2672	offset &= 31;
philpem@0	2673	width = ((width-1) & 31) + 1;
philpem@0	2674
philpem@0	2675	data = ROL_32(data, offset);
philpem@0	2676	FLAG_N = NFLAG_32(data);
philpem@0	2677	data >>= 32 - width;
philpem@0	2678
philpem@0	2679	FLAG_Z = data;
philpem@0	2680	FLAG_V = VFLAG_CLEAR;
philpem@0	2681	FLAG_C = CFLAG_CLEAR;
philpem@0	2682
philpem@0	2683	for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
philpem@0	2684	offset++;
philpem@0	2685
philpem@0	2686	REG_D[(word2>>12)&7] = offset;
philpem@0	2687
philpem@0	2688	return;
philpem@0	2689	}
philpem@0	2690	m68ki_exception_illegal();
philpem@0	2691	}
philpem@0	2692
philpem@0	2693
philpem@0	2694	M68KMAKE_OP(bfffo, 32, ., .)
philpem@0	2695	{
philpem@0	2696	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2697	{
philpem@0	2698	uint word2 = OPER_I_16();
philpem@0	2699	sint offset = (word2>>6)&31;
philpem@0	2700	sint local_offset;
philpem@0	2701	uint width = word2;
philpem@0	2702	uint data;
philpem@0	2703	uint bit;
philpem@0	2704	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2705
philpem@0	2706
philpem@0	2707	if(BIT_B(word2))
philpem@0	2708	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2709	if(BIT_5(word2))
philpem@0	2710	width = REG_D[width&7];
philpem@0	2711
philpem@0	2712	/* Offset is signed so we have to use ugly math =( */
philpem@0	2713	ea += offset / 8;
philpem@0	2714	local_offset = offset % 8;
philpem@0	2715	if(local_offset < 0)
philpem@0	2716	{
philpem@0	2717	local_offset += 8;
philpem@0	2718	ea--;
philpem@0	2719	}
philpem@0	2720	width = ((width-1) & 31) + 1;
philpem@0	2721
philpem@0	2722	data = m68ki_read_32(ea);
philpem@0	2723	data = MASK_OUT_ABOVE_32(data<<local_offset);
philpem@0	2724
philpem@0	2725	if((local_offset+width) > 32)
philpem@0	2726	data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
philpem@0	2727
philpem@0	2728	FLAG_N = NFLAG_32(data);
philpem@0	2729	data >>= (32 - width);
philpem@0	2730
philpem@0	2731	FLAG_Z = data;
philpem@0	2732	FLAG_V = VFLAG_CLEAR;
philpem@0	2733	FLAG_C = CFLAG_CLEAR;
philpem@0	2734
philpem@0	2735	for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
philpem@0	2736	offset++;
philpem@0	2737
philpem@0	2738	REG_D[(word2>>12)&7] = offset;
philpem@0	2739
philpem@0	2740	return;
philpem@0	2741	}
philpem@0	2742	m68ki_exception_illegal();
philpem@0	2743	}
philpem@0	2744
philpem@0	2745
philpem@0	2746	M68KMAKE_OP(bfins, 32, ., d)
philpem@0	2747	{
philpem@0	2748	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2749	{
philpem@0	2750	uint word2 = OPER_I_16();
philpem@0	2751	uint offset = (word2>>6)&31;
philpem@0	2752	uint width = word2;
philpem@0	2753	uint* data = &DY;
philpem@0	2754	uint64 mask;
philpem@0	2755	uint64 insert = REG_D[(word2>>12)&7];
philpem@0	2756
philpem@0	2757
philpem@0	2758	if(BIT_B(word2))
philpem@0	2759	offset = REG_D[offset&7];
philpem@0	2760	if(BIT_5(word2))
philpem@0	2761	width = REG_D[width&7];
philpem@0	2762
philpem@0	2763
philpem@0	2764	offset &= 31;
philpem@0	2765	width = ((width-1) & 31) + 1;
philpem@0	2766
philpem@0	2767
philpem@0	2768	mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2769	mask = ROR_32(mask, offset);
philpem@0	2770
philpem@0	2771	insert = MASK_OUT_ABOVE_32(insert << (32 - width));
philpem@0	2772	FLAG_N = NFLAG_32(insert);
philpem@0	2773	FLAG_Z = insert;
philpem@0	2774	insert = ROR_32(insert, offset);
philpem@0	2775
philpem@0	2776	FLAG_V = VFLAG_CLEAR;
philpem@0	2777	FLAG_C = CFLAG_CLEAR;
philpem@0	2778
philpem@0	2779	*data &= ~mask;
philpem@0	2780	*data |= insert;
philpem@0	2781
philpem@0	2782	return;
philpem@0	2783	}
philpem@0	2784	m68ki_exception_illegal();
philpem@0	2785	}
philpem@0	2786
philpem@0	2787
philpem@0	2788	M68KMAKE_OP(bfins, 32, ., .)
philpem@0	2789	{
philpem@0	2790	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2791	{
philpem@0	2792	uint word2 = OPER_I_16();
philpem@0	2793	sint offset = (word2>>6)&31;
philpem@0	2794	uint width = word2;
philpem@0	2795	uint insert_base = REG_D[(word2>>12)&7];
philpem@0	2796	uint insert_long;
philpem@0	2797	uint insert_byte;
philpem@0	2798	uint mask_base;
philpem@0	2799	uint data_long;
philpem@0	2800	uint mask_long;
philpem@0	2801	uint data_byte = 0;
philpem@0	2802	uint mask_byte = 0;
philpem@0	2803	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2804
philpem@0	2805
philpem@0	2806	if(BIT_B(word2))
philpem@0	2807	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2808	if(BIT_5(word2))
philpem@0	2809	width = REG_D[width&7];
philpem@0	2810
philpem@0	2811	/* Offset is signed so we have to use ugly math =( */
philpem@0	2812	ea += offset / 8;
philpem@0	2813	offset %= 8;
philpem@0	2814	if(offset < 0)
philpem@0	2815	{
philpem@0	2816	offset += 8;
philpem@0	2817	ea--;
philpem@0	2818	}
philpem@0	2819	width = ((width-1) & 31) + 1;
philpem@0	2820
philpem@0	2821	mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2822	mask_long = mask_base >> offset;
philpem@0	2823
philpem@0	2824	insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
philpem@0	2825	FLAG_N = NFLAG_32(insert_base);
philpem@0	2826	FLAG_Z = insert_base;
philpem@0	2827	insert_long = insert_base >> offset;
philpem@0	2828
philpem@0	2829	data_long = m68ki_read_32(ea);
philpem@0	2830	FLAG_V = VFLAG_CLEAR;
philpem@0	2831	FLAG_C = CFLAG_CLEAR;
philpem@0	2832
philpem@0	2833	m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
philpem@0	2834
philpem@0	2835	if((width + offset) > 32)
philpem@0	2836	{
philpem@0	2837	mask_byte = MASK_OUT_ABOVE_8(mask_base);
philpem@0	2838	insert_byte = MASK_OUT_ABOVE_8(insert_base);
philpem@0	2839	data_byte = m68ki_read_8(ea+4);
philpem@0	2840	FLAG_Z |= (data_byte & mask_byte);
philpem@0	2841	m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
philpem@0	2842	}
philpem@0	2843	return;
philpem@0	2844	}
philpem@0	2845	m68ki_exception_illegal();
philpem@0	2846	}
philpem@0	2847
philpem@0	2848
philpem@0	2849	M68KMAKE_OP(bfset, 32, ., d)
philpem@0	2850	{
philpem@0	2851	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2852	{
philpem@0	2853	uint word2 = OPER_I_16();
philpem@0	2854	uint offset = (word2>>6)&31;
philpem@0	2855	uint width = word2;
philpem@0	2856	uint* data = &DY;
philpem@0	2857	uint64 mask;
philpem@0	2858
philpem@0	2859
philpem@0	2860	if(BIT_B(word2))
philpem@0	2861	offset = REG_D[offset&7];
philpem@0	2862	if(BIT_5(word2))
philpem@0	2863	width = REG_D[width&7];
philpem@0	2864
philpem@0	2865
philpem@0	2866	offset &= 31;
philpem@0	2867	width = ((width-1) & 31) + 1;
philpem@0	2868
philpem@0	2869
philpem@0	2870	mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2871	mask = ROR_32(mask, offset);
philpem@0	2872
philpem@0	2873	FLAG_N = NFLAG_32(*data<<offset);
philpem@0	2874	FLAG_Z = *data & mask;
philpem@0	2875	FLAG_V = VFLAG_CLEAR;
philpem@0	2876	FLAG_C = CFLAG_CLEAR;
philpem@0	2877
philpem@0	2878	*data |= mask;
philpem@0	2879
philpem@0	2880	return;
philpem@0	2881	}
philpem@0	2882	m68ki_exception_illegal();
philpem@0	2883	}
philpem@0	2884
philpem@0	2885
philpem@0	2886	M68KMAKE_OP(bfset, 32, ., .)
philpem@0	2887	{
philpem@0	2888	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2889	{
philpem@0	2890	uint word2 = OPER_I_16();
philpem@0	2891	sint offset = (word2>>6)&31;
philpem@0	2892	uint width = word2;
philpem@0	2893	uint mask_base;
philpem@0	2894	uint data_long;
philpem@0	2895	uint mask_long;
philpem@0	2896	uint data_byte = 0;
philpem@0	2897	uint mask_byte = 0;
philpem@0	2898	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2899
philpem@0	2900
philpem@0	2901	if(BIT_B(word2))
philpem@0	2902	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2903	if(BIT_5(word2))
philpem@0	2904	width = REG_D[width&7];
philpem@0	2905
philpem@0	2906	/* Offset is signed so we have to use ugly math =( */
philpem@0	2907	ea += offset / 8;
philpem@0	2908	offset %= 8;
philpem@0	2909	if(offset < 0)
philpem@0	2910	{
philpem@0	2911	offset += 8;
philpem@0	2912	ea--;
philpem@0	2913	}
philpem@0	2914	width = ((width-1) & 31) + 1;
philpem@0	2915
philpem@0	2916
philpem@0	2917	mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2918	mask_long = mask_base >> offset;
philpem@0	2919
philpem@0	2920	data_long = m68ki_read_32(ea);
philpem@0	2921	FLAG_N = NFLAG_32(data_long << offset);
philpem@0	2922	FLAG_Z = data_long & mask_long;
philpem@0	2923	FLAG_V = VFLAG_CLEAR;
philpem@0	2924	FLAG_C = CFLAG_CLEAR;
philpem@0	2925
philpem@0	2926	m68ki_write_32(ea, data_long | mask_long);
philpem@0	2927
philpem@0	2928	if((width + offset) > 32)
philpem@0	2929	{
philpem@0	2930	mask_byte = MASK_OUT_ABOVE_8(mask_base);
philpem@0	2931	data_byte = m68ki_read_8(ea+4);
philpem@0	2932	FLAG_Z |= (data_byte & mask_byte);
philpem@0	2933	m68ki_write_8(ea+4, data_byte | mask_byte);
philpem@0	2934	}
philpem@0	2935	return;
philpem@0	2936	}
philpem@0	2937	m68ki_exception_illegal();
philpem@0	2938	}
philpem@0	2939
philpem@0	2940
philpem@0	2941	M68KMAKE_OP(bftst, 32, ., d)
philpem@0	2942	{
philpem@0	2943	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2944	{
philpem@0	2945	uint word2 = OPER_I_16();
philpem@0	2946	uint offset = (word2>>6)&31;
philpem@0	2947	uint width = word2;
philpem@0	2948	uint* data = &DY;
philpem@0	2949	uint64 mask;
philpem@0	2950
philpem@0	2951
philpem@0	2952	if(BIT_B(word2))
philpem@0	2953	offset = REG_D[offset&7];
philpem@0	2954	if(BIT_5(word2))
philpem@0	2955	width = REG_D[width&7];
philpem@0	2956
philpem@0	2957
philpem@0	2958	offset &= 31;
philpem@0	2959	width = ((width-1) & 31) + 1;
philpem@0	2960
philpem@0	2961
philpem@0	2962	mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	2963	mask = ROR_32(mask, offset);
philpem@0	2964
philpem@0	2965	FLAG_N = NFLAG_32(*data<<offset);
philpem@0	2966	FLAG_Z = *data & mask;
philpem@0	2967	FLAG_V = VFLAG_CLEAR;
philpem@0	2968	FLAG_C = CFLAG_CLEAR;
philpem@0	2969
philpem@0	2970	return;
philpem@0	2971	}
philpem@0	2972	m68ki_exception_illegal();
philpem@0	2973	}
philpem@0	2974
philpem@0	2975
philpem@0	2976	M68KMAKE_OP(bftst, 32, ., .)
philpem@0	2977	{
philpem@0	2978	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	2979	{
philpem@0	2980	uint word2 = OPER_I_16();
philpem@0	2981	sint offset = (word2>>6)&31;
philpem@0	2982	uint width = word2;
philpem@0	2983	uint mask_base;
philpem@0	2984	uint data_long;
philpem@0	2985	uint mask_long;
philpem@0	2986	uint data_byte = 0;
philpem@0	2987	uint mask_byte = 0;
philpem@0	2988	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	2989
philpem@0	2990	if(BIT_B(word2))
philpem@0	2991	offset = MAKE_INT_32(REG_D[offset&7]);
philpem@0	2992	if(BIT_5(word2))
philpem@0	2993	width = REG_D[width&7];
philpem@0	2994
philpem@0	2995	/* Offset is signed so we have to use ugly math =( */
philpem@0	2996	ea += offset / 8;
philpem@0	2997	offset %= 8;
philpem@0	2998	if(offset < 0)
philpem@0	2999	{
philpem@0	3000	offset += 8;
philpem@0	3001	ea--;
philpem@0	3002	}
philpem@0	3003	width = ((width-1) & 31) + 1;
philpem@0	3004
philpem@0	3005
philpem@0	3006	mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
philpem@0	3007	mask_long = mask_base >> offset;
philpem@0	3008
philpem@0	3009	data_long = m68ki_read_32(ea);
philpem@0	3010	FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;
philpem@0	3011	FLAG_Z = data_long & mask_long;
philpem@0	3012	FLAG_V = VFLAG_CLEAR;
philpem@0	3013	FLAG_C = CFLAG_CLEAR;
philpem@0	3014
philpem@0	3015	if((width + offset) > 32)
philpem@0	3016	{
philpem@0	3017	mask_byte = MASK_OUT_ABOVE_8(mask_base);
philpem@0	3018	data_byte = m68ki_read_8(ea+4);
philpem@0	3019	FLAG_Z |= (data_byte & mask_byte);
philpem@0	3020	}
philpem@0	3021	return;
philpem@0	3022	}
philpem@0	3023	m68ki_exception_illegal();
philpem@0	3024	}
philpem@0	3025
philpem@0	3026
philpem@0	3027	M68KMAKE_OP(bkpt, 0, ., .)
philpem@0	3028	{
philpem@0	3029	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	3030	{
philpem@0	3031	m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */
philpem@0	3032	}
philpem@0	3033	m68ki_exception_illegal();
philpem@0	3034	}
philpem@0	3035
philpem@0	3036
philpem@0	3037	M68KMAKE_OP(bra, 8, ., .)
philpem@0	3038	{
philpem@0	3039	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3040	m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
philpem@0	3041	if(REG_PC == REG_PPC)
philpem@0	3042	USE_ALL_CYCLES();
philpem@0	3043	}
philpem@0	3044
philpem@0	3045
philpem@0	3046	M68KMAKE_OP(bra, 16, ., .)
philpem@0	3047	{
philpem@0	3048	uint offset = OPER_I_16();
philpem@0	3049	REG_PC -= 2;
philpem@0	3050	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3051	m68ki_branch_16(offset);
philpem@0	3052	if(REG_PC == REG_PPC)
philpem@0	3053	USE_ALL_CYCLES();
philpem@0	3054	}
philpem@0	3055
philpem@0	3056
philpem@0	3057	M68KMAKE_OP(bra, 32, ., .)
philpem@0	3058	{
philpem@0	3059	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3060	{
philpem@0	3061	uint offset = OPER_I_32();
philpem@0	3062	REG_PC -= 4;
philpem@0	3063	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3064	m68ki_branch_32(offset);
philpem@0	3065	if(REG_PC == REG_PPC)
philpem@0	3066	USE_ALL_CYCLES();
philpem@0	3067	return;
philpem@0	3068	}
philpem@0	3069	m68ki_exception_illegal();
philpem@0	3070	}
philpem@0	3071
philpem@0	3072
philpem@0	3073	M68KMAKE_OP(bset, 32, r, d)
philpem@0	3074	{
philpem@0	3075	uint* r_dst = &DY;
philpem@0	3076	uint mask = 1 << (DX & 0x1f);
philpem@0	3077
philpem@0	3078	FLAG_Z = *r_dst & mask;
philpem@0	3079	*r_dst |= mask;
philpem@0	3080	}
philpem@0	3081
philpem@0	3082
philpem@0	3083	M68KMAKE_OP(bset, 8, r, .)
philpem@0	3084	{
philpem@0	3085	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	3086	uint src = m68ki_read_8(ea);
philpem@0	3087	uint mask = 1 << (DX & 7);
philpem@0	3088
philpem@0	3089	FLAG_Z = src & mask;
philpem@0	3090	m68ki_write_8(ea, src | mask);
philpem@0	3091	}
philpem@0	3092
philpem@0	3093
philpem@0	3094	M68KMAKE_OP(bset, 32, s, d)
philpem@0	3095	{
philpem@0	3096	uint* r_dst = &DY;
philpem@0	3097	uint mask = 1 << (OPER_I_8() & 0x1f);
philpem@0	3098
philpem@0	3099	FLAG_Z = *r_dst & mask;
philpem@0	3100	*r_dst |= mask;
philpem@0	3101	}
philpem@0	3102
philpem@0	3103
philpem@0	3104	M68KMAKE_OP(bset, 8, s, .)
philpem@0	3105	{
philpem@0	3106	uint mask = 1 << (OPER_I_8() & 7);
philpem@0	3107	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	3108	uint src = m68ki_read_8(ea);
philpem@0	3109
philpem@0	3110	FLAG_Z = src & mask;
philpem@0	3111	m68ki_write_8(ea, src | mask);
philpem@0	3112	}
philpem@0	3113
philpem@0	3114
philpem@0	3115	M68KMAKE_OP(bsr, 8, ., .)
philpem@0	3116	{
philpem@0	3117	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3118	m68ki_push_32(REG_PC);
philpem@0	3119	m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
philpem@0	3120	}
philpem@0	3121
philpem@0	3122
philpem@0	3123	M68KMAKE_OP(bsr, 16, ., .)
philpem@0	3124	{
philpem@0	3125	uint offset = OPER_I_16();
philpem@0	3126	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3127	m68ki_push_32(REG_PC);
philpem@0	3128	REG_PC -= 2;
philpem@0	3129	m68ki_branch_16(offset);
philpem@0	3130	}
philpem@0	3131
philpem@0	3132
philpem@0	3133	M68KMAKE_OP(bsr, 32, ., .)
philpem@0	3134	{
philpem@0	3135	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3136	{
philpem@0	3137	uint offset = OPER_I_32();
philpem@0	3138	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3139	m68ki_push_32(REG_PC);
philpem@0	3140	REG_PC -= 4;
philpem@0	3141	m68ki_branch_32(offset);
philpem@0	3142	return;
philpem@0	3143	}
philpem@0	3144	m68ki_exception_illegal();
philpem@0	3145	}
philpem@0	3146
philpem@0	3147
philpem@0	3148	M68KMAKE_OP(btst, 32, r, d)
philpem@0	3149	{
philpem@0	3150	FLAG_Z = DY & (1 << (DX & 0x1f));
philpem@0	3151	}
philpem@0	3152
philpem@0	3153
philpem@0	3154	M68KMAKE_OP(btst, 8, r, .)
philpem@0	3155	{
philpem@0	3156	FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << (DX & 7));
philpem@0	3157	}
philpem@0	3158
philpem@0	3159
philpem@0	3160	M68KMAKE_OP(btst, 32, s, d)
philpem@0	3161	{
philpem@0	3162	FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
philpem@0	3163	}
philpem@0	3164
philpem@0	3165
philpem@0	3166	M68KMAKE_OP(btst, 8, s, .)
philpem@0	3167	{
philpem@0	3168	uint bit = OPER_I_8() & 7;
philpem@0	3169
philpem@0	3170	FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
philpem@0	3171	}
philpem@0	3172
philpem@0	3173
philpem@0	3174	M68KMAKE_OP(callm, 32, ., .)
philpem@0	3175	{
philpem@0	3176	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	3177	{
philpem@0	3178	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	3179
philpem@0	3180	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3181	REG_PC += 2;
philpem@0	3182	(void)ea; /* just to avoid an 'unused variable' warning */
philpem@0	3183	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	3184	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	3185	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	3186	return;
philpem@0	3187	}
philpem@0	3188	m68ki_exception_illegal();
philpem@0	3189	}
philpem@0	3190
philpem@0	3191
philpem@0	3192	M68KMAKE_OP(cas, 8, ., .)
philpem@0	3193	{
philpem@0	3194	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3195	{
philpem@0	3196	uint word2 = OPER_I_16();
philpem@0	3197	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	3198	uint dest = m68ki_read_8(ea);
philpem@0	3199	uint* compare = &REG_D[word2 & 7];
philpem@0	3200	uint res = dest - MASK_OUT_ABOVE_8(*compare);
philpem@0	3201
philpem@0	3202	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3203	FLAG_N = NFLAG_8(res);
philpem@0	3204	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3205	FLAG_V = VFLAG_SUB_8(*compare, dest, res);
philpem@0	3206	FLAG_C = CFLAG_8(res);
philpem@0	3207
philpem@0	3208	if(COND_NE())
philpem@0	3209	*compare = MASK_OUT_BELOW_8(*compare) | dest;
philpem@0	3210	else
philpem@0	3211	{
philpem@0	3212	USE_CYCLES(3);
philpem@0	3213	m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
philpem@0	3214	}
philpem@0	3215	return;
philpem@0	3216	}
philpem@0	3217	m68ki_exception_illegal();
philpem@0	3218	}
philpem@0	3219
philpem@0	3220
philpem@0	3221	M68KMAKE_OP(cas, 16, ., .)
philpem@0	3222	{
philpem@0	3223	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3224	{
philpem@0	3225	uint word2 = OPER_I_16();
philpem@0	3226	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	3227	uint dest = m68ki_read_16(ea);
philpem@0	3228	uint* compare = &REG_D[word2 & 7];
philpem@0	3229	uint res = dest - MASK_OUT_ABOVE_16(*compare);
philpem@0	3230
philpem@0	3231	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3232	FLAG_N = NFLAG_16(res);
philpem@0	3233	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3234	FLAG_V = VFLAG_SUB_16(*compare, dest, res);
philpem@0	3235	FLAG_C = CFLAG_16(res);
philpem@0	3236
philpem@0	3237	if(COND_NE())
philpem@0	3238	*compare = MASK_OUT_BELOW_16(*compare) | dest;
philpem@0	3239	else
philpem@0	3240	{
philpem@0	3241	USE_CYCLES(3);
philpem@0	3242	m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
philpem@0	3243	}
philpem@0	3244	return;
philpem@0	3245	}
philpem@0	3246	m68ki_exception_illegal();
philpem@0	3247	}
philpem@0	3248
philpem@0	3249
philpem@0	3250	M68KMAKE_OP(cas, 32, ., .)
philpem@0	3251	{
philpem@0	3252	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3253	{
philpem@0	3254	uint word2 = OPER_I_16();
philpem@0	3255	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	3256	uint dest = m68ki_read_32(ea);
philpem@0	3257	uint* compare = &REG_D[word2 & 7];
philpem@0	3258	uint res = dest - *compare;
philpem@0	3259
philpem@0	3260	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3261	FLAG_N = NFLAG_32(res);
philpem@0	3262	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3263	FLAG_V = VFLAG_SUB_32(*compare, dest, res);
philpem@0	3264	FLAG_C = CFLAG_SUB_32(*compare, dest, res);
philpem@0	3265
philpem@0	3266	if(COND_NE())
philpem@0	3267	*compare = dest;
philpem@0	3268	else
philpem@0	3269	{
philpem@0	3270	USE_CYCLES(3);
philpem@0	3271	m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
philpem@0	3272	}
philpem@0	3273	return;
philpem@0	3274	}
philpem@0	3275	m68ki_exception_illegal();
philpem@0	3276	}
philpem@0	3277
philpem@0	3278
philpem@0	3279	M68KMAKE_OP(cas2, 16, ., .)
philpem@0	3280	{
philpem@0	3281	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3282	{
philpem@0	3283	uint word2 = OPER_I_32();
philpem@0	3284	uint* compare1 = &REG_D[(word2 >> 16) & 7];
philpem@0	3285	uint ea1 = REG_DA[(word2 >> 28) & 15];
philpem@0	3286	uint dest1 = m68ki_read_16(ea1);
philpem@0	3287	uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
philpem@0	3288	uint* compare2 = &REG_D[word2 & 7];
philpem@0	3289	uint ea2 = REG_DA[(word2 >> 12) & 15];
philpem@0	3290	uint dest2 = m68ki_read_16(ea2);
philpem@0	3291	uint res2;
philpem@0	3292
philpem@0	3293	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3294	FLAG_N = NFLAG_16(res1);
philpem@0	3295	FLAG_Z = MASK_OUT_ABOVE_16(res1);
philpem@0	3296	FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);
philpem@0	3297	FLAG_C = CFLAG_16(res1);
philpem@0	3298
philpem@0	3299	if(COND_EQ())
philpem@0	3300	{
philpem@0	3301	res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
philpem@0	3302
philpem@0	3303	FLAG_N = NFLAG_16(res2);
philpem@0	3304	FLAG_Z = MASK_OUT_ABOVE_16(res2);
philpem@0	3305	FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);
philpem@0	3306	FLAG_C = CFLAG_16(res2);
philpem@0	3307
philpem@0	3308	if(COND_EQ())
philpem@0	3309	{
philpem@0	3310	USE_CYCLES(3);
philpem@0	3311	m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);
philpem@0	3312	m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);
philpem@0	3313	return;
philpem@0	3314	}
philpem@0	3315	}
philpem@0	3316	*compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;
philpem@0	3317	*compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
philpem@0	3318	return;
philpem@0	3319	}
philpem@0	3320	m68ki_exception_illegal();
philpem@0	3321	}
philpem@0	3322
philpem@0	3323
philpem@0	3324	M68KMAKE_OP(cas2, 32, ., .)
philpem@0	3325	{
philpem@0	3326	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3327	{
philpem@0	3328	uint word2 = OPER_I_32();
philpem@0	3329	uint* compare1 = &REG_D[(word2 >> 16) & 7];
philpem@0	3330	uint ea1 = REG_DA[(word2 >> 28) & 15];
philpem@0	3331	uint dest1 = m68ki_read_32(ea1);
philpem@0	3332	uint res1 = dest1 - *compare1;
philpem@0	3333	uint* compare2 = &REG_D[word2 & 7];
philpem@0	3334	uint ea2 = REG_DA[(word2 >> 12) & 15];
philpem@0	3335	uint dest2 = m68ki_read_32(ea2);
philpem@0	3336	uint res2;
philpem@0	3337
philpem@0	3338	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	3339	FLAG_N = NFLAG_32(res1);
philpem@0	3340	FLAG_Z = MASK_OUT_ABOVE_32(res1);
philpem@0	3341	FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);
philpem@0	3342	FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);
philpem@0	3343
philpem@0	3344	if(COND_EQ())
philpem@0	3345	{
philpem@0	3346	res2 = dest2 - *compare2;
philpem@0	3347
philpem@0	3348	FLAG_N = NFLAG_32(res2);
philpem@0	3349	FLAG_Z = MASK_OUT_ABOVE_32(res2);
philpem@0	3350	FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);
philpem@0	3351	FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);
philpem@0	3352
philpem@0	3353	if(COND_EQ())
philpem@0	3354	{
philpem@0	3355	USE_CYCLES(3);
philpem@0	3356	m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);
philpem@0	3357	m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);
philpem@0	3358	return;
philpem@0	3359	}
philpem@0	3360	}
philpem@0	3361	*compare1 = dest1;
philpem@0	3362	*compare2 = dest2;
philpem@0	3363	return;
philpem@0	3364	}
philpem@0	3365	m68ki_exception_illegal();
philpem@0	3366	}
philpem@0	3367
philpem@0	3368
philpem@0	3369	M68KMAKE_OP(chk, 16, ., d)
philpem@0	3370	{
philpem@0	3371	sint src = MAKE_INT_16(DX);
philpem@0	3372	sint bound = MAKE_INT_16(DY);
philpem@0	3373
philpem@0	3374	if(src >= 0 && src <= bound)
philpem@0	3375	{
philpem@0	3376	return;
philpem@0	3377	}
philpem@0	3378	FLAG_N = (src < 0)<<7;
philpem@0	3379	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3380	}
philpem@0	3381
philpem@0	3382
philpem@0	3383	M68KMAKE_OP(chk, 16, ., .)
philpem@0	3384	{
philpem@0	3385	sint src = MAKE_INT_16(DX);
philpem@0	3386	sint bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
philpem@0	3387
philpem@0	3388	if(src >= 0 && src <= bound)
philpem@0	3389	{
philpem@0	3390	return;
philpem@0	3391	}
philpem@0	3392	FLAG_N = (src < 0)<<7;
philpem@0	3393	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3394	}
philpem@0	3395
philpem@0	3396
philpem@0	3397	M68KMAKE_OP(chk, 32, ., d)
philpem@0	3398	{
philpem@0	3399	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3400	{
philpem@0	3401	sint src = MAKE_INT_32(DX);
philpem@0	3402	sint bound = MAKE_INT_32(DY);
philpem@0	3403
philpem@0	3404	if(src >= 0 && src <= bound)
philpem@0	3405	{
philpem@0	3406	return;
philpem@0	3407	}
philpem@0	3408	FLAG_N = (src < 0)<<7;
philpem@0	3409	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3410	return;
philpem@0	3411	}
philpem@0	3412	m68ki_exception_illegal();
philpem@0	3413	}
philpem@0	3414
philpem@0	3415
philpem@0	3416	M68KMAKE_OP(chk, 32, ., .)
philpem@0	3417	{
philpem@0	3418	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3419	{
philpem@0	3420	sint src = MAKE_INT_32(DX);
philpem@0	3421	sint bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
philpem@0	3422
philpem@0	3423	if(src >= 0 && src <= bound)
philpem@0	3424	{
philpem@0	3425	return;
philpem@0	3426	}
philpem@0	3427	FLAG_N = (src < 0)<<7;
philpem@0	3428	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3429	return;
philpem@0	3430	}
philpem@0	3431	m68ki_exception_illegal();
philpem@0	3432	}
philpem@0	3433
philpem@0	3434
philpem@0	3435	M68KMAKE_OP(chk2cmp2, 8, ., .)
philpem@0	3436	{
philpem@0	3437	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3438	{
philpem@0	3439	uint word2 = OPER_I_16();
philpem@0	3440	uint compare = REG_DA[(word2 >> 12) & 15];
philpem@0	3441	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	3442	uint lower_bound = m68ki_read_8(ea);
philpem@0	3443	uint upper_bound = m68ki_read_8(ea + 1);
philpem@0	3444
philpem@0	3445	if(!BIT_F(word2))
philpem@0	3446	compare = MAKE_INT_8(compare);
philpem@0	3447
philpem@0	3448	FLAG_C = compare - lower_bound;
philpem@0	3449	FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C);
philpem@0	3450	if(COND_CS())
philpem@0	3451	{
philpem@0	3452	if(BIT_B(word2))
philpem@0	3453	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3454	return;
philpem@0	3455	}
philpem@0	3456
philpem@0	3457	FLAG_C = upper_bound - compare;
philpem@0	3458	FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C);
philpem@0	3459	if(COND_CS() && BIT_B(word2))
philpem@0	3460	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3461
philpem@0	3462	return;
philpem@0	3463	}
philpem@0	3464	m68ki_exception_illegal();
philpem@0	3465	}
philpem@0	3466
philpem@0	3467
philpem@0	3468	M68KMAKE_OP(chk2cmp2, 16, ., .)
philpem@0	3469	{
philpem@0	3470	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3471	{
philpem@0	3472	uint word2 = OPER_I_16();
philpem@0	3473	uint compare = REG_DA[(word2 >> 12) & 15];
philpem@0	3474	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	3475	uint lower_bound = m68ki_read_16(ea);
philpem@0	3476	uint upper_bound = m68ki_read_16(ea + 1);
philpem@0	3477
philpem@0	3478	if(!BIT_F(word2))
philpem@0	3479	compare = MAKE_INT_16(compare);
philpem@0	3480
philpem@0	3481	FLAG_C = compare - lower_bound;
philpem@0	3482	FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C);
philpem@0	3483	FLAG_C = CFLAG_16(FLAG_C);
philpem@0	3484	if(COND_CS())
philpem@0	3485	{
philpem@0	3486	if(BIT_B(word2))
philpem@0	3487	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3488	return;
philpem@0	3489	}
philpem@0	3490
philpem@0	3491	FLAG_C = upper_bound - compare;
philpem@0	3492	FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C);
philpem@0	3493	FLAG_C = CFLAG_16(FLAG_C);
philpem@0	3494	if(COND_CS() && BIT_B(word2))
philpem@0	3495	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3496
philpem@0	3497	return;
philpem@0	3498	}
philpem@0	3499	m68ki_exception_illegal();
philpem@0	3500	}
philpem@0	3501
philpem@0	3502
philpem@0	3503	M68KMAKE_OP(chk2cmp2, 32, ., .)
philpem@0	3504	{
philpem@0	3505	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3506	{
philpem@0	3507	uint word2 = OPER_I_16();
philpem@0	3508	uint compare = REG_DA[(word2 >> 12) & 15];
philpem@0	3509	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	3510	uint lower_bound = m68ki_read_32(ea);
philpem@0	3511	uint upper_bound = m68ki_read_32(ea + 1);
philpem@0	3512
philpem@0	3513	FLAG_C = compare - lower_bound;
philpem@0	3514	FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C);
philpem@0	3515	FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
philpem@0	3516	if(COND_CS())
philpem@0	3517	{
philpem@0	3518	if(BIT_B(word2))
philpem@0	3519	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3520	return;
philpem@0	3521	}
philpem@0	3522
philpem@0	3523	FLAG_C = upper_bound - compare;
philpem@0	3524	FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C);
philpem@0	3525	FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
philpem@0	3526	if(COND_CS() && BIT_B(word2))
philpem@0	3527	m68ki_exception_trap(EXCEPTION_CHK);
philpem@0	3528
philpem@0	3529	return;
philpem@0	3530	}
philpem@0	3531	m68ki_exception_illegal();
philpem@0	3532	}
philpem@0	3533
philpem@0	3534
philpem@0	3535	M68KMAKE_OP(clr, 8, ., d)
philpem@0	3536	{
philpem@0	3537	DY &= 0xffffff00;
philpem@0	3538
philpem@0	3539	FLAG_N = NFLAG_CLEAR;
philpem@0	3540	FLAG_V = VFLAG_CLEAR;
philpem@0	3541	FLAG_C = CFLAG_CLEAR;
philpem@0	3542	FLAG_Z = ZFLAG_SET;
philpem@0	3543	}
philpem@0	3544
philpem@0	3545
philpem@0	3546	M68KMAKE_OP(clr, 8, ., .)
philpem@0	3547	{
philpem@0	3548	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
philpem@0	3549
philpem@0	3550	FLAG_N = NFLAG_CLEAR;
philpem@0	3551	FLAG_V = VFLAG_CLEAR;
philpem@0	3552	FLAG_C = CFLAG_CLEAR;
philpem@0	3553	FLAG_Z = ZFLAG_SET;
philpem@0	3554	}
philpem@0	3555
philpem@0	3556
philpem@0	3557	M68KMAKE_OP(clr, 16, ., d)
philpem@0	3558	{
philpem@0	3559	DY &= 0xffff0000;
philpem@0	3560
philpem@0	3561	FLAG_N = NFLAG_CLEAR;
philpem@0	3562	FLAG_V = VFLAG_CLEAR;
philpem@0	3563	FLAG_C = CFLAG_CLEAR;
philpem@0	3564	FLAG_Z = ZFLAG_SET;
philpem@0	3565	}
philpem@0	3566
philpem@0	3567
philpem@0	3568	M68KMAKE_OP(clr, 16, ., .)
philpem@0	3569	{
philpem@0	3570	m68ki_write_16(M68KMAKE_GET_EA_AY_16, 0);
philpem@0	3571
philpem@0	3572	FLAG_N = NFLAG_CLEAR;
philpem@0	3573	FLAG_V = VFLAG_CLEAR;
philpem@0	3574	FLAG_C = CFLAG_CLEAR;
philpem@0	3575	FLAG_Z = ZFLAG_SET;
philpem@0	3576	}
philpem@0	3577
philpem@0	3578
philpem@0	3579	M68KMAKE_OP(clr, 32, ., d)
philpem@0	3580	{
philpem@0	3581	DY = 0;
philpem@0	3582
philpem@0	3583	FLAG_N = NFLAG_CLEAR;
philpem@0	3584	FLAG_V = VFLAG_CLEAR;
philpem@0	3585	FLAG_C = CFLAG_CLEAR;
philpem@0	3586	FLAG_Z = ZFLAG_SET;
philpem@0	3587	}
philpem@0	3588
philpem@0	3589
philpem@0	3590	M68KMAKE_OP(clr, 32, ., .)
philpem@0	3591	{
philpem@0	3592	m68ki_write_32(M68KMAKE_GET_EA_AY_32, 0);
philpem@0	3593
philpem@0	3594	FLAG_N = NFLAG_CLEAR;
philpem@0	3595	FLAG_V = VFLAG_CLEAR;
philpem@0	3596	FLAG_C = CFLAG_CLEAR;
philpem@0	3597	FLAG_Z = ZFLAG_SET;
philpem@0	3598	}
philpem@0	3599
philpem@0	3600
philpem@0	3601	M68KMAKE_OP(cmp, 8, ., d)
philpem@0	3602	{
philpem@0	3603	uint src = MASK_OUT_ABOVE_8(DY);
philpem@0	3604	uint dst = MASK_OUT_ABOVE_8(DX);
philpem@0	3605	uint res = dst - src;
philpem@0	3606
philpem@0	3607	FLAG_N = NFLAG_8(res);
philpem@0	3608	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3609	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3610	FLAG_C = CFLAG_8(res);
philpem@0	3611	}
philpem@0	3612
philpem@0	3613
philpem@0	3614	M68KMAKE_OP(cmp, 8, ., .)
philpem@0	3615	{
philpem@0	3616	uint src = M68KMAKE_GET_OPER_AY_8;
philpem@0	3617	uint dst = MASK_OUT_ABOVE_8(DX);
philpem@0	3618	uint res = dst - src;
philpem@0	3619
philpem@0	3620	FLAG_N = NFLAG_8(res);
philpem@0	3621	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3622	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3623	FLAG_C = CFLAG_8(res);
philpem@0	3624	}
philpem@0	3625
philpem@0	3626
philpem@0	3627	M68KMAKE_OP(cmp, 16, ., d)
philpem@0	3628	{
philpem@0	3629	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	3630	uint dst = MASK_OUT_ABOVE_16(DX);
philpem@0	3631	uint res = dst - src;
philpem@0	3632
philpem@0	3633	FLAG_N = NFLAG_16(res);
philpem@0	3634	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3635	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3636	FLAG_C = CFLAG_16(res);
philpem@0	3637	}
philpem@0	3638
philpem@0	3639
philpem@0	3640	M68KMAKE_OP(cmp, 16, ., a)
philpem@0	3641	{
philpem@0	3642	uint src = MASK_OUT_ABOVE_16(AY);
philpem@0	3643	uint dst = MASK_OUT_ABOVE_16(DX);
philpem@0	3644	uint res = dst - src;
philpem@0	3645
philpem@0	3646	FLAG_N = NFLAG_16(res);
philpem@0	3647	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3648	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3649	FLAG_C = CFLAG_16(res);
philpem@0	3650	}
philpem@0	3651
philpem@0	3652
philpem@0	3653	M68KMAKE_OP(cmp, 16, ., .)
philpem@0	3654	{
philpem@0	3655	uint src = M68KMAKE_GET_OPER_AY_16;
philpem@0	3656	uint dst = MASK_OUT_ABOVE_16(DX);
philpem@0	3657	uint res = dst - src;
philpem@0	3658
philpem@0	3659	FLAG_N = NFLAG_16(res);
philpem@0	3660	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3661	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3662	FLAG_C = CFLAG_16(res);
philpem@0	3663	}
philpem@0	3664
philpem@0	3665
philpem@0	3666	M68KMAKE_OP(cmp, 32, ., d)
philpem@0	3667	{
philpem@0	3668	uint src = DY;
philpem@0	3669	uint dst = DX;
philpem@0	3670	uint res = dst - src;
philpem@0	3671
philpem@0	3672	FLAG_N = NFLAG_32(res);
philpem@0	3673	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3674	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3675	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3676	}
philpem@0	3677
philpem@0	3678
philpem@0	3679	M68KMAKE_OP(cmp, 32, ., a)
philpem@0	3680	{
philpem@0	3681	uint src = AY;
philpem@0	3682	uint dst = DX;
philpem@0	3683	uint res = dst - src;
philpem@0	3684
philpem@0	3685	FLAG_N = NFLAG_32(res);
philpem@0	3686	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3687	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3688	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3689	}
philpem@0	3690
philpem@0	3691
philpem@0	3692	M68KMAKE_OP(cmp, 32, ., .)
philpem@0	3693	{
philpem@0	3694	uint src = M68KMAKE_GET_OPER_AY_32;
philpem@0	3695	uint dst = DX;
philpem@0	3696	uint res = dst - src;
philpem@0	3697
philpem@0	3698	FLAG_N = NFLAG_32(res);
philpem@0	3699	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3700	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3701	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3702	}
philpem@0	3703
philpem@0	3704
philpem@0	3705	M68KMAKE_OP(cmpa, 16, ., d)
philpem@0	3706	{
philpem@0	3707	uint src = MAKE_INT_16(DY);
philpem@0	3708	uint dst = AX;
philpem@0	3709	uint res = dst - src;
philpem@0	3710
philpem@0	3711	FLAG_N = NFLAG_32(res);
philpem@0	3712	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3713	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3714	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3715	}
philpem@0	3716
philpem@0	3717
philpem@0	3718	M68KMAKE_OP(cmpa, 16, ., a)
philpem@0	3719	{
philpem@0	3720	uint src = MAKE_INT_16(AY);
philpem@0	3721	uint dst = AX;
philpem@0	3722	uint res = dst - src;
philpem@0	3723
philpem@0	3724	FLAG_N = NFLAG_32(res);
philpem@0	3725	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3726	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3727	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3728	}
philpem@0	3729
philpem@0	3730
philpem@0	3731	M68KMAKE_OP(cmpa, 16, ., .)
philpem@0	3732	{
philpem@0	3733	uint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
philpem@0	3734	uint dst = AX;
philpem@0	3735	uint res = dst - src;
philpem@0	3736
philpem@0	3737	FLAG_N = NFLAG_32(res);
philpem@0	3738	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3739	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3740	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3741	}
philpem@0	3742
philpem@0	3743
philpem@0	3744	M68KMAKE_OP(cmpa, 32, ., d)
philpem@0	3745	{
philpem@0	3746	uint src = DY;
philpem@0	3747	uint dst = AX;
philpem@0	3748	uint res = dst - src;
philpem@0	3749
philpem@0	3750	FLAG_N = NFLAG_32(res);
philpem@0	3751	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3752	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3753	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3754	}
philpem@0	3755
philpem@0	3756
philpem@0	3757	M68KMAKE_OP(cmpa, 32, ., a)
philpem@0	3758	{
philpem@0	3759	uint src = AY;
philpem@0	3760	uint dst = AX;
philpem@0	3761	uint res = dst - src;
philpem@0	3762
philpem@0	3763	FLAG_N = NFLAG_32(res);
philpem@0	3764	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3765	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3766	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3767	}
philpem@0	3768
philpem@0	3769
philpem@0	3770	M68KMAKE_OP(cmpa, 32, ., .)
philpem@0	3771	{
philpem@0	3772	uint src = M68KMAKE_GET_OPER_AY_32;
philpem@0	3773	uint dst = AX;
philpem@0	3774	uint res = dst - src;
philpem@0	3775
philpem@0	3776	FLAG_N = NFLAG_32(res);
philpem@0	3777	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3778	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3779	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3780	}
philpem@0	3781
philpem@0	3782
philpem@0	3783	M68KMAKE_OP(cmpi, 8, ., d)
philpem@0	3784	{
philpem@0	3785	uint src = OPER_I_8();
philpem@0	3786	uint dst = MASK_OUT_ABOVE_8(DY);
philpem@0	3787	uint res = dst - src;
philpem@0	3788
philpem@0	3789	FLAG_N = NFLAG_8(res);
philpem@0	3790	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3791	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3792	FLAG_C = CFLAG_8(res);
philpem@0	3793	}
philpem@0	3794
philpem@0	3795
philpem@0	3796	M68KMAKE_OP(cmpi, 8, ., .)
philpem@0	3797	{
philpem@0	3798	uint src = OPER_I_8();
philpem@0	3799	uint dst = M68KMAKE_GET_OPER_AY_8;
philpem@0	3800	uint res = dst - src;
philpem@0	3801
philpem@0	3802	FLAG_N = NFLAG_8(res);
philpem@0	3803	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3804	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3805	FLAG_C = CFLAG_8(res);
philpem@0	3806	}
philpem@0	3807
philpem@0	3808
philpem@0	3809	M68KMAKE_OP(cmpi, 8, ., pcdi)
philpem@0	3810	{
philpem@0	3811	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3812	{
philpem@0	3813	uint src = OPER_I_8();
philpem@0	3814	uint dst = OPER_PCDI_8();
philpem@0	3815	uint res = dst - src;
philpem@0	3816
philpem@0	3817	FLAG_N = NFLAG_8(res);
philpem@0	3818	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3819	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3820	FLAG_C = CFLAG_8(res);
philpem@0	3821	return;
philpem@0	3822	}
philpem@0	3823	m68ki_exception_illegal();
philpem@0	3824	}
philpem@0	3825
philpem@0	3826
philpem@0	3827	M68KMAKE_OP(cmpi, 8, ., pcix)
philpem@0	3828	{
philpem@0	3829	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3830	{
philpem@0	3831	uint src = OPER_I_8();
philpem@0	3832	uint dst = OPER_PCIX_8();
philpem@0	3833	uint res = dst - src;
philpem@0	3834
philpem@0	3835	FLAG_N = NFLAG_8(res);
philpem@0	3836	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3837	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3838	FLAG_C = CFLAG_8(res);
philpem@0	3839	return;
philpem@0	3840	}
philpem@0	3841	m68ki_exception_illegal();
philpem@0	3842	}
philpem@0	3843
philpem@0	3844
philpem@0	3845	M68KMAKE_OP(cmpi, 16, ., d)
philpem@0	3846	{
philpem@0	3847	uint src = OPER_I_16();
philpem@0	3848	uint dst = MASK_OUT_ABOVE_16(DY);
philpem@0	3849	uint res = dst - src;
philpem@0	3850
philpem@0	3851	FLAG_N = NFLAG_16(res);
philpem@0	3852	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3853	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3854	FLAG_C = CFLAG_16(res);
philpem@0	3855	}
philpem@0	3856
philpem@0	3857
philpem@0	3858	M68KMAKE_OP(cmpi, 16, ., .)
philpem@0	3859	{
philpem@0	3860	uint src = OPER_I_16();
philpem@0	3861	uint dst = M68KMAKE_GET_OPER_AY_16;
philpem@0	3862	uint res = dst - src;
philpem@0	3863
philpem@0	3864	FLAG_N = NFLAG_16(res);
philpem@0	3865	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3866	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3867	FLAG_C = CFLAG_16(res);
philpem@0	3868	}
philpem@0	3869
philpem@0	3870
philpem@0	3871	M68KMAKE_OP(cmpi, 16, ., pcdi)
philpem@0	3872	{
philpem@0	3873	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3874	{
philpem@0	3875	uint src = OPER_I_16();
philpem@0	3876	uint dst = OPER_PCDI_16();
philpem@0	3877	uint res = dst - src;
philpem@0	3878
philpem@0	3879	FLAG_N = NFLAG_16(res);
philpem@0	3880	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3881	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3882	FLAG_C = CFLAG_16(res);
philpem@0	3883	return;
philpem@0	3884	}
philpem@0	3885	m68ki_exception_illegal();
philpem@0	3886	}
philpem@0	3887
philpem@0	3888
philpem@0	3889	M68KMAKE_OP(cmpi, 16, ., pcix)
philpem@0	3890	{
philpem@0	3891	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3892	{
philpem@0	3893	uint src = OPER_I_16();
philpem@0	3894	uint dst = OPER_PCIX_16();
philpem@0	3895	uint res = dst - src;
philpem@0	3896
philpem@0	3897	FLAG_N = NFLAG_16(res);
philpem@0	3898	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	3899	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	3900	FLAG_C = CFLAG_16(res);
philpem@0	3901	return;
philpem@0	3902	}
philpem@0	3903	m68ki_exception_illegal();
philpem@0	3904	}
philpem@0	3905
philpem@0	3906
philpem@0	3907	M68KMAKE_OP(cmpi, 32, ., d)
philpem@0	3908	{
philpem@0	3909	uint src = OPER_I_32();
philpem@0	3910	uint dst = DY;
philpem@0	3911	uint res = dst - src;
philpem@0	3912
philpem@0	3913	FLAG_N = NFLAG_32(res);
philpem@0	3914	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3915	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3916	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3917	}
philpem@0	3918
philpem@0	3919
philpem@0	3920	M68KMAKE_OP(cmpi, 32, ., .)
philpem@0	3921	{
philpem@0	3922	uint src = OPER_I_32();
philpem@0	3923	uint dst = M68KMAKE_GET_OPER_AY_32;
philpem@0	3924	uint res = dst - src;
philpem@0	3925
philpem@0	3926	FLAG_N = NFLAG_32(res);
philpem@0	3927	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3928	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3929	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3930	}
philpem@0	3931
philpem@0	3932
philpem@0	3933	M68KMAKE_OP(cmpi, 32, ., pcdi)
philpem@0	3934	{
philpem@0	3935	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3936	{
philpem@0	3937	uint src = OPER_I_32();
philpem@0	3938	uint dst = OPER_PCDI_32();
philpem@0	3939	uint res = dst - src;
philpem@0	3940
philpem@0	3941	FLAG_N = NFLAG_32(res);
philpem@0	3942	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3943	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3944	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3945	return;
philpem@0	3946	}
philpem@0	3947	m68ki_exception_illegal();
philpem@0	3948	}
philpem@0	3949
philpem@0	3950
philpem@0	3951	M68KMAKE_OP(cmpi, 32, ., pcix)
philpem@0	3952	{
philpem@0	3953	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	3954	{
philpem@0	3955	uint src = OPER_I_32();
philpem@0	3956	uint dst = OPER_PCIX_32();
philpem@0	3957	uint res = dst - src;
philpem@0	3958
philpem@0	3959	FLAG_N = NFLAG_32(res);
philpem@0	3960	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	3961	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	3962	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	3963	return;
philpem@0	3964	}
philpem@0	3965	m68ki_exception_illegal();
philpem@0	3966	}
philpem@0	3967
philpem@0	3968
philpem@0	3969	M68KMAKE_OP(cmpm, 8, ., ax7)
philpem@0	3970	{
philpem@0	3971	uint src = OPER_AY_PI_8();
philpem@0	3972	uint dst = OPER_A7_PI_8();
philpem@0	3973	uint res = dst - src;
philpem@0	3974
philpem@0	3975	FLAG_N = NFLAG_8(res);
philpem@0	3976	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3977	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3978	FLAG_C = CFLAG_8(res);
philpem@0	3979	}
philpem@0	3980
philpem@0	3981
philpem@0	3982	M68KMAKE_OP(cmpm, 8, ., ay7)
philpem@0	3983	{
philpem@0	3984	uint src = OPER_A7_PI_8();
philpem@0	3985	uint dst = OPER_AX_PI_8();
philpem@0	3986	uint res = dst - src;
philpem@0	3987
philpem@0	3988	FLAG_N = NFLAG_8(res);
philpem@0	3989	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	3990	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	3991	FLAG_C = CFLAG_8(res);
philpem@0	3992	}
philpem@0	3993
philpem@0	3994
philpem@0	3995	M68KMAKE_OP(cmpm, 8, ., axy7)
philpem@0	3996	{
philpem@0	3997	uint src = OPER_A7_PI_8();
philpem@0	3998	uint dst = OPER_A7_PI_8();
philpem@0	3999	uint res = dst - src;
philpem@0	4000
philpem@0	4001	FLAG_N = NFLAG_8(res);
philpem@0	4002	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	4003	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	4004	FLAG_C = CFLAG_8(res);
philpem@0	4005	}
philpem@0	4006
philpem@0	4007
philpem@0	4008	M68KMAKE_OP(cmpm, 8, ., .)
philpem@0	4009	{
philpem@0	4010	uint src = OPER_AY_PI_8();
philpem@0	4011	uint dst = OPER_AX_PI_8();
philpem@0	4012	uint res = dst - src;
philpem@0	4013
philpem@0	4014	FLAG_N = NFLAG_8(res);
philpem@0	4015	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	4016	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	4017	FLAG_C = CFLAG_8(res);
philpem@0	4018	}
philpem@0	4019
philpem@0	4020
philpem@0	4021	M68KMAKE_OP(cmpm, 16, ., .)
philpem@0	4022	{
philpem@0	4023	uint src = OPER_AY_PI_16();
philpem@0	4024	uint dst = OPER_AX_PI_16();
philpem@0	4025	uint res = dst - src;
philpem@0	4026
philpem@0	4027	FLAG_N = NFLAG_16(res);
philpem@0	4028	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	4029	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	4030	FLAG_C = CFLAG_16(res);
philpem@0	4031	}
philpem@0	4032
philpem@0	4033
philpem@0	4034	M68KMAKE_OP(cmpm, 32, ., .)
philpem@0	4035	{
philpem@0	4036	uint src = OPER_AY_PI_32();
philpem@0	4037	uint dst = OPER_AX_PI_32();
philpem@0	4038	uint res = dst - src;
philpem@0	4039
philpem@0	4040	FLAG_N = NFLAG_32(res);
philpem@0	4041	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	4042	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	4043	FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	4044	}
philpem@0	4045
philpem@0	4046
philpem@0	4047	M68KMAKE_OP(cpbcc, 32, ., .)
philpem@0	4048	{
philpem@0	4049	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4050	{
philpem@0	4051	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	4052	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	4053	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	4054	return;
philpem@0	4055	}
philpem@0	4056	m68ki_exception_1111();
philpem@0	4057	}
philpem@0	4058
philpem@0	4059
philpem@0	4060	M68KMAKE_OP(cpdbcc, 32, ., .)
philpem@0	4061	{
philpem@0	4062	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4063	{
philpem@0	4064	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	4065	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	4066	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	4067	return;
philpem@0	4068	}
philpem@0	4069	m68ki_exception_1111();
philpem@0	4070	}
philpem@0	4071
philpem@0	4072
philpem@0	4073	M68KMAKE_OP(cpgen, 32, ., .)
philpem@0	4074	{
philpem@0	4075	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4076	{
philpem@0	4077	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	4078	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	4079	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	4080	return;
philpem@0	4081	}
philpem@0	4082	m68ki_exception_1111();
philpem@0	4083	}
philpem@0	4084
philpem@0	4085
philpem@0	4086	M68KMAKE_OP(cpscc, 32, ., .)
philpem@0	4087	{
philpem@0	4088	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4089	{
philpem@0	4090	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	4091	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	4092	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	4093	return;
philpem@0	4094	}
philpem@0	4095	m68ki_exception_1111();
philpem@0	4096	}
philpem@0	4097
philpem@0	4098
philpem@0	4099	M68KMAKE_OP(cptrapcc, 32, ., .)
philpem@0	4100	{
philpem@0	4101	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4102	{
philpem@0	4103	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	4104	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	4105	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	4106	return;
philpem@0	4107	}
philpem@0	4108	m68ki_exception_1111();
philpem@0	4109	}
philpem@0	4110
philpem@0	4111
philpem@0	4112	M68KMAKE_OP(dbt, 16, ., .)
philpem@0	4113	{
philpem@0	4114	REG_PC += 2;
philpem@0	4115	}
philpem@0	4116
philpem@0	4117
philpem@0	4118	M68KMAKE_OP(dbf, 16, ., .)
philpem@0	4119	{
philpem@0	4120	uint* r_dst = &DY;
philpem@0	4121	uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
philpem@0	4122
philpem@0	4123	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	4124	if(res != 0xffff)
philpem@0	4125	{
philpem@0	4126	uint offset = OPER_I_16();
philpem@0	4127	REG_PC -= 2;
philpem@0	4128	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	4129	m68ki_branch_16(offset);
philpem@0	4130	return;
philpem@0	4131	}
philpem@0	4132	REG_PC += 2;
philpem@0	4133	}
philpem@0	4134
philpem@0	4135
philpem@0	4136	M68KMAKE_OP(dbcc, 16, ., .)
philpem@0	4137	{
philpem@0	4138	if(M68KMAKE_NOT_CC)
philpem@0	4139	{
philpem@0	4140	uint* r_dst = &DY;
philpem@0	4141	uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
philpem@0	4142
philpem@0	4143	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	4144	if(res != 0xffff)
philpem@0	4145	{
philpem@0	4146	uint offset = OPER_I_16();
philpem@0	4147	REG_PC -= 2;
philpem@0	4148	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	4149	m68ki_branch_16(offset);
philpem@0	4150	USE_CYCLES(CYC_DBCC_F_NOEXP);
philpem@0	4151	return;
philpem@0	4152	}
philpem@0	4153	REG_PC += 2;
philpem@0	4154	USE_CYCLES(CYC_DBCC_F_EXP);
philpem@0	4155	return;
philpem@0	4156	}
philpem@0	4157	REG_PC += 2;
philpem@0	4158	}
philpem@0	4159
philpem@0	4160
philpem@0	4161	M68KMAKE_OP(divs, 16, ., d)
philpem@0	4162	{
philpem@0	4163	uint* r_dst = &DX;
philpem@0	4164	sint src = MAKE_INT_16(DY);
philpem@0	4165	sint quotient;
philpem@0	4166	sint remainder;
philpem@0	4167
philpem@0	4168	if(src != 0)
philpem@0	4169	{
philpem@0	4170	if((uint32)*r_dst == 0x80000000 && src == -1)
philpem@0	4171	{
philpem@0	4172	FLAG_Z = 0;
philpem@0	4173	FLAG_N = NFLAG_CLEAR;
philpem@0	4174	FLAG_V = VFLAG_CLEAR;
philpem@0	4175	FLAG_C = CFLAG_CLEAR;
philpem@0	4176	*r_dst = 0;
philpem@0	4177	return;
philpem@0	4178	}
philpem@0	4179
philpem@0	4180	quotient = MAKE_INT_32(*r_dst) / src;
philpem@0	4181	remainder = MAKE_INT_32(*r_dst) % src;
philpem@0	4182
philpem@0	4183	if(quotient == MAKE_INT_16(quotient))
philpem@0	4184	{
philpem@0	4185	FLAG_Z = quotient;
philpem@0	4186	FLAG_N = NFLAG_16(quotient);
philpem@0	4187	FLAG_V = VFLAG_CLEAR;
philpem@0	4188	FLAG_C = CFLAG_CLEAR;
philpem@0	4189	*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
philpem@0	4190	return;
philpem@0	4191	}
philpem@0	4192	FLAG_V = VFLAG_SET;
philpem@0	4193	return;
philpem@0	4194	}
philpem@0	4195	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4196	}
philpem@0	4197
philpem@0	4198
philpem@0	4199	M68KMAKE_OP(divs, 16, ., .)
philpem@0	4200	{
philpem@0	4201	uint* r_dst = &DX;
philpem@0	4202	sint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
philpem@0	4203	sint quotient;
philpem@0	4204	sint remainder;
philpem@0	4205
philpem@0	4206	if(src != 0)
philpem@0	4207	{
philpem@0	4208	if((uint32)*r_dst == 0x80000000 && src == -1)
philpem@0	4209	{
philpem@0	4210	FLAG_Z = 0;
philpem@0	4211	FLAG_N = NFLAG_CLEAR;
philpem@0	4212	FLAG_V = VFLAG_CLEAR;
philpem@0	4213	FLAG_C = CFLAG_CLEAR;
philpem@0	4214	*r_dst = 0;
philpem@0	4215	return;
philpem@0	4216	}
philpem@0	4217
philpem@0	4218	quotient = MAKE_INT_32(*r_dst) / src;
philpem@0	4219	remainder = MAKE_INT_32(*r_dst) % src;
philpem@0	4220
philpem@0	4221	if(quotient == MAKE_INT_16(quotient))
philpem@0	4222	{
philpem@0	4223	FLAG_Z = quotient;
philpem@0	4224	FLAG_N = NFLAG_16(quotient);
philpem@0	4225	FLAG_V = VFLAG_CLEAR;
philpem@0	4226	FLAG_C = CFLAG_CLEAR;
philpem@0	4227	*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
philpem@0	4228	return;
philpem@0	4229	}
philpem@0	4230	FLAG_V = VFLAG_SET;
philpem@0	4231	return;
philpem@0	4232	}
philpem@0	4233	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4234	}
philpem@0	4235
philpem@0	4236
philpem@0	4237	M68KMAKE_OP(divu, 16, ., d)
philpem@0	4238	{
philpem@0	4239	uint* r_dst = &DX;
philpem@0	4240	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	4241
philpem@0	4242	if(src != 0)
philpem@0	4243	{
philpem@0	4244	uint quotient = *r_dst / src;
philpem@0	4245	uint remainder = *r_dst % src;
philpem@0	4246
philpem@0	4247	if(quotient < 0x10000)
philpem@0	4248	{
philpem@0	4249	FLAG_Z = quotient;
philpem@0	4250	FLAG_N = NFLAG_16(quotient);
philpem@0	4251	FLAG_V = VFLAG_CLEAR;
philpem@0	4252	FLAG_C = CFLAG_CLEAR;
philpem@0	4253	*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
philpem@0	4254	return;
philpem@0	4255	}
philpem@0	4256	FLAG_V = VFLAG_SET;
philpem@0	4257	return;
philpem@0	4258	}
philpem@0	4259	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4260	}
philpem@0	4261
philpem@0	4262
philpem@0	4263	M68KMAKE_OP(divu, 16, ., .)
philpem@0	4264	{
philpem@0	4265	uint* r_dst = &DX;
philpem@0	4266	uint src = M68KMAKE_GET_OPER_AY_16;
philpem@0	4267
philpem@0	4268	if(src != 0)
philpem@0	4269	{
philpem@0	4270	uint quotient = *r_dst / src;
philpem@0	4271	uint remainder = *r_dst % src;
philpem@0	4272
philpem@0	4273	if(quotient < 0x10000)
philpem@0	4274	{
philpem@0	4275	FLAG_Z = quotient;
philpem@0	4276	FLAG_N = NFLAG_16(quotient);
philpem@0	4277	FLAG_V = VFLAG_CLEAR;
philpem@0	4278	FLAG_C = CFLAG_CLEAR;
philpem@0	4279	*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
philpem@0	4280	return;
philpem@0	4281	}
philpem@0	4282	FLAG_V = VFLAG_SET;
philpem@0	4283	return;
philpem@0	4284	}
philpem@0	4285	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4286	}
philpem@0	4287
philpem@0	4288
philpem@0	4289	M68KMAKE_OP(divl, 32, ., d)
philpem@0	4290	{
philpem@0	4291	#if M68K_USE_64_BIT
philpem@0	4292
philpem@0	4293	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4294	{
philpem@0	4295	uint word2 = OPER_I_16();
philpem@0	4296	uint64 divisor = DY;
philpem@0	4297	uint64 dividend = 0;
philpem@0	4298	uint64 quotient = 0;
philpem@0	4299	uint64 remainder = 0;
philpem@0	4300
philpem@0	4301	if(divisor != 0)
philpem@0	4302	{
philpem@0	4303	if(BIT_A(word2)) /* 64 bit */
philpem@0	4304	{
philpem@0	4305	dividend = REG_D[word2 & 7];
philpem@0	4306	dividend <<= 32;
philpem@0	4307	dividend |= REG_D[(word2 >> 12) & 7];
philpem@0	4308
philpem@0	4309	if(BIT_B(word2)) /* signed */
philpem@0	4310	{
philpem@0	4311	quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
philpem@0	4312	remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
philpem@0	4313	if((sint64)quotient != (sint64)((sint32)quotient))
philpem@0	4314	{
philpem@0	4315	FLAG_V = VFLAG_SET;
philpem@0	4316	return;
philpem@0	4317	}
philpem@0	4318	}
philpem@0	4319	else /* unsigned */
philpem@0	4320	{
philpem@0	4321	quotient = dividend / divisor;
philpem@0	4322	if(quotient > 0xffffffff)
philpem@0	4323	{
philpem@0	4324	FLAG_V = VFLAG_SET;
philpem@0	4325	return;
philpem@0	4326	}
philpem@0	4327	remainder = dividend % divisor;
philpem@0	4328	}
philpem@0	4329	}
philpem@0	4330	else /* 32 bit */
philpem@0	4331	{
philpem@0	4332	dividend = REG_D[(word2 >> 12) & 7];
philpem@0	4333	if(BIT_B(word2)) /* signed */
philpem@0	4334	{
philpem@0	4335	quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
philpem@0	4336	remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
philpem@0	4337	}
philpem@0	4338	else /* unsigned */
philpem@0	4339	{
philpem@0	4340	quotient = dividend / divisor;
philpem@0	4341	remainder = dividend % divisor;
philpem@0	4342	}
philpem@0	4343	}
philpem@0	4344
philpem@0	4345	REG_D[word2 & 7] = remainder;
philpem@0	4346	REG_D[(word2 >> 12) & 7] = quotient;
philpem@0	4347
philpem@0	4348	FLAG_N = NFLAG_32(quotient);
philpem@0	4349	FLAG_Z = quotient;
philpem@0	4350	FLAG_V = VFLAG_CLEAR;
philpem@0	4351	FLAG_C = CFLAG_CLEAR;
philpem@0	4352	return;
philpem@0	4353	}
philpem@0	4354	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4355	return;
philpem@0	4356	}
philpem@0	4357	m68ki_exception_illegal();
philpem@0	4358
philpem@0	4359	#else
philpem@0	4360
philpem@0	4361	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4362	{
philpem@0	4363	uint word2 = OPER_I_16();
philpem@0	4364	uint divisor = DY;
philpem@0	4365	uint dividend_hi = REG_D[word2 & 7];
philpem@0	4366	uint dividend_lo = REG_D[(word2 >> 12) & 7];
philpem@0	4367	uint quotient = 0;
philpem@0	4368	uint remainder = 0;
philpem@0	4369	uint dividend_neg = 0;
philpem@0	4370	uint divisor_neg = 0;
philpem@0	4371	sint i;
philpem@0	4372	uint overflow;
philpem@0	4373
philpem@0	4374	if(divisor != 0)
philpem@0	4375	{
philpem@0	4376	/* quad / long : long quotient, long remainder */
philpem@0	4377	if(BIT_A(word2))
philpem@0	4378	{
philpem@0	4379	if(BIT_B(word2)) /* signed */
philpem@0	4380	{
philpem@0	4381	/* special case in signed divide */
philpem@0	4382	if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
philpem@0	4383	{
philpem@0	4384	REG_D[word2 & 7] = 0;
philpem@0	4385	REG_D[(word2 >> 12) & 7] = 0x80000000;
philpem@0	4386
philpem@0	4387	FLAG_N = NFLAG_SET;
philpem@0	4388	FLAG_Z = ZFLAG_CLEAR;
philpem@0	4389	FLAG_V = VFLAG_CLEAR;
philpem@0	4390	FLAG_C = CFLAG_CLEAR;
philpem@0	4391	return;
philpem@0	4392	}
philpem@0	4393	if(GET_MSB_32(dividend_hi))
philpem@0	4394	{
philpem@0	4395	dividend_neg = 1;
philpem@0	4396	dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
philpem@0	4397	dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
philpem@0	4398	}
philpem@0	4399	if(GET_MSB_32(divisor))
philpem@0	4400	{
philpem@0	4401	divisor_neg = 1;
philpem@0	4402	divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
philpem@0	4403
philpem@0	4404	}
philpem@0	4405	}
philpem@0	4406
philpem@0	4407	/* if the upper long is greater than the divisor, we're overflowing. */
philpem@0	4408	if(dividend_hi >= divisor)
philpem@0	4409	{
philpem@0	4410	FLAG_V = VFLAG_SET;
philpem@0	4411	return;
philpem@0	4412	}
philpem@0	4413
philpem@0	4414	for(i = 31; i >= 0; i--)
philpem@0	4415	{
philpem@0	4416	quotient <<= 1;
philpem@0	4417	remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
philpem@0	4418	if(remainder >= divisor)
philpem@0	4419	{
philpem@0	4420	remainder -= divisor;
philpem@0	4421	quotient++;
philpem@0	4422	}
philpem@0	4423	}
philpem@0	4424	for(i = 31; i >= 0; i--)
philpem@0	4425	{
philpem@0	4426	quotient <<= 1;
philpem@0	4427	overflow = GET_MSB_32(remainder);
philpem@0	4428	remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
philpem@0	4429	if(remainder >= divisor || overflow)
philpem@0	4430	{
philpem@0	4431	remainder -= divisor;
philpem@0	4432	quotient++;
philpem@0	4433	}
philpem@0	4434	}
philpem@0	4435
philpem@0	4436	if(BIT_B(word2)) /* signed */
philpem@0	4437	{
philpem@0	4438	if(quotient > 0x7fffffff)
philpem@0	4439	{
philpem@0	4440	FLAG_V = VFLAG_SET;
philpem@0	4441	return;
philpem@0	4442	}
philpem@0	4443	if(dividend_neg)
philpem@0	4444	{
philpem@0	4445	remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
philpem@0	4446	quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
philpem@0	4447	}
philpem@0	4448	if(divisor_neg)
philpem@0	4449	quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
philpem@0	4450	}
philpem@0	4451
philpem@0	4452	REG_D[word2 & 7] = remainder;
philpem@0	4453	REG_D[(word2 >> 12) & 7] = quotient;
philpem@0	4454
philpem@0	4455	FLAG_N = NFLAG_32(quotient);
philpem@0	4456	FLAG_Z = quotient;
philpem@0	4457	FLAG_V = VFLAG_CLEAR;
philpem@0	4458	FLAG_C = CFLAG_CLEAR;
philpem@0	4459	return;
philpem@0	4460	}
philpem@0	4461
philpem@0	4462	/* long / long: long quotient, maybe long remainder */
philpem@0	4463	if(BIT_B(word2)) /* signed */
philpem@0	4464	{
philpem@0	4465	/* Special case in divide */
philpem@0	4466	if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
philpem@0	4467	{
philpem@0	4468	FLAG_N = NFLAG_SET;
philpem@0	4469	FLAG_Z = ZFLAG_CLEAR;
philpem@0	4470	FLAG_V = VFLAG_CLEAR;
philpem@0	4471	FLAG_C = CFLAG_CLEAR;
philpem@0	4472	REG_D[(word2 >> 12) & 7] = 0x80000000;
philpem@0	4473	REG_D[word2 & 7] = 0;
philpem@0	4474	return;
philpem@0	4475	}
philpem@0	4476	REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
philpem@0	4477	quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
philpem@0	4478	}
philpem@0	4479	else
philpem@0	4480	{
philpem@0	4481	REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
philpem@0	4482	quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
philpem@0	4483	}
philpem@0	4484
philpem@0	4485	FLAG_N = NFLAG_32(quotient);
philpem@0	4486	FLAG_Z = quotient;
philpem@0	4487	FLAG_V = VFLAG_CLEAR;
philpem@0	4488	FLAG_C = CFLAG_CLEAR;
philpem@0	4489	return;
philpem@0	4490	}
philpem@0	4491	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4492	return;
philpem@0	4493	}
philpem@0	4494	m68ki_exception_illegal();
philpem@0	4495
philpem@0	4496	#endif
philpem@0	4497	}
philpem@0	4498
philpem@0	4499
philpem@0	4500	M68KMAKE_OP(divl, 32, ., .)
philpem@0	4501	{
philpem@0	4502	#if M68K_USE_64_BIT
philpem@0	4503
philpem@0	4504	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4505	{
philpem@0	4506	uint word2 = OPER_I_16();
philpem@0	4507	uint64 divisor = M68KMAKE_GET_OPER_AY_32;
philpem@0	4508	uint64 dividend = 0;
philpem@0	4509	uint64 quotient = 0;
philpem@0	4510	uint64 remainder = 0;
philpem@0	4511
philpem@0	4512	if(divisor != 0)
philpem@0	4513	{
philpem@0	4514	if(BIT_A(word2)) /* 64 bit */
philpem@0	4515	{
philpem@0	4516	dividend = REG_D[word2 & 7];
philpem@0	4517	dividend <<= 32;
philpem@0	4518	dividend |= REG_D[(word2 >> 12) & 7];
philpem@0	4519
philpem@0	4520	if(BIT_B(word2)) /* signed */
philpem@0	4521	{
philpem@0	4522	quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
philpem@0	4523	remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
philpem@0	4524	if((sint64)quotient != (sint64)((sint32)quotient))
philpem@0	4525	{
philpem@0	4526	FLAG_V = VFLAG_SET;
philpem@0	4527	return;
philpem@0	4528	}
philpem@0	4529	}
philpem@0	4530	else /* unsigned */
philpem@0	4531	{
philpem@0	4532	quotient = dividend / divisor;
philpem@0	4533	if(quotient > 0xffffffff)
philpem@0	4534	{
philpem@0	4535	FLAG_V = VFLAG_SET;
philpem@0	4536	return;
philpem@0	4537	}
philpem@0	4538	remainder = dividend % divisor;
philpem@0	4539	}
philpem@0	4540	}
philpem@0	4541	else /* 32 bit */
philpem@0	4542	{
philpem@0	4543	dividend = REG_D[(word2 >> 12) & 7];
philpem@0	4544	if(BIT_B(word2)) /* signed */
philpem@0	4545	{
philpem@0	4546	quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
philpem@0	4547	remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
philpem@0	4548	}
philpem@0	4549	else /* unsigned */
philpem@0	4550	{
philpem@0	4551	quotient = dividend / divisor;
philpem@0	4552	remainder = dividend % divisor;
philpem@0	4553	}
philpem@0	4554	}
philpem@0	4555
philpem@0	4556	REG_D[word2 & 7] = remainder;
philpem@0	4557	REG_D[(word2 >> 12) & 7] = quotient;
philpem@0	4558
philpem@0	4559	FLAG_N = NFLAG_32(quotient);
philpem@0	4560	FLAG_Z = quotient;
philpem@0	4561	FLAG_V = VFLAG_CLEAR;
philpem@0	4562	FLAG_C = CFLAG_CLEAR;
philpem@0	4563	return;
philpem@0	4564	}
philpem@0	4565	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4566	return;
philpem@0	4567	}
philpem@0	4568	m68ki_exception_illegal();
philpem@0	4569
philpem@0	4570	#else
philpem@0	4571
philpem@0	4572	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4573	{
philpem@0	4574	uint word2 = OPER_I_16();
philpem@0	4575	uint divisor = M68KMAKE_GET_OPER_AY_32;
philpem@0	4576	uint dividend_hi = REG_D[word2 & 7];
philpem@0	4577	uint dividend_lo = REG_D[(word2 >> 12) & 7];
philpem@0	4578	uint quotient = 0;
philpem@0	4579	uint remainder = 0;
philpem@0	4580	uint dividend_neg = 0;
philpem@0	4581	uint divisor_neg = 0;
philpem@0	4582	sint i;
philpem@0	4583	uint overflow;
philpem@0	4584
philpem@0	4585	if(divisor != 0)
philpem@0	4586	{
philpem@0	4587	/* quad / long : long quotient, long remainder */
philpem@0	4588	if(BIT_A(word2))
philpem@0	4589	{
philpem@0	4590	if(BIT_B(word2)) /* signed */
philpem@0	4591	{
philpem@0	4592	/* special case in signed divide */
philpem@0	4593	if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
philpem@0	4594	{
philpem@0	4595	REG_D[word2 & 7] = 0;
philpem@0	4596	REG_D[(word2 >> 12) & 7] = 0x80000000;
philpem@0	4597
philpem@0	4598	FLAG_N = NFLAG_SET;
philpem@0	4599	FLAG_Z = ZFLAG_CLEAR;
philpem@0	4600	FLAG_V = VFLAG_CLEAR;
philpem@0	4601	FLAG_C = CFLAG_CLEAR;
philpem@0	4602	return;
philpem@0	4603	}
philpem@0	4604	if(GET_MSB_32(dividend_hi))
philpem@0	4605	{
philpem@0	4606	dividend_neg = 1;
philpem@0	4607	dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
philpem@0	4608	dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
philpem@0	4609	}
philpem@0	4610	if(GET_MSB_32(divisor))
philpem@0	4611	{
philpem@0	4612	divisor_neg = 1;
philpem@0	4613	divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
philpem@0	4614
philpem@0	4615	}
philpem@0	4616	}
philpem@0	4617
philpem@0	4618	/* if the upper long is greater than the divisor, we're overflowing. */
philpem@0	4619	if(dividend_hi >= divisor)
philpem@0	4620	{
philpem@0	4621	FLAG_V = VFLAG_SET;
philpem@0	4622	return;
philpem@0	4623	}
philpem@0	4624
philpem@0	4625	for(i = 31; i >= 0; i--)
philpem@0	4626	{
philpem@0	4627	quotient <<= 1;
philpem@0	4628	remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
philpem@0	4629	if(remainder >= divisor)
philpem@0	4630	{
philpem@0	4631	remainder -= divisor;
philpem@0	4632	quotient++;
philpem@0	4633	}
philpem@0	4634	}
philpem@0	4635	for(i = 31; i >= 0; i--)
philpem@0	4636	{
philpem@0	4637	quotient <<= 1;
philpem@0	4638	overflow = GET_MSB_32(remainder);
philpem@0	4639	remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
philpem@0	4640	if(remainder >= divisor || overflow)
philpem@0	4641	{
philpem@0	4642	remainder -= divisor;
philpem@0	4643	quotient++;
philpem@0	4644	}
philpem@0	4645	}
philpem@0	4646
philpem@0	4647	if(BIT_B(word2)) /* signed */
philpem@0	4648	{
philpem@0	4649	if(quotient > 0x7fffffff)
philpem@0	4650	{
philpem@0	4651	FLAG_V = VFLAG_SET;
philpem@0	4652	return;
philpem@0	4653	}
philpem@0	4654	if(dividend_neg)
philpem@0	4655	{
philpem@0	4656	remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
philpem@0	4657	quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
philpem@0	4658	}
philpem@0	4659	if(divisor_neg)
philpem@0	4660	quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
philpem@0	4661	}
philpem@0	4662
philpem@0	4663	REG_D[word2 & 7] = remainder;
philpem@0	4664	REG_D[(word2 >> 12) & 7] = quotient;
philpem@0	4665
philpem@0	4666	FLAG_N = NFLAG_32(quotient);
philpem@0	4667	FLAG_Z = quotient;
philpem@0	4668	FLAG_V = VFLAG_CLEAR;
philpem@0	4669	FLAG_C = CFLAG_CLEAR;
philpem@0	4670	return;
philpem@0	4671	}
philpem@0	4672
philpem@0	4673	/* long / long: long quotient, maybe long remainder */
philpem@0	4674	if(BIT_B(word2)) /* signed */
philpem@0	4675	{
philpem@0	4676	/* Special case in divide */
philpem@0	4677	if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
philpem@0	4678	{
philpem@0	4679	FLAG_N = NFLAG_SET;
philpem@0	4680	FLAG_Z = ZFLAG_CLEAR;
philpem@0	4681	FLAG_V = VFLAG_CLEAR;
philpem@0	4682	FLAG_C = CFLAG_CLEAR;
philpem@0	4683	REG_D[(word2 >> 12) & 7] = 0x80000000;
philpem@0	4684	REG_D[word2 & 7] = 0;
philpem@0	4685	return;
philpem@0	4686	}
philpem@0	4687	REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
philpem@0	4688	quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
philpem@0	4689	}
philpem@0	4690	else
philpem@0	4691	{
philpem@0	4692	REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
philpem@0	4693	quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
philpem@0	4694	}
philpem@0	4695
philpem@0	4696	FLAG_N = NFLAG_32(quotient);
philpem@0	4697	FLAG_Z = quotient;
philpem@0	4698	FLAG_V = VFLAG_CLEAR;
philpem@0	4699	FLAG_C = CFLAG_CLEAR;
philpem@0	4700	return;
philpem@0	4701	}
philpem@0	4702	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
philpem@0	4703	return;
philpem@0	4704	}
philpem@0	4705	m68ki_exception_illegal();
philpem@0	4706
philpem@0	4707	#endif
philpem@0	4708	}
philpem@0	4709
philpem@0	4710
philpem@0	4711	M68KMAKE_OP(eor, 8, ., d)
philpem@0	4712	{
philpem@0	4713	uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));
philpem@0	4714
philpem@0	4715	FLAG_N = NFLAG_8(res);
philpem@0	4716	FLAG_Z = res;
philpem@0	4717	FLAG_C = CFLAG_CLEAR;
philpem@0	4718	FLAG_V = VFLAG_CLEAR;
philpem@0	4719	}
philpem@0	4720
philpem@0	4721
philpem@0	4722	M68KMAKE_OP(eor, 8, ., .)
philpem@0	4723	{
philpem@0	4724	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	4725	uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
philpem@0	4726
philpem@0	4727	m68ki_write_8(ea, res);
philpem@0	4728
philpem@0	4729	FLAG_N = NFLAG_8(res);
philpem@0	4730	FLAG_Z = res;
philpem@0	4731	FLAG_C = CFLAG_CLEAR;
philpem@0	4732	FLAG_V = VFLAG_CLEAR;
philpem@0	4733	}
philpem@0	4734
philpem@0	4735
philpem@0	4736	M68KMAKE_OP(eor, 16, ., d)
philpem@0	4737	{
philpem@0	4738	uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));
philpem@0	4739
philpem@0	4740	FLAG_N = NFLAG_16(res);
philpem@0	4741	FLAG_Z = res;
philpem@0	4742	FLAG_C = CFLAG_CLEAR;
philpem@0	4743	FLAG_V = VFLAG_CLEAR;
philpem@0	4744	}
philpem@0	4745
philpem@0	4746
philpem@0	4747	M68KMAKE_OP(eor, 16, ., .)
philpem@0	4748	{
philpem@0	4749	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	4750	uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
philpem@0	4751
philpem@0	4752	m68ki_write_16(ea, res);
philpem@0	4753
philpem@0	4754	FLAG_N = NFLAG_16(res);
philpem@0	4755	FLAG_Z = res;
philpem@0	4756	FLAG_C = CFLAG_CLEAR;
philpem@0	4757	FLAG_V = VFLAG_CLEAR;
philpem@0	4758	}
philpem@0	4759
philpem@0	4760
philpem@0	4761	M68KMAKE_OP(eor, 32, ., d)
philpem@0	4762	{
philpem@0	4763	uint res = DY ^= DX;
philpem@0	4764
philpem@0	4765	FLAG_N = NFLAG_32(res);
philpem@0	4766	FLAG_Z = res;
philpem@0	4767	FLAG_C = CFLAG_CLEAR;
philpem@0	4768	FLAG_V = VFLAG_CLEAR;
philpem@0	4769	}
philpem@0	4770
philpem@0	4771
philpem@0	4772	M68KMAKE_OP(eor, 32, ., .)
philpem@0	4773	{
philpem@0	4774	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	4775	uint res = DX ^ m68ki_read_32(ea);
philpem@0	4776
philpem@0	4777	m68ki_write_32(ea, res);
philpem@0	4778
philpem@0	4779	FLAG_N = NFLAG_32(res);
philpem@0	4780	FLAG_Z = res;
philpem@0	4781	FLAG_C = CFLAG_CLEAR;
philpem@0	4782	FLAG_V = VFLAG_CLEAR;
philpem@0	4783	}
philpem@0	4784
philpem@0	4785
philpem@0	4786	M68KMAKE_OP(eori, 8, ., d)
philpem@0	4787	{
philpem@0	4788	uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
philpem@0	4789
philpem@0	4790	FLAG_N = NFLAG_8(res);
philpem@0	4791	FLAG_Z = res;
philpem@0	4792	FLAG_C = CFLAG_CLEAR;
philpem@0	4793	FLAG_V = VFLAG_CLEAR;
philpem@0	4794	}
philpem@0	4795
philpem@0	4796
philpem@0	4797	M68KMAKE_OP(eori, 8, ., .)
philpem@0	4798	{
philpem@0	4799	uint src = OPER_I_8();
philpem@0	4800	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	4801	uint res = src ^ m68ki_read_8(ea);
philpem@0	4802
philpem@0	4803	m68ki_write_8(ea, res);
philpem@0	4804
philpem@0	4805	FLAG_N = NFLAG_8(res);
philpem@0	4806	FLAG_Z = res;
philpem@0	4807	FLAG_C = CFLAG_CLEAR;
philpem@0	4808	FLAG_V = VFLAG_CLEAR;
philpem@0	4809	}
philpem@0	4810
philpem@0	4811
philpem@0	4812	M68KMAKE_OP(eori, 16, ., d)
philpem@0	4813	{
philpem@0	4814	uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
philpem@0	4815
philpem@0	4816	FLAG_N = NFLAG_16(res);
philpem@0	4817	FLAG_Z = res;
philpem@0	4818	FLAG_C = CFLAG_CLEAR;
philpem@0	4819	FLAG_V = VFLAG_CLEAR;
philpem@0	4820	}
philpem@0	4821
philpem@0	4822
philpem@0	4823	M68KMAKE_OP(eori, 16, ., .)
philpem@0	4824	{
philpem@0	4825	uint src = OPER_I_16();
philpem@0	4826	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	4827	uint res = src ^ m68ki_read_16(ea);
philpem@0	4828
philpem@0	4829	m68ki_write_16(ea, res);
philpem@0	4830
philpem@0	4831	FLAG_N = NFLAG_16(res);
philpem@0	4832	FLAG_Z = res;
philpem@0	4833	FLAG_C = CFLAG_CLEAR;
philpem@0	4834	FLAG_V = VFLAG_CLEAR;
philpem@0	4835	}
philpem@0	4836
philpem@0	4837
philpem@0	4838	M68KMAKE_OP(eori, 32, ., d)
philpem@0	4839	{
philpem@0	4840	uint res = DY ^= OPER_I_32();
philpem@0	4841
philpem@0	4842	FLAG_N = NFLAG_32(res);
philpem@0	4843	FLAG_Z = res;
philpem@0	4844	FLAG_C = CFLAG_CLEAR;
philpem@0	4845	FLAG_V = VFLAG_CLEAR;
philpem@0	4846	}
philpem@0	4847
philpem@0	4848
philpem@0	4849	M68KMAKE_OP(eori, 32, ., .)
philpem@0	4850	{
philpem@0	4851	uint src = OPER_I_32();
philpem@0	4852	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	4853	uint res = src ^ m68ki_read_32(ea);
philpem@0	4854
philpem@0	4855	m68ki_write_32(ea, res);
philpem@0	4856
philpem@0	4857	FLAG_N = NFLAG_32(res);
philpem@0	4858	FLAG_Z = res;
philpem@0	4859	FLAG_C = CFLAG_CLEAR;
philpem@0	4860	FLAG_V = VFLAG_CLEAR;
philpem@0	4861	}
philpem@0	4862
philpem@0	4863
philpem@0	4864	M68KMAKE_OP(eori, 16, toc, .)
philpem@0	4865	{
philpem@0	4866	m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
philpem@0	4867	}
philpem@0	4868
philpem@0	4869
philpem@0	4870	M68KMAKE_OP(eori, 16, tos, .)
philpem@0	4871	{
philpem@0	4872	if(FLAG_S)
philpem@0	4873	{
philpem@0	4874	uint src = OPER_I_16();
philpem@0	4875	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	4876	m68ki_set_sr(m68ki_get_sr() ^ src);
philpem@0	4877	return;
philpem@0	4878	}
philpem@0	4879	m68ki_exception_privilege_violation();
philpem@0	4880	}
philpem@0	4881
philpem@0	4882
philpem@0	4883	M68KMAKE_OP(exg, 32, dd, .)
philpem@0	4884	{
philpem@0	4885	uint* reg_a = &DX;
philpem@0	4886	uint* reg_b = &DY;
philpem@0	4887	uint tmp = *reg_a;
philpem@0	4888	*reg_a = *reg_b;
philpem@0	4889	*reg_b = tmp;
philpem@0	4890	}
philpem@0	4891
philpem@0	4892
philpem@0	4893	M68KMAKE_OP(exg, 32, aa, .)
philpem@0	4894	{
philpem@0	4895	uint* reg_a = &AX;
philpem@0	4896	uint* reg_b = &AY;
philpem@0	4897	uint tmp = *reg_a;
philpem@0	4898	*reg_a = *reg_b;
philpem@0	4899	*reg_b = tmp;
philpem@0	4900	}
philpem@0	4901
philpem@0	4902
philpem@0	4903	M68KMAKE_OP(exg, 32, da, .)
philpem@0	4904	{
philpem@0	4905	uint* reg_a = &DX;
philpem@0	4906	uint* reg_b = &AY;
philpem@0	4907	uint tmp = *reg_a;
philpem@0	4908	*reg_a = *reg_b;
philpem@0	4909	*reg_b = tmp;
philpem@0	4910	}
philpem@0	4911
philpem@0	4912
philpem@0	4913	M68KMAKE_OP(ext, 16, ., .)
philpem@0	4914	{
philpem@0	4915	uint* r_dst = &DY;
philpem@0	4916
philpem@0	4917	*r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
philpem@0	4918
philpem@0	4919	FLAG_N = NFLAG_16(*r_dst);
philpem@0	4920	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	4921	FLAG_V = VFLAG_CLEAR;
philpem@0	4922	FLAG_C = CFLAG_CLEAR;
philpem@0	4923	}
philpem@0	4924
philpem@0	4925
philpem@0	4926	M68KMAKE_OP(ext, 32, ., .)
philpem@0	4927	{
philpem@0	4928	uint* r_dst = &DY;
philpem@0	4929
philpem@0	4930	*r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
philpem@0	4931
philpem@0	4932	FLAG_N = NFLAG_32(*r_dst);
philpem@0	4933	FLAG_Z = *r_dst;
philpem@0	4934	FLAG_V = VFLAG_CLEAR;
philpem@0	4935	FLAG_C = CFLAG_CLEAR;
philpem@0	4936	}
philpem@0	4937
philpem@0	4938
philpem@0	4939	M68KMAKE_OP(extb, 32, ., .)
philpem@0	4940	{
philpem@0	4941	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	4942	{
philpem@0	4943	uint* r_dst = &DY;
philpem@0	4944
philpem@0	4945	*r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
philpem@0	4946
philpem@0	4947	FLAG_N = NFLAG_32(*r_dst);
philpem@0	4948	FLAG_Z = *r_dst;
philpem@0	4949	FLAG_V = VFLAG_CLEAR;
philpem@0	4950	FLAG_C = CFLAG_CLEAR;
philpem@0	4951	return;
philpem@0	4952	}
philpem@0	4953	m68ki_exception_illegal();
philpem@0	4954	}
philpem@0	4955
philpem@0	4956
philpem@0	4957	M68KMAKE_OP(illegal, 0, ., .)
philpem@0	4958	{
philpem@0	4959	m68ki_exception_illegal();
philpem@0	4960	}
philpem@0	4961
philpem@0	4962	M68KMAKE_OP(jmp, 32, ., .)
philpem@0	4963	{
philpem@0	4964	m68ki_jump(M68KMAKE_GET_EA_AY_32);
philpem@0	4965	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	4966	if(REG_PC == REG_PPC)
philpem@0	4967	USE_ALL_CYCLES();
philpem@0	4968	}
philpem@0	4969
philpem@0	4970
philpem@0	4971	M68KMAKE_OP(jsr, 32, ., .)
philpem@0	4972	{
philpem@0	4973	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	4974	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	4975	m68ki_push_32(REG_PC);
philpem@0	4976	m68ki_jump(ea);
philpem@0	4977	}
philpem@0	4978
philpem@0	4979
philpem@0	4980	M68KMAKE_OP(lea, 32, ., .)
philpem@0	4981	{
philpem@0	4982	AX = M68KMAKE_GET_EA_AY_32;
philpem@0	4983	}
philpem@0	4984
philpem@0	4985
philpem@0	4986	M68KMAKE_OP(link, 16, ., a7)
philpem@0	4987	{
philpem@0	4988	REG_A[7] -= 4;
philpem@0	4989	m68ki_write_32(REG_A[7], REG_A[7]);
philpem@0	4990	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
philpem@0	4991	}
philpem@0	4992
philpem@0	4993
philpem@0	4994	M68KMAKE_OP(link, 16, ., .)
philpem@0	4995	{
philpem@0	4996	uint* r_dst = &AY;
philpem@0	4997
philpem@0	4998	m68ki_push_32(*r_dst);
philpem@0	4999	*r_dst = REG_A[7];
philpem@0	5000	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
philpem@0	5001	}
philpem@0	5002
philpem@0	5003
philpem@0	5004	M68KMAKE_OP(link, 32, ., a7)
philpem@0	5005	{
philpem@0	5006	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	5007	{
philpem@0	5008	REG_A[7] -= 4;
philpem@0	5009	m68ki_write_32(REG_A[7], REG_A[7]);
philpem@0	5010	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
philpem@0	5011	return;
philpem@0	5012	}
philpem@0	5013	m68ki_exception_illegal();
philpem@0	5014	}
philpem@0	5015
philpem@0	5016
philpem@0	5017	M68KMAKE_OP(link, 32, ., .)
philpem@0	5018	{
philpem@0	5019	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	5020	{
philpem@0	5021	uint* r_dst = &AY;
philpem@0	5022
philpem@0	5023	m68ki_push_32(*r_dst);
philpem@0	5024	*r_dst = REG_A[7];
philpem@0	5025	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
philpem@0	5026	return;
philpem@0	5027	}
philpem@0	5028	m68ki_exception_illegal();
philpem@0	5029	}
philpem@0	5030
philpem@0	5031
philpem@0	5032	M68KMAKE_OP(lsr, 8, s, .)
philpem@0	5033	{
philpem@0	5034	uint* r_dst = &DY;
philpem@0	5035	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5036	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	5037	uint res = src >> shift;
philpem@0	5038
philpem@0	5039	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5040
philpem@0	5041	FLAG_N = NFLAG_CLEAR;
philpem@0	5042	FLAG_Z = res;
philpem@0	5043	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	5044	FLAG_V = VFLAG_CLEAR;
philpem@0	5045	}
philpem@0	5046
philpem@0	5047
philpem@0	5048	M68KMAKE_OP(lsr, 16, s, .)
philpem@0	5049	{
philpem@0	5050	uint* r_dst = &DY;
philpem@0	5051	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5052	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	5053	uint res = src >> shift;
philpem@0	5054
philpem@0	5055	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5056
philpem@0	5057	FLAG_N = NFLAG_CLEAR;
philpem@0	5058	FLAG_Z = res;
philpem@0	5059	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	5060	FLAG_V = VFLAG_CLEAR;
philpem@0	5061	}
philpem@0	5062
philpem@0	5063
philpem@0	5064	M68KMAKE_OP(lsr, 32, s, .)
philpem@0	5065	{
philpem@0	5066	uint* r_dst = &DY;
philpem@0	5067	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5068	uint src = *r_dst;
philpem@0	5069	uint res = src >> shift;
philpem@0	5070
philpem@0	5071	*r_dst = res;
philpem@0	5072
philpem@0	5073	FLAG_N = NFLAG_CLEAR;
philpem@0	5074	FLAG_Z = res;
philpem@0	5075	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	5076	FLAG_V = VFLAG_CLEAR;
philpem@0	5077	}
philpem@0	5078
philpem@0	5079
philpem@0	5080	M68KMAKE_OP(lsr, 8, r, .)
philpem@0	5081	{
philpem@0	5082	uint* r_dst = &DY;
philpem@0	5083	uint shift = DX & 0x3f;
philpem@0	5084	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	5085	uint res = src >> shift;
philpem@0	5086
philpem@0	5087	if(shift != 0)
philpem@0	5088	{
philpem@0	5089	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5090
philpem@0	5091	if(shift <= 8)
philpem@0	5092	{
philpem@0	5093	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5094	FLAG_X = FLAG_C = src << (9-shift);
philpem@0	5095	FLAG_N = NFLAG_CLEAR;
philpem@0	5096	FLAG_Z = res;
philpem@0	5097	FLAG_V = VFLAG_CLEAR;
philpem@0	5098	return;
philpem@0	5099	}
philpem@0	5100
philpem@0	5101	*r_dst &= 0xffffff00;
philpem@0	5102	FLAG_X = XFLAG_CLEAR;
philpem@0	5103	FLAG_C = CFLAG_CLEAR;
philpem@0	5104	FLAG_N = NFLAG_CLEAR;
philpem@0	5105	FLAG_Z = ZFLAG_SET;
philpem@0	5106	FLAG_V = VFLAG_CLEAR;
philpem@0	5107	return;
philpem@0	5108	}
philpem@0	5109
philpem@0	5110	FLAG_C = CFLAG_CLEAR;
philpem@0	5111	FLAG_N = NFLAG_8(src);
philpem@0	5112	FLAG_Z = src;
philpem@0	5113	FLAG_V = VFLAG_CLEAR;
philpem@0	5114	}
philpem@0	5115
philpem@0	5116
philpem@0	5117	M68KMAKE_OP(lsr, 16, r, .)
philpem@0	5118	{
philpem@0	5119	uint* r_dst = &DY;
philpem@0	5120	uint shift = DX & 0x3f;
philpem@0	5121	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	5122	uint res = src >> shift;
philpem@0	5123
philpem@0	5124	if(shift != 0)
philpem@0	5125	{
philpem@0	5126	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5127
philpem@0	5128	if(shift <= 16)
philpem@0	5129	{
philpem@0	5130	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5131	FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
philpem@0	5132	FLAG_N = NFLAG_CLEAR;
philpem@0	5133	FLAG_Z = res;
philpem@0	5134	FLAG_V = VFLAG_CLEAR;
philpem@0	5135	return;
philpem@0	5136	}
philpem@0	5137
philpem@0	5138	*r_dst &= 0xffff0000;
philpem@0	5139	FLAG_X = XFLAG_CLEAR;
philpem@0	5140	FLAG_C = CFLAG_CLEAR;
philpem@0	5141	FLAG_N = NFLAG_CLEAR;
philpem@0	5142	FLAG_Z = ZFLAG_SET;
philpem@0	5143	FLAG_V = VFLAG_CLEAR;
philpem@0	5144	return;
philpem@0	5145	}
philpem@0	5146
philpem@0	5147	FLAG_C = CFLAG_CLEAR;
philpem@0	5148	FLAG_N = NFLAG_16(src);
philpem@0	5149	FLAG_Z = src;
philpem@0	5150	FLAG_V = VFLAG_CLEAR;
philpem@0	5151	}
philpem@0	5152
philpem@0	5153
philpem@0	5154	M68KMAKE_OP(lsr, 32, r, .)
philpem@0	5155	{
philpem@0	5156	uint* r_dst = &DY;
philpem@0	5157	uint shift = DX & 0x3f;
philpem@0	5158	uint src = *r_dst;
philpem@0	5159	uint res = src >> shift;
philpem@0	5160
philpem@0	5161	if(shift != 0)
philpem@0	5162	{
philpem@0	5163	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5164
philpem@0	5165	if(shift < 32)
philpem@0	5166	{
philpem@0	5167	*r_dst = res;
philpem@0	5168	FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
philpem@0	5169	FLAG_N = NFLAG_CLEAR;
philpem@0	5170	FLAG_Z = res;
philpem@0	5171	FLAG_V = VFLAG_CLEAR;
philpem@0	5172	return;
philpem@0	5173	}
philpem@0	5174
philpem@0	5175	*r_dst = 0;
philpem@0	5176	FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
philpem@0	5177	FLAG_N = NFLAG_CLEAR;
philpem@0	5178	FLAG_Z = ZFLAG_SET;
philpem@0	5179	FLAG_V = VFLAG_CLEAR;
philpem@0	5180	return;
philpem@0	5181	}
philpem@0	5182
philpem@0	5183	FLAG_C = CFLAG_CLEAR;
philpem@0	5184	FLAG_N = NFLAG_32(src);
philpem@0	5185	FLAG_Z = src;
philpem@0	5186	FLAG_V = VFLAG_CLEAR;
philpem@0	5187	}
philpem@0	5188
philpem@0	5189
philpem@0	5190	M68KMAKE_OP(lsr, 16, ., .)
philpem@0	5191	{
philpem@0	5192	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	5193	uint src = m68ki_read_16(ea);
philpem@0	5194	uint res = src >> 1;
philpem@0	5195
philpem@0	5196	m68ki_write_16(ea, res);
philpem@0	5197
philpem@0	5198	FLAG_N = NFLAG_CLEAR;
philpem@0	5199	FLAG_Z = res;
philpem@0	5200	FLAG_C = FLAG_X = src << 8;
philpem@0	5201	FLAG_V = VFLAG_CLEAR;
philpem@0	5202	}
philpem@0	5203
philpem@0	5204
philpem@0	5205	M68KMAKE_OP(lsl, 8, s, .)
philpem@0	5206	{
philpem@0	5207	uint* r_dst = &DY;
philpem@0	5208	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5209	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	5210	uint res = MASK_OUT_ABOVE_8(src << shift);
philpem@0	5211
philpem@0	5212	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5213
philpem@0	5214	FLAG_N = NFLAG_8(res);
philpem@0	5215	FLAG_Z = res;
philpem@0	5216	FLAG_X = FLAG_C = src << shift;
philpem@0	5217	FLAG_V = VFLAG_CLEAR;
philpem@0	5218	}
philpem@0	5219
philpem@0	5220
philpem@0	5221	M68KMAKE_OP(lsl, 16, s, .)
philpem@0	5222	{
philpem@0	5223	uint* r_dst = &DY;
philpem@0	5224	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5225	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	5226	uint res = MASK_OUT_ABOVE_16(src << shift);
philpem@0	5227
philpem@0	5228	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5229
philpem@0	5230	FLAG_N = NFLAG_16(res);
philpem@0	5231	FLAG_Z = res;
philpem@0	5232	FLAG_X = FLAG_C = src >> (8-shift);
philpem@0	5233	FLAG_V = VFLAG_CLEAR;
philpem@0	5234	}
philpem@0	5235
philpem@0	5236
philpem@0	5237	M68KMAKE_OP(lsl, 32, s, .)
philpem@0	5238	{
philpem@0	5239	uint* r_dst = &DY;
philpem@0	5240	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	5241	uint src = *r_dst;
philpem@0	5242	uint res = MASK_OUT_ABOVE_32(src << shift);
philpem@0	5243
philpem@0	5244	*r_dst = res;
philpem@0	5245
philpem@0	5246	FLAG_N = NFLAG_32(res);
philpem@0	5247	FLAG_Z = res;
philpem@0	5248	FLAG_X = FLAG_C = src >> (24-shift);
philpem@0	5249	FLAG_V = VFLAG_CLEAR;
philpem@0	5250	}
philpem@0	5251
philpem@0	5252
philpem@0	5253	M68KMAKE_OP(lsl, 8, r, .)
philpem@0	5254	{
philpem@0	5255	uint* r_dst = &DY;
philpem@0	5256	uint shift = DX & 0x3f;
philpem@0	5257	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	5258	uint res = MASK_OUT_ABOVE_8(src << shift);
philpem@0	5259
philpem@0	5260	if(shift != 0)
philpem@0	5261	{
philpem@0	5262	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5263
philpem@0	5264	if(shift <= 8)
philpem@0	5265	{
philpem@0	5266	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5267	FLAG_X = FLAG_C = src << shift;
philpem@0	5268	FLAG_N = NFLAG_8(res);
philpem@0	5269	FLAG_Z = res;
philpem@0	5270	FLAG_V = VFLAG_CLEAR;
philpem@0	5271	return;
philpem@0	5272	}
philpem@0	5273
philpem@0	5274	*r_dst &= 0xffffff00;
philpem@0	5275	FLAG_X = XFLAG_CLEAR;
philpem@0	5276	FLAG_C = CFLAG_CLEAR;
philpem@0	5277	FLAG_N = NFLAG_CLEAR;
philpem@0	5278	FLAG_Z = ZFLAG_SET;
philpem@0	5279	FLAG_V = VFLAG_CLEAR;
philpem@0	5280	return;
philpem@0	5281	}
philpem@0	5282
philpem@0	5283	FLAG_C = CFLAG_CLEAR;
philpem@0	5284	FLAG_N = NFLAG_8(src);
philpem@0	5285	FLAG_Z = src;
philpem@0	5286	FLAG_V = VFLAG_CLEAR;
philpem@0	5287	}
philpem@0	5288
philpem@0	5289
philpem@0	5290	M68KMAKE_OP(lsl, 16, r, .)
philpem@0	5291	{
philpem@0	5292	uint* r_dst = &DY;
philpem@0	5293	uint shift = DX & 0x3f;
philpem@0	5294	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	5295	uint res = MASK_OUT_ABOVE_16(src << shift);
philpem@0	5296
philpem@0	5297	if(shift != 0)
philpem@0	5298	{
philpem@0	5299	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5300
philpem@0	5301	if(shift <= 16)
philpem@0	5302	{
philpem@0	5303	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5304	FLAG_X = FLAG_C = (src << shift) >> 8;
philpem@0	5305	FLAG_N = NFLAG_16(res);
philpem@0	5306	FLAG_Z = res;
philpem@0	5307	FLAG_V = VFLAG_CLEAR;
philpem@0	5308	return;
philpem@0	5309	}
philpem@0	5310
philpem@0	5311	*r_dst &= 0xffff0000;
philpem@0	5312	FLAG_X = XFLAG_CLEAR;
philpem@0	5313	FLAG_C = CFLAG_CLEAR;
philpem@0	5314	FLAG_N = NFLAG_CLEAR;
philpem@0	5315	FLAG_Z = ZFLAG_SET;
philpem@0	5316	FLAG_V = VFLAG_CLEAR;
philpem@0	5317	return;
philpem@0	5318	}
philpem@0	5319
philpem@0	5320	FLAG_C = CFLAG_CLEAR;
philpem@0	5321	FLAG_N = NFLAG_16(src);
philpem@0	5322	FLAG_Z = src;
philpem@0	5323	FLAG_V = VFLAG_CLEAR;
philpem@0	5324	}
philpem@0	5325
philpem@0	5326
philpem@0	5327	M68KMAKE_OP(lsl, 32, r, .)
philpem@0	5328	{
philpem@0	5329	uint* r_dst = &DY;
philpem@0	5330	uint shift = DX & 0x3f;
philpem@0	5331	uint src = *r_dst;
philpem@0	5332	uint res = MASK_OUT_ABOVE_32(src << shift);
philpem@0	5333
philpem@0	5334	if(shift != 0)
philpem@0	5335	{
philpem@0	5336	USE_CYCLES(shift<<CYC_SHIFT);
philpem@0	5337
philpem@0	5338	if(shift < 32)
philpem@0	5339	{
philpem@0	5340	*r_dst = res;
philpem@0	5341	FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
philpem@0	5342	FLAG_N = NFLAG_32(res);
philpem@0	5343	FLAG_Z = res;
philpem@0	5344	FLAG_V = VFLAG_CLEAR;
philpem@0	5345	return;
philpem@0	5346	}
philpem@0	5347
philpem@0	5348	*r_dst = 0;
philpem@0	5349	FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
philpem@0	5350	FLAG_N = NFLAG_CLEAR;
philpem@0	5351	FLAG_Z = ZFLAG_SET;
philpem@0	5352	FLAG_V = VFLAG_CLEAR;
philpem@0	5353	return;
philpem@0	5354	}
philpem@0	5355
philpem@0	5356	FLAG_C = CFLAG_CLEAR;
philpem@0	5357	FLAG_N = NFLAG_32(src);
philpem@0	5358	FLAG_Z = src;
philpem@0	5359	FLAG_V = VFLAG_CLEAR;
philpem@0	5360	}
philpem@0	5361
philpem@0	5362
philpem@0	5363	M68KMAKE_OP(lsl, 16, ., .)
philpem@0	5364	{
philpem@0	5365	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	5366	uint src = m68ki_read_16(ea);
philpem@0	5367	uint res = MASK_OUT_ABOVE_16(src << 1);
philpem@0	5368
philpem@0	5369	m68ki_write_16(ea, res);
philpem@0	5370
philpem@0	5371	FLAG_N = NFLAG_16(res);
philpem@0	5372	FLAG_Z = res;
philpem@0	5373	FLAG_X = FLAG_C = src >> 7;
philpem@0	5374	FLAG_V = VFLAG_CLEAR;
philpem@0	5375	}
philpem@0	5376
philpem@0	5377
philpem@0	5378	M68KMAKE_OP(move, 8, d, d)
philpem@0	5379	{
philpem@0	5380	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5381	uint* r_dst = &DX;
philpem@0	5382
philpem@0	5383	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5384
philpem@0	5385	FLAG_N = NFLAG_8(res);
philpem@0	5386	FLAG_Z = res;
philpem@0	5387	FLAG_V = VFLAG_CLEAR;
philpem@0	5388	FLAG_C = CFLAG_CLEAR;
philpem@0	5389	}
philpem@0	5390
philpem@0	5391
philpem@0	5392	M68KMAKE_OP(move, 8, d, .)
philpem@0	5393	{
philpem@0	5394	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5395	uint* r_dst = &DX;
philpem@0	5396
philpem@0	5397	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	5398
philpem@0	5399	FLAG_N = NFLAG_8(res);
philpem@0	5400	FLAG_Z = res;
philpem@0	5401	FLAG_V = VFLAG_CLEAR;
philpem@0	5402	FLAG_C = CFLAG_CLEAR;
philpem@0	5403	}
philpem@0	5404
philpem@0	5405
philpem@0	5406	M68KMAKE_OP(move, 8, ai, d)
philpem@0	5407	{
philpem@0	5408	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5409	uint ea = EA_AX_AI_8();
philpem@0	5410
philpem@0	5411	m68ki_write_8(ea, res);
philpem@0	5412
philpem@0	5413	FLAG_N = NFLAG_8(res);
philpem@0	5414	FLAG_Z = res;
philpem@0	5415	FLAG_V = VFLAG_CLEAR;
philpem@0	5416	FLAG_C = CFLAG_CLEAR;
philpem@0	5417	}
philpem@0	5418
philpem@0	5419
philpem@0	5420	M68KMAKE_OP(move, 8, ai, .)
philpem@0	5421	{
philpem@0	5422	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5423	uint ea = EA_AX_AI_8();
philpem@0	5424
philpem@0	5425	m68ki_write_8(ea, res);
philpem@0	5426
philpem@0	5427	FLAG_N = NFLAG_8(res);
philpem@0	5428	FLAG_Z = res;
philpem@0	5429	FLAG_V = VFLAG_CLEAR;
philpem@0	5430	FLAG_C = CFLAG_CLEAR;
philpem@0	5431	}
philpem@0	5432
philpem@0	5433
philpem@0	5434	M68KMAKE_OP(move, 8, pi7, d)
philpem@0	5435	{
philpem@0	5436	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5437	uint ea = EA_A7_PI_8();
philpem@0	5438
philpem@0	5439	m68ki_write_8(ea, res);
philpem@0	5440
philpem@0	5441	FLAG_N = NFLAG_8(res);
philpem@0	5442	FLAG_Z = res;
philpem@0	5443	FLAG_V = VFLAG_CLEAR;
philpem@0	5444	FLAG_C = CFLAG_CLEAR;
philpem@0	5445	}
philpem@0	5446
philpem@0	5447
philpem@0	5448	M68KMAKE_OP(move, 8, pi, d)
philpem@0	5449	{
philpem@0	5450	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5451	uint ea = EA_AX_PI_8();
philpem@0	5452
philpem@0	5453	m68ki_write_8(ea, res);
philpem@0	5454
philpem@0	5455	FLAG_N = NFLAG_8(res);
philpem@0	5456	FLAG_Z = res;
philpem@0	5457	FLAG_V = VFLAG_CLEAR;
philpem@0	5458	FLAG_C = CFLAG_CLEAR;
philpem@0	5459	}
philpem@0	5460
philpem@0	5461
philpem@0	5462	M68KMAKE_OP(move, 8, pi7, .)
philpem@0	5463	{
philpem@0	5464	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5465	uint ea = EA_A7_PI_8();
philpem@0	5466
philpem@0	5467	m68ki_write_8(ea, res);
philpem@0	5468
philpem@0	5469	FLAG_N = NFLAG_8(res);
philpem@0	5470	FLAG_Z = res;
philpem@0	5471	FLAG_V = VFLAG_CLEAR;
philpem@0	5472	FLAG_C = CFLAG_CLEAR;
philpem@0	5473	}
philpem@0	5474
philpem@0	5475
philpem@0	5476	M68KMAKE_OP(move, 8, pi, .)
philpem@0	5477	{
philpem@0	5478	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5479	uint ea = EA_AX_PI_8();
philpem@0	5480
philpem@0	5481	m68ki_write_8(ea, res);
philpem@0	5482
philpem@0	5483	FLAG_N = NFLAG_8(res);
philpem@0	5484	FLAG_Z = res;
philpem@0	5485	FLAG_V = VFLAG_CLEAR;
philpem@0	5486	FLAG_C = CFLAG_CLEAR;
philpem@0	5487	}
philpem@0	5488
philpem@0	5489
philpem@0	5490	M68KMAKE_OP(move, 8, pd7, d)
philpem@0	5491	{
philpem@0	5492	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5493	uint ea = EA_A7_PD_8();
philpem@0	5494
philpem@0	5495	m68ki_write_8(ea, res);
philpem@0	5496
philpem@0	5497	FLAG_N = NFLAG_8(res);
philpem@0	5498	FLAG_Z = res;
philpem@0	5499	FLAG_V = VFLAG_CLEAR;
philpem@0	5500	FLAG_C = CFLAG_CLEAR;
philpem@0	5501	}
philpem@0	5502
philpem@0	5503
philpem@0	5504	M68KMAKE_OP(move, 8, pd, d)
philpem@0	5505	{
philpem@0	5506	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5507	uint ea = EA_AX_PD_8();
philpem@0	5508
philpem@0	5509	m68ki_write_8(ea, res);
philpem@0	5510
philpem@0	5511	FLAG_N = NFLAG_8(res);
philpem@0	5512	FLAG_Z = res;
philpem@0	5513	FLAG_V = VFLAG_CLEAR;
philpem@0	5514	FLAG_C = CFLAG_CLEAR;
philpem@0	5515	}
philpem@0	5516
philpem@0	5517
philpem@0	5518	M68KMAKE_OP(move, 8, pd7, .)
philpem@0	5519	{
philpem@0	5520	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5521	uint ea = EA_A7_PD_8();
philpem@0	5522
philpem@0	5523	m68ki_write_8(ea, res);
philpem@0	5524
philpem@0	5525	FLAG_N = NFLAG_8(res);
philpem@0	5526	FLAG_Z = res;
philpem@0	5527	FLAG_V = VFLAG_CLEAR;
philpem@0	5528	FLAG_C = CFLAG_CLEAR;
philpem@0	5529	}
philpem@0	5530
philpem@0	5531
philpem@0	5532	M68KMAKE_OP(move, 8, pd, .)
philpem@0	5533	{
philpem@0	5534	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5535	uint ea = EA_AX_PD_8();
philpem@0	5536
philpem@0	5537	m68ki_write_8(ea, res);
philpem@0	5538
philpem@0	5539	FLAG_N = NFLAG_8(res);
philpem@0	5540	FLAG_Z = res;
philpem@0	5541	FLAG_V = VFLAG_CLEAR;
philpem@0	5542	FLAG_C = CFLAG_CLEAR;
philpem@0	5543	}
philpem@0	5544
philpem@0	5545
philpem@0	5546	M68KMAKE_OP(move, 8, di, d)
philpem@0	5547	{
philpem@0	5548	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5549	uint ea = EA_AX_DI_8();
philpem@0	5550
philpem@0	5551	m68ki_write_8(ea, res);
philpem@0	5552
philpem@0	5553	FLAG_N = NFLAG_8(res);
philpem@0	5554	FLAG_Z = res;
philpem@0	5555	FLAG_V = VFLAG_CLEAR;
philpem@0	5556	FLAG_C = CFLAG_CLEAR;
philpem@0	5557	}
philpem@0	5558
philpem@0	5559
philpem@0	5560	M68KMAKE_OP(move, 8, di, .)
philpem@0	5561	{
philpem@0	5562	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5563	uint ea = EA_AX_DI_8();
philpem@0	5564
philpem@0	5565	m68ki_write_8(ea, res);
philpem@0	5566
philpem@0	5567	FLAG_N = NFLAG_8(res);
philpem@0	5568	FLAG_Z = res;
philpem@0	5569	FLAG_V = VFLAG_CLEAR;
philpem@0	5570	FLAG_C = CFLAG_CLEAR;
philpem@0	5571	}
philpem@0	5572
philpem@0	5573
philpem@0	5574	M68KMAKE_OP(move, 8, ix, d)
philpem@0	5575	{
philpem@0	5576	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5577	uint ea = EA_AX_IX_8();
philpem@0	5578
philpem@0	5579	m68ki_write_8(ea, res);
philpem@0	5580
philpem@0	5581	FLAG_N = NFLAG_8(res);
philpem@0	5582	FLAG_Z = res;
philpem@0	5583	FLAG_V = VFLAG_CLEAR;
philpem@0	5584	FLAG_C = CFLAG_CLEAR;
philpem@0	5585	}
philpem@0	5586
philpem@0	5587
philpem@0	5588	M68KMAKE_OP(move, 8, ix, .)
philpem@0	5589	{
philpem@0	5590	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5591	uint ea = EA_AX_IX_8();
philpem@0	5592
philpem@0	5593	m68ki_write_8(ea, res);
philpem@0	5594
philpem@0	5595	FLAG_N = NFLAG_8(res);
philpem@0	5596	FLAG_Z = res;
philpem@0	5597	FLAG_V = VFLAG_CLEAR;
philpem@0	5598	FLAG_C = CFLAG_CLEAR;
philpem@0	5599	}
philpem@0	5600
philpem@0	5601
philpem@0	5602	M68KMAKE_OP(move, 8, aw, d)
philpem@0	5603	{
philpem@0	5604	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5605	uint ea = EA_AW_8();
philpem@0	5606
philpem@0	5607	m68ki_write_8(ea, res);
philpem@0	5608
philpem@0	5609	FLAG_N = NFLAG_8(res);
philpem@0	5610	FLAG_Z = res;
philpem@0	5611	FLAG_V = VFLAG_CLEAR;
philpem@0	5612	FLAG_C = CFLAG_CLEAR;
philpem@0	5613	}
philpem@0	5614
philpem@0	5615
philpem@0	5616	M68KMAKE_OP(move, 8, aw, .)
philpem@0	5617	{
philpem@0	5618	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5619	uint ea = EA_AW_8();
philpem@0	5620
philpem@0	5621	m68ki_write_8(ea, res);
philpem@0	5622
philpem@0	5623	FLAG_N = NFLAG_8(res);
philpem@0	5624	FLAG_Z = res;
philpem@0	5625	FLAG_V = VFLAG_CLEAR;
philpem@0	5626	FLAG_C = CFLAG_CLEAR;
philpem@0	5627	}
philpem@0	5628
philpem@0	5629
philpem@0	5630	M68KMAKE_OP(move, 8, al, d)
philpem@0	5631	{
philpem@0	5632	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	5633	uint ea = EA_AL_8();
philpem@0	5634
philpem@0	5635	m68ki_write_8(ea, res);
philpem@0	5636
philpem@0	5637	FLAG_N = NFLAG_8(res);
philpem@0	5638	FLAG_Z = res;
philpem@0	5639	FLAG_V = VFLAG_CLEAR;
philpem@0	5640	FLAG_C = CFLAG_CLEAR;
philpem@0	5641	}
philpem@0	5642
philpem@0	5643
philpem@0	5644	M68KMAKE_OP(move, 8, al, .)
philpem@0	5645	{
philpem@0	5646	uint res = M68KMAKE_GET_OPER_AY_8;
philpem@0	5647	uint ea = EA_AL_8();
philpem@0	5648
philpem@0	5649	m68ki_write_8(ea, res);
philpem@0	5650
philpem@0	5651	FLAG_N = NFLAG_8(res);
philpem@0	5652	FLAG_Z = res;
philpem@0	5653	FLAG_V = VFLAG_CLEAR;
philpem@0	5654	FLAG_C = CFLAG_CLEAR;
philpem@0	5655	}
philpem@0	5656
philpem@0	5657
philpem@0	5658	M68KMAKE_OP(move, 16, d, d)
philpem@0	5659	{
philpem@0	5660	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5661	uint* r_dst = &DX;
philpem@0	5662
philpem@0	5663	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5664
philpem@0	5665	FLAG_N = NFLAG_16(res);
philpem@0	5666	FLAG_Z = res;
philpem@0	5667	FLAG_V = VFLAG_CLEAR;
philpem@0	5668	FLAG_C = CFLAG_CLEAR;
philpem@0	5669	}
philpem@0	5670
philpem@0	5671
philpem@0	5672	M68KMAKE_OP(move, 16, d, a)
philpem@0	5673	{
philpem@0	5674	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5675	uint* r_dst = &DX;
philpem@0	5676
philpem@0	5677	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5678
philpem@0	5679	FLAG_N = NFLAG_16(res);
philpem@0	5680	FLAG_Z = res;
philpem@0	5681	FLAG_V = VFLAG_CLEAR;
philpem@0	5682	FLAG_C = CFLAG_CLEAR;
philpem@0	5683	}
philpem@0	5684
philpem@0	5685
philpem@0	5686	M68KMAKE_OP(move, 16, d, .)
philpem@0	5687	{
philpem@0	5688	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5689	uint* r_dst = &DX;
philpem@0	5690
philpem@0	5691	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	5692
philpem@0	5693	FLAG_N = NFLAG_16(res);
philpem@0	5694	FLAG_Z = res;
philpem@0	5695	FLAG_V = VFLAG_CLEAR;
philpem@0	5696	FLAG_C = CFLAG_CLEAR;
philpem@0	5697	}
philpem@0	5698
philpem@0	5699
philpem@0	5700	M68KMAKE_OP(move, 16, ai, d)
philpem@0	5701	{
philpem@0	5702	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5703	uint ea = EA_AX_AI_16();
philpem@0	5704
philpem@0	5705	m68ki_write_16(ea, res);
philpem@0	5706
philpem@0	5707	FLAG_N = NFLAG_16(res);
philpem@0	5708	FLAG_Z = res;
philpem@0	5709	FLAG_V = VFLAG_CLEAR;
philpem@0	5710	FLAG_C = CFLAG_CLEAR;
philpem@0	5711	}
philpem@0	5712
philpem@0	5713
philpem@0	5714	M68KMAKE_OP(move, 16, ai, a)
philpem@0	5715	{
philpem@0	5716	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5717	uint ea = EA_AX_AI_16();
philpem@0	5718
philpem@0	5719	m68ki_write_16(ea, res);
philpem@0	5720
philpem@0	5721	FLAG_N = NFLAG_16(res);
philpem@0	5722	FLAG_Z = res;
philpem@0	5723	FLAG_V = VFLAG_CLEAR;
philpem@0	5724	FLAG_C = CFLAG_CLEAR;
philpem@0	5725	}
philpem@0	5726
philpem@0	5727
philpem@0	5728	M68KMAKE_OP(move, 16, ai, .)
philpem@0	5729	{
philpem@0	5730	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5731	uint ea = EA_AX_AI_16();
philpem@0	5732
philpem@0	5733	m68ki_write_16(ea, res);
philpem@0	5734
philpem@0	5735	FLAG_N = NFLAG_16(res);
philpem@0	5736	FLAG_Z = res;
philpem@0	5737	FLAG_V = VFLAG_CLEAR;
philpem@0	5738	FLAG_C = CFLAG_CLEAR;
philpem@0	5739	}
philpem@0	5740
philpem@0	5741
philpem@0	5742	M68KMAKE_OP(move, 16, pi, d)
philpem@0	5743	{
philpem@0	5744	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5745	uint ea = EA_AX_PI_16();
philpem@0	5746
philpem@0	5747	m68ki_write_16(ea, res);
philpem@0	5748
philpem@0	5749	FLAG_N = NFLAG_16(res);
philpem@0	5750	FLAG_Z = res;
philpem@0	5751	FLAG_V = VFLAG_CLEAR;
philpem@0	5752	FLAG_C = CFLAG_CLEAR;
philpem@0	5753	}
philpem@0	5754
philpem@0	5755
philpem@0	5756	M68KMAKE_OP(move, 16, pi, a)
philpem@0	5757	{
philpem@0	5758	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5759	uint ea = EA_AX_PI_16();
philpem@0	5760
philpem@0	5761	m68ki_write_16(ea, res);
philpem@0	5762
philpem@0	5763	FLAG_N = NFLAG_16(res);
philpem@0	5764	FLAG_Z = res;
philpem@0	5765	FLAG_V = VFLAG_CLEAR;
philpem@0	5766	FLAG_C = CFLAG_CLEAR;
philpem@0	5767	}
philpem@0	5768
philpem@0	5769
philpem@0	5770	M68KMAKE_OP(move, 16, pi, .)
philpem@0	5771	{
philpem@0	5772	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5773	uint ea = EA_AX_PI_16();
philpem@0	5774
philpem@0	5775	m68ki_write_16(ea, res);
philpem@0	5776
philpem@0	5777	FLAG_N = NFLAG_16(res);
philpem@0	5778	FLAG_Z = res;
philpem@0	5779	FLAG_V = VFLAG_CLEAR;
philpem@0	5780	FLAG_C = CFLAG_CLEAR;
philpem@0	5781	}
philpem@0	5782
philpem@0	5783
philpem@0	5784	M68KMAKE_OP(move, 16, pd, d)
philpem@0	5785	{
philpem@0	5786	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5787	uint ea = EA_AX_PD_16();
philpem@0	5788
philpem@0	5789	m68ki_write_16(ea, res);
philpem@0	5790
philpem@0	5791	FLAG_N = NFLAG_16(res);
philpem@0	5792	FLAG_Z = res;
philpem@0	5793	FLAG_V = VFLAG_CLEAR;
philpem@0	5794	FLAG_C = CFLAG_CLEAR;
philpem@0	5795	}
philpem@0	5796
philpem@0	5797
philpem@0	5798	M68KMAKE_OP(move, 16, pd, a)
philpem@0	5799	{
philpem@0	5800	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5801	uint ea = EA_AX_PD_16();
philpem@0	5802
philpem@0	5803	m68ki_write_16(ea, res);
philpem@0	5804
philpem@0	5805	FLAG_N = NFLAG_16(res);
philpem@0	5806	FLAG_Z = res;
philpem@0	5807	FLAG_V = VFLAG_CLEAR;
philpem@0	5808	FLAG_C = CFLAG_CLEAR;
philpem@0	5809	}
philpem@0	5810
philpem@0	5811
philpem@0	5812	M68KMAKE_OP(move, 16, pd, .)
philpem@0	5813	{
philpem@0	5814	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5815	uint ea = EA_AX_PD_16();
philpem@0	5816
philpem@0	5817	m68ki_write_16(ea, res);
philpem@0	5818
philpem@0	5819	FLAG_N = NFLAG_16(res);
philpem@0	5820	FLAG_Z = res;
philpem@0	5821	FLAG_V = VFLAG_CLEAR;
philpem@0	5822	FLAG_C = CFLAG_CLEAR;
philpem@0	5823	}
philpem@0	5824
philpem@0	5825
philpem@0	5826	M68KMAKE_OP(move, 16, di, d)
philpem@0	5827	{
philpem@0	5828	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5829	uint ea = EA_AX_DI_16();
philpem@0	5830
philpem@0	5831	m68ki_write_16(ea, res);
philpem@0	5832
philpem@0	5833	FLAG_N = NFLAG_16(res);
philpem@0	5834	FLAG_Z = res;
philpem@0	5835	FLAG_V = VFLAG_CLEAR;
philpem@0	5836	FLAG_C = CFLAG_CLEAR;
philpem@0	5837	}
philpem@0	5838
philpem@0	5839
philpem@0	5840	M68KMAKE_OP(move, 16, di, a)
philpem@0	5841	{
philpem@0	5842	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5843	uint ea = EA_AX_DI_16();
philpem@0	5844
philpem@0	5845	m68ki_write_16(ea, res);
philpem@0	5846
philpem@0	5847	FLAG_N = NFLAG_16(res);
philpem@0	5848	FLAG_Z = res;
philpem@0	5849	FLAG_V = VFLAG_CLEAR;
philpem@0	5850	FLAG_C = CFLAG_CLEAR;
philpem@0	5851	}
philpem@0	5852
philpem@0	5853
philpem@0	5854	M68KMAKE_OP(move, 16, di, .)
philpem@0	5855	{
philpem@0	5856	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5857	uint ea = EA_AX_DI_16();
philpem@0	5858
philpem@0	5859	m68ki_write_16(ea, res);
philpem@0	5860
philpem@0	5861	FLAG_N = NFLAG_16(res);
philpem@0	5862	FLAG_Z = res;
philpem@0	5863	FLAG_V = VFLAG_CLEAR;
philpem@0	5864	FLAG_C = CFLAG_CLEAR;
philpem@0	5865	}
philpem@0	5866
philpem@0	5867
philpem@0	5868	M68KMAKE_OP(move, 16, ix, d)
philpem@0	5869	{
philpem@0	5870	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5871	uint ea = EA_AX_IX_16();
philpem@0	5872
philpem@0	5873	m68ki_write_16(ea, res);
philpem@0	5874
philpem@0	5875	FLAG_N = NFLAG_16(res);
philpem@0	5876	FLAG_Z = res;
philpem@0	5877	FLAG_V = VFLAG_CLEAR;
philpem@0	5878	FLAG_C = CFLAG_CLEAR;
philpem@0	5879	}
philpem@0	5880
philpem@0	5881
philpem@0	5882	M68KMAKE_OP(move, 16, ix, a)
philpem@0	5883	{
philpem@0	5884	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5885	uint ea = EA_AX_IX_16();
philpem@0	5886
philpem@0	5887	m68ki_write_16(ea, res);
philpem@0	5888
philpem@0	5889	FLAG_N = NFLAG_16(res);
philpem@0	5890	FLAG_Z = res;
philpem@0	5891	FLAG_V = VFLAG_CLEAR;
philpem@0	5892	FLAG_C = CFLAG_CLEAR;
philpem@0	5893	}
philpem@0	5894
philpem@0	5895
philpem@0	5896	M68KMAKE_OP(move, 16, ix, .)
philpem@0	5897	{
philpem@0	5898	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5899	uint ea = EA_AX_IX_16();
philpem@0	5900
philpem@0	5901	m68ki_write_16(ea, res);
philpem@0	5902
philpem@0	5903	FLAG_N = NFLAG_16(res);
philpem@0	5904	FLAG_Z = res;
philpem@0	5905	FLAG_V = VFLAG_CLEAR;
philpem@0	5906	FLAG_C = CFLAG_CLEAR;
philpem@0	5907	}
philpem@0	5908
philpem@0	5909
philpem@0	5910	M68KMAKE_OP(move, 16, aw, d)
philpem@0	5911	{
philpem@0	5912	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5913	uint ea = EA_AW_16();
philpem@0	5914
philpem@0	5915	m68ki_write_16(ea, res);
philpem@0	5916
philpem@0	5917	FLAG_N = NFLAG_16(res);
philpem@0	5918	FLAG_Z = res;
philpem@0	5919	FLAG_V = VFLAG_CLEAR;
philpem@0	5920	FLAG_C = CFLAG_CLEAR;
philpem@0	5921	}
philpem@0	5922
philpem@0	5923
philpem@0	5924	M68KMAKE_OP(move, 16, aw, a)
philpem@0	5925	{
philpem@0	5926	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5927	uint ea = EA_AW_16();
philpem@0	5928
philpem@0	5929	m68ki_write_16(ea, res);
philpem@0	5930
philpem@0	5931	FLAG_N = NFLAG_16(res);
philpem@0	5932	FLAG_Z = res;
philpem@0	5933	FLAG_V = VFLAG_CLEAR;
philpem@0	5934	FLAG_C = CFLAG_CLEAR;
philpem@0	5935	}
philpem@0	5936
philpem@0	5937
philpem@0	5938	M68KMAKE_OP(move, 16, aw, .)
philpem@0	5939	{
philpem@0	5940	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5941	uint ea = EA_AW_16();
philpem@0	5942
philpem@0	5943	m68ki_write_16(ea, res);
philpem@0	5944
philpem@0	5945	FLAG_N = NFLAG_16(res);
philpem@0	5946	FLAG_Z = res;
philpem@0	5947	FLAG_V = VFLAG_CLEAR;
philpem@0	5948	FLAG_C = CFLAG_CLEAR;
philpem@0	5949	}
philpem@0	5950
philpem@0	5951
philpem@0	5952	M68KMAKE_OP(move, 16, al, d)
philpem@0	5953	{
philpem@0	5954	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	5955	uint ea = EA_AL_16();
philpem@0	5956
philpem@0	5957	m68ki_write_16(ea, res);
philpem@0	5958
philpem@0	5959	FLAG_N = NFLAG_16(res);
philpem@0	5960	FLAG_Z = res;
philpem@0	5961	FLAG_V = VFLAG_CLEAR;
philpem@0	5962	FLAG_C = CFLAG_CLEAR;
philpem@0	5963	}
philpem@0	5964
philpem@0	5965
philpem@0	5966	M68KMAKE_OP(move, 16, al, a)
philpem@0	5967	{
philpem@0	5968	uint res = MASK_OUT_ABOVE_16(AY);
philpem@0	5969	uint ea = EA_AL_16();
philpem@0	5970
philpem@0	5971	m68ki_write_16(ea, res);
philpem@0	5972
philpem@0	5973	FLAG_N = NFLAG_16(res);
philpem@0	5974	FLAG_Z = res;
philpem@0	5975	FLAG_V = VFLAG_CLEAR;
philpem@0	5976	FLAG_C = CFLAG_CLEAR;
philpem@0	5977	}
philpem@0	5978
philpem@0	5979
philpem@0	5980	M68KMAKE_OP(move, 16, al, .)
philpem@0	5981	{
philpem@0	5982	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	5983	uint ea = EA_AL_16();
philpem@0	5984
philpem@0	5985	m68ki_write_16(ea, res);
philpem@0	5986
philpem@0	5987	FLAG_N = NFLAG_16(res);
philpem@0	5988	FLAG_Z = res;
philpem@0	5989	FLAG_V = VFLAG_CLEAR;
philpem@0	5990	FLAG_C = CFLAG_CLEAR;
philpem@0	5991	}
philpem@0	5992
philpem@0	5993
philpem@0	5994	M68KMAKE_OP(move, 32, d, d)
philpem@0	5995	{
philpem@0	5996	uint res = DY;
philpem@0	5997	uint* r_dst = &DX;
philpem@0	5998
philpem@0	5999	*r_dst = res;
philpem@0	6000
philpem@0	6001	FLAG_N = NFLAG_32(res);
philpem@0	6002	FLAG_Z = res;
philpem@0	6003	FLAG_V = VFLAG_CLEAR;
philpem@0	6004	FLAG_C = CFLAG_CLEAR;
philpem@0	6005	}
philpem@0	6006
philpem@0	6007
philpem@0	6008	M68KMAKE_OP(move, 32, d, a)
philpem@0	6009	{
philpem@0	6010	uint res = AY;
philpem@0	6011	uint* r_dst = &DX;
philpem@0	6012
philpem@0	6013	*r_dst = res;
philpem@0	6014
philpem@0	6015	FLAG_N = NFLAG_32(res);
philpem@0	6016	FLAG_Z = res;
philpem@0	6017	FLAG_V = VFLAG_CLEAR;
philpem@0	6018	FLAG_C = CFLAG_CLEAR;
philpem@0	6019	}
philpem@0	6020
philpem@0	6021
philpem@0	6022	M68KMAKE_OP(move, 32, d, .)
philpem@0	6023	{
philpem@0	6024	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6025	uint* r_dst = &DX;
philpem@0	6026
philpem@0	6027	*r_dst = res;
philpem@0	6028
philpem@0	6029	FLAG_N = NFLAG_32(res);
philpem@0	6030	FLAG_Z = res;
philpem@0	6031	FLAG_V = VFLAG_CLEAR;
philpem@0	6032	FLAG_C = CFLAG_CLEAR;
philpem@0	6033	}
philpem@0	6034
philpem@0	6035
philpem@0	6036	M68KMAKE_OP(move, 32, ai, d)
philpem@0	6037	{
philpem@0	6038	uint res = DY;
philpem@0	6039	uint ea = EA_AX_AI_32();
philpem@0	6040
philpem@0	6041	m68ki_write_32(ea, res);
philpem@0	6042
philpem@0	6043	FLAG_N = NFLAG_32(res);
philpem@0	6044	FLAG_Z = res;
philpem@0	6045	FLAG_V = VFLAG_CLEAR;
philpem@0	6046	FLAG_C = CFLAG_CLEAR;
philpem@0	6047	}
philpem@0	6048
philpem@0	6049
philpem@0	6050	M68KMAKE_OP(move, 32, ai, a)
philpem@0	6051	{
philpem@0	6052	uint res = AY;
philpem@0	6053	uint ea = EA_AX_AI_32();
philpem@0	6054
philpem@0	6055	m68ki_write_32(ea, res);
philpem@0	6056
philpem@0	6057	FLAG_N = NFLAG_32(res);
philpem@0	6058	FLAG_Z = res;
philpem@0	6059	FLAG_V = VFLAG_CLEAR;
philpem@0	6060	FLAG_C = CFLAG_CLEAR;
philpem@0	6061	}
philpem@0	6062
philpem@0	6063
philpem@0	6064	M68KMAKE_OP(move, 32, ai, .)
philpem@0	6065	{
philpem@0	6066	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6067	uint ea = EA_AX_AI_32();
philpem@0	6068
philpem@0	6069	m68ki_write_32(ea, res);
philpem@0	6070
philpem@0	6071	FLAG_N = NFLAG_32(res);
philpem@0	6072	FLAG_Z = res;
philpem@0	6073	FLAG_V = VFLAG_CLEAR;
philpem@0	6074	FLAG_C = CFLAG_CLEAR;
philpem@0	6075	}
philpem@0	6076
philpem@0	6077
philpem@0	6078	M68KMAKE_OP(move, 32, pi, d)
philpem@0	6079	{
philpem@0	6080	uint res = DY;
philpem@0	6081	uint ea = EA_AX_PI_32();
philpem@0	6082
philpem@0	6083	m68ki_write_32(ea, res);
philpem@0	6084
philpem@0	6085	FLAG_N = NFLAG_32(res);
philpem@0	6086	FLAG_Z = res;
philpem@0	6087	FLAG_V = VFLAG_CLEAR;
philpem@0	6088	FLAG_C = CFLAG_CLEAR;
philpem@0	6089	}
philpem@0	6090
philpem@0	6091
philpem@0	6092	M68KMAKE_OP(move, 32, pi, a)
philpem@0	6093	{
philpem@0	6094	uint res = AY;
philpem@0	6095	uint ea = EA_AX_PI_32();
philpem@0	6096
philpem@0	6097	m68ki_write_32(ea, res);
philpem@0	6098
philpem@0	6099	FLAG_N = NFLAG_32(res);
philpem@0	6100	FLAG_Z = res;
philpem@0	6101	FLAG_V = VFLAG_CLEAR;
philpem@0	6102	FLAG_C = CFLAG_CLEAR;
philpem@0	6103	}
philpem@0	6104
philpem@0	6105
philpem@0	6106	M68KMAKE_OP(move, 32, pi, .)
philpem@0	6107	{
philpem@0	6108	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6109	uint ea = EA_AX_PI_32();
philpem@0	6110
philpem@0	6111	m68ki_write_32(ea, res);
philpem@0	6112
philpem@0	6113	FLAG_N = NFLAG_32(res);
philpem@0	6114	FLAG_Z = res;
philpem@0	6115	FLAG_V = VFLAG_CLEAR;
philpem@0	6116	FLAG_C = CFLAG_CLEAR;
philpem@0	6117	}
philpem@0	6118
philpem@0	6119
philpem@0	6120	M68KMAKE_OP(move, 32, pd, d)
philpem@0	6121	{
philpem@0	6122	uint res = DY;
philpem@0	6123	uint ea = EA_AX_PD_32();
philpem@0	6124
philpem@0	6125	m68ki_write_32(ea, res);
philpem@0	6126
philpem@0	6127	FLAG_N = NFLAG_32(res);
philpem@0	6128	FLAG_Z = res;
philpem@0	6129	FLAG_V = VFLAG_CLEAR;
philpem@0	6130	FLAG_C = CFLAG_CLEAR;
philpem@0	6131	}
philpem@0	6132
philpem@0	6133
philpem@0	6134	M68KMAKE_OP(move, 32, pd, a)
philpem@0	6135	{
philpem@0	6136	uint res = AY;
philpem@0	6137	uint ea = EA_AX_PD_32();
philpem@0	6138
philpem@0	6139	m68ki_write_32(ea, res);
philpem@0	6140
philpem@0	6141	FLAG_N = NFLAG_32(res);
philpem@0	6142	FLAG_Z = res;
philpem@0	6143	FLAG_V = VFLAG_CLEAR;
philpem@0	6144	FLAG_C = CFLAG_CLEAR;
philpem@0	6145	}
philpem@0	6146
philpem@0	6147
philpem@0	6148	M68KMAKE_OP(move, 32, pd, .)
philpem@0	6149	{
philpem@0	6150	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6151	uint ea = EA_AX_PD_32();
philpem@0	6152
philpem@0	6153	m68ki_write_32(ea, res);
philpem@0	6154
philpem@0	6155	FLAG_N = NFLAG_32(res);
philpem@0	6156	FLAG_Z = res;
philpem@0	6157	FLAG_V = VFLAG_CLEAR;
philpem@0	6158	FLAG_C = CFLAG_CLEAR;
philpem@0	6159	}
philpem@0	6160
philpem@0	6161
philpem@0	6162	M68KMAKE_OP(move, 32, di, d)
philpem@0	6163	{
philpem@0	6164	uint res = DY;
philpem@0	6165	uint ea = EA_AX_DI_32();
philpem@0	6166
philpem@0	6167	m68ki_write_32(ea, res);
philpem@0	6168
philpem@0	6169	FLAG_N = NFLAG_32(res);
philpem@0	6170	FLAG_Z = res;
philpem@0	6171	FLAG_V = VFLAG_CLEAR;
philpem@0	6172	FLAG_C = CFLAG_CLEAR;
philpem@0	6173	}
philpem@0	6174
philpem@0	6175
philpem@0	6176	M68KMAKE_OP(move, 32, di, a)
philpem@0	6177	{
philpem@0	6178	uint res = AY;
philpem@0	6179	uint ea = EA_AX_DI_32();
philpem@0	6180
philpem@0	6181	m68ki_write_32(ea, res);
philpem@0	6182
philpem@0	6183	FLAG_N = NFLAG_32(res);
philpem@0	6184	FLAG_Z = res;
philpem@0	6185	FLAG_V = VFLAG_CLEAR;
philpem@0	6186	FLAG_C = CFLAG_CLEAR;
philpem@0	6187	}
philpem@0	6188
philpem@0	6189
philpem@0	6190	M68KMAKE_OP(move, 32, di, .)
philpem@0	6191	{
philpem@0	6192	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6193	uint ea = EA_AX_DI_32();
philpem@0	6194
philpem@0	6195	m68ki_write_32(ea, res);
philpem@0	6196
philpem@0	6197	FLAG_N = NFLAG_32(res);
philpem@0	6198	FLAG_Z = res;
philpem@0	6199	FLAG_V = VFLAG_CLEAR;
philpem@0	6200	FLAG_C = CFLAG_CLEAR;
philpem@0	6201	}
philpem@0	6202
philpem@0	6203
philpem@0	6204	M68KMAKE_OP(move, 32, ix, d)
philpem@0	6205	{
philpem@0	6206	uint res = DY;
philpem@0	6207	uint ea = EA_AX_IX_32();
philpem@0	6208
philpem@0	6209	m68ki_write_32(ea, res);
philpem@0	6210
philpem@0	6211	FLAG_N = NFLAG_32(res);
philpem@0	6212	FLAG_Z = res;
philpem@0	6213	FLAG_V = VFLAG_CLEAR;
philpem@0	6214	FLAG_C = CFLAG_CLEAR;
philpem@0	6215	}
philpem@0	6216
philpem@0	6217
philpem@0	6218	M68KMAKE_OP(move, 32, ix, a)
philpem@0	6219	{
philpem@0	6220	uint res = AY;
philpem@0	6221	uint ea = EA_AX_IX_32();
philpem@0	6222
philpem@0	6223	m68ki_write_32(ea, res);
philpem@0	6224
philpem@0	6225	FLAG_N = NFLAG_32(res);
philpem@0	6226	FLAG_Z = res;
philpem@0	6227	FLAG_V = VFLAG_CLEAR;
philpem@0	6228	FLAG_C = CFLAG_CLEAR;
philpem@0	6229	}
philpem@0	6230
philpem@0	6231
philpem@0	6232	M68KMAKE_OP(move, 32, ix, .)
philpem@0	6233	{
philpem@0	6234	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6235	uint ea = EA_AX_IX_32();
philpem@0	6236
philpem@0	6237	m68ki_write_32(ea, res);
philpem@0	6238
philpem@0	6239	FLAG_N = NFLAG_32(res);
philpem@0	6240	FLAG_Z = res;
philpem@0	6241	FLAG_V = VFLAG_CLEAR;
philpem@0	6242	FLAG_C = CFLAG_CLEAR;
philpem@0	6243	}
philpem@0	6244
philpem@0	6245
philpem@0	6246	M68KMAKE_OP(move, 32, aw, d)
philpem@0	6247	{
philpem@0	6248	uint res = DY;
philpem@0	6249	uint ea = EA_AW_32();
philpem@0	6250
philpem@0	6251	m68ki_write_32(ea, res);
philpem@0	6252
philpem@0	6253	FLAG_N = NFLAG_32(res);
philpem@0	6254	FLAG_Z = res;
philpem@0	6255	FLAG_V = VFLAG_CLEAR;
philpem@0	6256	FLAG_C = CFLAG_CLEAR;
philpem@0	6257	}
philpem@0	6258
philpem@0	6259
philpem@0	6260	M68KMAKE_OP(move, 32, aw, a)
philpem@0	6261	{
philpem@0	6262	uint res = AY;
philpem@0	6263	uint ea = EA_AW_32();
philpem@0	6264
philpem@0	6265	m68ki_write_32(ea, res);
philpem@0	6266
philpem@0	6267	FLAG_N = NFLAG_32(res);
philpem@0	6268	FLAG_Z = res;
philpem@0	6269	FLAG_V = VFLAG_CLEAR;
philpem@0	6270	FLAG_C = CFLAG_CLEAR;
philpem@0	6271	}
philpem@0	6272
philpem@0	6273
philpem@0	6274	M68KMAKE_OP(move, 32, aw, .)
philpem@0	6275	{
philpem@0	6276	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6277	uint ea = EA_AW_32();
philpem@0	6278
philpem@0	6279	m68ki_write_32(ea, res);
philpem@0	6280
philpem@0	6281	FLAG_N = NFLAG_32(res);
philpem@0	6282	FLAG_Z = res;
philpem@0	6283	FLAG_V = VFLAG_CLEAR;
philpem@0	6284	FLAG_C = CFLAG_CLEAR;
philpem@0	6285	}
philpem@0	6286
philpem@0	6287
philpem@0	6288	M68KMAKE_OP(move, 32, al, d)
philpem@0	6289	{
philpem@0	6290	uint res = DY;
philpem@0	6291	uint ea = EA_AL_32();
philpem@0	6292
philpem@0	6293	m68ki_write_32(ea, res);
philpem@0	6294
philpem@0	6295	FLAG_N = NFLAG_32(res);
philpem@0	6296	FLAG_Z = res;
philpem@0	6297	FLAG_V = VFLAG_CLEAR;
philpem@0	6298	FLAG_C = CFLAG_CLEAR;
philpem@0	6299	}
philpem@0	6300
philpem@0	6301
philpem@0	6302	M68KMAKE_OP(move, 32, al, a)
philpem@0	6303	{
philpem@0	6304	uint res = AY;
philpem@0	6305	uint ea = EA_AL_32();
philpem@0	6306
philpem@0	6307	m68ki_write_32(ea, res);
philpem@0	6308
philpem@0	6309	FLAG_N = NFLAG_32(res);
philpem@0	6310	FLAG_Z = res;
philpem@0	6311	FLAG_V = VFLAG_CLEAR;
philpem@0	6312	FLAG_C = CFLAG_CLEAR;
philpem@0	6313	}
philpem@0	6314
philpem@0	6315
philpem@0	6316	M68KMAKE_OP(move, 32, al, .)
philpem@0	6317	{
philpem@0	6318	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	6319	uint ea = EA_AL_32();
philpem@0	6320
philpem@0	6321	m68ki_write_32(ea, res);
philpem@0	6322
philpem@0	6323	FLAG_N = NFLAG_32(res);
philpem@0	6324	FLAG_Z = res;
philpem@0	6325	FLAG_V = VFLAG_CLEAR;
philpem@0	6326	FLAG_C = CFLAG_CLEAR;
philpem@0	6327	}
philpem@0	6328
philpem@0	6329
philpem@0	6330	M68KMAKE_OP(movea, 16, ., d)
philpem@0	6331	{
philpem@0	6332	AX = MAKE_INT_16(DY);
philpem@0	6333	}
philpem@0	6334
philpem@0	6335
philpem@0	6336	M68KMAKE_OP(movea, 16, ., a)
philpem@0	6337	{
philpem@0	6338	AX = MAKE_INT_16(AY);
philpem@0	6339	}
philpem@0	6340
philpem@0	6341
philpem@0	6342	M68KMAKE_OP(movea, 16, ., .)
philpem@0	6343	{
philpem@0	6344	AX = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
philpem@0	6345	}
philpem@0	6346
philpem@0	6347
philpem@0	6348	M68KMAKE_OP(movea, 32, ., d)
philpem@0	6349	{
philpem@0	6350	AX = DY;
philpem@0	6351	}
philpem@0	6352
philpem@0	6353
philpem@0	6354	M68KMAKE_OP(movea, 32, ., a)
philpem@0	6355	{
philpem@0	6356	AX = AY;
philpem@0	6357	}
philpem@0	6358
philpem@0	6359
philpem@0	6360	M68KMAKE_OP(movea, 32, ., .)
philpem@0	6361	{
philpem@0	6362	AX = M68KMAKE_GET_OPER_AY_32;
philpem@0	6363	}
philpem@0	6364
philpem@0	6365
philpem@0	6366	M68KMAKE_OP(move, 16, frc, d)
philpem@0	6367	{
philpem@0	6368	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6369	{
philpem@0	6370	DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();
philpem@0	6371	return;
philpem@0	6372	}
philpem@0	6373	m68ki_exception_illegal();
philpem@0	6374	}
philpem@0	6375
philpem@0	6376
philpem@0	6377	M68KMAKE_OP(move, 16, frc, .)
philpem@0	6378	{
philpem@0	6379	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6380	{
philpem@0	6381	m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr());
philpem@0	6382	return;
philpem@0	6383	}
philpem@0	6384	m68ki_exception_illegal();
philpem@0	6385	}
philpem@0	6386
philpem@0	6387
philpem@0	6388	M68KMAKE_OP(move, 16, toc, d)
philpem@0	6389	{
philpem@0	6390	m68ki_set_ccr(DY);
philpem@0	6391	}
philpem@0	6392
philpem@0	6393
philpem@0	6394	M68KMAKE_OP(move, 16, toc, .)
philpem@0	6395	{
philpem@0	6396	m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16);
philpem@0	6397	}
philpem@0	6398
philpem@0	6399
philpem@0	6400	M68KMAKE_OP(move, 16, frs, d)
philpem@0	6401	{
philpem@0	6402	if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
philpem@0	6403	{
philpem@0	6404	DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();
philpem@0	6405	return;
philpem@0	6406	}
philpem@0	6407	m68ki_exception_privilege_violation();
philpem@0	6408	}
philpem@0	6409
philpem@0	6410
philpem@0	6411	M68KMAKE_OP(move, 16, frs, .)
philpem@0	6412	{
philpem@0	6413	if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
philpem@0	6414	{
philpem@0	6415	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	6416	m68ki_write_16(ea, m68ki_get_sr());
philpem@0	6417	return;
philpem@0	6418	}
philpem@0	6419	m68ki_exception_privilege_violation();
philpem@0	6420	}
philpem@0	6421
philpem@0	6422
philpem@0	6423	M68KMAKE_OP(move, 16, tos, d)
philpem@0	6424	{
philpem@0	6425	if(FLAG_S)
philpem@0	6426	{
philpem@0	6427	m68ki_set_sr(DY);
philpem@0	6428	return;
philpem@0	6429	}
philpem@0	6430	m68ki_exception_privilege_violation();
philpem@0	6431	}
philpem@0	6432
philpem@0	6433
philpem@0	6434	M68KMAKE_OP(move, 16, tos, .)
philpem@0	6435	{
philpem@0	6436	if(FLAG_S)
philpem@0	6437	{
philpem@0	6438	uint new_sr = M68KMAKE_GET_OPER_AY_16;
philpem@0	6439	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6440	m68ki_set_sr(new_sr);
philpem@0	6441	return;
philpem@0	6442	}
philpem@0	6443	m68ki_exception_privilege_violation();
philpem@0	6444	}
philpem@0	6445
philpem@0	6446
philpem@0	6447	M68KMAKE_OP(move, 32, fru, .)
philpem@0	6448	{
philpem@0	6449	if(FLAG_S)
philpem@0	6450	{
philpem@0	6451	AY = REG_USP;
philpem@0	6452	return;
philpem@0	6453	}
philpem@0	6454	m68ki_exception_privilege_violation();
philpem@0	6455	}
philpem@0	6456
philpem@0	6457
philpem@0	6458	M68KMAKE_OP(move, 32, tou, .)
philpem@0	6459	{
philpem@0	6460	if(FLAG_S)
philpem@0	6461	{
philpem@0	6462	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6463	REG_USP = AY;
philpem@0	6464	return;
philpem@0	6465	}
philpem@0	6466	m68ki_exception_privilege_violation();
philpem@0	6467	}
philpem@0	6468
philpem@0	6469
philpem@0	6470	M68KMAKE_OP(movec, 32, cr, .)
philpem@0	6471	{
philpem@0	6472	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6473	{
philpem@0	6474	if(FLAG_S)
philpem@0	6475	{
philpem@0	6476	uint word2 = OPER_I_16();
philpem@0	6477
philpem@0	6478	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6479	switch (word2 & 0xfff)
philpem@0	6480	{
philpem@0	6481	case 0x000: /* SFC */
philpem@0	6482	REG_DA[(word2 >> 12) & 15] = REG_SFC;
philpem@0	6483	return;
philpem@0	6484	case 0x001: /* DFC */
philpem@0	6485	REG_DA[(word2 >> 12) & 15] = REG_DFC;
philpem@0	6486	return;
philpem@0	6487	case 0x002: /* CACR */
philpem@0	6488	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6489	{
philpem@0	6490	REG_DA[(word2 >> 12) & 15] = REG_CACR;
philpem@0	6491	return;
philpem@0	6492	}
philpem@0	6493	return;
philpem@0	6494	case 0x800: /* USP */
philpem@0	6495	REG_DA[(word2 >> 12) & 15] = REG_USP;
philpem@0	6496	return;
philpem@0	6497	case 0x801: /* VBR */
philpem@0	6498	REG_DA[(word2 >> 12) & 15] = REG_VBR;
philpem@0	6499	return;
philpem@0	6500	case 0x802: /* CAAR */
philpem@0	6501	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6502	{
philpem@0	6503	REG_DA[(word2 >> 12) & 15] = REG_CAAR;
philpem@0	6504	return;
philpem@0	6505	}
philpem@0	6506	m68ki_exception_illegal();
philpem@0	6507	break;
philpem@0	6508	case 0x803: /* MSP */
philpem@0	6509	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6510	{
philpem@0	6511	REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;
philpem@0	6512	return;
philpem@0	6513	}
philpem@0	6514	m68ki_exception_illegal();
philpem@0	6515	return;
philpem@0	6516	case 0x804: /* ISP */
philpem@0	6517	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6518	{
philpem@0	6519	REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;
philpem@0	6520	return;
philpem@0	6521	}
philpem@0	6522	m68ki_exception_illegal();
philpem@0	6523	return;
philpem@0	6524	default:
philpem@0	6525	m68ki_exception_illegal();
philpem@0	6526	return;
philpem@0	6527	}
philpem@0	6528	}
philpem@0	6529	m68ki_exception_privilege_violation();
philpem@0	6530	return;
philpem@0	6531	}
philpem@0	6532	m68ki_exception_illegal();
philpem@0	6533	}
philpem@0	6534
philpem@0	6535
philpem@0	6536	M68KMAKE_OP(movec, 32, rc, .)
philpem@0	6537	{
philpem@0	6538	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6539	{
philpem@0	6540	if(FLAG_S)
philpem@0	6541	{
philpem@0	6542	uint word2 = OPER_I_16();
philpem@0	6543
philpem@0	6544	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6545	switch (word2 & 0xfff)
philpem@0	6546	{
philpem@0	6547	case 0x000: /* SFC */
philpem@0	6548	REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;
philpem@0	6549	return;
philpem@0	6550	case 0x001: /* DFC */
philpem@0	6551	REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;
philpem@0	6552	return;
philpem@0	6553	case 0x002: /* CACR */
philpem@0	6554	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6555	{
philpem@0	6556	REG_CACR = REG_DA[(word2 >> 12) & 15];
philpem@0	6557	return;
philpem@0	6558	}
philpem@0	6559	m68ki_exception_illegal();
philpem@0	6560	return;
philpem@0	6561	case 0x800: /* USP */
philpem@0	6562	REG_USP = REG_DA[(word2 >> 12) & 15];
philpem@0	6563	return;
philpem@0	6564	case 0x801: /* VBR */
philpem@0	6565	REG_VBR = REG_DA[(word2 >> 12) & 15];
philpem@0	6566	return;
philpem@0	6567	case 0x802: /* CAAR */
philpem@0	6568	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6569	{
philpem@0	6570	REG_CAAR = REG_DA[(word2 >> 12) & 15];
philpem@0	6571	return;
philpem@0	6572	}
philpem@0	6573	m68ki_exception_illegal();
philpem@0	6574	return;
philpem@0	6575	case 0x803: /* MSP */
philpem@0	6576	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6577	{
philpem@0	6578	/* we are in supervisor mode so just check for M flag */
philpem@0	6579	if(!FLAG_M)
philpem@0	6580	{
philpem@0	6581	REG_MSP = REG_DA[(word2 >> 12) & 15];
philpem@0	6582	return;
philpem@0	6583	}
philpem@0	6584	REG_SP = REG_DA[(word2 >> 12) & 15];
philpem@0	6585	return;
philpem@0	6586	}
philpem@0	6587	m68ki_exception_illegal();
philpem@0	6588	return;
philpem@0	6589	case 0x804: /* ISP */
philpem@0	6590	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6591	{
philpem@0	6592	if(!FLAG_M)
philpem@0	6593	{
philpem@0	6594	REG_SP = REG_DA[(word2 >> 12) & 15];
philpem@0	6595	return;
philpem@0	6596	}
philpem@0	6597	REG_ISP = REG_DA[(word2 >> 12) & 15];
philpem@0	6598	return;
philpem@0	6599	}
philpem@0	6600	m68ki_exception_illegal();
philpem@0	6601	return;
philpem@0	6602	default:
philpem@0	6603	m68ki_exception_illegal();
philpem@0	6604	return;
philpem@0	6605	}
philpem@0	6606	}
philpem@0	6607	m68ki_exception_privilege_violation();
philpem@0	6608	return;
philpem@0	6609	}
philpem@0	6610	m68ki_exception_illegal();
philpem@0	6611	}
philpem@0	6612
philpem@0	6613
philpem@0	6614	M68KMAKE_OP(movem, 16, re, pd)
philpem@0	6615	{
philpem@0	6616	uint i = 0;
philpem@0	6617	uint register_list = OPER_I_16();
philpem@0	6618	uint ea = AY;
philpem@0	6619	uint count = 0;
philpem@0	6620
philpem@0	6621	for(; i < 16; i++)
philpem@0	6622	if(register_list & (1 << i))
philpem@0	6623	{
philpem@0	6624	ea -= 2;
philpem@0	6625	m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));
philpem@0	6626	count++;
philpem@0	6627	}
philpem@0	6628	AY = ea;
philpem@0	6629
philpem@0	6630	USE_CYCLES(count<<CYC_MOVEM_W);
philpem@0	6631	}
philpem@0	6632
philpem@0	6633
philpem@0	6634	M68KMAKE_OP(movem, 16, re, .)
philpem@0	6635	{
philpem@0	6636	uint i = 0;
philpem@0	6637	uint register_list = OPER_I_16();
philpem@0	6638	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	6639	uint count = 0;
philpem@0	6640
philpem@0	6641	for(; i < 16; i++)
philpem@0	6642	if(register_list & (1 << i))
philpem@0	6643	{
philpem@0	6644	m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));
philpem@0	6645	ea += 2;
philpem@0	6646	count++;
philpem@0	6647	}
philpem@0	6648
philpem@0	6649	USE_CYCLES(count<<CYC_MOVEM_W);
philpem@0	6650	}
philpem@0	6651
philpem@0	6652
philpem@0	6653	M68KMAKE_OP(movem, 32, re, pd)
philpem@0	6654	{
philpem@0	6655	uint i = 0;
philpem@0	6656	uint register_list = OPER_I_16();
philpem@0	6657	uint ea = AY;
philpem@0	6658	uint count = 0;
philpem@0	6659
philpem@0	6660	for(; i < 16; i++)
philpem@0	6661	if(register_list & (1 << i))
philpem@0	6662	{
philpem@0	6663	ea -= 4;
philpem@0	6664	m68ki_write_32(ea, REG_DA[15-i]);
philpem@0	6665	count++;
philpem@0	6666	}
philpem@0	6667	AY = ea;
philpem@0	6668
philpem@0	6669	USE_CYCLES(count<<CYC_MOVEM_L);
philpem@0	6670	}
philpem@0	6671
philpem@0	6672
philpem@0	6673	M68KMAKE_OP(movem, 32, re, .)
philpem@0	6674	{
philpem@0	6675	uint i = 0;
philpem@0	6676	uint register_list = OPER_I_16();
philpem@0	6677	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	6678	uint count = 0;
philpem@0	6679
philpem@0	6680	for(; i < 16; i++)
philpem@0	6681	if(register_list & (1 << i))
philpem@0	6682	{
philpem@0	6683	m68ki_write_32(ea, REG_DA[i]);
philpem@0	6684	ea += 4;
philpem@0	6685	count++;
philpem@0	6686	}
philpem@0	6687
philpem@0	6688	USE_CYCLES(count<<CYC_MOVEM_L);
philpem@0	6689	}
philpem@0	6690
philpem@0	6691
philpem@0	6692	M68KMAKE_OP(movem, 16, er, pi)
philpem@0	6693	{
philpem@0	6694	uint i = 0;
philpem@0	6695	uint register_list = OPER_I_16();
philpem@0	6696	uint ea = AY;
philpem@0	6697	uint count = 0;
philpem@0	6698
philpem@0	6699	for(; i < 16; i++)
philpem@0	6700	if(register_list & (1 << i))
philpem@0	6701	{
philpem@0	6702	REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
philpem@0	6703	ea += 2;
philpem@0	6704	count++;
philpem@0	6705	}
philpem@0	6706	AY = ea;
philpem@0	6707
philpem@0	6708	USE_CYCLES(count<<CYC_MOVEM_W);
philpem@0	6709	}
philpem@0	6710
philpem@0	6711
philpem@0	6712	M68KMAKE_OP(movem, 16, er, .)
philpem@0	6713	{
philpem@0	6714	uint i = 0;
philpem@0	6715	uint register_list = OPER_I_16();
philpem@0	6716	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	6717	uint count = 0;
philpem@0	6718
philpem@0	6719	for(; i < 16; i++)
philpem@0	6720	if(register_list & (1 << i))
philpem@0	6721	{
philpem@0	6722	REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
philpem@0	6723	ea += 2;
philpem@0	6724	count++;
philpem@0	6725	}
philpem@0	6726
philpem@0	6727	USE_CYCLES(count<<CYC_MOVEM_W);
philpem@0	6728	}
philpem@0	6729
philpem@0	6730
philpem@0	6731	M68KMAKE_OP(movem, 32, er, pi)
philpem@0	6732	{
philpem@0	6733	uint i = 0;
philpem@0	6734	uint register_list = OPER_I_16();
philpem@0	6735	uint ea = AY;
philpem@0	6736	uint count = 0;
philpem@0	6737
philpem@0	6738	for(; i < 16; i++)
philpem@0	6739	if(register_list & (1 << i))
philpem@0	6740	{
philpem@0	6741	REG_DA[i] = m68ki_read_32(ea);
philpem@0	6742	ea += 4;
philpem@0	6743	count++;
philpem@0	6744	}
philpem@0	6745	AY = ea;
philpem@0	6746
philpem@0	6747	USE_CYCLES(count<<CYC_MOVEM_L);
philpem@0	6748	}
philpem@0	6749
philpem@0	6750
philpem@0	6751	M68KMAKE_OP(movem, 32, er, .)
philpem@0	6752	{
philpem@0	6753	uint i = 0;
philpem@0	6754	uint register_list = OPER_I_16();
philpem@0	6755	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	6756	uint count = 0;
philpem@0	6757
philpem@0	6758	for(; i < 16; i++)
philpem@0	6759	if(register_list & (1 << i))
philpem@0	6760	{
philpem@0	6761	REG_DA[i] = m68ki_read_32(ea);
philpem@0	6762	ea += 4;
philpem@0	6763	count++;
philpem@0	6764	}
philpem@0	6765
philpem@0	6766	USE_CYCLES(count<<CYC_MOVEM_L);
philpem@0	6767	}
philpem@0	6768
philpem@0	6769
philpem@0	6770	M68KMAKE_OP(movep, 16, re, .)
philpem@0	6771	{
philpem@0	6772	uint ea = EA_AY_DI_16();
philpem@0	6773	uint src = DX;
philpem@0	6774
philpem@0	6775	m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8));
philpem@0	6776	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
philpem@0	6777	}
philpem@0	6778
philpem@0	6779
philpem@0	6780	M68KMAKE_OP(movep, 32, re, .)
philpem@0	6781	{
philpem@0	6782	uint ea = EA_AY_DI_32();
philpem@0	6783	uint src = DX;
philpem@0	6784
philpem@0	6785	m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));
philpem@0	6786	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));
philpem@0	6787	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));
philpem@0	6788	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
philpem@0	6789	}
philpem@0	6790
philpem@0	6791
philpem@0	6792	M68KMAKE_OP(movep, 16, er, .)
philpem@0	6793	{
philpem@0	6794	uint ea = EA_AY_DI_16();
philpem@0	6795	uint* r_dst = &DX;
philpem@0	6796
philpem@0	6797	*r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));
philpem@0	6798	}
philpem@0	6799
philpem@0	6800
philpem@0	6801	M68KMAKE_OP(movep, 32, er, .)
philpem@0	6802	{
philpem@0	6803	uint ea = EA_AY_DI_32();
philpem@0	6804
philpem@0	6805	DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)
philpem@0	6806	+ (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);
philpem@0	6807	}
philpem@0	6808
philpem@0	6809
philpem@0	6810	M68KMAKE_OP(moves, 8, ., .)
philpem@0	6811	{
philpem@0	6812	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6813	{
philpem@0	6814	if(FLAG_S)
philpem@0	6815	{
philpem@0	6816	uint word2 = OPER_I_16();
philpem@0	6817	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	6818
philpem@0	6819	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6820	if(BIT_B(word2)) /* Register to memory */
philpem@0	6821	{
philpem@0	6822	m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
philpem@0	6823	return;
philpem@0	6824	}
philpem@0	6825	if(BIT_F(word2)) /* Memory to address register */
philpem@0	6826	{
philpem@0	6827	REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
philpem@0	6828	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6829	USE_CYCLES(2);
philpem@0	6830	return;
philpem@0	6831	}
philpem@0	6832	/* Memory to data register */
philpem@0	6833	REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
philpem@0	6834	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6835	USE_CYCLES(2);
philpem@0	6836	return;
philpem@0	6837	}
philpem@0	6838	m68ki_exception_privilege_violation();
philpem@0	6839	return;
philpem@0	6840	}
philpem@0	6841	m68ki_exception_illegal();
philpem@0	6842	}
philpem@0	6843
philpem@0	6844
philpem@0	6845	M68KMAKE_OP(moves, 16, ., .)
philpem@0	6846	{
philpem@0	6847	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6848	{
philpem@0	6849	if(FLAG_S)
philpem@0	6850	{
philpem@0	6851	uint word2 = OPER_I_16();
philpem@0	6852	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	6853
philpem@0	6854	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6855	if(BIT_B(word2)) /* Register to memory */
philpem@0	6856	{
philpem@0	6857	m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
philpem@0	6858	return;
philpem@0	6859	}
philpem@0	6860	if(BIT_F(word2)) /* Memory to address register */
philpem@0	6861	{
philpem@0	6862	REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
philpem@0	6863	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6864	USE_CYCLES(2);
philpem@0	6865	return;
philpem@0	6866	}
philpem@0	6867	/* Memory to data register */
philpem@0	6868	REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
philpem@0	6869	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6870	USE_CYCLES(2);
philpem@0	6871	return;
philpem@0	6872	}
philpem@0	6873	m68ki_exception_privilege_violation();
philpem@0	6874	return;
philpem@0	6875	}
philpem@0	6876	m68ki_exception_illegal();
philpem@0	6877	}
philpem@0	6878
philpem@0	6879
philpem@0	6880	M68KMAKE_OP(moves, 32, ., .)
philpem@0	6881	{
philpem@0	6882	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	6883	{
philpem@0	6884	if(FLAG_S)
philpem@0	6885	{
philpem@0	6886	uint word2 = OPER_I_16();
philpem@0	6887	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	6888
philpem@0	6889	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	6890	if(BIT_B(word2)) /* Register to memory */
philpem@0	6891	{
philpem@0	6892	m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
philpem@0	6893	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6894	USE_CYCLES(2);
philpem@0	6895	return;
philpem@0	6896	}
philpem@0	6897	/* Memory to register */
philpem@0	6898	REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
philpem@0	6899	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	6900	USE_CYCLES(2);
philpem@0	6901	return;
philpem@0	6902	}
philpem@0	6903	m68ki_exception_privilege_violation();
philpem@0	6904	return;
philpem@0	6905	}
philpem@0	6906	m68ki_exception_illegal();
philpem@0	6907	}
philpem@0	6908
philpem@0	6909
philpem@0	6910	M68KMAKE_OP(moveq, 32, ., .)
philpem@0	6911	{
philpem@0	6912	uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));
philpem@0	6913
philpem@0	6914	FLAG_N = NFLAG_32(res);
philpem@0	6915	FLAG_Z = res;
philpem@0	6916	FLAG_V = VFLAG_CLEAR;
philpem@0	6917	FLAG_C = CFLAG_CLEAR;
philpem@0	6918	}
philpem@0	6919
philpem@0	6920
philpem@0	6921	M68KMAKE_OP(muls, 16, ., d)
philpem@0	6922	{
philpem@0	6923	uint* r_dst = &DX;
philpem@0	6924	uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
philpem@0	6925
philpem@0	6926	*r_dst = res;
philpem@0	6927
philpem@0	6928	FLAG_Z = res;
philpem@0	6929	FLAG_N = NFLAG_32(res);
philpem@0	6930	FLAG_V = VFLAG_CLEAR;
philpem@0	6931	FLAG_C = CFLAG_CLEAR;
philpem@0	6932	}
philpem@0	6933
philpem@0	6934
philpem@0	6935	M68KMAKE_OP(muls, 16, ., .)
philpem@0	6936	{
philpem@0	6937	uint* r_dst = &DX;
philpem@0	6938	uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
philpem@0	6939
philpem@0	6940	*r_dst = res;
philpem@0	6941
philpem@0	6942	FLAG_Z = res;
philpem@0	6943	FLAG_N = NFLAG_32(res);
philpem@0	6944	FLAG_V = VFLAG_CLEAR;
philpem@0	6945	FLAG_C = CFLAG_CLEAR;
philpem@0	6946	}
philpem@0	6947
philpem@0	6948
philpem@0	6949	M68KMAKE_OP(mulu, 16, ., d)
philpem@0	6950	{
philpem@0	6951	uint* r_dst = &DX;
philpem@0	6952	uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);
philpem@0	6953
philpem@0	6954	*r_dst = res;
philpem@0	6955
philpem@0	6956	FLAG_Z = res;
philpem@0	6957	FLAG_N = NFLAG_32(res);
philpem@0	6958	FLAG_V = VFLAG_CLEAR;
philpem@0	6959	FLAG_C = CFLAG_CLEAR;
philpem@0	6960	}
philpem@0	6961
philpem@0	6962
philpem@0	6963	M68KMAKE_OP(mulu, 16, ., .)
philpem@0	6964	{
philpem@0	6965	uint* r_dst = &DX;
philpem@0	6966	uint res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
philpem@0	6967
philpem@0	6968	*r_dst = res;
philpem@0	6969
philpem@0	6970	FLAG_Z = res;
philpem@0	6971	FLAG_N = NFLAG_32(res);
philpem@0	6972	FLAG_V = VFLAG_CLEAR;
philpem@0	6973	FLAG_C = CFLAG_CLEAR;
philpem@0	6974	}
philpem@0	6975
philpem@0	6976
philpem@0	6977	M68KMAKE_OP(mull, 32, ., d)
philpem@0	6978	{
philpem@0	6979	#if M68K_USE_64_BIT
philpem@0	6980
philpem@0	6981	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	6982	{
philpem@0	6983	uint word2 = OPER_I_16();
philpem@0	6984	uint64 src = DY;
philpem@0	6985	uint64 dst = REG_D[(word2 >> 12) & 7];
philpem@0	6986	uint64 res;
philpem@0	6987
philpem@0	6988	FLAG_C = CFLAG_CLEAR;
philpem@0	6989
philpem@0	6990	if(BIT_B(word2)) /* signed */
philpem@0	6991	{
philpem@0	6992	res = (sint64)((sint32)src) * (sint64)((sint32)dst);
philpem@0	6993	if(!BIT_A(word2))
philpem@0	6994	{
philpem@0	6995	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	6996	FLAG_N = NFLAG_32(res);
philpem@0	6997	FLAG_V = ((sint64)res != (sint32)res)<<7;
philpem@0	6998	REG_D[(word2 >> 12) & 7] = FLAG_Z;
philpem@0	6999	return;
philpem@0	7000	}
philpem@0	7001	FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
philpem@0	7002	FLAG_N = NFLAG_64(res);
philpem@0	7003	FLAG_V = VFLAG_CLEAR;
philpem@0	7004	REG_D[word2 & 7] = (res >> 32);
philpem@0	7005	REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
philpem@0	7006	return;
philpem@0	7007	}
philpem@0	7008
philpem@0	7009	res = src * dst;
philpem@0	7010	if(!BIT_A(word2))
philpem@0	7011	{
philpem@0	7012	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	7013	FLAG_N = NFLAG_32(res);
philpem@0	7014	FLAG_V = (res > 0xffffffff)<<7;
philpem@0	7015	REG_D[(word2 >> 12) & 7] = FLAG_Z;
philpem@0	7016	return;
philpem@0	7017	}
philpem@0	7018	FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
philpem@0	7019	FLAG_N = NFLAG_64(res);
philpem@0	7020	FLAG_V = VFLAG_CLEAR;
philpem@0	7021	REG_D[word2 & 7] = (res >> 32);
philpem@0	7022	REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
philpem@0	7023	return;
philpem@0	7024	}
philpem@0	7025	m68ki_exception_illegal();
philpem@0	7026
philpem@0	7027	#else
philpem@0	7028
philpem@0	7029	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7030	{
philpem@0	7031	uint word2 = OPER_I_16();
philpem@0	7032	uint src = DY;
philpem@0	7033	uint dst = REG_D[(word2 >> 12) & 7];
philpem@0	7034	uint neg = GET_MSB_32(src ^ dst);
philpem@0	7035	uint src1;
philpem@0	7036	uint src2;
philpem@0	7037	uint dst1;
philpem@0	7038	uint dst2;
philpem@0	7039	uint r1;
philpem@0	7040	uint r2;
philpem@0	7041	uint r3;
philpem@0	7042	uint r4;
philpem@0	7043	uint lo;
philpem@0	7044	uint hi;
philpem@0	7045
philpem@0	7046	FLAG_C = CFLAG_CLEAR;
philpem@0	7047
philpem@0	7048	if(BIT_B(word2)) /* signed */
philpem@0	7049	{
philpem@0	7050	if(GET_MSB_32(src))
philpem@0	7051	src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
philpem@0	7052	if(GET_MSB_32(dst))
philpem@0	7053	dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
philpem@0	7054	}
philpem@0	7055
philpem@0	7056	src1 = MASK_OUT_ABOVE_16(src);
philpem@0	7057	src2 = src>>16;
philpem@0	7058	dst1 = MASK_OUT_ABOVE_16(dst);
philpem@0	7059	dst2 = dst>>16;
philpem@0	7060
philpem@0	7061
philpem@0	7062	r1 = src1 * dst1;
philpem@0	7063	r2 = src1 * dst2;
philpem@0	7064	r3 = src2 * dst1;
philpem@0	7065	r4 = src2 * dst2;
philpem@0	7066
philpem@0	7067	lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
philpem@0	7068	hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
philpem@0	7069
philpem@0	7070	if(BIT_B(word2) && neg)
philpem@0	7071	{
philpem@0	7072	hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
philpem@0	7073	lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
philpem@0	7074	}
philpem@0	7075
philpem@0	7076	if(BIT_A(word2))
philpem@0	7077	{
philpem@0	7078	REG_D[word2 & 7] = hi;
philpem@0	7079	REG_D[(word2 >> 12) & 7] = lo;
philpem@0	7080	FLAG_N = NFLAG_32(hi);
philpem@0	7081	FLAG_Z = hi | lo;
philpem@0	7082	FLAG_V = VFLAG_CLEAR;
philpem@0	7083	return;
philpem@0	7084	}
philpem@0	7085
philpem@0	7086	REG_D[(word2 >> 12) & 7] = lo;
philpem@0	7087	FLAG_N = NFLAG_32(lo);
philpem@0	7088	FLAG_Z = lo;
philpem@0	7089	if(BIT_B(word2))
philpem@0	7090	FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
philpem@0	7091	else
philpem@0	7092	FLAG_V = (hi != 0) << 7;
philpem@0	7093	return;
philpem@0	7094	}
philpem@0	7095	m68ki_exception_illegal();
philpem@0	7096
philpem@0	7097	#endif
philpem@0	7098	}
philpem@0	7099
philpem@0	7100
philpem@0	7101	M68KMAKE_OP(mull, 32, ., .)
philpem@0	7102	{
philpem@0	7103	#if M68K_USE_64_BIT
philpem@0	7104
philpem@0	7105	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7106	{
philpem@0	7107	uint word2 = OPER_I_16();
philpem@0	7108	uint64 src = M68KMAKE_GET_OPER_AY_32;
philpem@0	7109	uint64 dst = REG_D[(word2 >> 12) & 7];
philpem@0	7110	uint64 res;
philpem@0	7111
philpem@0	7112	FLAG_C = CFLAG_CLEAR;
philpem@0	7113
philpem@0	7114	if(BIT_B(word2)) /* signed */
philpem@0	7115	{
philpem@0	7116	res = (sint64)((sint32)src) * (sint64)((sint32)dst);
philpem@0	7117	if(!BIT_A(word2))
philpem@0	7118	{
philpem@0	7119	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	7120	FLAG_N = NFLAG_32(res);
philpem@0	7121	FLAG_V = ((sint64)res != (sint32)res)<<7;
philpem@0	7122	REG_D[(word2 >> 12) & 7] = FLAG_Z;
philpem@0	7123	return;
philpem@0	7124	}
philpem@0	7125	FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
philpem@0	7126	FLAG_N = NFLAG_64(res);
philpem@0	7127	FLAG_V = VFLAG_CLEAR;
philpem@0	7128	REG_D[word2 & 7] = (res >> 32);
philpem@0	7129	REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
philpem@0	7130	return;
philpem@0	7131	}
philpem@0	7132
philpem@0	7133	res = src * dst;
philpem@0	7134	if(!BIT_A(word2))
philpem@0	7135	{
philpem@0	7136	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	7137	FLAG_N = NFLAG_32(res);
philpem@0	7138	FLAG_V = (res > 0xffffffff)<<7;
philpem@0	7139	REG_D[(word2 >> 12) & 7] = FLAG_Z;
philpem@0	7140	return;
philpem@0	7141	}
philpem@0	7142	FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
philpem@0	7143	FLAG_N = NFLAG_64(res);
philpem@0	7144	FLAG_V = VFLAG_CLEAR;
philpem@0	7145	REG_D[word2 & 7] = (res >> 32);
philpem@0	7146	REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
philpem@0	7147	return;
philpem@0	7148	}
philpem@0	7149	m68ki_exception_illegal();
philpem@0	7150
philpem@0	7151	#else
philpem@0	7152
philpem@0	7153	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7154	{
philpem@0	7155	uint word2 = OPER_I_16();
philpem@0	7156	uint src = M68KMAKE_GET_OPER_AY_32;
philpem@0	7157	uint dst = REG_D[(word2 >> 12) & 7];
philpem@0	7158	uint neg = GET_MSB_32(src ^ dst);
philpem@0	7159	uint src1;
philpem@0	7160	uint src2;
philpem@0	7161	uint dst1;
philpem@0	7162	uint dst2;
philpem@0	7163	uint r1;
philpem@0	7164	uint r2;
philpem@0	7165	uint r3;
philpem@0	7166	uint r4;
philpem@0	7167	uint lo;
philpem@0	7168	uint hi;
philpem@0	7169
philpem@0	7170	FLAG_C = CFLAG_CLEAR;
philpem@0	7171
philpem@0	7172	if(BIT_B(word2)) /* signed */
philpem@0	7173	{
philpem@0	7174	if(GET_MSB_32(src))
philpem@0	7175	src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
philpem@0	7176	if(GET_MSB_32(dst))
philpem@0	7177	dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
philpem@0	7178	}
philpem@0	7179
philpem@0	7180	src1 = MASK_OUT_ABOVE_16(src);
philpem@0	7181	src2 = src>>16;
philpem@0	7182	dst1 = MASK_OUT_ABOVE_16(dst);
philpem@0	7183	dst2 = dst>>16;
philpem@0	7184
philpem@0	7185
philpem@0	7186	r1 = src1 * dst1;
philpem@0	7187	r2 = src1 * dst2;
philpem@0	7188	r3 = src2 * dst1;
philpem@0	7189	r4 = src2 * dst2;
philpem@0	7190
philpem@0	7191	lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
philpem@0	7192	hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
philpem@0	7193
philpem@0	7194	if(BIT_B(word2) && neg)
philpem@0	7195	{
philpem@0	7196	hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
philpem@0	7197	lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
philpem@0	7198	}
philpem@0	7199
philpem@0	7200	if(BIT_A(word2))
philpem@0	7201	{
philpem@0	7202	REG_D[word2 & 7] = hi;
philpem@0	7203	REG_D[(word2 >> 12) & 7] = lo;
philpem@0	7204	FLAG_N = NFLAG_32(hi);
philpem@0	7205	FLAG_Z = hi | lo;
philpem@0	7206	FLAG_V = VFLAG_CLEAR;
philpem@0	7207	return;
philpem@0	7208	}
philpem@0	7209
philpem@0	7210	REG_D[(word2 >> 12) & 7] = lo;
philpem@0	7211	FLAG_N = NFLAG_32(lo);
philpem@0	7212	FLAG_Z = lo;
philpem@0	7213	if(BIT_B(word2))
philpem@0	7214	FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
philpem@0	7215	else
philpem@0	7216	FLAG_V = (hi != 0) << 7;
philpem@0	7217	return;
philpem@0	7218	}
philpem@0	7219	m68ki_exception_illegal();
philpem@0	7220
philpem@0	7221	#endif
philpem@0	7222	}
philpem@0	7223
philpem@0	7224
philpem@0	7225	M68KMAKE_OP(nbcd, 8, ., d)
philpem@0	7226	{
philpem@0	7227	uint* r_dst = &DY;
philpem@0	7228	uint dst = *r_dst;
philpem@0	7229	uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
philpem@0	7230
philpem@0	7231	if(res != 0x9a)
philpem@0	7232	{
philpem@0	7233	if((res & 0x0f) == 0xa)
philpem@0	7234	res = (res & 0xf0) + 0x10;
philpem@0	7235
philpem@0	7236	res = MASK_OUT_ABOVE_8(res);
philpem@0	7237
philpem@0	7238	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	7239
philpem@0	7240	FLAG_Z |= res;
philpem@0	7241	FLAG_C = CFLAG_SET;
philpem@0	7242	FLAG_X = XFLAG_SET;
philpem@0	7243	}
philpem@0	7244	else
philpem@0	7245	{
philpem@0	7246	FLAG_C = CFLAG_CLEAR;
philpem@0	7247	FLAG_X = XFLAG_CLEAR;
philpem@0	7248	}
philpem@0	7249	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	7250	}
philpem@0	7251
philpem@0	7252
philpem@0	7253	M68KMAKE_OP(nbcd, 8, ., .)
philpem@0	7254	{
philpem@0	7255	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7256	uint dst = m68ki_read_8(ea);
philpem@0	7257	uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
philpem@0	7258
philpem@0	7259	if(res != 0x9a)
philpem@0	7260	{
philpem@0	7261	if((res & 0x0f) == 0xa)
philpem@0	7262	res = (res & 0xf0) + 0x10;
philpem@0	7263
philpem@0	7264	res = MASK_OUT_ABOVE_8(res);
philpem@0	7265
philpem@0	7266	m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
philpem@0	7267
philpem@0	7268	FLAG_Z |= res;
philpem@0	7269	FLAG_C = CFLAG_SET;
philpem@0	7270	FLAG_X = XFLAG_SET;
philpem@0	7271	}
philpem@0	7272	else
philpem@0	7273	{
philpem@0	7274	FLAG_C = CFLAG_CLEAR;
philpem@0	7275	FLAG_X = XFLAG_CLEAR;
philpem@0	7276	}
philpem@0	7277	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	7278	}
philpem@0	7279
philpem@0	7280
philpem@0	7281	M68KMAKE_OP(neg, 8, ., d)
philpem@0	7282	{
philpem@0	7283	uint* r_dst = &DY;
philpem@0	7284	uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);
philpem@0	7285
philpem@0	7286	FLAG_N = NFLAG_8(res);
philpem@0	7287	FLAG_C = FLAG_X = CFLAG_8(res);
philpem@0	7288	FLAG_V = *r_dst & res;
philpem@0	7289	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	7290
philpem@0	7291	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	7292	}
philpem@0	7293
philpem@0	7294
philpem@0	7295	M68KMAKE_OP(neg, 8, ., .)
philpem@0	7296	{
philpem@0	7297	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7298	uint src = m68ki_read_8(ea);
philpem@0	7299	uint res = 0 - src;
philpem@0	7300
philpem@0	7301	FLAG_N = NFLAG_8(res);
philpem@0	7302	FLAG_C = FLAG_X = CFLAG_8(res);
philpem@0	7303	FLAG_V = src & res;
philpem@0	7304	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	7305
philpem@0	7306	m68ki_write_8(ea, FLAG_Z);
philpem@0	7307	}
philpem@0	7308
philpem@0	7309
philpem@0	7310	M68KMAKE_OP(neg, 16, ., d)
philpem@0	7311	{
philpem@0	7312	uint* r_dst = &DY;
philpem@0	7313	uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);
philpem@0	7314
philpem@0	7315	FLAG_N = NFLAG_16(res);
philpem@0	7316	FLAG_C = FLAG_X = CFLAG_16(res);
philpem@0	7317	FLAG_V = (*r_dst & res)>>8;
philpem@0	7318	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	7319
philpem@0	7320	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	7321	}
philpem@0	7322
philpem@0	7323
philpem@0	7324	M68KMAKE_OP(neg, 16, ., .)
philpem@0	7325	{
philpem@0	7326	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7327	uint src = m68ki_read_16(ea);
philpem@0	7328	uint res = 0 - src;
philpem@0	7329
philpem@0	7330	FLAG_N = NFLAG_16(res);
philpem@0	7331	FLAG_C = FLAG_X = CFLAG_16(res);
philpem@0	7332	FLAG_V = (src & res)>>8;
philpem@0	7333	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	7334
philpem@0	7335	m68ki_write_16(ea, FLAG_Z);
philpem@0	7336	}
philpem@0	7337
philpem@0	7338
philpem@0	7339	M68KMAKE_OP(neg, 32, ., d)
philpem@0	7340	{
philpem@0	7341	uint* r_dst = &DY;
philpem@0	7342	uint res = 0 - *r_dst;
philpem@0	7343
philpem@0	7344	FLAG_N = NFLAG_32(res);
philpem@0	7345	FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);
philpem@0	7346	FLAG_V = (*r_dst & res)>>24;
philpem@0	7347	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	7348
philpem@0	7349	*r_dst = FLAG_Z;
philpem@0	7350	}
philpem@0	7351
philpem@0	7352
philpem@0	7353	M68KMAKE_OP(neg, 32, ., .)
philpem@0	7354	{
philpem@0	7355	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7356	uint src = m68ki_read_32(ea);
philpem@0	7357	uint res = 0 - src;
philpem@0	7358
philpem@0	7359	FLAG_N = NFLAG_32(res);
philpem@0	7360	FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
philpem@0	7361	FLAG_V = (src & res)>>24;
philpem@0	7362	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	7363
philpem@0	7364	m68ki_write_32(ea, FLAG_Z);
philpem@0	7365	}
philpem@0	7366
philpem@0	7367
philpem@0	7368	M68KMAKE_OP(negx, 8, ., d)
philpem@0	7369	{
philpem@0	7370	uint* r_dst = &DY;
philpem@0	7371	uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();
philpem@0	7372
philpem@0	7373	FLAG_N = NFLAG_8(res);
philpem@0	7374	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	7375	FLAG_V = *r_dst & res;
philpem@0	7376
philpem@0	7377	res = MASK_OUT_ABOVE_8(res);
philpem@0	7378	FLAG_Z |= res;
philpem@0	7379
philpem@0	7380	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	7381	}
philpem@0	7382
philpem@0	7383
philpem@0	7384	M68KMAKE_OP(negx, 8, ., .)
philpem@0	7385	{
philpem@0	7386	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7387	uint src = m68ki_read_8(ea);
philpem@0	7388	uint res = 0 - src - XFLAG_AS_1();
philpem@0	7389
philpem@0	7390	FLAG_N = NFLAG_8(res);
philpem@0	7391	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	7392	FLAG_V = src & res;
philpem@0	7393
philpem@0	7394	res = MASK_OUT_ABOVE_8(res);
philpem@0	7395	FLAG_Z |= res;
philpem@0	7396
philpem@0	7397	m68ki_write_8(ea, res);
philpem@0	7398	}
philpem@0	7399
philpem@0	7400
philpem@0	7401	M68KMAKE_OP(negx, 16, ., d)
philpem@0	7402	{
philpem@0	7403	uint* r_dst = &DY;
philpem@0	7404	uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();
philpem@0	7405
philpem@0	7406	FLAG_N = NFLAG_16(res);
philpem@0	7407	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	7408	FLAG_V = (*r_dst & res)>>8;
philpem@0	7409
philpem@0	7410	res = MASK_OUT_ABOVE_16(res);
philpem@0	7411	FLAG_Z |= res;
philpem@0	7412
philpem@0	7413	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	7414	}
philpem@0	7415
philpem@0	7416
philpem@0	7417	M68KMAKE_OP(negx, 16, ., .)
philpem@0	7418	{
philpem@0	7419	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7420	uint src = m68ki_read_16(ea);
philpem@0	7421	uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
philpem@0	7422
philpem@0	7423	FLAG_N = NFLAG_16(res);
philpem@0	7424	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	7425	FLAG_V = (src & res)>>8;
philpem@0	7426
philpem@0	7427	res = MASK_OUT_ABOVE_16(res);
philpem@0	7428	FLAG_Z |= res;
philpem@0	7429
philpem@0	7430	m68ki_write_16(ea, res);
philpem@0	7431	}
philpem@0	7432
philpem@0	7433
philpem@0	7434	M68KMAKE_OP(negx, 32, ., d)
philpem@0	7435	{
philpem@0	7436	uint* r_dst = &DY;
philpem@0	7437	uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();
philpem@0	7438
philpem@0	7439	FLAG_N = NFLAG_32(res);
philpem@0	7440	FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);
philpem@0	7441	FLAG_V = (*r_dst & res)>>24;
philpem@0	7442
philpem@0	7443	res = MASK_OUT_ABOVE_32(res);
philpem@0	7444	FLAG_Z |= res;
philpem@0	7445
philpem@0	7446	*r_dst = res;
philpem@0	7447	}
philpem@0	7448
philpem@0	7449
philpem@0	7450	M68KMAKE_OP(negx, 32, ., .)
philpem@0	7451	{
philpem@0	7452	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7453	uint src = m68ki_read_32(ea);
philpem@0	7454	uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
philpem@0	7455
philpem@0	7456	FLAG_N = NFLAG_32(res);
philpem@0	7457	FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
philpem@0	7458	FLAG_V = (src & res)>>24;
philpem@0	7459
philpem@0	7460	res = MASK_OUT_ABOVE_32(res);
philpem@0	7461	FLAG_Z |= res;
philpem@0	7462
philpem@0	7463	m68ki_write_32(ea, res);
philpem@0	7464	}
philpem@0	7465
philpem@0	7466
philpem@0	7467	M68KMAKE_OP(nop, 0, ., .)
philpem@0	7468	{
philpem@0	7469	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	7470	}
philpem@0	7471
philpem@0	7472
philpem@0	7473	M68KMAKE_OP(not, 8, ., d)
philpem@0	7474	{
philpem@0	7475	uint* r_dst = &DY;
philpem@0	7476	uint res = MASK_OUT_ABOVE_8(~*r_dst);
philpem@0	7477
philpem@0	7478	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	7479
philpem@0	7480	FLAG_N = NFLAG_8(res);
philpem@0	7481	FLAG_Z = res;
philpem@0	7482	FLAG_C = CFLAG_CLEAR;
philpem@0	7483	FLAG_V = VFLAG_CLEAR;
philpem@0	7484	}
philpem@0	7485
philpem@0	7486
philpem@0	7487	M68KMAKE_OP(not, 8, ., .)
philpem@0	7488	{
philpem@0	7489	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7490	uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
philpem@0	7491
philpem@0	7492	m68ki_write_8(ea, res);
philpem@0	7493
philpem@0	7494	FLAG_N = NFLAG_8(res);
philpem@0	7495	FLAG_Z = res;
philpem@0	7496	FLAG_C = CFLAG_CLEAR;
philpem@0	7497	FLAG_V = VFLAG_CLEAR;
philpem@0	7498	}
philpem@0	7499
philpem@0	7500
philpem@0	7501	M68KMAKE_OP(not, 16, ., d)
philpem@0	7502	{
philpem@0	7503	uint* r_dst = &DY;
philpem@0	7504	uint res = MASK_OUT_ABOVE_16(~*r_dst);
philpem@0	7505
philpem@0	7506	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	7507
philpem@0	7508	FLAG_N = NFLAG_16(res);
philpem@0	7509	FLAG_Z = res;
philpem@0	7510	FLAG_C = CFLAG_CLEAR;
philpem@0	7511	FLAG_V = VFLAG_CLEAR;
philpem@0	7512	}
philpem@0	7513
philpem@0	7514
philpem@0	7515	M68KMAKE_OP(not, 16, ., .)
philpem@0	7516	{
philpem@0	7517	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7518	uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
philpem@0	7519
philpem@0	7520	m68ki_write_16(ea, res);
philpem@0	7521
philpem@0	7522	FLAG_N = NFLAG_16(res);
philpem@0	7523	FLAG_Z = res;
philpem@0	7524	FLAG_C = CFLAG_CLEAR;
philpem@0	7525	FLAG_V = VFLAG_CLEAR;
philpem@0	7526	}
philpem@0	7527
philpem@0	7528
philpem@0	7529	M68KMAKE_OP(not, 32, ., d)
philpem@0	7530	{
philpem@0	7531	uint* r_dst = &DY;
philpem@0	7532	uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
philpem@0	7533
philpem@0	7534	FLAG_N = NFLAG_32(res);
philpem@0	7535	FLAG_Z = res;
philpem@0	7536	FLAG_C = CFLAG_CLEAR;
philpem@0	7537	FLAG_V = VFLAG_CLEAR;
philpem@0	7538	}
philpem@0	7539
philpem@0	7540
philpem@0	7541	M68KMAKE_OP(not, 32, ., .)
philpem@0	7542	{
philpem@0	7543	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7544	uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
philpem@0	7545
philpem@0	7546	m68ki_write_32(ea, res);
philpem@0	7547
philpem@0	7548	FLAG_N = NFLAG_32(res);
philpem@0	7549	FLAG_Z = res;
philpem@0	7550	FLAG_C = CFLAG_CLEAR;
philpem@0	7551	FLAG_V = VFLAG_CLEAR;
philpem@0	7552	}
philpem@0	7553
philpem@0	7554
philpem@0	7555	M68KMAKE_OP(or, 8, er, d)
philpem@0	7556	{
philpem@0	7557	uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));
philpem@0	7558
philpem@0	7559	FLAG_N = NFLAG_8(res);
philpem@0	7560	FLAG_Z = res;
philpem@0	7561	FLAG_C = CFLAG_CLEAR;
philpem@0	7562	FLAG_V = VFLAG_CLEAR;
philpem@0	7563	}
philpem@0	7564
philpem@0	7565
philpem@0	7566	M68KMAKE_OP(or, 8, er, .)
philpem@0	7567	{
philpem@0	7568	uint res = MASK_OUT_ABOVE_8((DX |= M68KMAKE_GET_OPER_AY_8));
philpem@0	7569
philpem@0	7570	FLAG_N = NFLAG_8(res);
philpem@0	7571	FLAG_Z = res;
philpem@0	7572	FLAG_C = CFLAG_CLEAR;
philpem@0	7573	FLAG_V = VFLAG_CLEAR;
philpem@0	7574	}
philpem@0	7575
philpem@0	7576
philpem@0	7577	M68KMAKE_OP(or, 16, er, d)
philpem@0	7578	{
philpem@0	7579	uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));
philpem@0	7580
philpem@0	7581	FLAG_N = NFLAG_16(res);
philpem@0	7582	FLAG_Z = res;
philpem@0	7583	FLAG_C = CFLAG_CLEAR;
philpem@0	7584	FLAG_V = VFLAG_CLEAR;
philpem@0	7585	}
philpem@0	7586
philpem@0	7587
philpem@0	7588	M68KMAKE_OP(or, 16, er, .)
philpem@0	7589	{
philpem@0	7590	uint res = MASK_OUT_ABOVE_16((DX |= M68KMAKE_GET_OPER_AY_16));
philpem@0	7591
philpem@0	7592	FLAG_N = NFLAG_16(res);
philpem@0	7593	FLAG_Z = res;
philpem@0	7594	FLAG_C = CFLAG_CLEAR;
philpem@0	7595	FLAG_V = VFLAG_CLEAR;
philpem@0	7596	}
philpem@0	7597
philpem@0	7598
philpem@0	7599	M68KMAKE_OP(or, 32, er, d)
philpem@0	7600	{
philpem@0	7601	uint res = DX |= DY;
philpem@0	7602
philpem@0	7603	FLAG_N = NFLAG_32(res);
philpem@0	7604	FLAG_Z = res;
philpem@0	7605	FLAG_C = CFLAG_CLEAR;
philpem@0	7606	FLAG_V = VFLAG_CLEAR;
philpem@0	7607	}
philpem@0	7608
philpem@0	7609
philpem@0	7610	M68KMAKE_OP(or, 32, er, .)
philpem@0	7611	{
philpem@0	7612	uint res = DX |= M68KMAKE_GET_OPER_AY_32;
philpem@0	7613
philpem@0	7614	FLAG_N = NFLAG_32(res);
philpem@0	7615	FLAG_Z = res;
philpem@0	7616	FLAG_C = CFLAG_CLEAR;
philpem@0	7617	FLAG_V = VFLAG_CLEAR;
philpem@0	7618	}
philpem@0	7619
philpem@0	7620
philpem@0	7621	M68KMAKE_OP(or, 8, re, .)
philpem@0	7622	{
philpem@0	7623	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7624	uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
philpem@0	7625
philpem@0	7626	m68ki_write_8(ea, res);
philpem@0	7627
philpem@0	7628	FLAG_N = NFLAG_8(res);
philpem@0	7629	FLAG_Z = res;
philpem@0	7630	FLAG_C = CFLAG_CLEAR;
philpem@0	7631	FLAG_V = VFLAG_CLEAR;
philpem@0	7632	}
philpem@0	7633
philpem@0	7634
philpem@0	7635	M68KMAKE_OP(or, 16, re, .)
philpem@0	7636	{
philpem@0	7637	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7638	uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
philpem@0	7639
philpem@0	7640	m68ki_write_16(ea, res);
philpem@0	7641
philpem@0	7642	FLAG_N = NFLAG_16(res);
philpem@0	7643	FLAG_Z = res;
philpem@0	7644	FLAG_C = CFLAG_CLEAR;
philpem@0	7645	FLAG_V = VFLAG_CLEAR;
philpem@0	7646	}
philpem@0	7647
philpem@0	7648
philpem@0	7649	M68KMAKE_OP(or, 32, re, .)
philpem@0	7650	{
philpem@0	7651	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7652	uint res = DX | m68ki_read_32(ea);
philpem@0	7653
philpem@0	7654	m68ki_write_32(ea, res);
philpem@0	7655
philpem@0	7656	FLAG_N = NFLAG_32(res);
philpem@0	7657	FLAG_Z = res;
philpem@0	7658	FLAG_C = CFLAG_CLEAR;
philpem@0	7659	FLAG_V = VFLAG_CLEAR;
philpem@0	7660	}
philpem@0	7661
philpem@0	7662
philpem@0	7663	M68KMAKE_OP(ori, 8, ., d)
philpem@0	7664	{
philpem@0	7665	uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
philpem@0	7666
philpem@0	7667	FLAG_N = NFLAG_8(res);
philpem@0	7668	FLAG_Z = res;
philpem@0	7669	FLAG_C = CFLAG_CLEAR;
philpem@0	7670	FLAG_V = VFLAG_CLEAR;
philpem@0	7671	}
philpem@0	7672
philpem@0	7673
philpem@0	7674	M68KMAKE_OP(ori, 8, ., .)
philpem@0	7675	{
philpem@0	7676	uint src = OPER_I_8();
philpem@0	7677	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	7678	uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
philpem@0	7679
philpem@0	7680	m68ki_write_8(ea, res);
philpem@0	7681
philpem@0	7682	FLAG_N = NFLAG_8(res);
philpem@0	7683	FLAG_Z = res;
philpem@0	7684	FLAG_C = CFLAG_CLEAR;
philpem@0	7685	FLAG_V = VFLAG_CLEAR;
philpem@0	7686	}
philpem@0	7687
philpem@0	7688
philpem@0	7689	M68KMAKE_OP(ori, 16, ., d)
philpem@0	7690	{
philpem@0	7691	uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
philpem@0	7692
philpem@0	7693	FLAG_N = NFLAG_16(res);
philpem@0	7694	FLAG_Z = res;
philpem@0	7695	FLAG_C = CFLAG_CLEAR;
philpem@0	7696	FLAG_V = VFLAG_CLEAR;
philpem@0	7697	}
philpem@0	7698
philpem@0	7699
philpem@0	7700	M68KMAKE_OP(ori, 16, ., .)
philpem@0	7701	{
philpem@0	7702	uint src = OPER_I_16();
philpem@0	7703	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7704	uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
philpem@0	7705
philpem@0	7706	m68ki_write_16(ea, res);
philpem@0	7707
philpem@0	7708	FLAG_N = NFLAG_16(res);
philpem@0	7709	FLAG_Z = res;
philpem@0	7710	FLAG_C = CFLAG_CLEAR;
philpem@0	7711	FLAG_V = VFLAG_CLEAR;
philpem@0	7712	}
philpem@0	7713
philpem@0	7714
philpem@0	7715	M68KMAKE_OP(ori, 32, ., d)
philpem@0	7716	{
philpem@0	7717	uint res = DY |= OPER_I_32();
philpem@0	7718
philpem@0	7719	FLAG_N = NFLAG_32(res);
philpem@0	7720	FLAG_Z = res;
philpem@0	7721	FLAG_C = CFLAG_CLEAR;
philpem@0	7722	FLAG_V = VFLAG_CLEAR;
philpem@0	7723	}
philpem@0	7724
philpem@0	7725
philpem@0	7726	M68KMAKE_OP(ori, 32, ., .)
philpem@0	7727	{
philpem@0	7728	uint src = OPER_I_32();
philpem@0	7729	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7730	uint res = src | m68ki_read_32(ea);
philpem@0	7731
philpem@0	7732	m68ki_write_32(ea, res);
philpem@0	7733
philpem@0	7734	FLAG_N = NFLAG_32(res);
philpem@0	7735	FLAG_Z = res;
philpem@0	7736	FLAG_C = CFLAG_CLEAR;
philpem@0	7737	FLAG_V = VFLAG_CLEAR;
philpem@0	7738	}
philpem@0	7739
philpem@0	7740
philpem@0	7741	M68KMAKE_OP(ori, 16, toc, .)
philpem@0	7742	{
philpem@0	7743	m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());
philpem@0	7744	}
philpem@0	7745
philpem@0	7746
philpem@0	7747	M68KMAKE_OP(ori, 16, tos, .)
philpem@0	7748	{
philpem@0	7749	if(FLAG_S)
philpem@0	7750	{
philpem@0	7751	uint src = OPER_I_16();
philpem@0	7752	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	7753	m68ki_set_sr(m68ki_get_sr() | src);
philpem@0	7754	return;
philpem@0	7755	}
philpem@0	7756	m68ki_exception_privilege_violation();
philpem@0	7757	}
philpem@0	7758
philpem@0	7759
philpem@0	7760	M68KMAKE_OP(pack, 16, rr, .)
philpem@0	7761	{
philpem@0	7762	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7763	{
philpem@0	7764	/* Note: DX and DY are reversed in Motorola's docs */
philpem@0	7765	uint src = DY + OPER_I_16();
philpem@0	7766	uint* r_dst = &DX;
philpem@0	7767
philpem@0	7768	*r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
philpem@0	7769	return;
philpem@0	7770	}
philpem@0	7771	m68ki_exception_illegal();
philpem@0	7772	}
philpem@0	7773
philpem@0	7774
philpem@0	7775	M68KMAKE_OP(pack, 16, mm, ax7)
philpem@0	7776	{
philpem@0	7777	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7778	{
philpem@0	7779	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	7780	uint ea_src = EA_AY_PD_8();
philpem@0	7781	uint src = m68ki_read_8(ea_src);
philpem@0	7782	ea_src = EA_AY_PD_8();
philpem@0	7783	src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
philpem@0	7784
philpem@0	7785	m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
philpem@0	7786	return;
philpem@0	7787	}
philpem@0	7788	m68ki_exception_illegal();
philpem@0	7789	}
philpem@0	7790
philpem@0	7791
philpem@0	7792	M68KMAKE_OP(pack, 16, mm, ay7)
philpem@0	7793	{
philpem@0	7794	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7795	{
philpem@0	7796	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	7797	uint ea_src = EA_A7_PD_8();
philpem@0	7798	uint src = m68ki_read_8(ea_src);
philpem@0	7799	ea_src = EA_A7_PD_8();
philpem@0	7800	src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
philpem@0	7801
philpem@0	7802	m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
philpem@0	7803	return;
philpem@0	7804	}
philpem@0	7805	m68ki_exception_illegal();
philpem@0	7806	}
philpem@0	7807
philpem@0	7808
philpem@0	7809	M68KMAKE_OP(pack, 16, mm, axy7)
philpem@0	7810	{
philpem@0	7811	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7812	{
philpem@0	7813	uint ea_src = EA_A7_PD_8();
philpem@0	7814	uint src = m68ki_read_8(ea_src);
philpem@0	7815	ea_src = EA_A7_PD_8();
philpem@0	7816	src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
philpem@0	7817
philpem@0	7818	m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
philpem@0	7819	return;
philpem@0	7820	}
philpem@0	7821	m68ki_exception_illegal();
philpem@0	7822	}
philpem@0	7823
philpem@0	7824
philpem@0	7825	M68KMAKE_OP(pack, 16, mm, .)
philpem@0	7826	{
philpem@0	7827	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	7828	{
philpem@0	7829	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	7830	uint ea_src = EA_AY_PD_8();
philpem@0	7831	uint src = m68ki_read_8(ea_src);
philpem@0	7832	ea_src = EA_AY_PD_8();
philpem@0	7833	src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
philpem@0	7834
philpem@0	7835	m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
philpem@0	7836	return;
philpem@0	7837	}
philpem@0	7838	m68ki_exception_illegal();
philpem@0	7839	}
philpem@0	7840
philpem@0	7841
philpem@0	7842	M68KMAKE_OP(pea, 32, ., .)
philpem@0	7843	{
philpem@0	7844	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	7845
philpem@0	7846	m68ki_push_32(ea);
philpem@0	7847	}
philpem@0	7848
philpem@0	7849
philpem@0	7850	M68KMAKE_OP(reset, 0, ., .)
philpem@0	7851	{
philpem@0	7852	if(FLAG_S)
philpem@0	7853	{
philpem@0	7854	m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */
philpem@0	7855	USE_CYCLES(CYC_RESET);
philpem@0	7856	return;
philpem@0	7857	}
philpem@0	7858	m68ki_exception_privilege_violation();
philpem@0	7859	}
philpem@0	7860
philpem@0	7861
philpem@0	7862	M68KMAKE_OP(ror, 8, s, .)
philpem@0	7863	{
philpem@0	7864	uint* r_dst = &DY;
philpem@0	7865	uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	7866	uint shift = orig_shift & 7;
philpem@0	7867	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	7868	uint res = ROR_8(src, shift);
philpem@0	7869
philpem@0	7870	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	7871
philpem@0	7872	FLAG_N = NFLAG_8(res);
philpem@0	7873	FLAG_Z = res;
philpem@0	7874	FLAG_C = src << (9-orig_shift);
philpem@0	7875	FLAG_V = VFLAG_CLEAR;
philpem@0	7876	}
philpem@0	7877
philpem@0	7878
philpem@0	7879	M68KMAKE_OP(ror, 16, s, .)
philpem@0	7880	{
philpem@0	7881	uint* r_dst = &DY;
philpem@0	7882	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	7883	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	7884	uint res = ROR_16(src, shift);
philpem@0	7885
philpem@0	7886	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	7887
philpem@0	7888	FLAG_N = NFLAG_16(res);
philpem@0	7889	FLAG_Z = res;
philpem@0	7890	FLAG_C = src << (9-shift);
philpem@0	7891	FLAG_V = VFLAG_CLEAR;
philpem@0	7892	}
philpem@0	7893
philpem@0	7894
philpem@0	7895	M68KMAKE_OP(ror, 32, s, .)
philpem@0	7896	{
philpem@0	7897	uint* r_dst = &DY;
philpem@0	7898	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	7899	uint64 src = *r_dst;
philpem@0	7900	uint res = ROR_32(src, shift);
philpem@0	7901
philpem@0	7902	*r_dst = res;
philpem@0	7903
philpem@0	7904	FLAG_N = NFLAG_32(res);
philpem@0	7905	FLAG_Z = res;
philpem@0	7906	FLAG_C = src << (9-shift);
philpem@0	7907	FLAG_V = VFLAG_CLEAR;
philpem@0	7908	}
philpem@0	7909
philpem@0	7910
philpem@0	7911	M68KMAKE_OP(ror, 8, r, .)
philpem@0	7912	{
philpem@0	7913	uint* r_dst = &DY;
philpem@0	7914	uint orig_shift = DX & 0x3f;
philpem@0	7915	uint shift = orig_shift & 7;
philpem@0	7916	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	7917	uint res = ROR_8(src, shift);
philpem@0	7918
philpem@0	7919	if(orig_shift != 0)
philpem@0	7920	{
philpem@0	7921	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	7922
philpem@0	7923	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	7924	FLAG_C = src << (8-((shift-1)&7));
philpem@0	7925	FLAG_N = NFLAG_8(res);
philpem@0	7926	FLAG_Z = res;
philpem@0	7927	FLAG_V = VFLAG_CLEAR;
philpem@0	7928	return;
philpem@0	7929	}
philpem@0	7930
philpem@0	7931	FLAG_C = CFLAG_CLEAR;
philpem@0	7932	FLAG_N = NFLAG_8(src);
philpem@0	7933	FLAG_Z = src;
philpem@0	7934	FLAG_V = VFLAG_CLEAR;
philpem@0	7935	}
philpem@0	7936
philpem@0	7937
philpem@0	7938	M68KMAKE_OP(ror, 16, r, .)
philpem@0	7939	{
philpem@0	7940	uint* r_dst = &DY;
philpem@0	7941	uint orig_shift = DX & 0x3f;
philpem@0	7942	uint shift = orig_shift & 15;
philpem@0	7943	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	7944	uint res = ROR_16(src, shift);
philpem@0	7945
philpem@0	7946	if(orig_shift != 0)
philpem@0	7947	{
philpem@0	7948	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	7949
philpem@0	7950	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	7951	FLAG_C = (src >> ((shift - 1) & 15)) << 8;
philpem@0	7952	FLAG_N = NFLAG_16(res);
philpem@0	7953	FLAG_Z = res;
philpem@0	7954	FLAG_V = VFLAG_CLEAR;
philpem@0	7955	return;
philpem@0	7956	}
philpem@0	7957
philpem@0	7958	FLAG_C = CFLAG_CLEAR;
philpem@0	7959	FLAG_N = NFLAG_16(src);
philpem@0	7960	FLAG_Z = src;
philpem@0	7961	FLAG_V = VFLAG_CLEAR;
philpem@0	7962	}
philpem@0	7963
philpem@0	7964
philpem@0	7965	M68KMAKE_OP(ror, 32, r, .)
philpem@0	7966	{
philpem@0	7967	uint* r_dst = &DY;
philpem@0	7968	uint orig_shift = DX & 0x3f;
philpem@0	7969	uint shift = orig_shift & 31;
philpem@0	7970	uint64 src = *r_dst;
philpem@0	7971	uint res = ROR_32(src, shift);
philpem@0	7972
philpem@0	7973	if(orig_shift != 0)
philpem@0	7974	{
philpem@0	7975	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	7976
philpem@0	7977	*r_dst = res;
philpem@0	7978	FLAG_C = (src >> ((shift - 1) & 31)) << 8;
philpem@0	7979	FLAG_N = NFLAG_32(res);
philpem@0	7980	FLAG_Z = res;
philpem@0	7981	FLAG_V = VFLAG_CLEAR;
philpem@0	7982	return;
philpem@0	7983	}
philpem@0	7984
philpem@0	7985	FLAG_C = CFLAG_CLEAR;
philpem@0	7986	FLAG_N = NFLAG_32(src);
philpem@0	7987	FLAG_Z = src;
philpem@0	7988	FLAG_V = VFLAG_CLEAR;
philpem@0	7989	}
philpem@0	7990
philpem@0	7991
philpem@0	7992	M68KMAKE_OP(ror, 16, ., .)
philpem@0	7993	{
philpem@0	7994	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	7995	uint src = m68ki_read_16(ea);
philpem@0	7996	uint res = ROR_16(src, 1);
philpem@0	7997
philpem@0	7998	m68ki_write_16(ea, res);
philpem@0	7999
philpem@0	8000	FLAG_N = NFLAG_16(res);
philpem@0	8001	FLAG_Z = res;
philpem@0	8002	FLAG_C = src << 8;
philpem@0	8003	FLAG_V = VFLAG_CLEAR;
philpem@0	8004	}
philpem@0	8005
philpem@0	8006
philpem@0	8007	M68KMAKE_OP(rol, 8, s, .)
philpem@0	8008	{
philpem@0	8009	uint* r_dst = &DY;
philpem@0	8010	uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8011	uint shift = orig_shift & 7;
philpem@0	8012	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8013	uint res = ROL_8(src, shift);
philpem@0	8014
philpem@0	8015	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8016
philpem@0	8017	FLAG_N = NFLAG_8(res);
philpem@0	8018	FLAG_Z = res;
philpem@0	8019	FLAG_C = src << orig_shift;
philpem@0	8020	FLAG_V = VFLAG_CLEAR;
philpem@0	8021	}
philpem@0	8022
philpem@0	8023
philpem@0	8024	M68KMAKE_OP(rol, 16, s, .)
philpem@0	8025	{
philpem@0	8026	uint* r_dst = &DY;
philpem@0	8027	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8028	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8029	uint res = ROL_16(src, shift);
philpem@0	8030
philpem@0	8031	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8032
philpem@0	8033	FLAG_N = NFLAG_16(res);
philpem@0	8034	FLAG_Z = res;
philpem@0	8035	FLAG_C = src >> (8-shift);
philpem@0	8036	FLAG_V = VFLAG_CLEAR;
philpem@0	8037	}
philpem@0	8038
philpem@0	8039
philpem@0	8040	M68KMAKE_OP(rol, 32, s, .)
philpem@0	8041	{
philpem@0	8042	uint* r_dst = &DY;
philpem@0	8043	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8044	uint64 src = *r_dst;
philpem@0	8045	uint res = ROL_32(src, shift);
philpem@0	8046
philpem@0	8047	*r_dst = res;
philpem@0	8048
philpem@0	8049	FLAG_N = NFLAG_32(res);
philpem@0	8050	FLAG_Z = res;
philpem@0	8051	FLAG_C = src >> (24-shift);
philpem@0	8052	FLAG_V = VFLAG_CLEAR;
philpem@0	8053	}
philpem@0	8054
philpem@0	8055
philpem@0	8056	M68KMAKE_OP(rol, 8, r, .)
philpem@0	8057	{
philpem@0	8058	uint* r_dst = &DY;
philpem@0	8059	uint orig_shift = DX & 0x3f;
philpem@0	8060	uint shift = orig_shift & 7;
philpem@0	8061	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8062	uint res = ROL_8(src, shift);
philpem@0	8063
philpem@0	8064	if(orig_shift != 0)
philpem@0	8065	{
philpem@0	8066	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8067
philpem@0	8068	if(shift != 0)
philpem@0	8069	{
philpem@0	8070	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8071	FLAG_C = src << shift;
philpem@0	8072	FLAG_N = NFLAG_8(res);
philpem@0	8073	FLAG_Z = res;
philpem@0	8074	FLAG_V = VFLAG_CLEAR;
philpem@0	8075	return;
philpem@0	8076	}
philpem@0	8077	FLAG_C = (src & 1)<<8;
philpem@0	8078	FLAG_N = NFLAG_8(src);
philpem@0	8079	FLAG_Z = src;
philpem@0	8080	FLAG_V = VFLAG_CLEAR;
philpem@0	8081	return;
philpem@0	8082	}
philpem@0	8083
philpem@0	8084	FLAG_C = CFLAG_CLEAR;
philpem@0	8085	FLAG_N = NFLAG_8(src);
philpem@0	8086	FLAG_Z = src;
philpem@0	8087	FLAG_V = VFLAG_CLEAR;
philpem@0	8088	}
philpem@0	8089
philpem@0	8090
philpem@0	8091	M68KMAKE_OP(rol, 16, r, .)
philpem@0	8092	{
philpem@0	8093	uint* r_dst = &DY;
philpem@0	8094	uint orig_shift = DX & 0x3f;
philpem@0	8095	uint shift = orig_shift & 15;
philpem@0	8096	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8097	uint res = MASK_OUT_ABOVE_16(ROL_16(src, shift));
philpem@0	8098
philpem@0	8099	if(orig_shift != 0)
philpem@0	8100	{
philpem@0	8101	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8102
philpem@0	8103	if(shift != 0)
philpem@0	8104	{
philpem@0	8105	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8106	FLAG_C = (src << shift) >> 8;
philpem@0	8107	FLAG_N = NFLAG_16(res);
philpem@0	8108	FLAG_Z = res;
philpem@0	8109	FLAG_V = VFLAG_CLEAR;
philpem@0	8110	return;
philpem@0	8111	}
philpem@0	8112	FLAG_C = (src & 1)<<8;
philpem@0	8113	FLAG_N = NFLAG_16(src);
philpem@0	8114	FLAG_Z = src;
philpem@0	8115	FLAG_V = VFLAG_CLEAR;
philpem@0	8116	return;
philpem@0	8117	}
philpem@0	8118
philpem@0	8119	FLAG_C = CFLAG_CLEAR;
philpem@0	8120	FLAG_N = NFLAG_16(src);
philpem@0	8121	FLAG_Z = src;
philpem@0	8122	FLAG_V = VFLAG_CLEAR;
philpem@0	8123	}
philpem@0	8124
philpem@0	8125
philpem@0	8126	M68KMAKE_OP(rol, 32, r, .)
philpem@0	8127	{
philpem@0	8128	uint* r_dst = &DY;
philpem@0	8129	uint orig_shift = DX & 0x3f;
philpem@0	8130	uint shift = orig_shift & 31;
philpem@0	8131	uint64 src = *r_dst;
philpem@0	8132	uint res = ROL_32(src, shift);
philpem@0	8133
philpem@0	8134	if(orig_shift != 0)
philpem@0	8135	{
philpem@0	8136	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8137
philpem@0	8138	*r_dst = res;
philpem@0	8139
philpem@0	8140	FLAG_C = (src >> (32 - shift)) << 8;
philpem@0	8141	FLAG_N = NFLAG_32(res);
philpem@0	8142	FLAG_Z = res;
philpem@0	8143	FLAG_V = VFLAG_CLEAR;
philpem@0	8144	return;
philpem@0	8145	}
philpem@0	8146
philpem@0	8147	FLAG_C = CFLAG_CLEAR;
philpem@0	8148	FLAG_N = NFLAG_32(src);
philpem@0	8149	FLAG_Z = src;
philpem@0	8150	FLAG_V = VFLAG_CLEAR;
philpem@0	8151	}
philpem@0	8152
philpem@0	8153
philpem@0	8154	M68KMAKE_OP(rol, 16, ., .)
philpem@0	8155	{
philpem@0	8156	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	8157	uint src = m68ki_read_16(ea);
philpem@0	8158	uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
philpem@0	8159
philpem@0	8160	m68ki_write_16(ea, res);
philpem@0	8161
philpem@0	8162	FLAG_N = NFLAG_16(res);
philpem@0	8163	FLAG_Z = res;
philpem@0	8164	FLAG_C = src >> 7;
philpem@0	8165	FLAG_V = VFLAG_CLEAR;
philpem@0	8166	}
philpem@0	8167
philpem@0	8168
philpem@0	8169	M68KMAKE_OP(roxr, 8, s, .)
philpem@0	8170	{
philpem@0	8171	uint* r_dst = &DY;
philpem@0	8172	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8173	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8174	uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
philpem@0	8175
philpem@0	8176	FLAG_C = FLAG_X = res;
philpem@0	8177	res = MASK_OUT_ABOVE_8(res);
philpem@0	8178
philpem@0	8179	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8180
philpem@0	8181	FLAG_N = NFLAG_8(res);
philpem@0	8182	FLAG_Z = res;
philpem@0	8183	FLAG_V = VFLAG_CLEAR;
philpem@0	8184	}
philpem@0	8185
philpem@0	8186
philpem@0	8187	M68KMAKE_OP(roxr, 16, s, .)
philpem@0	8188	{
philpem@0	8189	uint* r_dst = &DY;
philpem@0	8190	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8191	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8192	uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
philpem@0	8193
philpem@0	8194	FLAG_C = FLAG_X = res >> 8;
philpem@0	8195	res = MASK_OUT_ABOVE_16(res);
philpem@0	8196
philpem@0	8197	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8198
philpem@0	8199	FLAG_N = NFLAG_16(res);
philpem@0	8200	FLAG_Z = res;
philpem@0	8201	FLAG_V = VFLAG_CLEAR;
philpem@0	8202	}
philpem@0	8203
philpem@0	8204
philpem@0	8205	M68KMAKE_OP(roxr, 32, s, .)
philpem@0	8206	{
philpem@0	8207	#if M68K_USE_64_BIT
philpem@0	8208
philpem@0	8209	uint* r_dst = &DY;
philpem@0	8210	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8211	uint64 src = *r_dst;
philpem@0	8212	uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
philpem@0	8213
philpem@0	8214	res = ROR_33_64(res, shift);
philpem@0	8215
philpem@0	8216	FLAG_C = FLAG_X = res >> 24;
philpem@0	8217	res = MASK_OUT_ABOVE_32(res);
philpem@0	8218
philpem@0	8219	*r_dst = res;
philpem@0	8220
philpem@0	8221	FLAG_N = NFLAG_32(res);
philpem@0	8222	FLAG_Z = res;
philpem@0	8223	FLAG_V = VFLAG_CLEAR;
philpem@0	8224
philpem@0	8225	#else
philpem@0	8226
philpem@0	8227	uint* r_dst = &DY;
philpem@0	8228	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8229	uint src = *r_dst;
philpem@0	8230	uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
philpem@0	8231	uint new_x_flag = src & (1 << (shift - 1));
philpem@0	8232
philpem@0	8233	*r_dst = res;
philpem@0	8234
philpem@0	8235	FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
philpem@0	8236	FLAG_N = NFLAG_32(res);
philpem@0	8237	FLAG_Z = res;
philpem@0	8238	FLAG_V = VFLAG_CLEAR;
philpem@0	8239
philpem@0	8240	#endif
philpem@0	8241	}
philpem@0	8242
philpem@0	8243
philpem@0	8244	M68KMAKE_OP(roxr, 8, r, .)
philpem@0	8245	{
philpem@0	8246	uint* r_dst = &DY;
philpem@0	8247	uint orig_shift = DX & 0x3f;
philpem@0	8248
philpem@0	8249	if(orig_shift != 0)
philpem@0	8250	{
philpem@0	8251	uint shift = orig_shift % 9;
philpem@0	8252	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8253	uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
philpem@0	8254
philpem@0	8255	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8256
philpem@0	8257	FLAG_C = FLAG_X = res;
philpem@0	8258	res = MASK_OUT_ABOVE_8(res);
philpem@0	8259
philpem@0	8260	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8261	FLAG_N = NFLAG_8(res);
philpem@0	8262	FLAG_Z = res;
philpem@0	8263	FLAG_V = VFLAG_CLEAR;
philpem@0	8264	return;
philpem@0	8265	}
philpem@0	8266
philpem@0	8267	FLAG_C = FLAG_X;
philpem@0	8268	FLAG_N = NFLAG_8(*r_dst);
philpem@0	8269	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8270	FLAG_V = VFLAG_CLEAR;
philpem@0	8271	}
philpem@0	8272
philpem@0	8273
philpem@0	8274	M68KMAKE_OP(roxr, 16, r, .)
philpem@0	8275	{
philpem@0	8276	uint* r_dst = &DY;
philpem@0	8277	uint orig_shift = DX & 0x3f;
philpem@0	8278
philpem@0	8279	if(orig_shift != 0)
philpem@0	8280	{
philpem@0	8281	uint shift = orig_shift % 17;
philpem@0	8282	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8283	uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
philpem@0	8284
philpem@0	8285	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8286
philpem@0	8287	FLAG_C = FLAG_X = res >> 8;
philpem@0	8288	res = MASK_OUT_ABOVE_16(res);
philpem@0	8289
philpem@0	8290	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8291	FLAG_N = NFLAG_16(res);
philpem@0	8292	FLAG_Z = res;
philpem@0	8293	FLAG_V = VFLAG_CLEAR;
philpem@0	8294	return;
philpem@0	8295	}
philpem@0	8296
philpem@0	8297	FLAG_C = FLAG_X;
philpem@0	8298	FLAG_N = NFLAG_16(*r_dst);
philpem@0	8299	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8300	FLAG_V = VFLAG_CLEAR;
philpem@0	8301	}
philpem@0	8302
philpem@0	8303
philpem@0	8304	M68KMAKE_OP(roxr, 32, r, .)
philpem@0	8305	{
philpem@0	8306	#if M68K_USE_64_BIT
philpem@0	8307
philpem@0	8308	uint* r_dst = &DY;
philpem@0	8309	uint orig_shift = DX & 0x3f;
philpem@0	8310
philpem@0	8311	if(orig_shift != 0)
philpem@0	8312	{
philpem@0	8313	uint shift = orig_shift % 33;
philpem@0	8314	uint64 src = *r_dst;
philpem@0	8315	uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
philpem@0	8316
philpem@0	8317	res = ROR_33_64(res, shift);
philpem@0	8318
philpem@0	8319	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8320
philpem@0	8321	FLAG_C = FLAG_X = res >> 24;
philpem@0	8322	res = MASK_OUT_ABOVE_32(res);
philpem@0	8323
philpem@0	8324	*r_dst = res;
philpem@0	8325	FLAG_N = NFLAG_32(res);
philpem@0	8326	FLAG_Z = res;
philpem@0	8327	FLAG_V = VFLAG_CLEAR;
philpem@0	8328	return;
philpem@0	8329	}
philpem@0	8330
philpem@0	8331	FLAG_C = FLAG_X;
philpem@0	8332	FLAG_N = NFLAG_32(*r_dst);
philpem@0	8333	FLAG_Z = *r_dst;
philpem@0	8334	FLAG_V = VFLAG_CLEAR;
philpem@0	8335
philpem@0	8336	#else
philpem@0	8337
philpem@0	8338	uint* r_dst = &DY;
philpem@0	8339	uint orig_shift = DX & 0x3f;
philpem@0	8340	uint shift = orig_shift % 33;
philpem@0	8341	uint src = *r_dst;
philpem@0	8342	uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
philpem@0	8343	uint new_x_flag = src & (1 << (shift - 1));
philpem@0	8344
philpem@0	8345	if(orig_shift != 0)
philpem@0	8346	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8347
philpem@0	8348	if(shift != 0)
philpem@0	8349	{
philpem@0	8350	*r_dst = res;
philpem@0	8351	FLAG_X = (new_x_flag != 0)<<8;
philpem@0	8352	}
philpem@0	8353	else
philpem@0	8354	res = src;
philpem@0	8355	FLAG_C = FLAG_X;
philpem@0	8356	FLAG_N = NFLAG_32(res);
philpem@0	8357	FLAG_Z = res;
philpem@0	8358	FLAG_V = VFLAG_CLEAR;
philpem@0	8359
philpem@0	8360	#endif
philpem@0	8361	}
philpem@0	8362
philpem@0	8363
philpem@0	8364	M68KMAKE_OP(roxr, 16, ., .)
philpem@0	8365	{
philpem@0	8366	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	8367	uint src = m68ki_read_16(ea);
philpem@0	8368	uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
philpem@0	8369
philpem@0	8370	FLAG_C = FLAG_X = res >> 8;
philpem@0	8371	res = MASK_OUT_ABOVE_16(res);
philpem@0	8372
philpem@0	8373	m68ki_write_16(ea, res);
philpem@0	8374
philpem@0	8375	FLAG_N = NFLAG_16(res);
philpem@0	8376	FLAG_Z = res;
philpem@0	8377	FLAG_V = VFLAG_CLEAR;
philpem@0	8378	}
philpem@0	8379
philpem@0	8380
philpem@0	8381	M68KMAKE_OP(roxl, 8, s, .)
philpem@0	8382	{
philpem@0	8383	uint* r_dst = &DY;
philpem@0	8384	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8385	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8386	uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
philpem@0	8387
philpem@0	8388	FLAG_C = FLAG_X = res;
philpem@0	8389	res = MASK_OUT_ABOVE_8(res);
philpem@0	8390
philpem@0	8391	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8392
philpem@0	8393	FLAG_N = NFLAG_8(res);
philpem@0	8394	FLAG_Z = res;
philpem@0	8395	FLAG_V = VFLAG_CLEAR;
philpem@0	8396	}
philpem@0	8397
philpem@0	8398
philpem@0	8399	M68KMAKE_OP(roxl, 16, s, .)
philpem@0	8400	{
philpem@0	8401	uint* r_dst = &DY;
philpem@0	8402	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8403	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8404	uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
philpem@0	8405
philpem@0	8406	FLAG_C = FLAG_X = res >> 8;
philpem@0	8407	res = MASK_OUT_ABOVE_16(res);
philpem@0	8408
philpem@0	8409	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8410
philpem@0	8411	FLAG_N = NFLAG_16(res);
philpem@0	8412	FLAG_Z = res;
philpem@0	8413	FLAG_V = VFLAG_CLEAR;
philpem@0	8414	}
philpem@0	8415
philpem@0	8416
philpem@0	8417	M68KMAKE_OP(roxl, 32, s, .)
philpem@0	8418	{
philpem@0	8419	#if M68K_USE_64_BIT
philpem@0	8420
philpem@0	8421	uint* r_dst = &DY;
philpem@0	8422	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8423	uint64 src = *r_dst;
philpem@0	8424	uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
philpem@0	8425
philpem@0	8426	res = ROL_33_64(res, shift);
philpem@0	8427
philpem@0	8428	FLAG_C = FLAG_X = res >> 24;
philpem@0	8429	res = MASK_OUT_ABOVE_32(res);
philpem@0	8430
philpem@0	8431	*r_dst = res;
philpem@0	8432
philpem@0	8433	FLAG_N = NFLAG_32(res);
philpem@0	8434	FLAG_Z = res;
philpem@0	8435	FLAG_V = VFLAG_CLEAR;
philpem@0	8436
philpem@0	8437	#else
philpem@0	8438
philpem@0	8439	uint* r_dst = &DY;
philpem@0	8440	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	8441	uint src = *r_dst;
philpem@0	8442	uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
philpem@0	8443	uint new_x_flag = src & (1 << (32 - shift));
philpem@0	8444
philpem@0	8445	*r_dst = res;
philpem@0	8446
philpem@0	8447	FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
philpem@0	8448	FLAG_N = NFLAG_32(res);
philpem@0	8449	FLAG_Z = res;
philpem@0	8450	FLAG_V = VFLAG_CLEAR;
philpem@0	8451
philpem@0	8452	#endif
philpem@0	8453	}
philpem@0	8454
philpem@0	8455
philpem@0	8456	M68KMAKE_OP(roxl, 8, r, .)
philpem@0	8457	{
philpem@0	8458	uint* r_dst = &DY;
philpem@0	8459	uint orig_shift = DX & 0x3f;
philpem@0	8460
philpem@0	8461
philpem@0	8462	if(orig_shift != 0)
philpem@0	8463	{
philpem@0	8464	uint shift = orig_shift % 9;
philpem@0	8465	uint src = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8466	uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
philpem@0	8467
philpem@0	8468	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8469
philpem@0	8470	FLAG_C = FLAG_X = res;
philpem@0	8471	res = MASK_OUT_ABOVE_8(res);
philpem@0	8472
philpem@0	8473	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8474	FLAG_N = NFLAG_8(res);
philpem@0	8475	FLAG_Z = res;
philpem@0	8476	FLAG_V = VFLAG_CLEAR;
philpem@0	8477	return;
philpem@0	8478	}
philpem@0	8479
philpem@0	8480	FLAG_C = FLAG_X;
philpem@0	8481	FLAG_N = NFLAG_8(*r_dst);
philpem@0	8482	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8483	FLAG_V = VFLAG_CLEAR;
philpem@0	8484	}
philpem@0	8485
philpem@0	8486
philpem@0	8487	M68KMAKE_OP(roxl, 16, r, .)
philpem@0	8488	{
philpem@0	8489	uint* r_dst = &DY;
philpem@0	8490	uint orig_shift = DX & 0x3f;
philpem@0	8491
philpem@0	8492	if(orig_shift != 0)
philpem@0	8493	{
philpem@0	8494	uint shift = orig_shift % 17;
philpem@0	8495	uint src = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8496	uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
philpem@0	8497
philpem@0	8498	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8499
philpem@0	8500	FLAG_C = FLAG_X = res >> 8;
philpem@0	8501	res = MASK_OUT_ABOVE_16(res);
philpem@0	8502
philpem@0	8503	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	8504	FLAG_N = NFLAG_16(res);
philpem@0	8505	FLAG_Z = res;
philpem@0	8506	FLAG_V = VFLAG_CLEAR;
philpem@0	8507	return;
philpem@0	8508	}
philpem@0	8509
philpem@0	8510	FLAG_C = FLAG_X;
philpem@0	8511	FLAG_N = NFLAG_16(*r_dst);
philpem@0	8512	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8513	FLAG_V = VFLAG_CLEAR;
philpem@0	8514	}
philpem@0	8515
philpem@0	8516
philpem@0	8517	M68KMAKE_OP(roxl, 32, r, .)
philpem@0	8518	{
philpem@0	8519	#if M68K_USE_64_BIT
philpem@0	8520
philpem@0	8521	uint* r_dst = &DY;
philpem@0	8522	uint orig_shift = DX & 0x3f;
philpem@0	8523
philpem@0	8524	if(orig_shift != 0)
philpem@0	8525	{
philpem@0	8526	uint shift = orig_shift % 33;
philpem@0	8527	uint64 src = *r_dst;
philpem@0	8528	uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
philpem@0	8529
philpem@0	8530	res = ROL_33_64(res, shift);
philpem@0	8531
philpem@0	8532	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8533
philpem@0	8534	FLAG_C = FLAG_X = res >> 24;
philpem@0	8535	res = MASK_OUT_ABOVE_32(res);
philpem@0	8536
philpem@0	8537	*r_dst = res;
philpem@0	8538	FLAG_N = NFLAG_32(res);
philpem@0	8539	FLAG_Z = res;
philpem@0	8540	FLAG_V = VFLAG_CLEAR;
philpem@0	8541	return;
philpem@0	8542	}
philpem@0	8543
philpem@0	8544	FLAG_C = FLAG_X;
philpem@0	8545	FLAG_N = NFLAG_32(*r_dst);
philpem@0	8546	FLAG_Z = *r_dst;
philpem@0	8547	FLAG_V = VFLAG_CLEAR;
philpem@0	8548
philpem@0	8549	#else
philpem@0	8550
philpem@0	8551	uint* r_dst = &DY;
philpem@0	8552	uint orig_shift = DX & 0x3f;
philpem@0	8553	uint shift = orig_shift % 33;
philpem@0	8554	uint src = *r_dst;
philpem@0	8555	uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
philpem@0	8556	uint new_x_flag = src & (1 << (32 - shift));
philpem@0	8557
philpem@0	8558	if(orig_shift != 0)
philpem@0	8559	USE_CYCLES(orig_shift<<CYC_SHIFT);
philpem@0	8560
philpem@0	8561	if(shift != 0)
philpem@0	8562	{
philpem@0	8563	*r_dst = res;
philpem@0	8564	FLAG_X = (new_x_flag != 0)<<8;
philpem@0	8565	}
philpem@0	8566	else
philpem@0	8567	res = src;
philpem@0	8568	FLAG_C = FLAG_X;
philpem@0	8569	FLAG_N = NFLAG_32(res);
philpem@0	8570	FLAG_Z = res;
philpem@0	8571	FLAG_V = VFLAG_CLEAR;
philpem@0	8572
philpem@0	8573	#endif
philpem@0	8574	}
philpem@0	8575
philpem@0	8576
philpem@0	8577	M68KMAKE_OP(roxl, 16, ., .)
philpem@0	8578	{
philpem@0	8579	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	8580	uint src = m68ki_read_16(ea);
philpem@0	8581	uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
philpem@0	8582
philpem@0	8583	FLAG_C = FLAG_X = res >> 8;
philpem@0	8584	res = MASK_OUT_ABOVE_16(res);
philpem@0	8585
philpem@0	8586	m68ki_write_16(ea, res);
philpem@0	8587
philpem@0	8588	FLAG_N = NFLAG_16(res);
philpem@0	8589	FLAG_Z = res;
philpem@0	8590	FLAG_V = VFLAG_CLEAR;
philpem@0	8591	}
philpem@0	8592
philpem@0	8593
philpem@0	8594	M68KMAKE_OP(rtd, 32, ., .)
philpem@0	8595	{
philpem@0	8596	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
philpem@0	8597	{
philpem@0	8598	uint new_pc = m68ki_pull_32();
philpem@0	8599
philpem@0	8600	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8601	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
philpem@0	8602	m68ki_jump(new_pc);
philpem@0	8603	return;
philpem@0	8604	}
philpem@0	8605	m68ki_exception_illegal();
philpem@0	8606	}
philpem@0	8607
philpem@0	8608
philpem@0	8609	M68KMAKE_OP(rte, 32, ., .)
philpem@0	8610	{
philpem@0	8611	if(FLAG_S)
philpem@0	8612	{
philpem@0	8613	uint new_sr;
philpem@0	8614	uint new_pc;
philpem@0	8615	uint format_word;
philpem@0	8616
philpem@0	8617	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8618
philpem@0	8619	if(CPU_TYPE_IS_000(CPU_TYPE))
philpem@0	8620	{
philpem@0	8621	new_sr = m68ki_pull_16();
philpem@0	8622	new_pc = m68ki_pull_32();
philpem@0	8623	m68ki_jump(new_pc);
philpem@0	8624	m68ki_set_sr(new_sr);
philpem@0	8625	return;
philpem@0	8626	}
philpem@0	8627
philpem@0	8628	if(CPU_TYPE_IS_010(CPU_TYPE))
philpem@0	8629	{
philpem@0	8630	format_word = m68ki_read_16(REG_A[7]+6) >> 12;
philpem@0	8631	if(format_word == 0)
philpem@0	8632	{
philpem@0	8633	new_sr = m68ki_pull_16();
philpem@0	8634	new_pc = m68ki_pull_32();
philpem@0	8635	m68ki_fake_pull_16(); /* format word */
philpem@0	8636	m68ki_jump(new_pc);
philpem@0	8637	m68ki_set_sr(new_sr);
philpem@0	8638	return;
philpem@0	8639	}
philpem@0	8640	/* Not handling bus fault (9) */
philpem@0	8641	m68ki_exception_format_error();
philpem@0	8642	return;
philpem@0	8643	}
philpem@0	8644
philpem@0	8645	/* Otherwise it's 020 */
philpem@0	8646	rte_loop:
philpem@0	8647	format_word = m68ki_read_16(REG_A[7]+6) >> 12;
philpem@0	8648	switch(format_word)
philpem@0	8649	{
philpem@0	8650	case 0: /* Normal */
philpem@0	8651	new_sr = m68ki_pull_16();
philpem@0	8652	new_pc = m68ki_pull_32();
philpem@0	8653	m68ki_fake_pull_16(); /* format word */
philpem@0	8654	m68ki_jump(new_pc);
philpem@0	8655	m68ki_set_sr(new_sr);
philpem@0	8656	return;
philpem@0	8657	case 1: /* Throwaway */
philpem@0	8658	new_sr = m68ki_pull_16();
philpem@0	8659	m68ki_fake_pull_32(); /* program counter */
philpem@0	8660	m68ki_fake_pull_16(); /* format word */
philpem@0	8661	m68ki_set_sr_noint(new_sr);
philpem@0	8662	goto rte_loop;
philpem@0	8663	case 2: /* Trap */
philpem@0	8664	new_sr = m68ki_pull_16();
philpem@0	8665	new_pc = m68ki_pull_32();
philpem@0	8666	m68ki_fake_pull_16(); /* format word */
philpem@0	8667	m68ki_fake_pull_32(); /* address */
philpem@0	8668	m68ki_jump(new_pc);
philpem@0	8669	m68ki_set_sr(new_sr);
philpem@0	8670	return;
philpem@0	8671	}
philpem@0	8672	/* Not handling long or short bus fault */
philpem@0	8673	m68ki_exception_format_error();
philpem@0	8674	return;
philpem@0	8675	}
philpem@0	8676	m68ki_exception_privilege_violation();
philpem@0	8677	}
philpem@0	8678
philpem@0	8679
philpem@0	8680	M68KMAKE_OP(rtm, 32, ., .)
philpem@0	8681	{
philpem@0	8682	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
philpem@0	8683	{
philpem@0	8684	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8685	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
philpem@0	8686	m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
philpem@0	8687	m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
philpem@0	8688	return;
philpem@0	8689	}
philpem@0	8690	m68ki_exception_illegal();
philpem@0	8691	}
philpem@0	8692
philpem@0	8693
philpem@0	8694	M68KMAKE_OP(rtr, 32, ., .)
philpem@0	8695	{
philpem@0	8696	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8697	m68ki_set_ccr(m68ki_pull_16());
philpem@0	8698	m68ki_jump(m68ki_pull_32());
philpem@0	8699	}
philpem@0	8700
philpem@0	8701
philpem@0	8702	M68KMAKE_OP(rts, 32, ., .)
philpem@0	8703	{
philpem@0	8704	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8705	m68ki_jump(m68ki_pull_32());
philpem@0	8706	}
philpem@0	8707
philpem@0	8708
philpem@0	8709	M68KMAKE_OP(sbcd, 8, rr, .)
philpem@0	8710	{
philpem@0	8711	uint* r_dst = &DX;
philpem@0	8712	uint src = DY;
philpem@0	8713	uint dst = *r_dst;
philpem@0	8714	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
philpem@0	8715
philpem@0	8716	if(res > 9)
philpem@0	8717	res -= 6;
philpem@0	8718	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
philpem@0	8719	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	8720	if(FLAG_C)
philpem@0	8721	res += 0xa0;
philpem@0	8722
philpem@0	8723	res = MASK_OUT_ABOVE_8(res);
philpem@0	8724
philpem@0	8725	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	8726	FLAG_Z |= res;
philpem@0	8727
philpem@0	8728	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	8729	}
philpem@0	8730
philpem@0	8731
philpem@0	8732	M68KMAKE_OP(sbcd, 8, mm, ax7)
philpem@0	8733	{
philpem@0	8734	uint src = OPER_AY_PD_8();
philpem@0	8735	uint ea = EA_A7_PD_8();
philpem@0	8736	uint dst = m68ki_read_8(ea);
philpem@0	8737	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
philpem@0	8738
philpem@0	8739	if(res > 9)
philpem@0	8740	res -= 6;
philpem@0	8741	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
philpem@0	8742	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	8743	if(FLAG_C)
philpem@0	8744	res += 0xa0;
philpem@0	8745
philpem@0	8746	res = MASK_OUT_ABOVE_8(res);
philpem@0	8747
philpem@0	8748	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	8749	FLAG_Z |= res;
philpem@0	8750
philpem@0	8751	m68ki_write_8(ea, res);
philpem@0	8752	}
philpem@0	8753
philpem@0	8754
philpem@0	8755	M68KMAKE_OP(sbcd, 8, mm, ay7)
philpem@0	8756	{
philpem@0	8757	uint src = OPER_A7_PD_8();
philpem@0	8758	uint ea = EA_AX_PD_8();
philpem@0	8759	uint dst = m68ki_read_8(ea);
philpem@0	8760	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
philpem@0	8761
philpem@0	8762	if(res > 9)
philpem@0	8763	res -= 6;
philpem@0	8764	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
philpem@0	8765	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	8766	if(FLAG_C)
philpem@0	8767	res += 0xa0;
philpem@0	8768
philpem@0	8769	res = MASK_OUT_ABOVE_8(res);
philpem@0	8770
philpem@0	8771	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	8772	FLAG_Z |= res;
philpem@0	8773
philpem@0	8774	m68ki_write_8(ea, res);
philpem@0	8775	}
philpem@0	8776
philpem@0	8777
philpem@0	8778	M68KMAKE_OP(sbcd, 8, mm, axy7)
philpem@0	8779	{
philpem@0	8780	uint src = OPER_A7_PD_8();
philpem@0	8781	uint ea = EA_A7_PD_8();
philpem@0	8782	uint dst = m68ki_read_8(ea);
philpem@0	8783	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
philpem@0	8784
philpem@0	8785	if(res > 9)
philpem@0	8786	res -= 6;
philpem@0	8787	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
philpem@0	8788	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	8789	if(FLAG_C)
philpem@0	8790	res += 0xa0;
philpem@0	8791
philpem@0	8792	res = MASK_OUT_ABOVE_8(res);
philpem@0	8793
philpem@0	8794	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	8795	FLAG_Z |= res;
philpem@0	8796
philpem@0	8797	m68ki_write_8(ea, res);
philpem@0	8798	}
philpem@0	8799
philpem@0	8800
philpem@0	8801	M68KMAKE_OP(sbcd, 8, mm, .)
philpem@0	8802	{
philpem@0	8803	uint src = OPER_AY_PD_8();
philpem@0	8804	uint ea = EA_AX_PD_8();
philpem@0	8805	uint dst = m68ki_read_8(ea);
philpem@0	8806	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
philpem@0	8807
philpem@0	8808	if(res > 9)
philpem@0	8809	res -= 6;
philpem@0	8810	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
philpem@0	8811	FLAG_X = FLAG_C = (res > 0x99) << 8;
philpem@0	8812	if(FLAG_C)
philpem@0	8813	res += 0xa0;
philpem@0	8814
philpem@0	8815	res = MASK_OUT_ABOVE_8(res);
philpem@0	8816
philpem@0	8817	FLAG_N = NFLAG_8(res); /* officially undefined */
philpem@0	8818	FLAG_Z |= res;
philpem@0	8819
philpem@0	8820	m68ki_write_8(ea, res);
philpem@0	8821	}
philpem@0	8822
philpem@0	8823
philpem@0	8824	M68KMAKE_OP(st, 8, ., d)
philpem@0	8825	{
philpem@0	8826	DY |= 0xff;
philpem@0	8827	}
philpem@0	8828
philpem@0	8829
philpem@0	8830	M68KMAKE_OP(st, 8, ., .)
philpem@0	8831	{
philpem@0	8832	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff);
philpem@0	8833	}
philpem@0	8834
philpem@0	8835
philpem@0	8836	M68KMAKE_OP(sf, 8, ., d)
philpem@0	8837	{
philpem@0	8838	DY &= 0xffffff00;
philpem@0	8839	}
philpem@0	8840
philpem@0	8841
philpem@0	8842	M68KMAKE_OP(sf, 8, ., .)
philpem@0	8843	{
philpem@0	8844	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
philpem@0	8845	}
philpem@0	8846
philpem@0	8847
philpem@0	8848	M68KMAKE_OP(scc, 8, ., d)
philpem@0	8849	{
philpem@0	8850	if(M68KMAKE_CC)
philpem@0	8851	{
philpem@0	8852	DY |= 0xff;
philpem@0	8853	return;
philpem@0	8854	}
philpem@0	8855	DY &= 0xffffff00;
philpem@0	8856	}
philpem@0	8857
philpem@0	8858
philpem@0	8859	M68KMAKE_OP(scc, 8, ., .)
philpem@0	8860	{
philpem@0	8861	m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0);
philpem@0	8862	}
philpem@0	8863
philpem@0	8864
philpem@0	8865	M68KMAKE_OP(stop, 0, ., .)
philpem@0	8866	{
philpem@0	8867	if(FLAG_S)
philpem@0	8868	{
philpem@0	8869	uint new_sr = OPER_I_16();
philpem@0	8870	m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
philpem@0	8871	CPU_STOPPED |= STOP_LEVEL_STOP;
philpem@0	8872	m68ki_set_sr(new_sr);
philpem@0	8873	m68ki_remaining_cycles = 0;
philpem@0	8874	return;
philpem@0	8875	}
philpem@0	8876	m68ki_exception_privilege_violation();
philpem@0	8877	}
philpem@0	8878
philpem@0	8879
philpem@0	8880	M68KMAKE_OP(sub, 8, er, d)
philpem@0	8881	{
philpem@0	8882	uint* r_dst = &DX;
philpem@0	8883	uint src = MASK_OUT_ABOVE_8(DY);
philpem@0	8884	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8885	uint res = dst - src;
philpem@0	8886
philpem@0	8887	FLAG_N = NFLAG_8(res);
philpem@0	8888	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	8889	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	8890	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	8891
philpem@0	8892	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	8893	}
philpem@0	8894
philpem@0	8895
philpem@0	8896	M68KMAKE_OP(sub, 8, er, .)
philpem@0	8897	{
philpem@0	8898	uint* r_dst = &DX;
philpem@0	8899	uint src = M68KMAKE_GET_OPER_AY_8;
philpem@0	8900	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	8901	uint res = dst - src;
philpem@0	8902
philpem@0	8903	FLAG_N = NFLAG_8(res);
philpem@0	8904	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	8905	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	8906	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	8907
philpem@0	8908	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	8909	}
philpem@0	8910
philpem@0	8911
philpem@0	8912	M68KMAKE_OP(sub, 16, er, d)
philpem@0	8913	{
philpem@0	8914	uint* r_dst = &DX;
philpem@0	8915	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	8916	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8917	uint res = dst - src;
philpem@0	8918
philpem@0	8919	FLAG_N = NFLAG_16(res);
philpem@0	8920	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	8921	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	8922	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	8923
philpem@0	8924	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	8925	}
philpem@0	8926
philpem@0	8927
philpem@0	8928	M68KMAKE_OP(sub, 16, er, a)
philpem@0	8929	{
philpem@0	8930	uint* r_dst = &DX;
philpem@0	8931	uint src = MASK_OUT_ABOVE_16(AY);
philpem@0	8932	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8933	uint res = dst - src;
philpem@0	8934
philpem@0	8935	FLAG_N = NFLAG_16(res);
philpem@0	8936	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	8937	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	8938	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	8939
philpem@0	8940	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	8941	}
philpem@0	8942
philpem@0	8943
philpem@0	8944	M68KMAKE_OP(sub, 16, er, .)
philpem@0	8945	{
philpem@0	8946	uint* r_dst = &DX;
philpem@0	8947	uint src = M68KMAKE_GET_OPER_AY_16;
philpem@0	8948	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	8949	uint res = dst - src;
philpem@0	8950
philpem@0	8951	FLAG_N = NFLAG_16(res);
philpem@0	8952	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	8953	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	8954	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	8955
philpem@0	8956	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	8957	}
philpem@0	8958
philpem@0	8959
philpem@0	8960	M68KMAKE_OP(sub, 32, er, d)
philpem@0	8961	{
philpem@0	8962	uint* r_dst = &DX;
philpem@0	8963	uint src = DY;
philpem@0	8964	uint dst = *r_dst;
philpem@0	8965	uint res = dst - src;
philpem@0	8966
philpem@0	8967	FLAG_N = NFLAG_32(res);
philpem@0	8968	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	8969	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	8970	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	8971
philpem@0	8972	*r_dst = FLAG_Z;
philpem@0	8973	}
philpem@0	8974
philpem@0	8975
philpem@0	8976	M68KMAKE_OP(sub, 32, er, a)
philpem@0	8977	{
philpem@0	8978	uint* r_dst = &DX;
philpem@0	8979	uint src = AY;
philpem@0	8980	uint dst = *r_dst;
philpem@0	8981	uint res = dst - src;
philpem@0	8982
philpem@0	8983	FLAG_N = NFLAG_32(res);
philpem@0	8984	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	8985	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	8986	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	8987
philpem@0	8988	*r_dst = FLAG_Z;
philpem@0	8989	}
philpem@0	8990
philpem@0	8991
philpem@0	8992	M68KMAKE_OP(sub, 32, er, .)
philpem@0	8993	{
philpem@0	8994	uint* r_dst = &DX;
philpem@0	8995	uint src = M68KMAKE_GET_OPER_AY_32;
philpem@0	8996	uint dst = *r_dst;
philpem@0	8997	uint res = dst - src;
philpem@0	8998
philpem@0	8999	FLAG_N = NFLAG_32(res);
philpem@0	9000	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9001	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9002	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9003
philpem@0	9004	*r_dst = FLAG_Z;
philpem@0	9005	}
philpem@0	9006
philpem@0	9007
philpem@0	9008	M68KMAKE_OP(sub, 8, re, .)
philpem@0	9009	{
philpem@0	9010	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	9011	uint src = MASK_OUT_ABOVE_8(DX);
philpem@0	9012	uint dst = m68ki_read_8(ea);
philpem@0	9013	uint res = dst - src;
philpem@0	9014
philpem@0	9015	FLAG_N = NFLAG_8(res);
philpem@0	9016	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	9017	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9018	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9019
philpem@0	9020	m68ki_write_8(ea, FLAG_Z);
philpem@0	9021	}
philpem@0	9022
philpem@0	9023
philpem@0	9024	M68KMAKE_OP(sub, 16, re, .)
philpem@0	9025	{
philpem@0	9026	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	9027	uint src = MASK_OUT_ABOVE_16(DX);
philpem@0	9028	uint dst = m68ki_read_16(ea);
philpem@0	9029	uint res = dst - src;
philpem@0	9030
philpem@0	9031	FLAG_N = NFLAG_16(res);
philpem@0	9032	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	9033	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9034	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9035
philpem@0	9036	m68ki_write_16(ea, FLAG_Z);
philpem@0	9037	}
philpem@0	9038
philpem@0	9039
philpem@0	9040	M68KMAKE_OP(sub, 32, re, .)
philpem@0	9041	{
philpem@0	9042	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	9043	uint src = DX;
philpem@0	9044	uint dst = m68ki_read_32(ea);
philpem@0	9045	uint res = dst - src;
philpem@0	9046
philpem@0	9047	FLAG_N = NFLAG_32(res);
philpem@0	9048	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9049	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9050	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9051
philpem@0	9052	m68ki_write_32(ea, FLAG_Z);
philpem@0	9053	}
philpem@0	9054
philpem@0	9055
philpem@0	9056	M68KMAKE_OP(suba, 16, ., d)
philpem@0	9057	{
philpem@0	9058	uint* r_dst = &AX;
philpem@0	9059
philpem@0	9060	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));
philpem@0	9061	}
philpem@0	9062
philpem@0	9063
philpem@0	9064	M68KMAKE_OP(suba, 16, ., a)
philpem@0	9065	{
philpem@0	9066	uint* r_dst = &AX;
philpem@0	9067
philpem@0	9068	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));
philpem@0	9069	}
philpem@0	9070
philpem@0	9071
philpem@0	9072	M68KMAKE_OP(suba, 16, ., .)
philpem@0	9073	{
philpem@0	9074	uint* r_dst = &AX;
philpem@0	9075
philpem@0	9076	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
philpem@0	9077	}
philpem@0	9078
philpem@0	9079
philpem@0	9080	M68KMAKE_OP(suba, 32, ., d)
philpem@0	9081	{
philpem@0	9082	uint* r_dst = &AX;
philpem@0	9083
philpem@0	9084	*r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);
philpem@0	9085	}
philpem@0	9086
philpem@0	9087
philpem@0	9088	M68KMAKE_OP(suba, 32, ., a)
philpem@0	9089	{
philpem@0	9090	uint* r_dst = &AX;
philpem@0	9091
philpem@0	9092	*r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);
philpem@0	9093	}
philpem@0	9094
philpem@0	9095
philpem@0	9096	M68KMAKE_OP(suba, 32, ., .)
philpem@0	9097	{
philpem@0	9098	uint* r_dst = &AX;
philpem@0	9099
philpem@0	9100	*r_dst = MASK_OUT_ABOVE_32(*r_dst - M68KMAKE_GET_OPER_AY_32);
philpem@0	9101	}
philpem@0	9102
philpem@0	9103
philpem@0	9104	M68KMAKE_OP(subi, 8, ., d)
philpem@0	9105	{
philpem@0	9106	uint* r_dst = &DY;
philpem@0	9107	uint src = OPER_I_8();
philpem@0	9108	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	9109	uint res = dst - src;
philpem@0	9110
philpem@0	9111	FLAG_N = NFLAG_8(res);
philpem@0	9112	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	9113	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9114	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9115
philpem@0	9116	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	9117	}
philpem@0	9118
philpem@0	9119
philpem@0	9120	M68KMAKE_OP(subi, 8, ., .)
philpem@0	9121	{
philpem@0	9122	uint src = OPER_I_8();
philpem@0	9123	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	9124	uint dst = m68ki_read_8(ea);
philpem@0	9125	uint res = dst - src;
philpem@0	9126
philpem@0	9127	FLAG_N = NFLAG_8(res);
philpem@0	9128	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	9129	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9130	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9131
philpem@0	9132	m68ki_write_8(ea, FLAG_Z);
philpem@0	9133	}
philpem@0	9134
philpem@0	9135
philpem@0	9136	M68KMAKE_OP(subi, 16, ., d)
philpem@0	9137	{
philpem@0	9138	uint* r_dst = &DY;
philpem@0	9139	uint src = OPER_I_16();
philpem@0	9140	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	9141	uint res = dst - src;
philpem@0	9142
philpem@0	9143	FLAG_N = NFLAG_16(res);
philpem@0	9144	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	9145	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9146	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9147
philpem@0	9148	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	9149	}
philpem@0	9150
philpem@0	9151
philpem@0	9152	M68KMAKE_OP(subi, 16, ., .)
philpem@0	9153	{
philpem@0	9154	uint src = OPER_I_16();
philpem@0	9155	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	9156	uint dst = m68ki_read_16(ea);
philpem@0	9157	uint res = dst - src;
philpem@0	9158
philpem@0	9159	FLAG_N = NFLAG_16(res);
philpem@0	9160	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	9161	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9162	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9163
philpem@0	9164	m68ki_write_16(ea, FLAG_Z);
philpem@0	9165	}
philpem@0	9166
philpem@0	9167
philpem@0	9168	M68KMAKE_OP(subi, 32, ., d)
philpem@0	9169	{
philpem@0	9170	uint* r_dst = &DY;
philpem@0	9171	uint src = OPER_I_32();
philpem@0	9172	uint dst = *r_dst;
philpem@0	9173	uint res = dst - src;
philpem@0	9174
philpem@0	9175	FLAG_N = NFLAG_32(res);
philpem@0	9176	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9177	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9178	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9179
philpem@0	9180	*r_dst = FLAG_Z;
philpem@0	9181	}
philpem@0	9182
philpem@0	9183
philpem@0	9184	M68KMAKE_OP(subi, 32, ., .)
philpem@0	9185	{
philpem@0	9186	uint src = OPER_I_32();
philpem@0	9187	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	9188	uint dst = m68ki_read_32(ea);
philpem@0	9189	uint res = dst - src;
philpem@0	9190
philpem@0	9191	FLAG_N = NFLAG_32(res);
philpem@0	9192	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9193	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9194	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9195
philpem@0	9196	m68ki_write_32(ea, FLAG_Z);
philpem@0	9197	}
philpem@0	9198
philpem@0	9199
philpem@0	9200	M68KMAKE_OP(subq, 8, ., d)
philpem@0	9201	{
philpem@0	9202	uint* r_dst = &DY;
philpem@0	9203	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9204	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	9205	uint res = dst - src;
philpem@0	9206
philpem@0	9207	FLAG_N = NFLAG_8(res);
philpem@0	9208	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	9209	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9210	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9211
philpem@0	9212	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
philpem@0	9213	}
philpem@0	9214
philpem@0	9215
philpem@0	9216	M68KMAKE_OP(subq, 8, ., .)
philpem@0	9217	{
philpem@0	9218	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9219	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	9220	uint dst = m68ki_read_8(ea);
philpem@0	9221	uint res = dst - src;
philpem@0	9222
philpem@0	9223	FLAG_N = NFLAG_8(res);
philpem@0	9224	FLAG_Z = MASK_OUT_ABOVE_8(res);
philpem@0	9225	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9226	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9227
philpem@0	9228	m68ki_write_8(ea, FLAG_Z);
philpem@0	9229	}
philpem@0	9230
philpem@0	9231
philpem@0	9232	M68KMAKE_OP(subq, 16, ., d)
philpem@0	9233	{
philpem@0	9234	uint* r_dst = &DY;
philpem@0	9235	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9236	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	9237	uint res = dst - src;
philpem@0	9238
philpem@0	9239	FLAG_N = NFLAG_16(res);
philpem@0	9240	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	9241	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9242	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9243
philpem@0	9244	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
philpem@0	9245	}
philpem@0	9246
philpem@0	9247
philpem@0	9248	M68KMAKE_OP(subq, 16, ., a)
philpem@0	9249	{
philpem@0	9250	uint* r_dst = &AY;
philpem@0	9251
philpem@0	9252	*r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
philpem@0	9253	}
philpem@0	9254
philpem@0	9255
philpem@0	9256	M68KMAKE_OP(subq, 16, ., .)
philpem@0	9257	{
philpem@0	9258	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9259	uint ea = M68KMAKE_GET_EA_AY_16;
philpem@0	9260	uint dst = m68ki_read_16(ea);
philpem@0	9261	uint res = dst - src;
philpem@0	9262
philpem@0	9263	FLAG_N = NFLAG_16(res);
philpem@0	9264	FLAG_Z = MASK_OUT_ABOVE_16(res);
philpem@0	9265	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9266	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9267
philpem@0	9268	m68ki_write_16(ea, FLAG_Z);
philpem@0	9269	}
philpem@0	9270
philpem@0	9271
philpem@0	9272	M68KMAKE_OP(subq, 32, ., d)
philpem@0	9273	{
philpem@0	9274	uint* r_dst = &DY;
philpem@0	9275	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9276	uint dst = *r_dst;
philpem@0	9277	uint res = dst - src;
philpem@0	9278
philpem@0	9279	FLAG_N = NFLAG_32(res);
philpem@0	9280	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9281	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9282	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9283
philpem@0	9284	*r_dst = FLAG_Z;
philpem@0	9285	}
philpem@0	9286
philpem@0	9287
philpem@0	9288	M68KMAKE_OP(subq, 32, ., a)
philpem@0	9289	{
philpem@0	9290	uint* r_dst = &AY;
philpem@0	9291
philpem@0	9292	*r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
philpem@0	9293	}
philpem@0	9294
philpem@0	9295
philpem@0	9296	M68KMAKE_OP(subq, 32, ., .)
philpem@0	9297	{
philpem@0	9298	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
philpem@0	9299	uint ea = M68KMAKE_GET_EA_AY_32;
philpem@0	9300	uint dst = m68ki_read_32(ea);
philpem@0	9301	uint res = dst - src;
philpem@0	9302
philpem@0	9303	FLAG_N = NFLAG_32(res);
philpem@0	9304	FLAG_Z = MASK_OUT_ABOVE_32(res);
philpem@0	9305	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9306	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9307
philpem@0	9308	m68ki_write_32(ea, FLAG_Z);
philpem@0	9309	}
philpem@0	9310
philpem@0	9311
philpem@0	9312	M68KMAKE_OP(subx, 8, rr, .)
philpem@0	9313	{
philpem@0	9314	uint* r_dst = &DX;
philpem@0	9315	uint src = MASK_OUT_ABOVE_8(DY);
philpem@0	9316	uint dst = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	9317	uint res = dst - src - XFLAG_AS_1();
philpem@0	9318
philpem@0	9319	FLAG_N = NFLAG_8(res);
philpem@0	9320	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9321	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9322
philpem@0	9323	res = MASK_OUT_ABOVE_8(res);
philpem@0	9324	FLAG_Z |= res;
philpem@0	9325
philpem@0	9326	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
philpem@0	9327	}
philpem@0	9328
philpem@0	9329
philpem@0	9330	M68KMAKE_OP(subx, 16, rr, .)
philpem@0	9331	{
philpem@0	9332	uint* r_dst = &DX;
philpem@0	9333	uint src = MASK_OUT_ABOVE_16(DY);
philpem@0	9334	uint dst = MASK_OUT_ABOVE_16(*r_dst);
philpem@0	9335	uint res = dst - src - XFLAG_AS_1();
philpem@0	9336
philpem@0	9337	FLAG_N = NFLAG_16(res);
philpem@0	9338	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9339	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9340
philpem@0	9341	res = MASK_OUT_ABOVE_16(res);
philpem@0	9342	FLAG_Z |= res;
philpem@0	9343
philpem@0	9344	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
philpem@0	9345	}
philpem@0	9346
philpem@0	9347
philpem@0	9348	M68KMAKE_OP(subx, 32, rr, .)
philpem@0	9349	{
philpem@0	9350	uint* r_dst = &DX;
philpem@0	9351	uint src = DY;
philpem@0	9352	uint dst = *r_dst;
philpem@0	9353	uint res = dst - src - XFLAG_AS_1();
philpem@0	9354
philpem@0	9355	FLAG_N = NFLAG_32(res);
philpem@0	9356	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9357	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9358
philpem@0	9359	res = MASK_OUT_ABOVE_32(res);
philpem@0	9360	FLAG_Z |= res;
philpem@0	9361
philpem@0	9362	*r_dst = res;
philpem@0	9363	}
philpem@0	9364
philpem@0	9365
philpem@0	9366	M68KMAKE_OP(subx, 8, mm, ax7)
philpem@0	9367	{
philpem@0	9368	uint src = OPER_AY_PD_8();
philpem@0	9369	uint ea = EA_A7_PD_8();
philpem@0	9370	uint dst = m68ki_read_8(ea);
philpem@0	9371	uint res = dst - src - XFLAG_AS_1();
philpem@0	9372
philpem@0	9373	FLAG_N = NFLAG_8(res);
philpem@0	9374	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9375	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9376
philpem@0	9377	res = MASK_OUT_ABOVE_8(res);
philpem@0	9378	FLAG_Z |= res;
philpem@0	9379
philpem@0	9380	m68ki_write_8(ea, res);
philpem@0	9381	}
philpem@0	9382
philpem@0	9383
philpem@0	9384	M68KMAKE_OP(subx, 8, mm, ay7)
philpem@0	9385	{
philpem@0	9386	uint src = OPER_A7_PD_8();
philpem@0	9387	uint ea = EA_AX_PD_8();
philpem@0	9388	uint dst = m68ki_read_8(ea);
philpem@0	9389	uint res = dst - src - XFLAG_AS_1();
philpem@0	9390
philpem@0	9391	FLAG_N = NFLAG_8(res);
philpem@0	9392	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9393	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9394
philpem@0	9395	res = MASK_OUT_ABOVE_8(res);
philpem@0	9396	FLAG_Z |= res;
philpem@0	9397
philpem@0	9398	m68ki_write_8(ea, res);
philpem@0	9399	}
philpem@0	9400
philpem@0	9401
philpem@0	9402	M68KMAKE_OP(subx, 8, mm, axy7)
philpem@0	9403	{
philpem@0	9404	uint src = OPER_A7_PD_8();
philpem@0	9405	uint ea = EA_A7_PD_8();
philpem@0	9406	uint dst = m68ki_read_8(ea);
philpem@0	9407	uint res = dst - src - XFLAG_AS_1();
philpem@0	9408
philpem@0	9409	FLAG_N = NFLAG_8(res);
philpem@0	9410	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9411	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9412
philpem@0	9413	res = MASK_OUT_ABOVE_8(res);
philpem@0	9414	FLAG_Z |= res;
philpem@0	9415
philpem@0	9416	m68ki_write_8(ea, res);
philpem@0	9417	}
philpem@0	9418
philpem@0	9419
philpem@0	9420	M68KMAKE_OP(subx, 8, mm, .)
philpem@0	9421	{
philpem@0	9422	uint src = OPER_AY_PD_8();
philpem@0	9423	uint ea = EA_AX_PD_8();
philpem@0	9424	uint dst = m68ki_read_8(ea);
philpem@0	9425	uint res = dst - src - XFLAG_AS_1();
philpem@0	9426
philpem@0	9427	FLAG_N = NFLAG_8(res);
philpem@0	9428	FLAG_X = FLAG_C = CFLAG_8(res);
philpem@0	9429	FLAG_V = VFLAG_SUB_8(src, dst, res);
philpem@0	9430
philpem@0	9431	res = MASK_OUT_ABOVE_8(res);
philpem@0	9432	FLAG_Z |= res;
philpem@0	9433
philpem@0	9434	m68ki_write_8(ea, res);
philpem@0	9435	}
philpem@0	9436
philpem@0	9437
philpem@0	9438	M68KMAKE_OP(subx, 16, mm, .)
philpem@0	9439	{
philpem@0	9440	uint src = OPER_AY_PD_16();
philpem@0	9441	uint ea = EA_AX_PD_16();
philpem@0	9442	uint dst = m68ki_read_16(ea);
philpem@0	9443	uint res = dst - src - XFLAG_AS_1();
philpem@0	9444
philpem@0	9445	FLAG_N = NFLAG_16(res);
philpem@0	9446	FLAG_X = FLAG_C = CFLAG_16(res);
philpem@0	9447	FLAG_V = VFLAG_SUB_16(src, dst, res);
philpem@0	9448
philpem@0	9449	res = MASK_OUT_ABOVE_16(res);
philpem@0	9450	FLAG_Z |= res;
philpem@0	9451
philpem@0	9452	m68ki_write_16(ea, res);
philpem@0	9453	}
philpem@0	9454
philpem@0	9455
philpem@0	9456	M68KMAKE_OP(subx, 32, mm, .)
philpem@0	9457	{
philpem@0	9458	uint src = OPER_AY_PD_32();
philpem@0	9459	uint ea = EA_AX_PD_32();
philpem@0	9460	uint dst = m68ki_read_32(ea);
philpem@0	9461	uint res = dst - src - XFLAG_AS_1();
philpem@0	9462
philpem@0	9463	FLAG_N = NFLAG_32(res);
philpem@0	9464	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
philpem@0	9465	FLAG_V = VFLAG_SUB_32(src, dst, res);
philpem@0	9466
philpem@0	9467	res = MASK_OUT_ABOVE_32(res);
philpem@0	9468	FLAG_Z |= res;
philpem@0	9469
philpem@0	9470	m68ki_write_32(ea, res);
philpem@0	9471	}
philpem@0	9472
philpem@0	9473
philpem@0	9474	M68KMAKE_OP(swap, 32, ., .)
philpem@0	9475	{
philpem@0	9476	uint* r_dst = &DY;
philpem@0	9477
philpem@0	9478	FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);
philpem@0	9479	*r_dst = (*r_dst>>16) | FLAG_Z;
philpem@0	9480
philpem@0	9481	FLAG_Z = *r_dst;
philpem@0	9482	FLAG_N = NFLAG_32(*r_dst);
philpem@0	9483	FLAG_C = CFLAG_CLEAR;
philpem@0	9484	FLAG_V = VFLAG_CLEAR;
philpem@0	9485	}
philpem@0	9486
philpem@0	9487
philpem@0	9488	M68KMAKE_OP(tas, 8, ., d)
philpem@0	9489	{
philpem@0	9490	uint* r_dst = &DY;
philpem@0	9491
philpem@0	9492	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
philpem@0	9493	FLAG_N = NFLAG_8(*r_dst);
philpem@0	9494	FLAG_V = VFLAG_CLEAR;
philpem@0	9495	FLAG_C = CFLAG_CLEAR;
philpem@0	9496	*r_dst |= 0x80;
philpem@0	9497	}
philpem@0	9498
philpem@0	9499
philpem@0	9500	M68KMAKE_OP(tas, 8, ., .)
philpem@0	9501	{
philpem@0	9502	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	9503	uint dst = m68ki_read_8(ea);
philpem@0	9504
philpem@0	9505	FLAG_Z = dst;
philpem@0	9506	FLAG_N = NFLAG_8(dst);
philpem@0	9507	FLAG_V = VFLAG_CLEAR;
philpem@0	9508	FLAG_C = CFLAG_CLEAR;
philpem@0	9509	m68ki_write_8(ea, dst | 0x80);
philpem@0	9510	}
philpem@0	9511
philpem@0	9512
philpem@0	9513	M68KMAKE_OP(trap, 0, ., .)
philpem@0	9514	{
philpem@0	9515	/* Trap#n stacks exception frame type 0 */
philpem@0	9516	m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */
philpem@0	9517	}
philpem@0	9518
philpem@0	9519
philpem@0	9520	M68KMAKE_OP(trapt, 0, ., .)
philpem@0	9521	{
philpem@0	9522	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9523	{
philpem@0	9524	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9525	return;
philpem@0	9526	}
philpem@0	9527	m68ki_exception_illegal();
philpem@0	9528	}
philpem@0	9529
philpem@0	9530
philpem@0	9531	M68KMAKE_OP(trapt, 16, ., .)
philpem@0	9532	{
philpem@0	9533	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9534	{
philpem@0	9535	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9536	return;
philpem@0	9537	}
philpem@0	9538	m68ki_exception_illegal();
philpem@0	9539	}
philpem@0	9540
philpem@0	9541
philpem@0	9542	M68KMAKE_OP(trapt, 32, ., .)
philpem@0	9543	{
philpem@0	9544	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9545	{
philpem@0	9546	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9547	return;
philpem@0	9548	}
philpem@0	9549	m68ki_exception_illegal();
philpem@0	9550	}
philpem@0	9551
philpem@0	9552
philpem@0	9553	M68KMAKE_OP(trapf, 0, ., .)
philpem@0	9554	{
philpem@0	9555	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9556	{
philpem@0	9557	return;
philpem@0	9558	}
philpem@0	9559	m68ki_exception_illegal();
philpem@0	9560	}
philpem@0	9561
philpem@0	9562
philpem@0	9563	M68KMAKE_OP(trapf, 16, ., .)
philpem@0	9564	{
philpem@0	9565	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9566	{
philpem@0	9567	REG_PC += 2;
philpem@0	9568	return;
philpem@0	9569	}
philpem@0	9570	m68ki_exception_illegal();
philpem@0	9571	}
philpem@0	9572
philpem@0	9573
philpem@0	9574	M68KMAKE_OP(trapf, 32, ., .)
philpem@0	9575	{
philpem@0	9576	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9577	{
philpem@0	9578	REG_PC += 4;
philpem@0	9579	return;
philpem@0	9580	}
philpem@0	9581	m68ki_exception_illegal();
philpem@0	9582	}
philpem@0	9583
philpem@0	9584
philpem@0	9585	M68KMAKE_OP(trapcc, 0, ., .)
philpem@0	9586	{
philpem@0	9587	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9588	{
philpem@0	9589	if(M68KMAKE_CC)
philpem@0	9590	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9591	return;
philpem@0	9592	}
philpem@0	9593	m68ki_exception_illegal();
philpem@0	9594	}
philpem@0	9595
philpem@0	9596
philpem@0	9597	M68KMAKE_OP(trapcc, 16, ., .)
philpem@0	9598	{
philpem@0	9599	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9600	{
philpem@0	9601	if(M68KMAKE_CC)
philpem@0	9602	{
philpem@0	9603	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9604	return;
philpem@0	9605	}
philpem@0	9606	REG_PC += 2;
philpem@0	9607	return;
philpem@0	9608	}
philpem@0	9609	m68ki_exception_illegal();
philpem@0	9610	}
philpem@0	9611
philpem@0	9612
philpem@0	9613	M68KMAKE_OP(trapcc, 32, ., .)
philpem@0	9614	{
philpem@0	9615	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9616	{
philpem@0	9617	if(M68KMAKE_CC)
philpem@0	9618	{
philpem@0	9619	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9620	return;
philpem@0	9621	}
philpem@0	9622	REG_PC += 4;
philpem@0	9623	return;
philpem@0	9624	}
philpem@0	9625	m68ki_exception_illegal();
philpem@0	9626	}
philpem@0	9627
philpem@0	9628
philpem@0	9629	M68KMAKE_OP(trapv, 0, ., .)
philpem@0	9630	{
philpem@0	9631	if(COND_VC())
philpem@0	9632	{
philpem@0	9633	return;
philpem@0	9634	}
philpem@0	9635	m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
philpem@0	9636	}
philpem@0	9637
philpem@0	9638
philpem@0	9639	M68KMAKE_OP(tst, 8, ., d)
philpem@0	9640	{
philpem@0	9641	uint res = MASK_OUT_ABOVE_8(DY);
philpem@0	9642
philpem@0	9643	FLAG_N = NFLAG_8(res);
philpem@0	9644	FLAG_Z = res;
philpem@0	9645	FLAG_V = VFLAG_CLEAR;
philpem@0	9646	FLAG_C = CFLAG_CLEAR;
philpem@0	9647	}
philpem@0	9648
philpem@0	9649
philpem@0	9650	M68KMAKE_OP(tst, 8, ., .)
philpem@0	9651	{
philpem@0	9652	uint ea = M68KMAKE_GET_EA_AY_8;
philpem@0	9653	uint res = m68ki_read_8(ea);
philpem@0	9654
philpem@0	9655	FLAG_N = NFLAG_8(res);
philpem@0	9656	FLAG_Z = res;
philpem@0	9657	FLAG_V = VFLAG_CLEAR;
philpem@0	9658	FLAG_C = CFLAG_CLEAR;
philpem@0	9659	}
philpem@0	9660
philpem@0	9661
philpem@0	9662	M68KMAKE_OP(tst, 8, ., pcdi)
philpem@0	9663	{
philpem@0	9664	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9665	{
philpem@0	9666	uint res = OPER_PCDI_8();
philpem@0	9667
philpem@0	9668	FLAG_N = NFLAG_8(res);
philpem@0	9669	FLAG_Z = res;
philpem@0	9670	FLAG_V = VFLAG_CLEAR;
philpem@0	9671	FLAG_C = CFLAG_CLEAR;
philpem@0	9672	return;
philpem@0	9673	}
philpem@0	9674	m68ki_exception_illegal();
philpem@0	9675	}
philpem@0	9676
philpem@0	9677
philpem@0	9678	M68KMAKE_OP(tst, 8, ., pcix)
philpem@0	9679	{
philpem@0	9680	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9681	{
philpem@0	9682	uint res = OPER_PCIX_8();
philpem@0	9683
philpem@0	9684	FLAG_N = NFLAG_8(res);
philpem@0	9685	FLAG_Z = res;
philpem@0	9686	FLAG_V = VFLAG_CLEAR;
philpem@0	9687	FLAG_C = CFLAG_CLEAR;
philpem@0	9688	return;
philpem@0	9689	}
philpem@0	9690	m68ki_exception_illegal();
philpem@0	9691	}
philpem@0	9692
philpem@0	9693
philpem@0	9694	M68KMAKE_OP(tst, 8, ., i)
philpem@0	9695	{
philpem@0	9696	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9697	{
philpem@0	9698	uint res = OPER_I_8();
philpem@0	9699
philpem@0	9700	FLAG_N = NFLAG_8(res);
philpem@0	9701	FLAG_Z = res;
philpem@0	9702	FLAG_V = VFLAG_CLEAR;
philpem@0	9703	FLAG_C = CFLAG_CLEAR;
philpem@0	9704	return;
philpem@0	9705	}
philpem@0	9706	m68ki_exception_illegal();
philpem@0	9707	}
philpem@0	9708
philpem@0	9709
philpem@0	9710	M68KMAKE_OP(tst, 16, ., d)
philpem@0	9711	{
philpem@0	9712	uint res = MASK_OUT_ABOVE_16(DY);
philpem@0	9713
philpem@0	9714	FLAG_N = NFLAG_16(res);
philpem@0	9715	FLAG_Z = res;
philpem@0	9716	FLAG_V = VFLAG_CLEAR;
philpem@0	9717	FLAG_C = CFLAG_CLEAR;
philpem@0	9718	}
philpem@0	9719
philpem@0	9720
philpem@0	9721	M68KMAKE_OP(tst, 16, ., a)
philpem@0	9722	{
philpem@0	9723	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9724	{
philpem@0	9725	uint res = MAKE_INT_16(AY);
philpem@0	9726
philpem@0	9727	FLAG_N = NFLAG_16(res);
philpem@0	9728	FLAG_Z = res;
philpem@0	9729	FLAG_V = VFLAG_CLEAR;
philpem@0	9730	FLAG_C = CFLAG_CLEAR;
philpem@0	9731	return;
philpem@0	9732	}
philpem@0	9733	m68ki_exception_illegal();
philpem@0	9734	}
philpem@0	9735
philpem@0	9736
philpem@0	9737	M68KMAKE_OP(tst, 16, ., .)
philpem@0	9738	{
philpem@0	9739	uint res = M68KMAKE_GET_OPER_AY_16;
philpem@0	9740
philpem@0	9741	FLAG_N = NFLAG_16(res);
philpem@0	9742	FLAG_Z = res;
philpem@0	9743	FLAG_V = VFLAG_CLEAR;
philpem@0	9744	FLAG_C = CFLAG_CLEAR;
philpem@0	9745	}
philpem@0	9746
philpem@0	9747
philpem@0	9748	M68KMAKE_OP(tst, 16, ., pcdi)
philpem@0	9749	{
philpem@0	9750	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9751	{
philpem@0	9752	uint res = OPER_PCDI_16();
philpem@0	9753
philpem@0	9754	FLAG_N = NFLAG_16(res);
philpem@0	9755	FLAG_Z = res;
philpem@0	9756	FLAG_V = VFLAG_CLEAR;
philpem@0	9757	FLAG_C = CFLAG_CLEAR;
philpem@0	9758	return;
philpem@0	9759	}
philpem@0	9760	m68ki_exception_illegal();
philpem@0	9761	}
philpem@0	9762
philpem@0	9763
philpem@0	9764	M68KMAKE_OP(tst, 16, ., pcix)
philpem@0	9765	{
philpem@0	9766	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9767	{
philpem@0	9768	uint res = OPER_PCIX_16();
philpem@0	9769
philpem@0	9770	FLAG_N = NFLAG_16(res);
philpem@0	9771	FLAG_Z = res;
philpem@0	9772	FLAG_V = VFLAG_CLEAR;
philpem@0	9773	FLAG_C = CFLAG_CLEAR;
philpem@0	9774	return;
philpem@0	9775	}
philpem@0	9776	m68ki_exception_illegal();
philpem@0	9777	}
philpem@0	9778
philpem@0	9779
philpem@0	9780	M68KMAKE_OP(tst, 16, ., i)
philpem@0	9781	{
philpem@0	9782	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9783	{
philpem@0	9784	uint res = OPER_I_16();
philpem@0	9785
philpem@0	9786	FLAG_N = NFLAG_16(res);
philpem@0	9787	FLAG_Z = res;
philpem@0	9788	FLAG_V = VFLAG_CLEAR;
philpem@0	9789	FLAG_C = CFLAG_CLEAR;
philpem@0	9790	return;
philpem@0	9791	}
philpem@0	9792	m68ki_exception_illegal();
philpem@0	9793	}
philpem@0	9794
philpem@0	9795
philpem@0	9796	M68KMAKE_OP(tst, 32, ., d)
philpem@0	9797	{
philpem@0	9798	uint res = DY;
philpem@0	9799
philpem@0	9800	FLAG_N = NFLAG_32(res);
philpem@0	9801	FLAG_Z = res;
philpem@0	9802	FLAG_V = VFLAG_CLEAR;
philpem@0	9803	FLAG_C = CFLAG_CLEAR;
philpem@0	9804	}
philpem@0	9805
philpem@0	9806
philpem@0	9807	M68KMAKE_OP(tst, 32, ., a)
philpem@0	9808	{
philpem@0	9809	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9810	{
philpem@0	9811	uint res = AY;
philpem@0	9812
philpem@0	9813	FLAG_N = NFLAG_32(res);
philpem@0	9814	FLAG_Z = res;
philpem@0	9815	FLAG_V = VFLAG_CLEAR;
philpem@0	9816	FLAG_C = CFLAG_CLEAR;
philpem@0	9817	return;
philpem@0	9818	}
philpem@0	9819	m68ki_exception_illegal();
philpem@0	9820	}
philpem@0	9821
philpem@0	9822
philpem@0	9823	M68KMAKE_OP(tst, 32, ., .)
philpem@0	9824	{
philpem@0	9825	uint res = M68KMAKE_GET_OPER_AY_32;
philpem@0	9826
philpem@0	9827	FLAG_N = NFLAG_32(res);
philpem@0	9828	FLAG_Z = res;
philpem@0	9829	FLAG_V = VFLAG_CLEAR;
philpem@0	9830	FLAG_C = CFLAG_CLEAR;
philpem@0	9831	}
philpem@0	9832
philpem@0	9833
philpem@0	9834	M68KMAKE_OP(tst, 32, ., pcdi)
philpem@0	9835	{
philpem@0	9836	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9837	{
philpem@0	9838	uint res = OPER_PCDI_32();
philpem@0	9839
philpem@0	9840	FLAG_N = NFLAG_32(res);
philpem@0	9841	FLAG_Z = res;
philpem@0	9842	FLAG_V = VFLAG_CLEAR;
philpem@0	9843	FLAG_C = CFLAG_CLEAR;
philpem@0	9844	return;
philpem@0	9845	}
philpem@0	9846	m68ki_exception_illegal();
philpem@0	9847	}
philpem@0	9848
philpem@0	9849
philpem@0	9850	M68KMAKE_OP(tst, 32, ., pcix)
philpem@0	9851	{
philpem@0	9852	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9853	{
philpem@0	9854	uint res = OPER_PCIX_32();
philpem@0	9855
philpem@0	9856	FLAG_N = NFLAG_32(res);
philpem@0	9857	FLAG_Z = res;
philpem@0	9858	FLAG_V = VFLAG_CLEAR;
philpem@0	9859	FLAG_C = CFLAG_CLEAR;
philpem@0	9860	return;
philpem@0	9861	}
philpem@0	9862	m68ki_exception_illegal();
philpem@0	9863	}
philpem@0	9864
philpem@0	9865
philpem@0	9866	M68KMAKE_OP(tst, 32, ., i)
philpem@0	9867	{
philpem@0	9868	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9869	{
philpem@0	9870	uint res = OPER_I_32();
philpem@0	9871
philpem@0	9872	FLAG_N = NFLAG_32(res);
philpem@0	9873	FLAG_Z = res;
philpem@0	9874	FLAG_V = VFLAG_CLEAR;
philpem@0	9875	FLAG_C = CFLAG_CLEAR;
philpem@0	9876	return;
philpem@0	9877	}
philpem@0	9878	m68ki_exception_illegal();
philpem@0	9879	}
philpem@0	9880
philpem@0	9881
philpem@0	9882	M68KMAKE_OP(unlk, 32, ., a7)
philpem@0	9883	{
philpem@0	9884	REG_A[7] = m68ki_read_32(REG_A[7]);
philpem@0	9885	}
philpem@0	9886
philpem@0	9887
philpem@0	9888	M68KMAKE_OP(unlk, 32, ., .)
philpem@0	9889	{
philpem@0	9890	uint* r_dst = &AY;
philpem@0	9891
philpem@0	9892	REG_A[7] = *r_dst;
philpem@0	9893	*r_dst = m68ki_pull_32();
philpem@0	9894	}
philpem@0	9895
philpem@0	9896
philpem@0	9897	M68KMAKE_OP(unpk, 16, rr, .)
philpem@0	9898	{
philpem@0	9899	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9900	{
philpem@0	9901	/* Note: DX and DY are reversed in Motorola's docs */
philpem@0	9902	uint src = DY;
philpem@0	9903	uint* r_dst = &DX;
philpem@0	9904
philpem@0	9905	*r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
philpem@0	9906	return;
philpem@0	9907	}
philpem@0	9908	m68ki_exception_illegal();
philpem@0	9909	}
philpem@0	9910
philpem@0	9911
philpem@0	9912	M68KMAKE_OP(unpk, 16, mm, ax7)
philpem@0	9913	{
philpem@0	9914	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9915	{
philpem@0	9916	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	9917	uint src = OPER_AY_PD_8();
philpem@0	9918	uint ea_dst;
philpem@0	9919
philpem@0	9920	src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
philpem@0	9921	ea_dst = EA_A7_PD_8();
philpem@0	9922	m68ki_write_8(ea_dst, (src >> 8) & 0xff);
philpem@0	9923	ea_dst = EA_A7_PD_8();
philpem@0	9924	m68ki_write_8(ea_dst, src & 0xff);
philpem@0	9925	return;
philpem@0	9926	}
philpem@0	9927	m68ki_exception_illegal();
philpem@0	9928	}
philpem@0	9929
philpem@0	9930
philpem@0	9931	M68KMAKE_OP(unpk, 16, mm, ay7)
philpem@0	9932	{
philpem@0	9933	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9934	{
philpem@0	9935	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	9936	uint src = OPER_A7_PD_8();
philpem@0	9937	uint ea_dst;
philpem@0	9938
philpem@0	9939	src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
philpem@0	9940	ea_dst = EA_AX_PD_8();
philpem@0	9941	m68ki_write_8(ea_dst, (src >> 8) & 0xff);
philpem@0	9942	ea_dst = EA_AX_PD_8();
philpem@0	9943	m68ki_write_8(ea_dst, src & 0xff);
philpem@0	9944	return;
philpem@0	9945	}
philpem@0	9946	m68ki_exception_illegal();
philpem@0	9947	}
philpem@0	9948
philpem@0	9949
philpem@0	9950	M68KMAKE_OP(unpk, 16, mm, axy7)
philpem@0	9951	{
philpem@0	9952	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9953	{
philpem@0	9954	uint src = OPER_A7_PD_8();
philpem@0	9955	uint ea_dst;
philpem@0	9956
philpem@0	9957	src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
philpem@0	9958	ea_dst = EA_A7_PD_8();
philpem@0	9959	m68ki_write_8(ea_dst, (src >> 8) & 0xff);
philpem@0	9960	ea_dst = EA_A7_PD_8();
philpem@0	9961	m68ki_write_8(ea_dst, src & 0xff);
philpem@0	9962	return;
philpem@0	9963	}
philpem@0	9964	m68ki_exception_illegal();
philpem@0	9965	}
philpem@0	9966
philpem@0	9967
philpem@0	9968	M68KMAKE_OP(unpk, 16, mm, .)
philpem@0	9969	{
philpem@0	9970	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
philpem@0	9971	{
philpem@0	9972	/* Note: AX and AY are reversed in Motorola's docs */
philpem@0	9973	uint src = OPER_AY_PD_8();
philpem@0	9974	uint ea_dst;
philpem@0	9975
philpem@0	9976	src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
philpem@0	9977	ea_dst = EA_AX_PD_8();
philpem@0	9978	m68ki_write_8(ea_dst, (src >> 8) & 0xff);
philpem@0	9979	ea_dst = EA_AX_PD_8();
philpem@0	9980	m68ki_write_8(ea_dst, src & 0xff);
philpem@0	9981	return;
philpem@0	9982	}
philpem@0	9983	m68ki_exception_illegal();
philpem@0	9984	}
philpem@0	9985
philpem@0	9986
philpem@0	9987
philpem@0	9988	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
philpem@0	9989	M68KMAKE_END