Wed, 16 Apr 2014 02:20:43 -0600
fixed bus error handling for real this time (save registers before every instruction and push the saved registers if a bus error occurs, since the instruction may have changed registers before the bus error, and also stop the instruction immediately with longjmp so it won't change memory after the bus error)
This isn't actually what a real 68k does, but it is a good enough approximation. A real 68k will jump back into the middle of the faulted instruction and resume it from the memory access that faulted as opposed to restarting from the beginning like this CPU emulation does. It would be a lot harder to do that with the way this CPU library is designed. Newer versions of MESS basically do the same thing (they use a newer version of this library).
| philpem@40 | 1 | #ifndef _MEMORY_H |
| philpem@40 | 2 | #define _MEMORY_H |
| philpem@40 | 3 | |
| philpem@40 | 4 | /*********************************** |
| philpem@40 | 5 | * Array read/write utility macros |
| philpem@40 | 6 | * "Don't Repeat Yourself" :) |
| philpem@40 | 7 | ***********************************/ |
| philpem@40 | 8 | |
| philpem@40 | 9 | /// Array read, 32-bit |
| philpem@40 | 10 | #define RD32(array, address, andmask) \ |
| philpem@40 | 11 | (((uint32_t)array[(address + 0) & (andmask)] << 24) | \ |
| philpem@40 | 12 | ((uint32_t)array[(address + 1) & (andmask)] << 16) | \ |
| philpem@40 | 13 | ((uint32_t)array[(address + 2) & (andmask)] << 8) | \ |
| philpem@40 | 14 | ((uint32_t)array[(address + 3) & (andmask)])) |
| philpem@40 | 15 | |
| philpem@40 | 16 | /// Array read, 16-bit |
| philpem@40 | 17 | #define RD16(array, address, andmask) \ |
| philpem@40 | 18 | (((uint32_t)array[(address + 0) & (andmask)] << 8) | \ |
| philpem@40 | 19 | ((uint32_t)array[(address + 1) & (andmask)])) |
| philpem@40 | 20 | |
| philpem@40 | 21 | /// Array read, 8-bit |
| philpem@40 | 22 | #define RD8(array, address, andmask) \ |
| philpem@40 | 23 | ((uint32_t)array[(address + 0) & (andmask)]) |
| philpem@40 | 24 | |
| philpem@40 | 25 | /// Array write, 32-bit |
| philpem@70 | 26 | #define WR32(array, address, andmask, value) do { \ |
| philpem@40 | 27 | array[(address + 0) & (andmask)] = (value >> 24) & 0xff; \ |
| philpem@40 | 28 | array[(address + 1) & (andmask)] = (value >> 16) & 0xff; \ |
| philpem@40 | 29 | array[(address + 2) & (andmask)] = (value >> 8) & 0xff; \ |
| philpem@40 | 30 | array[(address + 3) & (andmask)] = value & 0xff; \ |
| philpem@70 | 31 | } while (0) |
| philpem@40 | 32 | |
| philpem@40 | 33 | /// Array write, 16-bit |
| philpem@70 | 34 | #define WR16(array, address, andmask, value) do { \ |
| philpem@40 | 35 | array[(address + 0) & (andmask)] = (value >> 8) & 0xff; \ |
| philpem@40 | 36 | array[(address + 1) & (andmask)] = value & 0xff; \ |
| philpem@70 | 37 | } while (0) |
| philpem@40 | 38 | |
| philpem@40 | 39 | /// Array write, 8-bit |
| philpem@70 | 40 | #define WR8(array, address, andmask, value) do { \ |
| philpem@70 | 41 | array[(address + 0) & (andmask)] = value & 0xff; \ |
| philpem@70 | 42 | } while (0) |
| philpem@40 | 43 | |
| philpem@40 | 44 | /****************** |
| philpem@40 | 45 | * Memory mapping |
| philpem@40 | 46 | ******************/ |
| philpem@40 | 47 | |
| philpem@40 | 48 | typedef enum { |
| philpem@40 | 49 | MEM_ALLOWED = 0, |
| philpem@40 | 50 | MEM_PAGEFAULT, // Page fault -- page not present |
| philpem@40 | 51 | MEM_PAGE_NO_WE, // Page not write enabled |
| philpem@40 | 52 | MEM_KERNEL, // User attempted to access kernel memory |
| philpem@40 | 53 | MEM_UIE // User Nonmemory Location Access |
| philpem@40 | 54 | } MEM_STATUS; |
| philpem@40 | 55 | |
| philpem@40 | 56 | /** |
| philpem@40 | 57 | * @brief Check memory access permissions for a given address. |
| philpem@40 | 58 | * @param addr Address. |
| philpem@40 | 59 | * @param writing true if writing to memory, false if reading. |
| philpem@40 | 60 | * @return One of the MEM_STATUS constants, specifying whether the access is |
| philpem@40 | 61 | * permitted, or what error occurred. |
| philpem@40 | 62 | */ |
| philpem@40 | 63 | MEM_STATUS checkMemoryAccess(uint32_t addr, bool writing); |
| philpem@40 | 64 | |
| philpem@40 | 65 | /** |
| philpem@40 | 66 | * @brief Map a CPU memory address into physical memory space. |
| philpem@40 | 67 | * @param addr Address. |
| philpem@40 | 68 | * @param writing true if writing to memory, false if reading. |
| philpem@40 | 69 | * @return Address, remapped into physical memory. |
| philpem@40 | 70 | */ |
| philpem@40 | 71 | uint32_t mapAddr(uint32_t addr, bool writing); |
| philpem@40 | 72 | |
| philpem@112 | 73 | /** |
| philpem@112 | 74 | * @brief Check access flags for a DMA transfer and trigger an exception if |
| philpem@112 | 75 | * the access is not permitted |
| philpem@112 | 76 | * @param reading true if reading from memory, false if writing |
| philpem@112 | 77 | * @return true if the access is permitted, false if not |
| philpem@112 | 78 | */ |
| philpem@112 | 79 | bool access_check_dma(int reading); |
| philpem@112 | 80 | |
| philpem@40 | 81 | #endif |