3b1emu / changelog

treat all DMA reads/writes as kernel mode (previously it would depend on whether the processor happens to be in user mode or kernel mode when the DMA completes, which is totally incorrect); handle 32-bit accesses that straddle page boundaries properly (all 32-bit accesses are now split into two 16-bit accesses); allow reads to the entire zero page, rather than just address 0

• Fri, 18 Apr 2014 01:26:01 -0600
• by andrew@localhost [Fri, 18 Apr 2014 01:26:01 -0600] rev 150
• treat all DMA reads/writes as kernel mode (previously it would depend on whether the processor happens to be in user mode or kernel mode when the DMA completes, which is totally incorrect); handle 32-bit accesses that straddle page boundaries properly (all 32-bit accesses are now split into two 16-bit accesses); allow reads to the entire zero page, rather than just address 0

disabled seek delay on WD2010 (Unix seems to work fine without it)

• Thu, 17 Apr 2014 01:58:05 -0600
• by andrew@localhost [Thu, 17 Apr 2014 01:58:05 -0600] rev 149
• disabled seek delay on WD2010 (Unix seems to work fine without it)

ignore out-of-range addresses on low-level format commands (s4diag formats once sector past the end of each track)

• Thu, 17 Apr 2014 01:50:41 -0600
• by andrew@localhost [Thu, 17 Apr 2014 01:50:41 -0600] rev 148
• ignore out-of-range addresses on low-level format commands (s4diag formats once sector past the end of each track)

fixed bus error handling for real this time (save registers before every instruction and push the saved registers if a bus error occurs, since the instruction may have changed registers before the bus error, and also stop the instruction immediately with longjmp so it won't change memory after the bus error)

• Wed, 16 Apr 2014 02:20:43 -0600
• by andrew@localhost [Wed, 16 Apr 2014 02:20:43 -0600] rev 147
• fixed bus error handling for real this time (save registers before every instruction and push the saved registers if a bus error occurs, since the instruction may have changed registers before the bus error, and also stop the instruction immediately with longjmp so it won't change memory after the bus error)
  
  This isn't actually what a real 68k does, but it is a good enough approximation. A real 68k will jump back into the middle of the faulted instruction and resume it from the memory access that faulted as opposed to restarting from the beginning like this CPU emulation does. It would be a lot harder to do that with the way this CPU library is designed. Newer versions of MESS basically do the same thing (they use a newer version of this library).