3b1emu / file diff

diff: src/memory.c

src/memory.c

branch
experimental_memory_mapper_v2
changeset 140
1e4c45b144c4
parent 133
84ed5ec1d1e0
child 141
8460d432606f
     1.1 --- a/src/memory.c	Wed Mar 13 01:10:34 2013 +0000
     1.2 +++ b/src/memory.c	Fri Apr 12 12:34:32 2013 +0100
     1.3 @@ -94,7 +94,8 @@
     1.4  	} else {
     1.5  		// No L7 interrupt
     1.6  		if ((write && !(MAP_PAGEBITS(addr) & PAGE_BIT_PS1) &&  (MAP_PAGEBITS(addr) & PAGE_BIT_PS0)) ||
     1.7 -			(write &&  (MAP_PAGEBITS(addr) & PAGE_BIT_PS1) && !(MAP_PAGEBITS(addr) & PAGE_BIT_PS0)))
     1.8 +			(write &&  (MAP_PAGEBITS(addr) & PAGE_BIT_PS1) && !(MAP_PAGEBITS(addr) & PAGE_BIT_PS0)) ||
     1.9 +			(          (MAP_PAGEBITS(addr) & PAGE_BIT_PS1) &&  (MAP_PAGEBITS(addr) & PAGE_BIT_PS0)))  /* NOTE -- Once again, this case was missing from the PAL equations in the TRM... */
    1.10  		{
    1.11  			// No L7 interrupt, PS[1:0] = 0b01, write
    1.12  			// No L7 interrupt, PS[1:0] = 0b10, write