3b1emu / file diff

diff: src/memory.c

src/memory.c

changeset 113
d3bb6a6a04b7
parent 112
a392eb8f9806
child 114
36367ebd34e0
     1.1 --- a/src/memory.c	Sat Nov 17 19:18:29 2012 +0000
     1.2 +++ b/src/memory.c	Sat Nov 17 21:28:48 2012 +0000
     1.3 @@ -210,7 +210,10 @@
     1.4  			state.bsr1 = address & 0xffff;							\
     1.5  			LOG("Bus Error while reading, addr %08X, statcode %d", address, st);		\
     1.6  			if (state.ee) m68k_pulse_bus_error();					\
     1.7 -			return 0xFFFFFFFF;										\
     1.8 +			if (bits == 32)											\
     1.9 +				return 0xFFFFFFFF;									\
    1.10 +			else													\
    1.11 +				return (1 << bits)-1;								\
    1.12  		}															\
    1.13  	} while (0)
    1.14  /*}}}*/