3b1emu / file revision

src/musashi/example/sim.h@5f7faf5ecbf4

src/musashi/example/sim.h

Tue, 15 Nov 2011 09:30:57 +0000

author
Philip Pemberton <philpem@philpem.me.uk>
date
Tue, 15 Nov 2011 09:30:57 +0000
changeset 108
5f7faf5ecbf4
parent 0
8bf1bf91a36d
permissions
-rw-r--r--

Fix BSR0 UDS/LDS bit polarity

Patch-Author: Andrew Warkentin <andreww591!gmail>
Patch-MessageID: <4EC200CE.2020304@gmail.com>

... "The second bug is simpler - you had the UDS and LDS bits in BSR0 inverted (they are supposed to be active low)."

     1 #ifndef SIM__HEADER

     2 #define SIM__HEADER

     3 

     4 unsigned int m68k_read_memory_8(unsigned int address);

     5 unsigned int m68k_read_memory_16(unsigned int address);

     6 unsigned int m68k_read_memory_32(unsigned int address);

     7 void m68k_write_memory_8(unsigned int address, unsigned int value);

     8 void m68k_write_memory_16(unsigned int address, unsigned int value);

     9 void m68k_write_memory_32(unsigned int address, unsigned int value);

    10 void cpu_pulse_reset(void);

    11 void cpu_set_fc(unsigned int fc);

    12 int  cpu_irq_ack(int level);

    13 

    14 #endif /* SIM__HEADER */