src/musashi/example/sim.h

Fri, 12 Apr 2013 16:26:25 +0100

author
Philip Pemberton <philpem@philpem.me.uk>
date
Fri, 12 Apr 2013 16:26:25 +0100
branch
experimental_memory_mapper_v2
changeset 144
609707511166
parent 0
8bf1bf91a36d
permissions
-rw-r--r--

Don't set PS1 if there is a level-7 interrupt or bus error

PS1 should only be set if the page was originally present (PS1 or PS0 set). If
PS0 and PS1 are clear (page not present) then do NOT set PS1.

Once again the TRM is blatantly and spectacularly wrong...

     1 #ifndef SIM__HEADER
     2 #define SIM__HEADER
     4 unsigned int m68k_read_memory_8(unsigned int address);
     5 unsigned int m68k_read_memory_16(unsigned int address);
     6 unsigned int m68k_read_memory_32(unsigned int address);
     7 void m68k_write_memory_8(unsigned int address, unsigned int value);
     8 void m68k_write_memory_16(unsigned int address, unsigned int value);
     9 void m68k_write_memory_32(unsigned int address, unsigned int value);
    10 void cpu_pulse_reset(void);
    11 void cpu_set_fc(unsigned int fc);
    12 int  cpu_irq_ack(int level);
    14 #endif /* SIM__HEADER */