Sun, 05 Dec 2010 16:20:00 +0000
add preliminary WD279x emulation to core
1 /* ======================================================================== */
2 /* ========================= LICENSING & COPYRIGHT ======================== */
3 /* ======================================================================== */
4 /*
5 * MUSASHI
6 * Version 3.3
7 *
8 * A portable Motorola M680x0 processor emulation engine.
9 * Copyright 1998-2001 Karl Stenerud. All rights reserved.
10 *
11 * This code may be freely used for non-commercial purposes as long as this
12 * copyright notice remains unaltered in the source code and any binary files
13 * containing this code in compiled form.
14 *
15 * All other lisencing terms must be negotiated with the author
16 * (Karl Stenerud).
17 *
18 * The latest version of this code can be obtained at:
19 * http://kstenerud.cjb.net
20 */
24 /* ======================================================================== */
25 /* ================================ INCLUDES ============================== */
26 /* ======================================================================== */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <string.h>
31 #include "m68k.h"
33 /* ======================================================================== */
34 /* ============================ GENERAL DEFINES =========================== */
35 /* ======================================================================== */
37 /* unsigned int and int must be at least 32 bits wide */
38 #undef uint
39 #define uint unsigned int
41 /* Bit Isolation Functions */
42 #define BIT_0(A) ((A) & 0x00000001)
43 #define BIT_1(A) ((A) & 0x00000002)
44 #define BIT_2(A) ((A) & 0x00000004)
45 #define BIT_3(A) ((A) & 0x00000008)
46 #define BIT_4(A) ((A) & 0x00000010)
47 #define BIT_5(A) ((A) & 0x00000020)
48 #define BIT_6(A) ((A) & 0x00000040)
49 #define BIT_7(A) ((A) & 0x00000080)
50 #define BIT_8(A) ((A) & 0x00000100)
51 #define BIT_9(A) ((A) & 0x00000200)
52 #define BIT_A(A) ((A) & 0x00000400)
53 #define BIT_B(A) ((A) & 0x00000800)
54 #define BIT_C(A) ((A) & 0x00001000)
55 #define BIT_D(A) ((A) & 0x00002000)
56 #define BIT_E(A) ((A) & 0x00004000)
57 #define BIT_F(A) ((A) & 0x00008000)
58 #define BIT_10(A) ((A) & 0x00010000)
59 #define BIT_11(A) ((A) & 0x00020000)
60 #define BIT_12(A) ((A) & 0x00040000)
61 #define BIT_13(A) ((A) & 0x00080000)
62 #define BIT_14(A) ((A) & 0x00100000)
63 #define BIT_15(A) ((A) & 0x00200000)
64 #define BIT_16(A) ((A) & 0x00400000)
65 #define BIT_17(A) ((A) & 0x00800000)
66 #define BIT_18(A) ((A) & 0x01000000)
67 #define BIT_19(A) ((A) & 0x02000000)
68 #define BIT_1A(A) ((A) & 0x04000000)
69 #define BIT_1B(A) ((A) & 0x08000000)
70 #define BIT_1C(A) ((A) & 0x10000000)
71 #define BIT_1D(A) ((A) & 0x20000000)
72 #define BIT_1E(A) ((A) & 0x40000000)
73 #define BIT_1F(A) ((A) & 0x80000000)
75 /* These are the CPU types understood by this disassembler */
76 #define TYPE_68000 1
77 #define TYPE_68010 2
78 #define TYPE_68020 4
79 #define TYPE_68030 8
80 #define TYPE_68040 16
82 #define M68000_ONLY TYPE_68000
84 #define M68010_ONLY TYPE_68010
85 #define M68010_LESS (TYPE_68000 | TYPE_68010)
86 #define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
88 #define M68020_ONLY TYPE_68020
89 #define M68020_LESS (TYPE_68010 | TYPE_68020)
90 #define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)
92 #define M68030_ONLY TYPE_68030
93 #define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)
94 #define M68030_PLUS (TYPE_68030 | TYPE_68040)
96 #define M68040_PLUS TYPE_68040
99 /* Extension word formats */
100 #define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
101 #define EXT_FULL(A) BIT_8(A)
102 #define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
103 #define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))
104 #define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))
105 #define EXT_INDEX_REGISTER(A) (((A)>>12)&7)
106 #define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)
107 #define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
108 #define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
109 #define EXT_INDEX_SCALE(A) (((A)>>9)&3)
110 #define EXT_INDEX_LONG(A) BIT_B(A)
111 #define EXT_INDEX_AR(A) BIT_F(A)
112 #define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)
113 #define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)
114 #define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)
115 #define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
116 #define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)
117 #define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)
121 /* ======================================================================== */
122 /* =============================== PROTOTYPES ============================= */
123 /* ======================================================================== */
125 /* Read data at the PC and increment PC */
126 uint read_imm_8(void);
127 uint read_imm_16(void);
128 uint read_imm_32(void);
130 /* Read data at the PC but don't imcrement the PC */
131 uint peek_imm_8(void);
132 uint peek_imm_16(void);
133 uint peek_imm_32(void);
135 /* make signed integers 100% portably */
136 static int make_int_8(int value);
137 static int make_int_16(int value);
139 /* make a string of a hex value */
140 static char* make_signed_hex_str_8(uint val);
141 static char* make_signed_hex_str_16(uint val);
142 static char* make_signed_hex_str_32(uint val);
144 /* make string of ea mode */
145 static char* get_ea_mode_str(uint instruction, uint size);
147 char* get_ea_mode_str_8(uint instruction);
148 char* get_ea_mode_str_16(uint instruction);
149 char* get_ea_mode_str_32(uint instruction);
151 /* make string of immediate value */
152 static char* get_imm_str_s(uint size);
153 static char* get_imm_str_u(uint size);
155 char* get_imm_str_s8(void);
156 char* get_imm_str_s16(void);
157 char* get_imm_str_s32(void);
159 /* Stuff to build the opcode handler jump table */
160 static void build_opcode_table(void);
161 static int valid_ea(uint opcode, uint mask);
162 static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
164 /* used to build opcode handler jump table */
165 typedef struct
166 {
167 void (*opcode_handler)(void); /* handler function */
168 uint mask; /* mask on opcode */
169 uint match; /* what to match after masking */
170 uint ea_mask; /* what ea modes are allowed */
171 } opcode_struct;
175 /* ======================================================================== */
176 /* ================================= DATA ================================= */
177 /* ======================================================================== */
179 /* Opcode handler jump table */
180 static void (*g_instruction_table[0x10000])(void);
181 /* Flag if disassembler initialized */
182 static int g_initialized = 0;
184 /* Address mask to simulate address lines */
185 static unsigned int g_address_mask = 0xffffffff;
187 static char g_dasm_str[100]; /* string to hold disassembly */
188 static char g_helper_str[100]; /* string to hold helpful info */
189 static uint g_cpu_pc; /* program counter */
190 static uint g_cpu_ir; /* instruction register */
191 static uint g_cpu_type;
193 /* used by ops like asr, ror, addq, etc */
194 static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
196 static uint g_5bit_data_table[32] =
197 {
198 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
199 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
200 };
202 static char* g_cc[16] =
203 {"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
205 static char* g_cpcc[64] =
206 {/* 000 001 010 011 100 101 110 111 */
207 "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
208 "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
209 "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
210 "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
211 "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
212 "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
213 "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
214 "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
215 };
218 /* ======================================================================== */
219 /* =========================== UTILITY FUNCTIONS ========================== */
220 /* ======================================================================== */
222 #define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
223 if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
224 { \
225 d68000_illegal(); \
226 return; \
227 }
229 #define read_imm_8() (m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)&0xff)
230 #define read_imm_16() m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)
231 #define read_imm_32() m68k_read_disassembler_32(((g_cpu_pc+=4)-4)&g_address_mask)
233 #define peek_imm_8() (m68k_read_disassembler_16(g_cpu_pc & g_address_mask)&0xff)
234 #define peek_imm_16() m68k_read_disassembler_16(g_cpu_pc & g_address_mask)
235 #define peek_imm_32() m68k_read_disassembler_32(g_cpu_pc & g_address_mask)
237 /* Fake a split interface */
238 #define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
239 #define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
240 #define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
242 #define get_imm_str_s8() get_imm_str_s(0)
243 #define get_imm_str_s16() get_imm_str_s(1)
244 #define get_imm_str_s32() get_imm_str_s(2)
246 #define get_imm_str_u8() get_imm_str_u(0)
247 #define get_imm_str_u16() get_imm_str_u(1)
248 #define get_imm_str_u32() get_imm_str_u(2)
251 /* 100% portable signed int generators */
252 static int make_int_8(int value)
253 {
254 return (value & 0x80) ? value | ~0xff : value & 0xff;
255 }
257 static int make_int_16(int value)
258 {
259 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
260 }
263 /* Get string representation of hex values */
264 static char* make_signed_hex_str_8(uint val)
265 {
266 static char str[20];
268 val &= 0xff;
270 if(val == 0x80)
271 sprintf(str, "-$80");
272 else if(val & 0x80)
273 sprintf(str, "-$%x", (0-val) & 0x7f);
274 else
275 sprintf(str, "$%x", val & 0x7f);
277 return str;
278 }
280 static char* make_signed_hex_str_16(uint val)
281 {
282 static char str[20];
284 val &= 0xffff;
286 if(val == 0x8000)
287 sprintf(str, "-$8000");
288 else if(val & 0x8000)
289 sprintf(str, "-$%x", (0-val) & 0x7fff);
290 else
291 sprintf(str, "$%x", val & 0x7fff);
293 return str;
294 }
296 static char* make_signed_hex_str_32(uint val)
297 {
298 static char str[20];
300 val &= 0xffffffff;
302 if(val == 0x80000000)
303 sprintf(str, "-$80000000");
304 else if(val & 0x80000000)
305 sprintf(str, "-$%x", (0-val) & 0x7fffffff);
306 else
307 sprintf(str, "$%x", val & 0x7fffffff);
309 return str;
310 }
313 /* make string of immediate value */
314 static char* get_imm_str_s(uint size)
315 {
316 static char str[15];
317 if(size == 0)
318 sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
319 else if(size == 1)
320 sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
321 else
322 sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
323 return str;
324 }
326 static char* get_imm_str_u(uint size)
327 {
328 static char str[15];
329 if(size == 0)
330 sprintf(str, "#$%x", read_imm_8() & 0xff);
331 else if(size == 1)
332 sprintf(str, "#$%x", read_imm_16() & 0xffff);
333 else
334 sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
335 return str;
336 }
338 /* Make string of effective address mode */
339 static char* get_ea_mode_str(uint instruction, uint size)
340 {
341 static char b1[64];
342 static char b2[64];
343 static char* mode = b2;
344 uint extension;
345 uint base;
346 uint outer;
347 char base_reg[4];
348 char index_reg[8];
349 uint preindex;
350 uint postindex;
351 uint comma = 0;
352 uint temp_value;
354 /* Switch buffers so we don't clobber on a double-call to this function */
355 mode = mode == b1 ? b2 : b1;
357 switch(instruction & 0x3f)
358 {
359 case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
360 /* data register direct */
361 sprintf(mode, "D%d", instruction&7);
362 break;
363 case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
364 /* address register direct */
365 sprintf(mode, "A%d", instruction&7);
366 break;
367 case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
368 /* address register indirect */
369 sprintf(mode, "(A%d)", instruction&7);
370 break;
371 case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
372 /* address register indirect with postincrement */
373 sprintf(mode, "(A%d)+", instruction&7);
374 break;
375 case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
376 /* address register indirect with predecrement */
377 sprintf(mode, "-(A%d)", instruction&7);
378 break;
379 case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
380 /* address register indirect with displacement*/
381 sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
382 break;
383 case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
384 /* address register indirect with index */
385 extension = read_imm_16();
387 if(EXT_FULL(extension))
388 {
389 if(EXT_EFFECTIVE_ZERO(extension))
390 {
391 strcpy(mode, "0");
392 break;
393 }
394 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
395 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
396 if(EXT_BASE_REGISTER_PRESENT(extension))
397 sprintf(base_reg, "A%d", instruction&7);
398 else
399 *base_reg = 0;
400 if(EXT_INDEX_REGISTER_PRESENT(extension))
401 {
402 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
403 if(EXT_INDEX_SCALE(extension))
404 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
405 }
406 else
407 *index_reg = 0;
408 preindex = (extension&7) > 0 && (extension&7) < 4;
409 postindex = (extension&7) > 4;
411 strcpy(mode, "(");
412 if(preindex || postindex)
413 strcat(mode, "[");
414 if(base)
415 {
416 strcat(mode, make_signed_hex_str_16(base));
417 comma = 1;
418 }
419 if(*base_reg)
420 {
421 if(comma)
422 strcat(mode, ",");
423 strcat(mode, base_reg);
424 comma = 1;
425 }
426 if(postindex)
427 {
428 strcat(mode, "]");
429 comma = 1;
430 }
431 if(*index_reg)
432 {
433 if(comma)
434 strcat(mode, ",");
435 strcat(mode, index_reg);
436 comma = 1;
437 }
438 if(preindex)
439 {
440 strcat(mode, "]");
441 comma = 1;
442 }
443 if(outer)
444 {
445 if(comma)
446 strcat(mode, ",");
447 strcat(mode, make_signed_hex_str_16(outer));
448 }
449 strcat(mode, ")");
450 break;
451 }
453 if(EXT_8BIT_DISPLACEMENT(extension) == 0)
454 sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
455 else
456 sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
457 if(EXT_INDEX_SCALE(extension))
458 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
459 strcat(mode, ")");
460 break;
461 case 0x38:
462 /* absolute short address */
463 sprintf(mode, "$%x.w", read_imm_16());
464 break;
465 case 0x39:
466 /* absolute long address */
467 sprintf(mode, "$%x.l", read_imm_32());
468 break;
469 case 0x3a:
470 /* program counter with displacement */
471 temp_value = read_imm_16();
472 sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
473 sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
474 break;
475 case 0x3b:
476 /* program counter with index */
477 extension = read_imm_16();
479 if(EXT_FULL(extension))
480 {
481 if(EXT_EFFECTIVE_ZERO(extension))
482 {
483 strcpy(mode, "0");
484 break;
485 }
486 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
487 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
488 if(EXT_BASE_REGISTER_PRESENT(extension))
489 strcpy(base_reg, "PC");
490 else
491 *base_reg = 0;
492 if(EXT_INDEX_REGISTER_PRESENT(extension))
493 {
494 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
495 if(EXT_INDEX_SCALE(extension))
496 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
497 }
498 else
499 *index_reg = 0;
500 preindex = (extension&7) > 0 && (extension&7) < 4;
501 postindex = (extension&7) > 4;
503 strcpy(mode, "(");
504 if(preindex || postindex)
505 strcat(mode, "[");
506 if(base)
507 {
508 strcat(mode, make_signed_hex_str_16(base));
509 comma = 1;
510 }
511 if(*base_reg)
512 {
513 if(comma)
514 strcat(mode, ",");
515 strcat(mode, base_reg);
516 comma = 1;
517 }
518 if(postindex)
519 {
520 strcat(mode, "]");
521 comma = 1;
522 }
523 if(*index_reg)
524 {
525 if(comma)
526 strcat(mode, ",");
527 strcat(mode, index_reg);
528 comma = 1;
529 }
530 if(preindex)
531 {
532 strcat(mode, "]");
533 comma = 1;
534 }
535 if(outer)
536 {
537 if(comma)
538 strcat(mode, ",");
539 strcat(mode, make_signed_hex_str_16(outer));
540 }
541 strcat(mode, ")");
542 break;
543 }
545 if(EXT_8BIT_DISPLACEMENT(extension) == 0)
546 sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
547 else
548 sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
549 if(EXT_INDEX_SCALE(extension))
550 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
551 strcat(mode, ")");
552 break;
553 case 0x3c:
554 /* Immediate */
555 sprintf(mode, "%s", get_imm_str_u(size));
556 break;
557 default:
558 sprintf(mode, "INVALID %x", instruction & 0x3f);
559 }
560 return mode;
561 }
565 /* ======================================================================== */
566 /* ========================= INSTRUCTION HANDLERS ========================= */
567 /* ======================================================================== */
568 /* Instruction handler function names follow this convention:
569 *
570 * d68000_NAME_EXTENSIONS(void)
571 * where NAME is the name of the opcode it handles and EXTENSIONS are any
572 * extensions for special instances of that opcode.
573 *
574 * Examples:
575 * d68000_add_er_8(): add opcode, from effective address to register,
576 * size = byte
577 *
578 * d68000_asr_s_8(): arithmetic shift right, static count, size = byte
579 *
580 *
581 * Common extensions:
582 * 8 : size = byte
583 * 16 : size = word
584 * 32 : size = long
585 * rr : register to register
586 * mm : memory to memory
587 * r : register
588 * s : static
589 * er : effective address -> register
590 * re : register -> effective address
591 * ea : using effective address mode of operation
592 * d : data register direct
593 * a : address register direct
594 * ai : address register indirect
595 * pi : address register indirect with postincrement
596 * pd : address register indirect with predecrement
597 * di : address register indirect with displacement
598 * ix : address register indirect with index
599 * aw : absolute word
600 * al : absolute long
601 */
603 static void d68000_illegal(void)
604 {
605 sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
606 }
608 static void d68000_1010(void)
609 {
610 sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);
611 }
614 static void d68000_1111(void)
615 {
616 sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);
617 }
620 static void d68000_abcd_rr(void)
621 {
622 sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
623 }
626 static void d68000_abcd_mm(void)
627 {
628 sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
629 }
631 static void d68000_add_er_8(void)
632 {
633 sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
634 }
637 static void d68000_add_er_16(void)
638 {
639 sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
640 }
642 static void d68000_add_er_32(void)
643 {
644 sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
645 }
647 static void d68000_add_re_8(void)
648 {
649 sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
650 }
652 static void d68000_add_re_16(void)
653 {
654 sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
655 }
657 static void d68000_add_re_32(void)
658 {
659 sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
660 }
662 static void d68000_adda_16(void)
663 {
664 sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
665 }
667 static void d68000_adda_32(void)
668 {
669 sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
670 }
672 static void d68000_addi_8(void)
673 {
674 char* str = get_imm_str_s8();
675 sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
676 }
678 static void d68000_addi_16(void)
679 {
680 char* str = get_imm_str_s16();
681 sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
682 }
684 static void d68000_addi_32(void)
685 {
686 char* str = get_imm_str_s32();
687 sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
688 }
690 static void d68000_addq_8(void)
691 {
692 sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
693 }
695 static void d68000_addq_16(void)
696 {
697 sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
698 }
700 static void d68000_addq_32(void)
701 {
702 sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
703 }
705 static void d68000_addx_rr_8(void)
706 {
707 sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
708 }
710 static void d68000_addx_rr_16(void)
711 {
712 sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
713 }
715 static void d68000_addx_rr_32(void)
716 {
717 sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
718 }
720 static void d68000_addx_mm_8(void)
721 {
722 sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
723 }
725 static void d68000_addx_mm_16(void)
726 {
727 sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
728 }
730 static void d68000_addx_mm_32(void)
731 {
732 sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
733 }
735 static void d68000_and_er_8(void)
736 {
737 sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
738 }
740 static void d68000_and_er_16(void)
741 {
742 sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
743 }
745 static void d68000_and_er_32(void)
746 {
747 sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
748 }
750 static void d68000_and_re_8(void)
751 {
752 sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
753 }
755 static void d68000_and_re_16(void)
756 {
757 sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
758 }
760 static void d68000_and_re_32(void)
761 {
762 sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
763 }
765 static void d68000_andi_8(void)
766 {
767 char* str = get_imm_str_u8();
768 sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
769 }
771 static void d68000_andi_16(void)
772 {
773 char* str = get_imm_str_u16();
774 sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
775 }
777 static void d68000_andi_32(void)
778 {
779 char* str = get_imm_str_u32();
780 sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
781 }
783 static void d68000_andi_to_ccr(void)
784 {
785 sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());
786 }
788 static void d68000_andi_to_sr(void)
789 {
790 sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());
791 }
793 static void d68000_asr_s_8(void)
794 {
795 sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
796 }
798 static void d68000_asr_s_16(void)
799 {
800 sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
801 }
803 static void d68000_asr_s_32(void)
804 {
805 sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
806 }
808 static void d68000_asr_r_8(void)
809 {
810 sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
811 }
813 static void d68000_asr_r_16(void)
814 {
815 sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
816 }
818 static void d68000_asr_r_32(void)
819 {
820 sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
821 }
823 static void d68000_asr_ea(void)
824 {
825 sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));
826 }
828 static void d68000_asl_s_8(void)
829 {
830 sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
831 }
833 static void d68000_asl_s_16(void)
834 {
835 sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
836 }
838 static void d68000_asl_s_32(void)
839 {
840 sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
841 }
843 static void d68000_asl_r_8(void)
844 {
845 sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
846 }
848 static void d68000_asl_r_16(void)
849 {
850 sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
851 }
853 static void d68000_asl_r_32(void)
854 {
855 sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
856 }
858 static void d68000_asl_ea(void)
859 {
860 sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));
861 }
863 static void d68000_bcc_8(void)
864 {
865 uint temp_pc = g_cpu_pc;
866 sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
867 }
869 static void d68000_bcc_16(void)
870 {
871 uint temp_pc = g_cpu_pc;
872 sprintf(g_dasm_str, "b%-2s %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
873 }
875 static void d68020_bcc_32(void)
876 {
877 uint temp_pc = g_cpu_pc;
878 LIMIT_CPU_TYPES(M68020_PLUS);
879 sprintf(g_dasm_str, "b%-2s %x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
880 }
882 static void d68000_bchg_r(void)
883 {
884 sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
885 }
887 static void d68000_bchg_s(void)
888 {
889 char* str = get_imm_str_u8();
890 sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
891 }
893 static void d68000_bclr_r(void)
894 {
895 sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
896 }
898 static void d68000_bclr_s(void)
899 {
900 char* str = get_imm_str_u8();
901 sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
902 }
904 static void d68010_bkpt(void)
905 {
906 LIMIT_CPU_TYPES(M68010_PLUS);
907 sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
908 }
910 static void d68020_bfchg(void)
911 {
912 uint extension;
913 char offset[3];
914 char width[3];
916 LIMIT_CPU_TYPES(M68020_PLUS);
918 extension = read_imm_16();
920 if(BIT_B(extension))
921 sprintf(offset, "D%d", (extension>>6)&7);
922 else
923 sprintf(offset, "%d", (extension>>6)&31);
924 if(BIT_5(extension))
925 sprintf(width, "D%d", extension&7);
926 else
927 sprintf(width, "%d", g_5bit_data_table[extension&31]);
928 sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
929 }
931 static void d68020_bfclr(void)
932 {
933 uint extension;
934 char offset[3];
935 char width[3];
937 LIMIT_CPU_TYPES(M68020_PLUS);
939 extension = read_imm_16();
941 if(BIT_B(extension))
942 sprintf(offset, "D%d", (extension>>6)&7);
943 else
944 sprintf(offset, "%d", (extension>>6)&31);
945 if(BIT_5(extension))
946 sprintf(width, "D%d", extension&7);
947 else
948 sprintf(width, "%d", g_5bit_data_table[extension&31]);
949 sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
950 }
952 static void d68020_bfexts(void)
953 {
954 uint extension;
955 char offset[3];
956 char width[3];
958 LIMIT_CPU_TYPES(M68020_PLUS);
960 extension = read_imm_16();
962 if(BIT_B(extension))
963 sprintf(offset, "D%d", (extension>>6)&7);
964 else
965 sprintf(offset, "%d", (extension>>6)&31);
966 if(BIT_5(extension))
967 sprintf(width, "D%d", extension&7);
968 else
969 sprintf(width, "%d", g_5bit_data_table[extension&31]);
970 sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
971 }
973 static void d68020_bfextu(void)
974 {
975 uint extension;
976 char offset[3];
977 char width[3];
979 LIMIT_CPU_TYPES(M68020_PLUS);
981 extension = read_imm_16();
983 if(BIT_B(extension))
984 sprintf(offset, "D%d", (extension>>6)&7);
985 else
986 sprintf(offset, "%d", (extension>>6)&31);
987 if(BIT_5(extension))
988 sprintf(width, "D%d", extension&7);
989 else
990 sprintf(width, "%d", g_5bit_data_table[extension&31]);
991 sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
992 }
994 static void d68020_bfffo(void)
995 {
996 uint extension;
997 char offset[3];
998 char width[3];
1000 LIMIT_CPU_TYPES(M68020_PLUS);
1002 extension = read_imm_16();
1004 if(BIT_B(extension))
1005 sprintf(offset, "D%d", (extension>>6)&7);
1006 else
1007 sprintf(offset, "%d", (extension>>6)&31);
1008 if(BIT_5(extension))
1009 sprintf(width, "D%d", extension&7);
1010 else
1011 sprintf(width, "%d", g_5bit_data_table[extension&31]);
1012 sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
1013 }
1015 static void d68020_bfins(void)
1016 {
1017 uint extension;
1018 char offset[3];
1019 char width[3];
1021 LIMIT_CPU_TYPES(M68020_PLUS);
1023 extension = read_imm_16();
1025 if(BIT_B(extension))
1026 sprintf(offset, "D%d", (extension>>6)&7);
1027 else
1028 sprintf(offset, "%d", (extension>>6)&31);
1029 if(BIT_5(extension))
1030 sprintf(width, "D%d", extension&7);
1031 else
1032 sprintf(width, "%d", g_5bit_data_table[extension&31]);
1033 sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
1034 }
1036 static void d68020_bfset(void)
1037 {
1038 uint extension;
1039 char offset[3];
1040 char width[3];
1042 LIMIT_CPU_TYPES(M68020_PLUS);
1044 extension = read_imm_16();
1046 if(BIT_B(extension))
1047 sprintf(offset, "D%d", (extension>>6)&7);
1048 else
1049 sprintf(offset, "%d", (extension>>6)&31);
1050 if(BIT_5(extension))
1051 sprintf(width, "D%d", extension&7);
1052 else
1053 sprintf(width, "%d", g_5bit_data_table[extension&31]);
1054 sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
1055 }
1057 static void d68020_bftst(void)
1058 {
1059 uint extension;
1060 char offset[3];
1061 char width[3];
1063 LIMIT_CPU_TYPES(M68020_PLUS);
1065 extension = read_imm_16();
1067 if(BIT_B(extension))
1068 sprintf(offset, "D%d", (extension>>6)&7);
1069 else
1070 sprintf(offset, "%d", (extension>>6)&31);
1071 if(BIT_5(extension))
1072 sprintf(width, "D%d", extension&7);
1073 else
1074 sprintf(width, "%d", g_5bit_data_table[extension&31]);
1075 sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
1076 }
1078 static void d68000_bra_8(void)
1079 {
1080 uint temp_pc = g_cpu_pc;
1081 sprintf(g_dasm_str, "bra %x", temp_pc + make_int_8(g_cpu_ir));
1082 }
1084 static void d68000_bra_16(void)
1085 {
1086 uint temp_pc = g_cpu_pc;
1087 sprintf(g_dasm_str, "bra %x", temp_pc + make_int_16(read_imm_16()));
1088 }
1090 static void d68020_bra_32(void)
1091 {
1092 uint temp_pc = g_cpu_pc;
1093 LIMIT_CPU_TYPES(M68020_PLUS);
1094 sprintf(g_dasm_str, "bra %x; (2+)", temp_pc + read_imm_32());
1095 }
1097 static void d68000_bset_r(void)
1098 {
1099 sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
1100 }
1102 static void d68000_bset_s(void)
1103 {
1104 char* str = get_imm_str_u8();
1105 sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
1106 }
1108 static void d68000_bsr_8(void)
1109 {
1110 uint temp_pc = g_cpu_pc;
1111 sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_8(g_cpu_ir));
1112 }
1114 static void d68000_bsr_16(void)
1115 {
1116 uint temp_pc = g_cpu_pc;
1117 sprintf(g_dasm_str, "bsr %x", temp_pc + make_int_16(read_imm_16()));
1118 }
1120 static void d68020_bsr_32(void)
1121 {
1122 uint temp_pc = g_cpu_pc;
1123 LIMIT_CPU_TYPES(M68020_PLUS);
1124 sprintf(g_dasm_str, "bsr %x; (2+)", temp_pc + peek_imm_32());
1125 }
1127 static void d68000_btst_r(void)
1128 {
1129 sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
1130 }
1132 static void d68000_btst_s(void)
1133 {
1134 char* str = get_imm_str_u8();
1135 sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
1136 }
1138 static void d68020_callm(void)
1139 {
1140 char* str;
1141 LIMIT_CPU_TYPES(M68020_ONLY);
1142 str = get_imm_str_u8();
1144 sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));
1145 }
1147 static void d68020_cas_8(void)
1148 {
1149 uint extension;
1150 LIMIT_CPU_TYPES(M68020_PLUS);
1151 extension = read_imm_16();
1152 sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
1153 }
1155 static void d68020_cas_16(void)
1156 {
1157 uint extension;
1158 LIMIT_CPU_TYPES(M68020_PLUS);
1159 extension = read_imm_16();
1160 sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
1161 }
1163 static void d68020_cas_32(void)
1164 {
1165 uint extension;
1166 LIMIT_CPU_TYPES(M68020_PLUS);
1167 extension = read_imm_16();
1168 sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
1169 }
1171 static void d68020_cas2_16(void)
1172 {
1173 /* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
1174 f e d c b a 9 8 7 6 5 4 3 2 1 0
1175 DARn1 0 0 0 Du1 0 0 0 Dc1
1176 DARn2 0 0 0 Du2 0 0 0 Dc2
1177 */
1179 uint extension;
1180 LIMIT_CPU_TYPES(M68020_PLUS);
1181 extension = read_imm_32();
1182 sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
1183 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
1184 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
1185 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
1186 }
1188 static void d68020_cas2_32(void)
1189 {
1190 uint extension;
1191 LIMIT_CPU_TYPES(M68020_PLUS);
1192 extension = read_imm_32();
1193 sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
1194 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
1195 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
1196 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
1197 }
1199 static void d68000_chk_16(void)
1200 {
1201 sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1202 }
1204 static void d68020_chk_32(void)
1205 {
1206 LIMIT_CPU_TYPES(M68020_PLUS);
1207 sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
1208 }
1210 static void d68020_chk2_cmp2_8(void)
1211 {
1212 uint extension;
1213 LIMIT_CPU_TYPES(M68020_PLUS);
1214 extension = read_imm_16();
1215 sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
1216 }
1218 static void d68020_chk2_cmp2_16(void)
1219 {
1220 uint extension;
1221 LIMIT_CPU_TYPES(M68020_PLUS);
1222 extension = read_imm_16();
1223 sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
1224 }
1226 static void d68020_chk2_cmp2_32(void)
1227 {
1228 uint extension;
1229 LIMIT_CPU_TYPES(M68020_PLUS);
1230 extension = read_imm_16();
1231 sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
1232 }
1234 static void d68040_cinv(void)
1235 {
1236 LIMIT_CPU_TYPES(M68040_PLUS);
1237 switch((g_cpu_ir>>3)&3)
1238 {
1239 case 0:
1240 sprintf(g_dasm_str, "cinv (illegal scope); (4)");
1241 break;
1242 case 1:
1243 sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
1244 break;
1245 case 2:
1246 sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
1247 break;
1248 case 3:
1249 sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);
1250 break;
1251 }
1252 }
1254 static void d68000_clr_8(void)
1255 {
1256 sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));
1257 }
1259 static void d68000_clr_16(void)
1260 {
1261 sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));
1262 }
1264 static void d68000_clr_32(void)
1265 {
1266 sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));
1267 }
1269 static void d68000_cmp_8(void)
1270 {
1271 sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
1272 }
1274 static void d68000_cmp_16(void)
1275 {
1276 sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1277 }
1279 static void d68000_cmp_32(void)
1280 {
1281 sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
1282 }
1284 static void d68000_cmpa_16(void)
1285 {
1286 sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1287 }
1289 static void d68000_cmpa_32(void)
1290 {
1291 sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
1292 }
1294 static void d68000_cmpi_8(void)
1295 {
1296 char* str = get_imm_str_s8();
1297 sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
1298 }
1300 static void d68020_cmpi_pcdi_8(void)
1301 {
1302 char* str;
1303 LIMIT_CPU_TYPES(M68020_PLUS);
1304 str = get_imm_str_s8();
1305 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
1306 }
1308 static void d68020_cmpi_pcix_8(void)
1309 {
1310 char* str;
1311 LIMIT_CPU_TYPES(M68020_PLUS);
1312 str = get_imm_str_s8();
1313 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
1314 }
1316 static void d68000_cmpi_16(void)
1317 {
1318 char* str;
1319 LIMIT_CPU_TYPES(M68020_PLUS);
1320 str = get_imm_str_s16();
1321 sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
1322 }
1324 static void d68020_cmpi_pcdi_16(void)
1325 {
1326 char* str;
1327 LIMIT_CPU_TYPES(M68020_PLUS);
1328 str = get_imm_str_s16();
1329 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
1330 }
1332 static void d68020_cmpi_pcix_16(void)
1333 {
1334 char* str;
1335 LIMIT_CPU_TYPES(M68020_PLUS);
1336 str = get_imm_str_s16();
1337 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
1338 }
1340 static void d68000_cmpi_32(void)
1341 {
1342 char* str;
1343 LIMIT_CPU_TYPES(M68020_PLUS);
1344 str = get_imm_str_s32();
1345 sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
1346 }
1348 static void d68020_cmpi_pcdi_32(void)
1349 {
1350 char* str;
1351 LIMIT_CPU_TYPES(M68020_PLUS);
1352 str = get_imm_str_s32();
1353 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
1354 }
1356 static void d68020_cmpi_pcix_32(void)
1357 {
1358 char* str;
1359 LIMIT_CPU_TYPES(M68020_PLUS);
1360 str = get_imm_str_s32();
1361 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
1362 }
1364 static void d68000_cmpm_8(void)
1365 {
1366 sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
1367 }
1369 static void d68000_cmpm_16(void)
1370 {
1371 sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
1372 }
1374 static void d68000_cmpm_32(void)
1375 {
1376 sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
1377 }
1379 static void d68020_cpbcc_16(void)
1380 {
1381 uint extension;
1382 uint new_pc = g_cpu_pc;
1383 LIMIT_CPU_TYPES(M68020_PLUS);
1384 extension = read_imm_16();
1385 new_pc += make_int_16(peek_imm_16());
1386 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
1387 }
1389 static void d68020_cpbcc_32(void)
1390 {
1391 uint extension;
1392 uint new_pc = g_cpu_pc;
1393 LIMIT_CPU_TYPES(M68020_PLUS);
1394 extension = read_imm_16();
1395 new_pc += peek_imm_32();
1396 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
1397 }
1399 static void d68020_cpdbcc(void)
1400 {
1401 uint extension1;
1402 uint extension2;
1403 uint new_pc = g_cpu_pc;
1404 LIMIT_CPU_TYPES(M68020_PLUS);
1405 extension1 = read_imm_16();
1406 extension2 = read_imm_16();
1407 new_pc += make_int_16(peek_imm_16());
1408 sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);
1409 }
1411 static void d68020_cpgen(void)
1412 {
1413 LIMIT_CPU_TYPES(M68020_PLUS);
1414 sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());
1415 }
1417 static void d68020_cprestore(void)
1418 {
1419 LIMIT_CPU_TYPES(M68020_PLUS);
1420 sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
1421 }
1423 static void d68020_cpsave(void)
1424 {
1425 LIMIT_CPU_TYPES(M68020_PLUS);
1426 sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
1427 }
1429 static void d68020_cpscc(void)
1430 {
1431 uint extension1;
1432 uint extension2;
1433 LIMIT_CPU_TYPES(M68020_PLUS);
1434 extension1 = read_imm_16();
1435 extension2 = read_imm_16();
1436 sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);
1437 }
1439 static void d68020_cptrapcc_0(void)
1440 {
1441 uint extension1;
1442 uint extension2;
1443 LIMIT_CPU_TYPES(M68020_PLUS);
1444 extension1 = read_imm_16();
1445 extension2 = read_imm_16();
1446 sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);
1447 }
1449 static void d68020_cptrapcc_16(void)
1450 {
1451 uint extension1;
1452 uint extension2;
1453 LIMIT_CPU_TYPES(M68020_PLUS);
1454 extension1 = read_imm_16();
1455 extension2 = read_imm_16();
1456 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);
1457 }
1459 static void d68020_cptrapcc_32(void)
1460 {
1461 uint extension1;
1462 uint extension2;
1463 LIMIT_CPU_TYPES(M68020_PLUS);
1464 extension1 = read_imm_16();
1465 extension2 = read_imm_16();
1466 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);
1467 }
1469 static void d68040_cpush(void)
1470 {
1471 LIMIT_CPU_TYPES(M68040_PLUS);
1472 switch((g_cpu_ir>>3)&3)
1473 {
1474 case 0:
1475 sprintf(g_dasm_str, "cpush (illegal scope); (4)");
1476 break;
1477 case 1:
1478 sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
1479 break;
1480 case 2:
1481 sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
1482 break;
1483 case 3:
1484 sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);
1485 break;
1486 }
1487 }
1489 static void d68000_dbra(void)
1490 {
1491 uint temp_pc = g_cpu_pc;
1492 sprintf(g_dasm_str, "dbra D%d, %x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
1493 }
1495 static void d68000_dbcc(void)
1496 {
1497 uint temp_pc = g_cpu_pc;
1498 sprintf(g_dasm_str, "db%-2s D%d, %x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
1499 }
1501 static void d68000_divs(void)
1502 {
1503 sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1504 }
1506 static void d68000_divu(void)
1507 {
1508 sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1509 }
1511 static void d68020_divl(void)
1512 {
1513 uint extension;
1514 LIMIT_CPU_TYPES(M68020_PLUS);
1515 extension = read_imm_16();
1517 if(BIT_A(extension))
1518 sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
1519 else if((extension&7) == ((extension>>12)&7))
1520 sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
1521 else
1522 sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
1523 }
1525 static void d68000_eor_8(void)
1526 {
1527 sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
1528 }
1530 static void d68000_eor_16(void)
1531 {
1532 sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
1533 }
1535 static void d68000_eor_32(void)
1536 {
1537 sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
1538 }
1540 static void d68000_eori_8(void)
1541 {
1542 char* str = get_imm_str_u8();
1543 sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
1544 }
1546 static void d68000_eori_16(void)
1547 {
1548 char* str = get_imm_str_u16();
1549 sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
1550 }
1552 static void d68000_eori_32(void)
1553 {
1554 char* str = get_imm_str_u32();
1555 sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
1556 }
1558 static void d68000_eori_to_ccr(void)
1559 {
1560 sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());
1561 }
1563 static void d68000_eori_to_sr(void)
1564 {
1565 sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());
1566 }
1568 static void d68000_exg_dd(void)
1569 {
1570 sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1571 }
1573 static void d68000_exg_aa(void)
1574 {
1575 sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1576 }
1578 static void d68000_exg_da(void)
1579 {
1580 sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1581 }
1583 static void d68000_ext_16(void)
1584 {
1585 sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);
1586 }
1588 static void d68000_ext_32(void)
1589 {
1590 sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);
1591 }
1593 static void d68020_extb_32(void)
1594 {
1595 LIMIT_CPU_TYPES(M68020_PLUS);
1596 sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);
1597 }
1599 static void d68000_jmp(void)
1600 {
1601 sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));
1602 }
1604 static void d68000_jsr(void)
1605 {
1606 sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));
1607 }
1609 static void d68000_lea(void)
1610 {
1611 sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
1612 }
1614 static void d68000_link_16(void)
1615 {
1616 sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());
1617 }
1619 static void d68020_link_32(void)
1620 {
1621 LIMIT_CPU_TYPES(M68020_PLUS);
1622 sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());
1623 }
1625 static void d68000_lsr_s_8(void)
1626 {
1627 sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1628 }
1630 static void d68000_lsr_s_16(void)
1631 {
1632 sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1633 }
1635 static void d68000_lsr_s_32(void)
1636 {
1637 sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1638 }
1640 static void d68000_lsr_r_8(void)
1641 {
1642 sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1643 }
1645 static void d68000_lsr_r_16(void)
1646 {
1647 sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1648 }
1650 static void d68000_lsr_r_32(void)
1651 {
1652 sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1653 }
1655 static void d68000_lsr_ea(void)
1656 {
1657 sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));
1658 }
1660 static void d68000_lsl_s_8(void)
1661 {
1662 sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1663 }
1665 static void d68000_lsl_s_16(void)
1666 {
1667 sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1668 }
1670 static void d68000_lsl_s_32(void)
1671 {
1672 sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
1673 }
1675 static void d68000_lsl_r_8(void)
1676 {
1677 sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1678 }
1680 static void d68000_lsl_r_16(void)
1681 {
1682 sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1683 }
1685 static void d68000_lsl_r_32(void)
1686 {
1687 sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
1688 }
1690 static void d68000_lsl_ea(void)
1691 {
1692 sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));
1693 }
1695 static void d68000_move_8(void)
1696 {
1697 char* str = get_ea_mode_str_8(g_cpu_ir);
1698 sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
1699 }
1701 static void d68000_move_16(void)
1702 {
1703 char* str = get_ea_mode_str_16(g_cpu_ir);
1704 sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
1705 }
1707 static void d68000_move_32(void)
1708 {
1709 char* str = get_ea_mode_str_32(g_cpu_ir);
1710 sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
1711 }
1713 static void d68000_movea_16(void)
1714 {
1715 sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
1716 }
1718 static void d68000_movea_32(void)
1719 {
1720 sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
1721 }
1723 static void d68000_move_to_ccr(void)
1724 {
1725 sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));
1726 }
1728 static void d68010_move_fr_ccr(void)
1729 {
1730 LIMIT_CPU_TYPES(M68010_PLUS);
1731 sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));
1732 }
1734 static void d68000_move_fr_sr(void)
1735 {
1736 sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));
1737 }
1739 static void d68000_move_to_sr(void)
1740 {
1741 sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));
1742 }
1744 static void d68000_move_fr_usp(void)
1745 {
1746 sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);
1747 }
1749 static void d68000_move_to_usp(void)
1750 {
1751 sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);
1752 }
1754 static void d68010_movec(void)
1755 {
1756 uint extension;
1757 char* reg_name;
1758 char* processor;
1759 LIMIT_CPU_TYPES(M68010_PLUS);
1760 extension = read_imm_16();
1762 switch(extension & 0xfff)
1763 {
1764 case 0x000:
1765 reg_name = "SFC";
1766 processor = "1+";
1767 break;
1768 case 0x001:
1769 reg_name = "DFC";
1770 processor = "1+";
1771 break;
1772 case 0x800:
1773 reg_name = "USP";
1774 processor = "1+";
1775 break;
1776 case 0x801:
1777 reg_name = "VBR";
1778 processor = "1+";
1779 break;
1780 case 0x002:
1781 reg_name = "CACR";
1782 processor = "2+";
1783 break;
1784 case 0x802:
1785 reg_name = "CAAR";
1786 processor = "2,3";
1787 break;
1788 case 0x803:
1789 reg_name = "MSP";
1790 processor = "2+";
1791 break;
1792 case 0x804:
1793 reg_name = "ISP";
1794 processor = "2+";
1795 break;
1796 case 0x003:
1797 reg_name = "TC";
1798 processor = "4+";
1799 break;
1800 case 0x004:
1801 reg_name = "ITT0";
1802 processor = "4+";
1803 break;
1804 case 0x005:
1805 reg_name = "ITT1";
1806 processor = "4+";
1807 break;
1808 case 0x006:
1809 reg_name = "DTT0";
1810 processor = "4+";
1811 break;
1812 case 0x007:
1813 reg_name = "DTT1";
1814 processor = "4+";
1815 break;
1816 case 0x805:
1817 reg_name = "MMUSR";
1818 processor = "4+";
1819 break;
1820 case 0x806:
1821 reg_name = "URP";
1822 processor = "4+";
1823 break;
1824 case 0x807:
1825 reg_name = "SRP";
1826 processor = "4+";
1827 break;
1828 default:
1829 reg_name = make_signed_hex_str_16(extension & 0xfff);
1830 processor = "?";
1831 }
1833 if(BIT_1(g_cpu_ir))
1834 sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
1835 else
1836 sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
1837 }
1839 static void d68000_movem_pd_16(void)
1840 {
1841 uint data = read_imm_16();
1842 char buffer[40];
1843 uint first;
1844 uint run_length;
1845 uint i;
1847 buffer[0] = 0;
1848 for(i=0;i<8;i++)
1849 {
1850 if(data&(1<<(15-i)))
1851 {
1852 first = i;
1853 run_length = 0;
1854 for(i++;i<8;i++)
1855 if(data&(1<<(15-i)))
1856 run_length++;
1857 if(buffer[0] != 0)
1858 strcat(buffer, "/");
1859 sprintf(buffer+strlen(buffer), "D%d", first);
1860 if(run_length > 0)
1861 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
1862 }
1863 }
1864 for(i=0;i<8;i++)
1865 {
1866 if(data&(1<<(7-i)))
1867 {
1868 first = i;
1869 run_length = 0;
1870 for(i++;i<8;i++)
1871 if(data&(1<<(7-i)))
1872 run_length++;
1873 if(buffer[0] != 0)
1874 strcat(buffer, "/");
1875 sprintf(buffer+strlen(buffer), "A%d", first);
1876 if(run_length > 0)
1877 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
1878 }
1879 }
1880 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
1881 }
1883 static void d68000_movem_pd_32(void)
1884 {
1885 uint data = read_imm_16();
1886 char buffer[40];
1887 uint first;
1888 uint run_length;
1889 uint i;
1891 buffer[0] = 0;
1892 for(i=0;i<8;i++)
1893 {
1894 if(data&(1<<(15-i)))
1895 {
1896 first = i;
1897 run_length = 0;
1898 for(i++;i<8;i++)
1899 if(data&(1<<(15-i)))
1900 run_length++;
1901 if(buffer[0] != 0)
1902 strcat(buffer, "/");
1903 sprintf(buffer+strlen(buffer), "D%d", first);
1904 if(run_length > 0)
1905 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
1906 }
1907 }
1908 for(i=0;i<8;i++)
1909 {
1910 if(data&(1<<(7-i)))
1911 {
1912 first = i;
1913 run_length = 0;
1914 for(i++;i<8;i++)
1915 if(data&(1<<(7-i)))
1916 run_length++;
1917 if(buffer[0] != 0)
1918 strcat(buffer, "/");
1919 sprintf(buffer+strlen(buffer), "A%d", first);
1920 if(run_length > 0)
1921 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
1922 }
1923 }
1924 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
1925 }
1927 static void d68000_movem_er_16(void)
1928 {
1929 uint data = read_imm_16();
1930 char buffer[40];
1931 uint first;
1932 uint run_length;
1933 uint i;
1935 buffer[0] = 0;
1936 for(i=0;i<8;i++)
1937 {
1938 if(data&(1<<i))
1939 {
1940 first = i;
1941 run_length = 0;
1942 for(i++;i<8;i++)
1943 if(data&(1<<i))
1944 run_length++;
1945 if(buffer[0] != 0)
1946 strcat(buffer, "/");
1947 sprintf(buffer+strlen(buffer), "D%d", first);
1948 if(run_length > 0)
1949 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
1950 }
1951 }
1952 for(i=0;i<8;i++)
1953 {
1954 if(data&(1<<(i+8)))
1955 {
1956 first = i;
1957 run_length = 0;
1958 for(i++;i<8;i++)
1959 if(data&(1<<(i+8)))
1960 run_length++;
1961 if(buffer[0] != 0)
1962 strcat(buffer, "/");
1963 sprintf(buffer+strlen(buffer), "A%d", first);
1964 if(run_length > 0)
1965 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
1966 }
1967 }
1968 sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);
1969 }
1971 static void d68000_movem_er_32(void)
1972 {
1973 uint data = read_imm_16();
1974 char buffer[40];
1975 uint first;
1976 uint run_length;
1977 uint i;
1979 buffer[0] = 0;
1980 for(i=0;i<8;i++)
1981 {
1982 if(data&(1<<i))
1983 {
1984 first = i;
1985 run_length = 0;
1986 for(i++;i<8;i++)
1987 if(data&(1<<i))
1988 run_length++;
1989 if(buffer[0] != 0)
1990 strcat(buffer, "/");
1991 sprintf(buffer+strlen(buffer), "D%d", first);
1992 if(run_length > 0)
1993 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
1994 }
1995 }
1996 for(i=0;i<8;i++)
1997 {
1998 if(data&(1<<(i+8)))
1999 {
2000 first = i;
2001 run_length = 0;
2002 for(i++;i<8;i++)
2003 if(data&(1<<(i+8)))
2004 run_length++;
2005 if(buffer[0] != 0)
2006 strcat(buffer, "/");
2007 sprintf(buffer+strlen(buffer), "A%d", first);
2008 if(run_length > 0)
2009 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
2010 }
2011 }
2012 sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);
2013 }
2015 static void d68000_movem_re_16(void)
2016 {
2017 uint data = read_imm_16();
2018 char buffer[40];
2019 uint first;
2020 uint run_length;
2021 uint i;
2023 buffer[0] = 0;
2024 for(i=0;i<8;i++)
2025 {
2026 if(data&(1<<i))
2027 {
2028 first = i;
2029 run_length = 0;
2030 for(i++;i<8;i++)
2031 if(data&(1<<i))
2032 run_length++;
2033 if(buffer[0] != 0)
2034 strcat(buffer, "/");
2035 sprintf(buffer+strlen(buffer), "D%d", first);
2036 if(run_length > 0)
2037 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
2038 }
2039 }
2040 for(i=0;i<8;i++)
2041 {
2042 if(data&(1<<(i+8)))
2043 {
2044 first = i;
2045 run_length = 0;
2046 for(i++;i<8;i++)
2047 if(data&(1<<(i+8)))
2048 run_length++;
2049 if(buffer[0] != 0)
2050 strcat(buffer, "/");
2051 sprintf(buffer+strlen(buffer), "A%d", first);
2052 if(run_length > 0)
2053 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
2054 }
2055 }
2056 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
2057 }
2059 static void d68000_movem_re_32(void)
2060 {
2061 uint data = read_imm_16();
2062 char buffer[40];
2063 uint first;
2064 uint run_length;
2065 uint i;
2067 buffer[0] = 0;
2068 for(i=0;i<8;i++)
2069 {
2070 if(data&(1<<i))
2071 {
2072 first = i;
2073 run_length = 0;
2074 for(i++;i<8;i++)
2075 if(data&(1<<i))
2076 run_length++;
2077 if(buffer[0] != 0)
2078 strcat(buffer, "/");
2079 sprintf(buffer+strlen(buffer), "D%d", first);
2080 if(run_length > 0)
2081 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
2082 }
2083 }
2084 for(i=0;i<8;i++)
2085 {
2086 if(data&(1<<(i+8)))
2087 {
2088 first = i;
2089 run_length = 0;
2090 for(i++;i<8;i++)
2091 if(data&(1<<(i+8)))
2092 run_length++;
2093 if(buffer[0] != 0)
2094 strcat(buffer, "/");
2095 sprintf(buffer+strlen(buffer), "A%d", first);
2096 if(run_length > 0)
2097 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
2098 }
2099 }
2100 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
2101 }
2103 static void d68000_movep_re_16(void)
2104 {
2105 sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
2106 }
2108 static void d68000_movep_re_32(void)
2109 {
2110 sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
2111 }
2113 static void d68000_movep_er_16(void)
2114 {
2115 sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
2116 }
2118 static void d68000_movep_er_32(void)
2119 {
2120 sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
2121 }
2123 static void d68010_moves_8(void)
2124 {
2125 uint extension;
2126 LIMIT_CPU_TYPES(M68010_PLUS);
2127 extension = read_imm_16();
2128 if(BIT_B(extension))
2129 sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));
2130 else
2131 sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
2132 }
2134 static void d68010_moves_16(void)
2135 {
2136 uint extension;
2137 LIMIT_CPU_TYPES(M68010_PLUS);
2138 extension = read_imm_16();
2139 if(BIT_B(extension))
2140 sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));
2141 else
2142 sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
2143 }
2145 static void d68010_moves_32(void)
2146 {
2147 uint extension;
2148 LIMIT_CPU_TYPES(M68010_PLUS);
2149 extension = read_imm_16();
2150 if(BIT_B(extension))
2151 sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));
2152 else
2153 sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
2154 }
2156 static void d68000_moveq(void)
2157 {
2158 sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
2159 }
2161 static void d68040_move16_pi_pi(void)
2162 {
2163 LIMIT_CPU_TYPES(M68040_PLUS);
2164 sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);
2165 }
2167 static void d68040_move16_pi_al(void)
2168 {
2169 LIMIT_CPU_TYPES(M68040_PLUS);
2170 sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());
2171 }
2173 static void d68040_move16_al_pi(void)
2174 {
2175 LIMIT_CPU_TYPES(M68040_PLUS);
2176 sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);
2177 }
2179 static void d68040_move16_ai_al(void)
2180 {
2181 LIMIT_CPU_TYPES(M68040_PLUS);
2182 sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());
2183 }
2185 static void d68040_move16_al_ai(void)
2186 {
2187 LIMIT_CPU_TYPES(M68040_PLUS);
2188 sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);
2189 }
2191 static void d68000_muls(void)
2192 {
2193 sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
2194 }
2196 static void d68000_mulu(void)
2197 {
2198 sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
2199 }
2201 static void d68020_mull(void)
2202 {
2203 uint extension;
2204 LIMIT_CPU_TYPES(M68020_PLUS);
2205 extension = read_imm_16();
2207 if(BIT_A(extension))
2208 sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
2209 else
2210 sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
2211 }
2213 static void d68000_nbcd(void)
2214 {
2215 sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));
2216 }
2218 static void d68000_neg_8(void)
2219 {
2220 sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));
2221 }
2223 static void d68000_neg_16(void)
2224 {
2225 sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));
2226 }
2228 static void d68000_neg_32(void)
2229 {
2230 sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));
2231 }
2233 static void d68000_negx_8(void)
2234 {
2235 sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));
2236 }
2238 static void d68000_negx_16(void)
2239 {
2240 sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));
2241 }
2243 static void d68000_negx_32(void)
2244 {
2245 sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));
2246 }
2248 static void d68000_nop(void)
2249 {
2250 sprintf(g_dasm_str, "nop");
2251 }
2253 static void d68000_not_8(void)
2254 {
2255 sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));
2256 }
2258 static void d68000_not_16(void)
2259 {
2260 sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));
2261 }
2263 static void d68000_not_32(void)
2264 {
2265 sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));
2266 }
2268 static void d68000_or_er_8(void)
2269 {
2270 sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
2271 }
2273 static void d68000_or_er_16(void)
2274 {
2275 sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
2276 }
2278 static void d68000_or_er_32(void)
2279 {
2280 sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
2281 }
2283 static void d68000_or_re_8(void)
2284 {
2285 sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
2286 }
2288 static void d68000_or_re_16(void)
2289 {
2290 sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
2291 }
2293 static void d68000_or_re_32(void)
2294 {
2295 sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
2296 }
2298 static void d68000_ori_8(void)
2299 {
2300 char* str = get_imm_str_u8();
2301 sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
2302 }
2304 static void d68000_ori_16(void)
2305 {
2306 char* str = get_imm_str_u16();
2307 sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
2308 }
2310 static void d68000_ori_32(void)
2311 {
2312 char* str = get_imm_str_u32();
2313 sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
2314 }
2316 static void d68000_ori_to_ccr(void)
2317 {
2318 sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());
2319 }
2321 static void d68000_ori_to_sr(void)
2322 {
2323 sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());
2324 }
2326 static void d68020_pack_rr(void)
2327 {
2328 LIMIT_CPU_TYPES(M68020_PLUS);
2329 sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
2330 }
2332 static void d68020_pack_mm(void)
2333 {
2334 LIMIT_CPU_TYPES(M68020_PLUS);
2335 sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
2336 }
2338 static void d68000_pea(void)
2339 {
2340 sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));
2341 }
2343 static void d68000_reset(void)
2344 {
2345 sprintf(g_dasm_str, "reset");
2346 }
2348 static void d68000_ror_s_8(void)
2349 {
2350 sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2351 }
2353 static void d68000_ror_s_16(void)
2354 {
2355 sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);
2356 }
2358 static void d68000_ror_s_32(void)
2359 {
2360 sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2361 }
2363 static void d68000_ror_r_8(void)
2364 {
2365 sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2366 }
2368 static void d68000_ror_r_16(void)
2369 {
2370 sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2371 }
2373 static void d68000_ror_r_32(void)
2374 {
2375 sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2376 }
2378 static void d68000_ror_ea(void)
2379 {
2380 sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));
2381 }
2383 static void d68000_rol_s_8(void)
2384 {
2385 sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2386 }
2388 static void d68000_rol_s_16(void)
2389 {
2390 sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2391 }
2393 static void d68000_rol_s_32(void)
2394 {
2395 sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2396 }
2398 static void d68000_rol_r_8(void)
2399 {
2400 sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2401 }
2403 static void d68000_rol_r_16(void)
2404 {
2405 sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2406 }
2408 static void d68000_rol_r_32(void)
2409 {
2410 sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2411 }
2413 static void d68000_rol_ea(void)
2414 {
2415 sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));
2416 }
2418 static void d68000_roxr_s_8(void)
2419 {
2420 sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2421 }
2423 static void d68000_roxr_s_16(void)
2424 {
2425 sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2426 }
2429 static void d68000_roxr_s_32(void)
2430 {
2431 sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2432 }
2434 static void d68000_roxr_r_8(void)
2435 {
2436 sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2437 }
2439 static void d68000_roxr_r_16(void)
2440 {
2441 sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2442 }
2444 static void d68000_roxr_r_32(void)
2445 {
2446 sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2447 }
2449 static void d68000_roxr_ea(void)
2450 {
2451 sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));
2452 }
2454 static void d68000_roxl_s_8(void)
2455 {
2456 sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2457 }
2459 static void d68000_roxl_s_16(void)
2460 {
2461 sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2462 }
2464 static void d68000_roxl_s_32(void)
2465 {
2466 sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
2467 }
2469 static void d68000_roxl_r_8(void)
2470 {
2471 sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2472 }
2474 static void d68000_roxl_r_16(void)
2475 {
2476 sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2477 }
2479 static void d68000_roxl_r_32(void)
2480 {
2481 sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
2482 }
2484 static void d68000_roxl_ea(void)
2485 {
2486 sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));
2487 }
2489 static void d68010_rtd(void)
2490 {
2491 LIMIT_CPU_TYPES(M68010_PLUS);
2492 sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());
2493 }
2495 static void d68000_rte(void)
2496 {
2497 sprintf(g_dasm_str, "rte");
2498 }
2500 static void d68020_rtm(void)
2501 {
2502 LIMIT_CPU_TYPES(M68020_ONLY);
2503 sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);
2504 }
2506 static void d68000_rtr(void)
2507 {
2508 sprintf(g_dasm_str, "rtr");
2509 }
2511 static void d68000_rts(void)
2512 {
2513 sprintf(g_dasm_str, "rts");
2514 }
2516 static void d68000_sbcd_rr(void)
2517 {
2518 sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2519 }
2521 static void d68000_sbcd_mm(void)
2522 {
2523 sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2524 }
2526 static void d68000_scc(void)
2527 {
2528 sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));
2529 }
2531 static void d68000_stop(void)
2532 {
2533 sprintf(g_dasm_str, "stop %s", get_imm_str_s16());
2534 }
2536 static void d68000_sub_er_8(void)
2537 {
2538 sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
2539 }
2541 static void d68000_sub_er_16(void)
2542 {
2543 sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
2544 }
2546 static void d68000_sub_er_32(void)
2547 {
2548 sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
2549 }
2551 static void d68000_sub_re_8(void)
2552 {
2553 sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
2554 }
2556 static void d68000_sub_re_16(void)
2557 {
2558 sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
2559 }
2561 static void d68000_sub_re_32(void)
2562 {
2563 sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
2564 }
2566 static void d68000_suba_16(void)
2567 {
2568 sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
2569 }
2571 static void d68000_suba_32(void)
2572 {
2573 sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
2574 }
2576 static void d68000_subi_8(void)
2577 {
2578 char* str = get_imm_str_s8();
2579 sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
2580 }
2582 static void d68000_subi_16(void)
2583 {
2584 char* str = get_imm_str_s16();
2585 sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
2586 }
2588 static void d68000_subi_32(void)
2589 {
2590 char* str = get_imm_str_s32();
2591 sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
2592 }
2594 static void d68000_subq_8(void)
2595 {
2596 sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
2597 }
2599 static void d68000_subq_16(void)
2600 {
2601 sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
2602 }
2604 static void d68000_subq_32(void)
2605 {
2606 sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
2607 }
2609 static void d68000_subx_rr_8(void)
2610 {
2611 sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2612 }
2614 static void d68000_subx_rr_16(void)
2615 {
2616 sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2617 }
2619 static void d68000_subx_rr_32(void)
2620 {
2621 sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2622 }
2624 static void d68000_subx_mm_8(void)
2625 {
2626 sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2627 }
2629 static void d68000_subx_mm_16(void)
2630 {
2631 sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2632 }
2634 static void d68000_subx_mm_32(void)
2635 {
2636 sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
2637 }
2639 static void d68000_swap(void)
2640 {
2641 sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);
2642 }
2644 static void d68000_tas(void)
2645 {
2646 sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));
2647 }
2649 static void d68000_trap(void)
2650 {
2651 sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);
2652 }
2654 static void d68020_trapcc_0(void)
2655 {
2656 LIMIT_CPU_TYPES(M68020_PLUS);
2657 sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);
2658 }
2660 static void d68020_trapcc_16(void)
2661 {
2662 LIMIT_CPU_TYPES(M68020_PLUS);
2663 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());
2664 }
2666 static void d68020_trapcc_32(void)
2667 {
2668 LIMIT_CPU_TYPES(M68020_PLUS);
2669 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());
2670 }
2672 static void d68000_trapv(void)
2673 {
2674 sprintf(g_dasm_str, "trapv");
2675 }
2677 static void d68000_tst_8(void)
2678 {
2679 sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));
2680 }
2682 static void d68020_tst_pcdi_8(void)
2683 {
2684 LIMIT_CPU_TYPES(M68020_PLUS);
2685 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
2686 }
2688 static void d68020_tst_pcix_8(void)
2689 {
2690 LIMIT_CPU_TYPES(M68020_PLUS);
2691 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
2692 }
2694 static void d68020_tst_i_8(void)
2695 {
2696 LIMIT_CPU_TYPES(M68020_PLUS);
2697 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
2698 }
2700 static void d68000_tst_16(void)
2701 {
2702 sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));
2703 }
2705 static void d68020_tst_a_16(void)
2706 {
2707 LIMIT_CPU_TYPES(M68020_PLUS);
2708 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
2709 }
2711 static void d68020_tst_pcdi_16(void)
2712 {
2713 LIMIT_CPU_TYPES(M68020_PLUS);
2714 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
2715 }
2717 static void d68020_tst_pcix_16(void)
2718 {
2719 LIMIT_CPU_TYPES(M68020_PLUS);
2720 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
2721 }
2723 static void d68020_tst_i_16(void)
2724 {
2725 LIMIT_CPU_TYPES(M68020_PLUS);
2726 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
2727 }
2729 static void d68000_tst_32(void)
2730 {
2731 sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));
2732 }
2734 static void d68020_tst_a_32(void)
2735 {
2736 LIMIT_CPU_TYPES(M68020_PLUS);
2737 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
2738 }
2740 static void d68020_tst_pcdi_32(void)
2741 {
2742 LIMIT_CPU_TYPES(M68020_PLUS);
2743 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
2744 }
2746 static void d68020_tst_pcix_32(void)
2747 {
2748 LIMIT_CPU_TYPES(M68020_PLUS);
2749 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
2750 }
2752 static void d68020_tst_i_32(void)
2753 {
2754 LIMIT_CPU_TYPES(M68020_PLUS);
2755 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
2756 }
2758 static void d68000_unlk(void)
2759 {
2760 sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);
2761 }
2763 static void d68020_unpk_rr(void)
2764 {
2765 LIMIT_CPU_TYPES(M68020_PLUS);
2766 sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
2767 }
2769 static void d68020_unpk_mm(void)
2770 {
2771 LIMIT_CPU_TYPES(M68020_PLUS);
2772 sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
2773 }
2777 /* ======================================================================== */
2778 /* ======================= INSTRUCTION TABLE BUILDER ====================== */
2779 /* ======================================================================== */
2781 /* EA Masks:
2782 800 = data register direct
2783 400 = address register direct
2784 200 = address register indirect
2785 100 = ARI postincrement
2786 80 = ARI pre-decrement
2787 40 = ARI displacement
2788 20 = ARI index
2789 10 = absolute short
2790 8 = absolute long
2791 4 = immediate / sr
2792 2 = pc displacement
2793 1 = pc idx
2794 */
2796 static opcode_struct g_opcode_info[] =
2797 {
2798 /* opcode handler mask match ea mask */
2799 {d68000_1010 , 0xf000, 0xa000, 0x000},
2800 {d68000_1111 , 0xf000, 0xf000, 0x000},
2801 {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},
2802 {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},
2803 {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},
2804 {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},
2805 {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},
2806 {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},
2807 {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},
2808 {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},
2809 {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},
2810 {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},
2811 {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},
2812 {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},
2813 {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},
2814 {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},
2815 {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},
2816 {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},
2817 {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},
2818 {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},
2819 {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},
2820 {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},
2821 {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},
2822 {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},
2823 {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},
2824 {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},
2825 {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},
2826 {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},
2827 {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},
2828 {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},
2829 {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},
2830 {d68000_andi_to_sr , 0xffff, 0x027c, 0x000},
2831 {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},
2832 {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},
2833 {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},
2834 {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},
2835 {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},
2836 {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},
2837 {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},
2838 {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},
2839 {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},
2840 {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},
2841 {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},
2842 {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},
2843 {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},
2844 {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},
2845 {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},
2846 {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},
2847 {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},
2848 {d68000_bcc_8 , 0xf000, 0x6000, 0x000},
2849 {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},
2850 {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},
2851 {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},
2852 {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},
2853 {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},
2854 {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},
2855 {d68020_bfchg , 0xffc0, 0xeac0, 0xa78},
2856 {d68020_bfclr , 0xffc0, 0xecc0, 0xa78},
2857 {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},
2858 {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},
2859 {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},
2860 {d68020_bfins , 0xffc0, 0xefc0, 0xa78},
2861 {d68020_bfset , 0xffc0, 0xeec0, 0xa78},
2862 {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},
2863 {d68010_bkpt , 0xfff8, 0x4848, 0x000},
2864 {d68000_bra_8 , 0xff00, 0x6000, 0x000},
2865 {d68000_bra_16 , 0xffff, 0x6000, 0x000},
2866 {d68020_bra_32 , 0xffff, 0x60ff, 0x000},
2867 {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},
2868 {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},
2869 {d68000_bsr_8 , 0xff00, 0x6100, 0x000},
2870 {d68000_bsr_16 , 0xffff, 0x6100, 0x000},
2871 {d68020_bsr_32 , 0xffff, 0x61ff, 0x000},
2872 {d68000_btst_r , 0xf1c0, 0x0100, 0xbff},
2873 {d68000_btst_s , 0xffc0, 0x0800, 0xbfb},
2874 {d68020_callm , 0xffc0, 0x06c0, 0x27b},
2875 {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},
2876 {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},
2877 {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},
2878 {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},
2879 {d68020_cas2_32 , 0xffff, 0x0efc, 0x000},
2880 {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},
2881 {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},
2882 {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},
2883 {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},
2884 {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},
2885 {d68040_cinv , 0xff20, 0xf400, 0x000},
2886 {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},
2887 {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},
2888 {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},
2889 {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},
2890 {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},
2891 {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},
2892 {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},
2893 {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},
2894 {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},
2895 {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},
2896 {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},
2897 {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},
2898 {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},
2899 {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},
2900 {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},
2901 {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},
2902 {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},
2903 {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},
2904 {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},
2905 {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},
2906 {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},
2907 {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},
2908 {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},
2909 {d68020_cpgen , 0xf1c0, 0xf000, 0x000},
2910 {d68020_cprestore , 0xf1c0, 0xf140, 0x37f},
2911 {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},
2912 {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},
2913 {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},
2914 {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},
2915 {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},
2916 {d68040_cpush , 0xff20, 0xf420, 0x000},
2917 {d68000_dbcc , 0xf0f8, 0x50c8, 0x000},
2918 {d68000_dbra , 0xfff8, 0x51c8, 0x000},
2919 {d68000_divs , 0xf1c0, 0x81c0, 0xbff},
2920 {d68000_divu , 0xf1c0, 0x80c0, 0xbff},
2921 {d68020_divl , 0xffc0, 0x4c40, 0xbff},
2922 {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},
2923 {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},
2924 {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},
2925 {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},
2926 {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},
2927 {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},
2928 {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},
2929 {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},
2930 {d68000_exg_dd , 0xf1f8, 0xc140, 0x000},
2931 {d68000_exg_aa , 0xf1f8, 0xc148, 0x000},
2932 {d68000_exg_da , 0xf1f8, 0xc188, 0x000},
2933 {d68020_extb_32 , 0xfff8, 0x49c0, 0x000},
2934 {d68000_ext_16 , 0xfff8, 0x4880, 0x000},
2935 {d68000_ext_32 , 0xfff8, 0x48c0, 0x000},
2936 {d68000_illegal , 0xffff, 0x4afc, 0x000},
2937 {d68000_jmp , 0xffc0, 0x4ec0, 0x27b},
2938 {d68000_jsr , 0xffc0, 0x4e80, 0x27b},
2939 {d68000_lea , 0xf1c0, 0x41c0, 0x27b},
2940 {d68000_link_16 , 0xfff8, 0x4e50, 0x000},
2941 {d68020_link_32 , 0xfff8, 0x4808, 0x000},
2942 {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},
2943 {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},
2944 {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},
2945 {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},
2946 {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},
2947 {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},
2948 {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},
2949 {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},
2950 {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},
2951 {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},
2952 {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},
2953 {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},
2954 {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},
2955 {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},
2956 {d68000_move_8 , 0xf000, 0x1000, 0xbff},
2957 {d68000_move_16 , 0xf000, 0x3000, 0xfff},
2958 {d68000_move_32 , 0xf000, 0x2000, 0xfff},
2959 {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},
2960 {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},
2961 {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},
2962 {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},
2963 {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},
2964 {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},
2965 {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},
2966 {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},
2967 {d68010_movec , 0xfffe, 0x4e7a, 0x000},
2968 {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},
2969 {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},
2970 {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},
2971 {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},
2972 {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},
2973 {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},
2974 {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},
2975 {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},
2976 {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},
2977 {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},
2978 {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},
2979 {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},
2980 {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},
2981 {d68000_moveq , 0xf100, 0x7000, 0x000},
2982 {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},
2983 {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},
2984 {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},
2985 {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},
2986 {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},
2987 {d68000_muls , 0xf1c0, 0xc1c0, 0xbff},
2988 {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},
2989 {d68020_mull , 0xffc0, 0x4c00, 0xbff},
2990 {d68000_nbcd , 0xffc0, 0x4800, 0xbf8},
2991 {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},
2992 {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},
2993 {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},
2994 {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},
2995 {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},
2996 {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},
2997 {d68000_nop , 0xffff, 0x4e71, 0x000},
2998 {d68000_not_8 , 0xffc0, 0x4600, 0xbf8},
2999 {d68000_not_16 , 0xffc0, 0x4640, 0xbf8},
3000 {d68000_not_32 , 0xffc0, 0x4680, 0xbf8},
3001 {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},
3002 {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},
3003 {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},
3004 {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},
3005 {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},
3006 {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},
3007 {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},
3008 {d68000_ori_to_sr , 0xffff, 0x007c, 0x000},
3009 {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},
3010 {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},
3011 {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},
3012 {d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
3013 {d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
3014 {d68000_pea , 0xffc0, 0x4840, 0x27b},
3015 {d68000_reset , 0xffff, 0x4e70, 0x000},
3016 {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
3017 {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
3018 {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},
3019 {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},
3020 {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},
3021 {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},
3022 {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},
3023 {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},
3024 {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},
3025 {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},
3026 {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},
3027 {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},
3028 {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},
3029 {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},
3030 {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},
3031 {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},
3032 {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},
3033 {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},
3034 {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},
3035 {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},
3036 {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},
3037 {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},
3038 {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},
3039 {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},
3040 {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},
3041 {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},
3042 {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},
3043 {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},
3044 {d68010_rtd , 0xffff, 0x4e74, 0x000},
3045 {d68000_rte , 0xffff, 0x4e73, 0x000},
3046 {d68020_rtm , 0xfff0, 0x06c0, 0x000},
3047 {d68000_rtr , 0xffff, 0x4e77, 0x000},
3048 {d68000_rts , 0xffff, 0x4e75, 0x000},
3049 {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},
3050 {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},
3051 {d68000_scc , 0xf0c0, 0x50c0, 0xbf8},
3052 {d68000_stop , 0xffff, 0x4e72, 0x000},
3053 {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},
3054 {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},
3055 {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},
3056 {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},
3057 {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},
3058 {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},
3059 {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},
3060 {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},
3061 {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},
3062 {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},
3063 {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},
3064 {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},
3065 {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},
3066 {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},
3067 {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},
3068 {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},
3069 {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},
3070 {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},
3071 {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},
3072 {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},
3073 {d68000_swap , 0xfff8, 0x4840, 0x000},
3074 {d68000_tas , 0xffc0, 0x4ac0, 0xbf8},
3075 {d68000_trap , 0xfff0, 0x4e40, 0x000},
3076 {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},
3077 {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},
3078 {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},
3079 {d68000_trapv , 0xffff, 0x4e76, 0x000},
3080 {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},
3081 {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},
3082 {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},
3083 {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},
3084 {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},
3085 {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},
3086 {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},
3087 {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},
3088 {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},
3089 {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},
3090 {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},
3091 {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},
3092 {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},
3093 {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},
3094 {d68000_unlk , 0xfff8, 0x4e58, 0x000},
3095 {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},
3096 {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},
3097 {0, 0, 0, 0}
3098 };
3100 /* Check if opcode is using a valid ea mode */
3101 static int valid_ea(uint opcode, uint mask)
3102 {
3103 if(mask == 0)
3104 return 1;
3106 switch(opcode & 0x3f)
3107 {
3108 case 0x00: case 0x01: case 0x02: case 0x03:
3109 case 0x04: case 0x05: case 0x06: case 0x07:
3110 return (mask & 0x800) != 0;
3111 case 0x08: case 0x09: case 0x0a: case 0x0b:
3112 case 0x0c: case 0x0d: case 0x0e: case 0x0f:
3113 return (mask & 0x400) != 0;
3114 case 0x10: case 0x11: case 0x12: case 0x13:
3115 case 0x14: case 0x15: case 0x16: case 0x17:
3116 return (mask & 0x200) != 0;
3117 case 0x18: case 0x19: case 0x1a: case 0x1b:
3118 case 0x1c: case 0x1d: case 0x1e: case 0x1f:
3119 return (mask & 0x100) != 0;
3120 case 0x20: case 0x21: case 0x22: case 0x23:
3121 case 0x24: case 0x25: case 0x26: case 0x27:
3122 return (mask & 0x080) != 0;
3123 case 0x28: case 0x29: case 0x2a: case 0x2b:
3124 case 0x2c: case 0x2d: case 0x2e: case 0x2f:
3125 return (mask & 0x040) != 0;
3126 case 0x30: case 0x31: case 0x32: case 0x33:
3127 case 0x34: case 0x35: case 0x36: case 0x37:
3128 return (mask & 0x020) != 0;
3129 case 0x38:
3130 return (mask & 0x010) != 0;
3131 case 0x39:
3132 return (mask & 0x008) != 0;
3133 case 0x3a:
3134 return (mask & 0x002) != 0;
3135 case 0x3b:
3136 return (mask & 0x001) != 0;
3137 case 0x3c:
3138 return (mask & 0x004) != 0;
3139 }
3140 return 0;
3142 }
3144 /* Used by qsort */
3145 static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
3146 {
3147 uint a = ((const opcode_struct*)aptr)->mask;
3148 uint b = ((const opcode_struct*)bptr)->mask;
3150 a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
3151 a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
3152 a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);
3153 a = ((a & 0xFF00) >> 8) + (a & 0x00FF);
3155 b = ((b & 0xAAAA) >> 1) + (b & 0x5555);
3156 b = ((b & 0xCCCC) >> 2) + (b & 0x3333);
3157 b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);
3158 b = ((b & 0xFF00) >> 8) + (b & 0x00FF);
3160 return b - a; /* reversed to get greatest to least sorting */
3161 }
3163 /* build the opcode handler jump table */
3164 static void build_opcode_table(void)
3165 {
3166 uint i;
3167 uint opcode;
3168 opcode_struct* ostruct;
3169 uint opcode_info_length = 0;
3171 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
3172 opcode_info_length++;
3174 qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);
3176 for(i=0;i<0x10000;i++)
3177 {
3178 g_instruction_table[i] = d68000_illegal; /* default to illegal */
3179 opcode = i;
3180 /* search through opcode info for a match */
3181 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
3182 {
3183 /* match opcode mask and allowed ea modes */
3184 if((opcode & ostruct->mask) == ostruct->match)
3185 {
3186 /* Handle destination ea for move instructions */
3187 if((ostruct->opcode_handler == d68000_move_8 ||
3188 ostruct->opcode_handler == d68000_move_16 ||
3189 ostruct->opcode_handler == d68000_move_32) &&
3190 !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
3191 continue;
3192 if(valid_ea(opcode, ostruct->ea_mask))
3193 {
3194 g_instruction_table[i] = ostruct->opcode_handler;
3195 break;
3196 }
3197 }
3198 }
3199 }
3200 }
3204 /* ======================================================================== */
3205 /* ================================= API ================================== */
3206 /* ======================================================================== */
3208 /* Disasemble one instruction at pc and store in str_buff */
3209 unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
3210 {
3211 if(!g_initialized)
3212 {
3213 build_opcode_table();
3214 g_initialized = 1;
3215 }
3216 switch(cpu_type)
3217 {
3218 case M68K_CPU_TYPE_68000:
3219 g_cpu_type = TYPE_68000;
3220 g_address_mask = 0x00ffffff;
3221 break;
3222 case M68K_CPU_TYPE_68010:
3223 g_cpu_type = TYPE_68010;
3224 g_address_mask = 0x00ffffff;
3225 break;
3226 case M68K_CPU_TYPE_68EC020:
3227 g_cpu_type = TYPE_68020;
3228 g_address_mask = 0x00ffffff;
3229 break;
3230 case M68K_CPU_TYPE_68020:
3231 g_cpu_type = TYPE_68020;
3232 g_address_mask = 0xffffffff;
3233 break;
3234 case M68K_CPU_TYPE_68030:
3235 g_cpu_type = TYPE_68030;
3236 g_address_mask = 0xffffffff;
3237 break;
3238 case M68K_CPU_TYPE_68040:
3239 g_cpu_type = TYPE_68040;
3240 g_address_mask = 0xffffffff;
3241 break;
3242 default:
3243 return 0;
3244 }
3246 g_cpu_pc = pc;
3247 g_helper_str[0] = 0;
3248 g_cpu_ir = read_imm_16();
3249 g_instruction_table[g_cpu_ir]();
3250 sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);
3251 return g_cpu_pc - pc;
3252 }
3254 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
3255 {
3256 static char buff[100];
3257 buff[0] = 0;
3258 m68k_disassemble(buff, pc, cpu_type);
3259 return buff;
3260 }
3262 /* Check if the instruction is a valid one */
3263 unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
3264 {
3265 if(!g_initialized)
3266 {
3267 build_opcode_table();
3268 g_initialized = 1;
3269 }
3271 instruction &= 0xffff;
3272 if(g_instruction_table[instruction] == d68000_illegal)
3273 return 0;
3275 switch(cpu_type)
3276 {
3277 case M68K_CPU_TYPE_68000:
3278 if(g_instruction_table[instruction] == d68010_bkpt)
3279 return 0;
3280 if(g_instruction_table[instruction] == d68010_move_fr_ccr)
3281 return 0;
3282 if(g_instruction_table[instruction] == d68010_movec)
3283 return 0;
3284 if(g_instruction_table[instruction] == d68010_moves_8)
3285 return 0;
3286 if(g_instruction_table[instruction] == d68010_moves_16)
3287 return 0;
3288 if(g_instruction_table[instruction] == d68010_moves_32)
3289 return 0;
3290 if(g_instruction_table[instruction] == d68010_rtd)
3291 return 0;
3292 case M68K_CPU_TYPE_68010:
3293 if(g_instruction_table[instruction] == d68020_bcc_32)
3294 return 0;
3295 if(g_instruction_table[instruction] == d68020_bfchg)
3296 return 0;
3297 if(g_instruction_table[instruction] == d68020_bfclr)
3298 return 0;
3299 if(g_instruction_table[instruction] == d68020_bfexts)
3300 return 0;
3301 if(g_instruction_table[instruction] == d68020_bfextu)
3302 return 0;
3303 if(g_instruction_table[instruction] == d68020_bfffo)
3304 return 0;
3305 if(g_instruction_table[instruction] == d68020_bfins)
3306 return 0;
3307 if(g_instruction_table[instruction] == d68020_bfset)
3308 return 0;
3309 if(g_instruction_table[instruction] == d68020_bftst)
3310 return 0;
3311 if(g_instruction_table[instruction] == d68020_bra_32)
3312 return 0;
3313 if(g_instruction_table[instruction] == d68020_bsr_32)
3314 return 0;
3315 if(g_instruction_table[instruction] == d68020_callm)
3316 return 0;
3317 if(g_instruction_table[instruction] == d68020_cas_8)
3318 return 0;
3319 if(g_instruction_table[instruction] == d68020_cas_16)
3320 return 0;
3321 if(g_instruction_table[instruction] == d68020_cas_32)
3322 return 0;
3323 if(g_instruction_table[instruction] == d68020_cas2_16)
3324 return 0;
3325 if(g_instruction_table[instruction] == d68020_cas2_32)
3326 return 0;
3327 if(g_instruction_table[instruction] == d68020_chk_32)
3328 return 0;
3329 if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)
3330 return 0;
3331 if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)
3332 return 0;
3333 if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)
3334 return 0;
3335 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)
3336 return 0;
3337 if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)
3338 return 0;
3339 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)
3340 return 0;
3341 if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)
3342 return 0;
3343 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)
3344 return 0;
3345 if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)
3346 return 0;
3347 if(g_instruction_table[instruction] == d68020_cpbcc_16)
3348 return 0;
3349 if(g_instruction_table[instruction] == d68020_cpbcc_32)
3350 return 0;
3351 if(g_instruction_table[instruction] == d68020_cpdbcc)
3352 return 0;
3353 if(g_instruction_table[instruction] == d68020_cpgen)
3354 return 0;
3355 if(g_instruction_table[instruction] == d68020_cprestore)
3356 return 0;
3357 if(g_instruction_table[instruction] == d68020_cpsave)
3358 return 0;
3359 if(g_instruction_table[instruction] == d68020_cpscc)
3360 return 0;
3361 if(g_instruction_table[instruction] == d68020_cptrapcc_0)
3362 return 0;
3363 if(g_instruction_table[instruction] == d68020_cptrapcc_16)
3364 return 0;
3365 if(g_instruction_table[instruction] == d68020_cptrapcc_32)
3366 return 0;
3367 if(g_instruction_table[instruction] == d68020_divl)
3368 return 0;
3369 if(g_instruction_table[instruction] == d68020_extb_32)
3370 return 0;
3371 if(g_instruction_table[instruction] == d68020_link_32)
3372 return 0;
3373 if(g_instruction_table[instruction] == d68020_mull)
3374 return 0;
3375 if(g_instruction_table[instruction] == d68020_pack_rr)
3376 return 0;
3377 if(g_instruction_table[instruction] == d68020_pack_mm)
3378 return 0;
3379 if(g_instruction_table[instruction] == d68020_rtm)
3380 return 0;
3381 if(g_instruction_table[instruction] == d68020_trapcc_0)
3382 return 0;
3383 if(g_instruction_table[instruction] == d68020_trapcc_16)
3384 return 0;
3385 if(g_instruction_table[instruction] == d68020_trapcc_32)
3386 return 0;
3387 if(g_instruction_table[instruction] == d68020_tst_pcdi_8)
3388 return 0;
3389 if(g_instruction_table[instruction] == d68020_tst_pcix_8)
3390 return 0;
3391 if(g_instruction_table[instruction] == d68020_tst_i_8)
3392 return 0;
3393 if(g_instruction_table[instruction] == d68020_tst_a_16)
3394 return 0;
3395 if(g_instruction_table[instruction] == d68020_tst_pcdi_16)
3396 return 0;
3397 if(g_instruction_table[instruction] == d68020_tst_pcix_16)
3398 return 0;
3399 if(g_instruction_table[instruction] == d68020_tst_i_16)
3400 return 0;
3401 if(g_instruction_table[instruction] == d68020_tst_a_32)
3402 return 0;
3403 if(g_instruction_table[instruction] == d68020_tst_pcdi_32)
3404 return 0;
3405 if(g_instruction_table[instruction] == d68020_tst_pcix_32)
3406 return 0;
3407 if(g_instruction_table[instruction] == d68020_tst_i_32)
3408 return 0;
3409 if(g_instruction_table[instruction] == d68020_unpk_rr)
3410 return 0;
3411 if(g_instruction_table[instruction] == d68020_unpk_mm)
3412 return 0;
3413 case M68K_CPU_TYPE_68EC020:
3414 case M68K_CPU_TYPE_68020:
3415 case M68K_CPU_TYPE_68030:
3416 if(g_instruction_table[instruction] == d68040_cinv)
3417 return 0;
3418 if(g_instruction_table[instruction] == d68040_cpush)
3419 return 0;
3420 if(g_instruction_table[instruction] == d68040_move16_pi_pi)
3421 return 0;
3422 if(g_instruction_table[instruction] == d68040_move16_pi_al)
3423 return 0;
3424 if(g_instruction_table[instruction] == d68040_move16_al_pi)
3425 return 0;
3426 if(g_instruction_table[instruction] == d68040_move16_ai_al)
3427 return 0;
3428 if(g_instruction_table[instruction] == d68040_move16_al_ai)
3429 return 0;
3430 }
3431 if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
3432 (g_instruction_table[instruction] == d68020_callm ||
3433 g_instruction_table[instruction] == d68020_rtm))
3434 return 0;
3436 return 1;
3437 }
3441 /* ======================================================================== */
3442 /* ============================== END OF FILE ============================= */
3443 /* ======================================================================== */