IPCores/lm32_cpu: lm32_monitor

reduce size of caches to fit in DE1 FPGA

The default cache size makes the Icache and Dcache "just a bit" too big to
fit in the EP2C20 FPGA on the DE1 board. This commit reduces the Icache and
Dcache sizes to the defaults shown in the LatticeMico32 Processor Reference
Manual (pages 36 and 37).

     1 // =============================================================================

     2 //                           COPYRIGHT NOTICE

     3 // Copyright 2006 (c) Lattice Semiconductor Corporation

     4 // ALL RIGHTS RESERVED

     5 // This confidential and proprietary software may be used only as authorised by

     6 // a licensing agreement from Lattice Semiconductor Corporation.

     7 // The entire notice above must be reproduced on all authorized copies and

     8 // copies may only be made to the extent permitted by a licensing agreement from

     9 // Lattice Semiconductor Corporation.

    10 //

    11 // Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)

    12 // 5555 NE Moore Court                            408-826-6000 (other locations)

    13 // Hillsboro, OR 97124                     web  : http://www.latticesemi.com/

    14 // U.S.A                                   email: techsupport@latticesemi.com

    15 // =============================================================================/

    16 //                         FILE DETAILS

    17 // Project          : LatticeMico32

    18 // File             : lm32_monitor_ram.v

    19 // Title            : LM32 monitor RAM, hold the load/monitor code

    20 // Dependencies     : system_conf.v

    21 // Version          : 6.1.17

    22 //                  : Initial Release

    23 // Version          : version 7.0 (7.0SP2)

    24 //                  : No Change

    25 //                  : version 7.1: updated to fix r0 not being zero

    26 //                  :     when hitting a breakpoint (CR 38134)

    27 //                  : version 7.2: updated to also store ip/im registers

    28 //                  :     and update im register when restoring stack

    29 // =============================================================================

    30 `include "system_conf.v"

    32 `timescale 1 ns / 1 ps

    33 module lm32_monitor_ram (DataInA, DataInB, AddressA, AddressB, ClockA,

    34 			 ClockB, ClockEnA, ClockEnB, WrA, WrB, ResetA, ResetB, QA, QB);

    35    input [31:0] DataInA;

    36    input [31:0] DataInB;

    37    input [8:0] 	AddressA;

    38    input [8:0] 	AddressB;

    39    input 	ClockA;

    40    input 	ClockB;

    41    input 	ClockEnA;

    42    input 	ClockEnB;

    43    input 	WrA;

    44    input 	WrB;

    45    input 	ResetA;

    46    input 	ResetB;

    47    output [31:0] QA;

    48    output [31:0] QB;

    50    parameter 	 lat_family = `LATTICE_FAMILY;

    52    generate

    53       if (lat_family == "ECP3") begin

    55 /* Verilog netlist generated by SCUBA ispLever_v8.0_ALPHA (69) */

    56 /* Module Version: 7.0 */

    57 /* c:\ispTOOLS8_0\ispFPGA\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch ep5c00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr DISABLED -writemode NORMAL -resetmode SYNC -memfile ../../lm32_monitor.mem -memformat hex -n lm32_monitor_ram -e  */

    58 /* Tue Jun 16 18:01:57 2009 */

    60     defparam lm32_monitor_ram_0_0_1.INITVAL_3F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    61     defparam lm32_monitor_ram_0_0_1.INITVAL_3E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    62     defparam lm32_monitor_ram_0_0_1.INITVAL_3D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    63     defparam lm32_monitor_ram_0_0_1.INITVAL_3C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    64     defparam lm32_monitor_ram_0_0_1.INITVAL_3B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    65     defparam lm32_monitor_ram_0_0_1.INITVAL_3A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    66     defparam lm32_monitor_ram_0_0_1.INITVAL_39 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    67     defparam lm32_monitor_ram_0_0_1.INITVAL_38 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    68     defparam lm32_monitor_ram_0_0_1.INITVAL_37 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    69     defparam lm32_monitor_ram_0_0_1.INITVAL_36 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    70     defparam lm32_monitor_ram_0_0_1.INITVAL_35 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    71     defparam lm32_monitor_ram_0_0_1.INITVAL_34 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    72     defparam lm32_monitor_ram_0_0_1.INITVAL_33 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    73     defparam lm32_monitor_ram_0_0_1.INITVAL_32 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    74     defparam lm32_monitor_ram_0_0_1.INITVAL_31 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    75     defparam lm32_monitor_ram_0_0_1.INITVAL_30 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    76     defparam lm32_monitor_ram_0_0_1.INITVAL_2F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    77     defparam lm32_monitor_ram_0_0_1.INITVAL_2E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    78     defparam lm32_monitor_ram_0_0_1.INITVAL_2D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    79     defparam lm32_monitor_ram_0_0_1.INITVAL_2C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    80     defparam lm32_monitor_ram_0_0_1.INITVAL_2B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    81     defparam lm32_monitor_ram_0_0_1.INITVAL_2A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    82     defparam lm32_monitor_ram_0_0_1.INITVAL_29 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    83     defparam lm32_monitor_ram_0_0_1.INITVAL_28 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    84     defparam lm32_monitor_ram_0_0_1.INITVAL_27 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    85     defparam lm32_monitor_ram_0_0_1.INITVAL_26 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    86     defparam lm32_monitor_ram_0_0_1.INITVAL_25 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    87     defparam lm32_monitor_ram_0_0_1.INITVAL_24 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    88     defparam lm32_monitor_ram_0_0_1.INITVAL_23 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    89     defparam lm32_monitor_ram_0_0_1.INITVAL_22 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    90     defparam lm32_monitor_ram_0_0_1.INITVAL_21 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    91     defparam lm32_monitor_ram_0_0_1.INITVAL_20 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    92     defparam lm32_monitor_ram_0_0_1.INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    93     defparam lm32_monitor_ram_0_0_1.INITVAL_1E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    94     defparam lm32_monitor_ram_0_0_1.INITVAL_1D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    95     defparam lm32_monitor_ram_0_0_1.INITVAL_1C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    96     defparam lm32_monitor_ram_0_0_1.INITVAL_1B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    97     defparam lm32_monitor_ram_0_0_1.INITVAL_1A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

    98     defparam lm32_monitor_ram_0_0_1.INITVAL_19 = "0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81" ;

    99     defparam lm32_monitor_ram_0_0_1.INITVAL_18 = "0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000" ;

   100     defparam lm32_monitor_ram_0_0_1.INITVAL_17 = "0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000" ;

   101     defparam lm32_monitor_ram_0_0_1.INITVAL_16 = "0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1" ;

   102     defparam lm32_monitor_ram_0_0_1.INITVAL_15 = "0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012" ;

   103     defparam lm32_monitor_ram_0_0_1.INITVAL_14 = "0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800" ;

   104     defparam lm32_monitor_ram_0_0_1.INITVAL_13 = "0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004" ;

   105     defparam lm32_monitor_ram_0_0_1.INITVAL_12 = "0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000" ;

   106     defparam lm32_monitor_ram_0_0_1.INITVAL_11 = "0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000" ;

   107     defparam lm32_monitor_ram_0_0_1.INITVAL_10 = "0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010" ;

   108     defparam lm32_monitor_ram_0_0_1.INITVAL_0F = "0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3" ;

   109     defparam lm32_monitor_ram_0_0_1.INITVAL_0E = "0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED" ;

   110     defparam lm32_monitor_ram_0_0_1.INITVAL_0D = "0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000" ;

   111     defparam lm32_monitor_ram_0_0_1.INITVAL_0C = "0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078" ;

   112     defparam lm32_monitor_ram_0_0_1.INITVAL_0B = "0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034" ;

   113     defparam lm32_monitor_ram_0_0_1.INITVAL_0A = "0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098" ;

   114     defparam lm32_monitor_ram_0_0_1.INITVAL_09 = "0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054" ;

   115     defparam lm32_monitor_ram_0_0_1.INITVAL_08 = "0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014" ;

   116     defparam lm32_monitor_ram_0_0_1.INITVAL_07 = "0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF" ;

   117     defparam lm32_monitor_ram_0_0_1.INITVAL_06 = "0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C" ;

   118     defparam lm32_monitor_ram_0_0_1.INITVAL_05 = "0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C" ;

   119     defparam lm32_monitor_ram_0_0_1.INITVAL_04 = "0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000" ;

   120     defparam lm32_monitor_ram_0_0_1.INITVAL_03 = "0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000" ;

   121     defparam lm32_monitor_ram_0_0_1.INITVAL_02 = "0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000" ;

   122     defparam lm32_monitor_ram_0_0_1.INITVAL_01 = "0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000" ;

   123     defparam lm32_monitor_ram_0_0_1.INITVAL_00 = "0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000" ;

   124     defparam lm32_monitor_ram_0_0_1.CSDECODE_B = "0b000" ;

   125     defparam lm32_monitor_ram_0_0_1.CSDECODE_A = "0b000" ;

   126     defparam lm32_monitor_ram_0_0_1.WRITEMODE_B = "NORMAL" ;

   127     defparam lm32_monitor_ram_0_0_1.WRITEMODE_A = "NORMAL" ;

   128     defparam lm32_monitor_ram_0_0_1.GSR = "DISABLED" ;

   129     defparam lm32_monitor_ram_0_0_1.REGMODE_B = "NOREG" ;

   130     defparam lm32_monitor_ram_0_0_1.REGMODE_A = "NOREG" ;

   131     defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_B = 18 ;

   132     defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_A = 18 ;

   133     DP16KC lm32_monitor_ram_0_0_1 (.DIA0(DataInA[0]), .DIA1(DataInA[1]),

   134         .DIA2(DataInA[2]), .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]),

   135         .DIA6(DataInA[6]), .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]),

   136         .DIA10(DataInA[10]), .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]),

   137         .DIA14(DataInA[14]), .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]),

   138         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   139         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   140         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   141         .ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),

   142         .OCEA(ClockEnA), .WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo),

   143         .CSA2(scuba_vlo), .RSTA(ResetA), .DIB0(DataInB[0]), .DIB1(DataInB[1]),

   144         .DIB2(DataInB[2]), .DIB3(DataInB[3]), .DIB4(DataInB[4]), .DIB5(DataInB[5]),

   145         .DIB6(DataInB[6]), .DIB7(DataInB[7]), .DIB8(DataInB[8]), .DIB9(DataInB[9]),

   146         .DIB10(DataInB[10]), .DIB11(DataInB[11]), .DIB12(DataInB[12]), .DIB13(DataInB[13]),

   147         .DIB14(DataInB[14]), .DIB15(DataInB[15]), .DIB16(DataInB[16]), .DIB17(DataInB[17]),

   148         .ADB0(scuba_vhi), .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo),

   149         .ADB4(AddressB[0]), .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]),

   150         .ADB8(AddressB[4]), .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]),

   151         .ADB12(AddressB[8]), .ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB),

   152         .OCEB(ClockEnB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),

   153         .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[0]), .DOA1(QA[1]), .DOA2(QA[2]),

   154         .DOA3(QA[3]), .DOA4(QA[4]), .DOA5(QA[5]), .DOA6(QA[6]), .DOA7(QA[7]),

   155         .DOA8(QA[8]), .DOA9(QA[9]), .DOA10(QA[10]), .DOA11(QA[11]), .DOA12(QA[12]),

   156         .DOA13(QA[13]), .DOA14(QA[14]), .DOA15(QA[15]), .DOA16(QA[16]),

   157         .DOA17(QA[17]), .DOB0(QB[0]), .DOB1(QB[1]), .DOB2(QB[2]), .DOB3(QB[3]),

   158         .DOB4(QB[4]), .DOB5(QB[5]), .DOB6(QB[6]), .DOB7(QB[7]), .DOB8(QB[8]),

   159         .DOB9(QB[9]), .DOB10(QB[10]), .DOB11(QB[11]), .DOB12(QB[12]), .DOB13(QB[13]),

   160         .DOB14(QB[14]), .DOB15(QB[15]), .DOB16(QB[16]), .DOB17(QB[17]))

   161              /* synthesis MEM_LPC_FILE="lm32_monitor_ram.lpc" */

   162              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   163              /* synthesis RESETMODE="SYNC" */;

   165     VHI scuba_vhi_inst (.Z(scuba_vhi));

   167     VLO scuba_vlo_inst (.Z(scuba_vlo));

   169     defparam lm32_monitor_ram_0_1_0.INITVAL_3F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   170     defparam lm32_monitor_ram_0_1_0.INITVAL_3E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   171     defparam lm32_monitor_ram_0_1_0.INITVAL_3D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   172     defparam lm32_monitor_ram_0_1_0.INITVAL_3C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   173     defparam lm32_monitor_ram_0_1_0.INITVAL_3B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   174     defparam lm32_monitor_ram_0_1_0.INITVAL_3A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   175     defparam lm32_monitor_ram_0_1_0.INITVAL_39 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   176     defparam lm32_monitor_ram_0_1_0.INITVAL_38 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   177     defparam lm32_monitor_ram_0_1_0.INITVAL_37 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   178     defparam lm32_monitor_ram_0_1_0.INITVAL_36 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   179     defparam lm32_monitor_ram_0_1_0.INITVAL_35 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   180     defparam lm32_monitor_ram_0_1_0.INITVAL_34 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   181     defparam lm32_monitor_ram_0_1_0.INITVAL_33 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   182     defparam lm32_monitor_ram_0_1_0.INITVAL_32 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   183     defparam lm32_monitor_ram_0_1_0.INITVAL_31 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   184     defparam lm32_monitor_ram_0_1_0.INITVAL_30 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   185     defparam lm32_monitor_ram_0_1_0.INITVAL_2F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   186     defparam lm32_monitor_ram_0_1_0.INITVAL_2E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   187     defparam lm32_monitor_ram_0_1_0.INITVAL_2D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   188     defparam lm32_monitor_ram_0_1_0.INITVAL_2C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   189     defparam lm32_monitor_ram_0_1_0.INITVAL_2B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   190     defparam lm32_monitor_ram_0_1_0.INITVAL_2A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   191     defparam lm32_monitor_ram_0_1_0.INITVAL_29 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   192     defparam lm32_monitor_ram_0_1_0.INITVAL_28 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   193     defparam lm32_monitor_ram_0_1_0.INITVAL_27 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   194     defparam lm32_monitor_ram_0_1_0.INITVAL_26 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   195     defparam lm32_monitor_ram_0_1_0.INITVAL_25 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   196     defparam lm32_monitor_ram_0_1_0.INITVAL_24 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   197     defparam lm32_monitor_ram_0_1_0.INITVAL_23 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   198     defparam lm32_monitor_ram_0_1_0.INITVAL_22 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   199     defparam lm32_monitor_ram_0_1_0.INITVAL_21 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   200     defparam lm32_monitor_ram_0_1_0.INITVAL_20 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   201     defparam lm32_monitor_ram_0_1_0.INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   202     defparam lm32_monitor_ram_0_1_0.INITVAL_1E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   203     defparam lm32_monitor_ram_0_1_0.INITVAL_1D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   204     defparam lm32_monitor_ram_0_1_0.INITVAL_1C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   205     defparam lm32_monitor_ram_0_1_0.INITVAL_1B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   206     defparam lm32_monitor_ram_0_1_0.INITVAL_1A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" ;

   207     defparam lm32_monitor_ram_0_1_0.INITVAL_19 = "0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF" ;

   208     defparam lm32_monitor_ram_0_1_0.INITVAL_18 = "0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482" ;

   209     defparam lm32_monitor_ram_0_1_0.INITVAL_17 = "0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03" ;

   210     defparam lm32_monitor_ram_0_1_0.INITVAL_16 = "0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF" ;

   211     defparam lm32_monitor_ram_0_1_0.INITVAL_15 = "0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10" ;

   212     defparam lm32_monitor_ram_0_1_0.INITVAL_14 = "0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70" ;

   213     defparam lm32_monitor_ram_0_1_0.INITVAL_13 = "0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7" ;

   214     defparam lm32_monitor_ram_0_1_0.INITVAL_12 = "0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418" ;

   215     defparam lm32_monitor_ram_0_1_0.INITVAL_11 = "0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84" ;

   216     defparam lm32_monitor_ram_0_1_0.INITVAL_10 = "0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4" ;

   217     defparam lm32_monitor_ram_0_1_0.INITVAL_0F = "0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF" ;

   218     defparam lm32_monitor_ram_0_1_0.INITVAL_0E = "0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF" ;

   219     defparam lm32_monitor_ram_0_1_0.INITVAL_0D = "0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478" ;

   220     defparam lm32_monitor_ram_0_1_0.INITVAL_0C = "0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7" ;

   221     defparam lm32_monitor_ram_0_1_0.INITVAL_0B = "0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3" ;

   222     defparam lm32_monitor_ram_0_1_0.INITVAL_0A = "0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7" ;

   223     defparam lm32_monitor_ram_0_1_0.INITVAL_09 = "0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5" ;

   224     defparam lm32_monitor_ram_0_1_0.INITVAL_08 = "0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1" ;

   225     defparam lm32_monitor_ram_0_1_0.INITVAL_07 = "0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808" ;

   226     defparam lm32_monitor_ram_0_1_0.INITVAL_06 = "0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE" ;

   227     defparam lm32_monitor_ram_0_1_0.INITVAL_05 = "0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" ;

   228     defparam lm32_monitor_ram_0_1_0.INITVAL_04 = "0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" ;

   229     defparam lm32_monitor_ram_0_1_0.INITVAL_03 = "0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" ;

   230     defparam lm32_monitor_ram_0_1_0.INITVAL_02 = "0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" ;

   231     defparam lm32_monitor_ram_0_1_0.INITVAL_01 = "0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" ;

   232     defparam lm32_monitor_ram_0_1_0.INITVAL_00 = "0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600" ;

   233     defparam lm32_monitor_ram_0_1_0.CSDECODE_B = "0b000" ;

   234     defparam lm32_monitor_ram_0_1_0.CSDECODE_A = "0b000" ;

   235     defparam lm32_monitor_ram_0_1_0.WRITEMODE_B = "NORMAL" ;

   236     defparam lm32_monitor_ram_0_1_0.WRITEMODE_A = "NORMAL" ;

   237     defparam lm32_monitor_ram_0_1_0.GSR = "DISABLED" ;

   238     defparam lm32_monitor_ram_0_1_0.REGMODE_B = "NOREG" ;

   239     defparam lm32_monitor_ram_0_1_0.REGMODE_A = "NOREG" ;

   240     defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_B = 18 ;

   241     defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_A = 18 ;

   242     DP16KC lm32_monitor_ram_0_1_0 (.DIA0(DataInA[18]), .DIA1(DataInA[19]),

   243         .DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),

   244         .DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),

   245         .DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),

   246         .DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),

   247         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   248         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   249         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   250         .ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),

   251         .OCEA(ClockEnA), .WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo),

   252         .CSA2(scuba_vlo), .RSTA(ResetA), .DIB0(DataInB[18]), .DIB1(DataInB[19]),

   253         .DIB2(DataInB[20]), .DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]),

   254         .DIB6(DataInB[24]), .DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]),

   255         .DIB10(DataInB[28]), .DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]),

   256         .DIB14(scuba_vlo), .DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo),

   257         .ADB0(scuba_vhi), .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo),

   258         .ADB4(AddressB[0]), .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]),

   259         .ADB8(AddressB[4]), .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]),

   260         .ADB12(AddressB[8]), .ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB),

   261         .OCEB(ClockEnB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),

   262         .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[18]), .DOA1(QA[19]), .DOA2(QA[20]),

   263         .DOA3(QA[21]), .DOA4(QA[22]), .DOA5(QA[23]), .DOA6(QA[24]), .DOA7(QA[25]),

   264         .DOA8(QA[26]), .DOA9(QA[27]), .DOA10(QA[28]), .DOA11(QA[29]), .DOA12(QA[30]),

   265         .DOA13(QA[31]), .DOA14(), .DOA15(), .DOA16(), .DOA17(), .DOB0(QB[18]),

   266         .DOB1(QB[19]), .DOB2(QB[20]), .DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]),

   267         .DOB6(QB[24]), .DOB7(QB[25]), .DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]),

   268         .DOB11(QB[29]), .DOB12(QB[30]), .DOB13(QB[31]), .DOB14(), .DOB15(),

   269         .DOB16(), .DOB17())

   270              /* synthesis MEM_LPC_FILE="lm32_monitor_ram.lpc" */

   271              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   272              /* synthesis RESETMODE="SYNC" */;

   276     // exemplar begin

   277     // exemplar attribute lm32_monitor_ram_0_0_1 MEM_LPC_FILE lm32_monitor_ram.lpc

   278     // exemplar attribute lm32_monitor_ram_0_0_1 MEM_INIT_FILE lm32_monitor.mem

   279     // exemplar attribute lm32_monitor_ram_0_0_1 RESETMODE SYNC

   280     // exemplar attribute lm32_monitor_ram_0_1_0 MEM_LPC_FILE lm32_monitor_ram.lpc

   281     // exemplar attribute lm32_monitor_ram_0_1_0 MEM_INIT_FILE lm32_monitor.mem

   282     // exemplar attribute lm32_monitor_ram_0_1_0 RESETMODE SYNC

   283     // exemplar end

   285       end else if (lat_family == "EC" || lat_family == "ECP" || lat_family == "XP") begin

   287 /* Verilog netlist generated by SCUBA ispLever_v8.0_ALPHA (69) */

   288 /* Module Version: 7.0 */

   289 /* c:\ispTOOLS8_0\ispFPGA\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch ep5g00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr DISABLED -writemode NORMAL -resetmode SYNC -memfile ../../lm32_monitor.mem -memformat hex -n lm32_monitor_ram -e  */

   290 /* Tue Jun 16 18:01:57 2009 */

   292     // synopsys translate_off

   293     defparam lm32_monitor_ram_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   294     defparam lm32_monitor_ram_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   295     defparam lm32_monitor_ram_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   296     defparam lm32_monitor_ram_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   297     defparam lm32_monitor_ram_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   298     defparam lm32_monitor_ram_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   299     defparam lm32_monitor_ram_0_0_1.INITVAL_19 = 320'h0000000000000000000000000000000000000000000000000000000000000000000000000003FF81 ;

   300     defparam lm32_monitor_ram_0_0_1.INITVAL_18 = 320'h300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000 ;

   301     defparam lm32_monitor_ram_0_0_1.INITVAL_17 = 320'h3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000 ;

   302     defparam lm32_monitor_ram_0_0_1.INITVAL_16 = 320'h068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1 ;

   303     defparam lm32_monitor_ram_0_0_1.INITVAL_15 = 320'h3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012 ;

   304     defparam lm32_monitor_ram_0_0_1.INITVAL_14 = 320'h00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800 ;

   305     defparam lm32_monitor_ram_0_0_1.INITVAL_13 = 320'h070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004 ;

   306     defparam lm32_monitor_ram_0_0_1.INITVAL_12 = 320'h200081000C0001030014200181001C00020300240000000000000001000000000000000000010000 ;

   307     defparam lm32_monitor_ram_0_0_1.INITVAL_11 = 320'h100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000 ;

   308     defparam lm32_monitor_ram_0_0_1.INITVAL_10 = 320'h30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010 ;

   309     defparam lm32_monitor_ram_0_0_1.INITVAL_0F = 320'h30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3 ;

   310     defparam lm32_monitor_ram_0_0_1.INITVAL_0E = 320'h1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED ;

   311     defparam lm32_monitor_ram_0_0_1.INITVAL_0D = 320'h100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000 ;

   312     defparam lm32_monitor_ram_0_0_1.INITVAL_0C = 320'h0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078 ;

   313     defparam lm32_monitor_ram_0_0_1.INITVAL_0B = 320'h300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034 ;

   314     defparam lm32_monitor_ram_0_0_1.INITVAL_0A = 320'h300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098 ;

   315     defparam lm32_monitor_ram_0_0_1.INITVAL_09 = 320'h20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054 ;

   316     defparam lm32_monitor_ram_0_0_1.INITVAL_08 = 320'h300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014 ;

   317     defparam lm32_monitor_ram_0_0_1.INITVAL_07 = 320'h300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF ;

   318     defparam lm32_monitor_ram_0_0_1.INITVAL_06 = 320'h1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C ;

   319     defparam lm32_monitor_ram_0_0_1.INITVAL_05 = 320'h1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C ;

   320     defparam lm32_monitor_ram_0_0_1.INITVAL_04 = 320'h1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000 ;

   321     defparam lm32_monitor_ram_0_0_1.INITVAL_03 = 320'h0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000 ;

   322     defparam lm32_monitor_ram_0_0_1.INITVAL_02 = 320'h0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000 ;

   323     defparam lm32_monitor_ram_0_0_1.INITVAL_01 = 320'h00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000 ;

   324     defparam lm32_monitor_ram_0_0_1.INITVAL_00 = 320'h00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000 ;

   325     defparam lm32_monitor_ram_0_0_1.CSDECODE_B = "000" ;

   326     defparam lm32_monitor_ram_0_0_1.CSDECODE_A = "000" ;

   327     defparam lm32_monitor_ram_0_0_1.WRITEMODE_B = "NORMAL" ;

   328     defparam lm32_monitor_ram_0_0_1.WRITEMODE_A = "NORMAL" ;

   329     defparam lm32_monitor_ram_0_0_1.GSR = "DISABLED" ;

   330     defparam lm32_monitor_ram_0_0_1.RESETMODE = "SYNC" ;

   331     defparam lm32_monitor_ram_0_0_1.REGMODE_B = "NOREG" ;

   332     defparam lm32_monitor_ram_0_0_1.REGMODE_A = "NOREG" ;

   333     defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_B = 18 ;

   334     defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_A = 18 ;

   335     // synopsys translate_on

   336     DP8KA lm32_monitor_ram_0_0_1 (.CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA),

   337         .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA),

   338         .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),

   339         .CSB2(scuba_vlo), .RSTB(ResetB), .DIA0(DataInA[0]), .DIA1(DataInA[1]),

   340         .DIA2(DataInA[2]), .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]),

   341         .DIA6(DataInA[6]), .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]),

   342         .DIA10(DataInA[10]), .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]),

   343         .DIA14(DataInA[14]), .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]),

   344         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   345         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   346         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   347         .ADA12(AddressA[8]), .DIB0(DataInB[0]), .DIB1(DataInB[1]), .DIB2(DataInB[2]),

   348         .DIB3(DataInB[3]), .DIB4(DataInB[4]), .DIB5(DataInB[5]), .DIB6(DataInB[6]),

   349         .DIB7(DataInB[7]), .DIB8(DataInB[8]), .DIB9(DataInB[9]), .DIB10(DataInB[10]),

   350         .DIB11(DataInB[11]), .DIB12(DataInB[12]), .DIB13(DataInB[13]), .DIB14(DataInB[14]),

   351         .DIB15(DataInB[15]), .DIB16(DataInB[16]), .DIB17(DataInB[17]), .ADB0(scuba_vhi),

   352         .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),

   353         .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),

   354         .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),

   355         .DOA0(QA[0]), .DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]), .DOA4(QA[4]),

   356         .DOA5(QA[5]), .DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]), .DOA9(QA[9]),

   357         .DOA10(QA[10]), .DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]),

   358         .DOA14(QA[14]), .DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]),

   359         .DOB0(QB[0]), .DOB1(QB[1]), .DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]),

   360         .DOB5(QB[5]), .DOB6(QB[6]), .DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]),

   361         .DOB10(QB[10]), .DOB11(QB[11]), .DOB12(QB[12]), .DOB13(QB[13]),

   362         .DOB14(QB[14]), .DOB15(QB[15]), .DOB16(QB[16]), .DOB17(QB[17]))

   363              /* synthesis MEM_LPC_FILE="lm32_monitor_ram.lpc" */

   364              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   365              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   366              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   367              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   368              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   369              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   370              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   371              /* synthesis INITVAL_19="0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81" */

   372              /* synthesis INITVAL_18="0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000" */

   373              /* synthesis INITVAL_17="0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000" */

   374              /* synthesis INITVAL_16="0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1" */

   375              /* synthesis INITVAL_15="0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012" */

   376              /* synthesis INITVAL_14="0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800" */

   377              /* synthesis INITVAL_13="0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004" */

   378              /* synthesis INITVAL_12="0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000" */

   379              /* synthesis INITVAL_11="0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000" */

   380              /* synthesis INITVAL_10="0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010" */

   381              /* synthesis INITVAL_0F="0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3" */

   382              /* synthesis INITVAL_0E="0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED" */

   383              /* synthesis INITVAL_0D="0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000" */

   384              /* synthesis INITVAL_0C="0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078" */

   385              /* synthesis INITVAL_0B="0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034" */

   386              /* synthesis INITVAL_0A="0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098" */

   387              /* synthesis INITVAL_09="0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054" */

   388              /* synthesis INITVAL_08="0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014" */

   389              /* synthesis INITVAL_07="0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF" */

   390              /* synthesis INITVAL_06="0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C" */

   391              /* synthesis INITVAL_05="0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C" */

   392              /* synthesis INITVAL_04="0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000" */

   393              /* synthesis INITVAL_03="0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000" */

   394              /* synthesis INITVAL_02="0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000" */

   395              /* synthesis INITVAL_01="0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000" */

   396              /* synthesis INITVAL_00="0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000" */

   397              /* synthesis CSDECODE_B="000" */

   398              /* synthesis CSDECODE_A="000" */

   399              /* synthesis WRITEMODE_B="NORMAL" */

   400              /* synthesis WRITEMODE_A="NORMAL" */

   401              /* synthesis GSR="DISABLED" */

   402              /* synthesis RESETMODE="SYNC" */

   403              /* synthesis REGMODE_B="NOREG" */

   404              /* synthesis REGMODE_A="NOREG" */

   405              /* synthesis DATA_WIDTH_B="18" */

   406              /* synthesis DATA_WIDTH_A="18" */;

   408     VHI scuba_vhi_inst (.Z(scuba_vhi));

   410     VLO scuba_vlo_inst (.Z(scuba_vlo));

   412     // synopsys translate_off

   413     defparam lm32_monitor_ram_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   414     defparam lm32_monitor_ram_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   415     defparam lm32_monitor_ram_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   416     defparam lm32_monitor_ram_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   417     defparam lm32_monitor_ram_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   418     defparam lm32_monitor_ram_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   419     defparam lm32_monitor_ram_0_1_0.INITVAL_19 = 320'h000000000000000000000000000000000000000000000000000000000000000000000000000038FF ;

   420     defparam lm32_monitor_ram_0_1_0.INITVAL_18 = 320'h034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482 ;

   421     defparam lm32_monitor_ram_0_1_0.INITVAL_17 = 320'h038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03 ;

   422     defparam lm32_monitor_ram_0_1_0.INITVAL_16 = 320'h02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF ;

   423     defparam lm32_monitor_ram_0_1_0.INITVAL_15 = 320'h03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10 ;

   424     defparam lm32_monitor_ram_0_1_0.INITVAL_14 = 320'h0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70 ;

   425     defparam lm32_monitor_ram_0_1_0.INITVAL_13 = 320'h024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7 ;

   426     defparam lm32_monitor_ram_0_1_0.INITVAL_12 = 320'h00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418 ;

   427     defparam lm32_monitor_ram_0_1_0.INITVAL_11 = 320'h00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84 ;

   428     defparam lm32_monitor_ram_0_1_0.INITVAL_10 = 320'h00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4 ;

   429     defparam lm32_monitor_ram_0_1_0.INITVAL_0F = 320'h016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF ;

   430     defparam lm32_monitor_ram_0_1_0.INITVAL_0E = 320'h010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF ;

   431     defparam lm32_monitor_ram_0_1_0.INITVAL_0D = 320'h016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478 ;

   432     defparam lm32_monitor_ram_0_1_0.INITVAL_0C = 320'h011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7 ;

   433     defparam lm32_monitor_ram_0_1_0.INITVAL_0B = 320'h00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3 ;

   434     defparam lm32_monitor_ram_0_1_0.INITVAL_0A = 320'h00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7 ;

   435     defparam lm32_monitor_ram_0_1_0.INITVAL_09 = 320'h0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5 ;

   436     defparam lm32_monitor_ram_0_1_0.INITVAL_08 = 320'h00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1 ;

   437     defparam lm32_monitor_ram_0_1_0.INITVAL_07 = 320'h00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808 ;

   438     defparam lm32_monitor_ram_0_1_0.INITVAL_06 = 320'h00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE ;

   439     defparam lm32_monitor_ram_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA ;

   440     defparam lm32_monitor_ram_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8 ;

   441     defparam lm32_monitor_ram_0_1_0.INITVAL_03 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   442     defparam lm32_monitor_ram_0_1_0.INITVAL_02 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   443     defparam lm32_monitor_ram_0_1_0.INITVAL_01 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   444     defparam lm32_monitor_ram_0_1_0.INITVAL_00 = 320'h0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600 ;

   445     defparam lm32_monitor_ram_0_1_0.CSDECODE_B = "000" ;

   446     defparam lm32_monitor_ram_0_1_0.CSDECODE_A = "000" ;

   447     defparam lm32_monitor_ram_0_1_0.WRITEMODE_B = "NORMAL" ;

   448     defparam lm32_monitor_ram_0_1_0.WRITEMODE_A = "NORMAL" ;

   449     defparam lm32_monitor_ram_0_1_0.GSR = "DISABLED" ;

   450     defparam lm32_monitor_ram_0_1_0.RESETMODE = "SYNC" ;

   451     defparam lm32_monitor_ram_0_1_0.REGMODE_B = "NOREG" ;

   452     defparam lm32_monitor_ram_0_1_0.REGMODE_A = "NOREG" ;

   453     defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_B = 18 ;

   454     defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_A = 18 ;

   455     // synopsys translate_on

   456     DP8KA lm32_monitor_ram_0_1_0 (.CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA),

   457         .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA),

   458         .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),

   459         .CSB2(scuba_vlo), .RSTB(ResetB), .DIA0(DataInA[18]), .DIA1(DataInA[19]),

   460         .DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),

   461         .DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),

   462         .DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),

   463         .DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),

   464         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   465         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   466         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   467         .ADA12(AddressA[8]), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),

   468         .DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),

   469         .DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),

   470         .DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),

   471         .DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),

   472         .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),

   473         .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),

   474         .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),

   475         .DOA0(QA[18]), .DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]),

   476         .DOA5(QA[23]), .DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]),

   477         .DOA10(QA[28]), .DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]),

   478         .DOA14(), .DOA15(), .DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]),

   479         .DOB2(QB[20]), .DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]),

   480         .DOB7(QB[25]), .DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]),

   481         .DOB12(QB[30]), .DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())

   482              /* synthesis MEM_LPC_FILE="lm32_monitor_ram.lpc" */

   483              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   484              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   485              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   486              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   487              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   488              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   489              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   490              /* synthesis INITVAL_19="0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF" */

   491              /* synthesis INITVAL_18="0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482" */

   492              /* synthesis INITVAL_17="0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03" */

   493              /* synthesis INITVAL_16="0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF" */

   494              /* synthesis INITVAL_15="0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10" */

   495              /* synthesis INITVAL_14="0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70" */

   496              /* synthesis INITVAL_13="0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7" */

   497              /* synthesis INITVAL_12="0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418" */

   498              /* synthesis INITVAL_11="0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84" */

   499              /* synthesis INITVAL_10="0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4" */

   500              /* synthesis INITVAL_0F="0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF" */

   501              /* synthesis INITVAL_0E="0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF" */

   502              /* synthesis INITVAL_0D="0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478" */

   503              /* synthesis INITVAL_0C="0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7" */

   504              /* synthesis INITVAL_0B="0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3" */

   505              /* synthesis INITVAL_0A="0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7" */

   506              /* synthesis INITVAL_09="0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5" */

   507              /* synthesis INITVAL_08="0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1" */

   508              /* synthesis INITVAL_07="0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808" */

   509              /* synthesis INITVAL_06="0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE" */

   510              /* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */

   511              /* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */

   512              /* synthesis INITVAL_03="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   513              /* synthesis INITVAL_02="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   514              /* synthesis INITVAL_01="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   515              /* synthesis INITVAL_00="0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600" */

   516              /* synthesis CSDECODE_B="000" */

   517              /* synthesis CSDECODE_A="000" */

   518              /* synthesis WRITEMODE_B="NORMAL" */

   519              /* synthesis WRITEMODE_A="NORMAL" */

   520              /* synthesis GSR="DISABLED" */

   521              /* synthesis RESETMODE="SYNC" */

   522              /* synthesis REGMODE_B="NOREG" */

   523              /* synthesis REGMODE_A="NOREG" */

   524              /* synthesis DATA_WIDTH_B="18" */

   525              /* synthesis DATA_WIDTH_A="18" */;

   529     // exemplar begin

   530     // exemplar attribute lm32_monitor_ram_0_0_1 MEM_LPC_FILE lm32_monitor_ram.lpc

   531     // exemplar attribute lm32_monitor_ram_0_0_1 MEM_INIT_FILE lm32_monitor.mem

   532     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   533     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   534     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   535     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   536     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   537     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   538     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_19 0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81

   539     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_18 0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000

   540     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_17 0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000

   541     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_16 0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1

   542     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_15 0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012

   543     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_14 0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800

   544     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_13 0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004

   545     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_12 0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000

   546     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_11 0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000

   547     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_10 0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010

   548     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0F 0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3

   549     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0E 0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED

   550     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0D 0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000

   551     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0C 0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078

   552     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0B 0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034

   553     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0A 0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098

   554     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_09 0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054

   555     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_08 0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014

   556     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_07 0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF

   557     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_06 0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C

   558     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_05 0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C

   559     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_04 0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000

   560     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_03 0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000

   561     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_02 0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000

   562     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_01 0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000

   563     // exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_00 0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000

   564     // exemplar attribute lm32_monitor_ram_0_0_1 CSDECODE_B 000

   565     // exemplar attribute lm32_monitor_ram_0_0_1 CSDECODE_A 000

   566     // exemplar attribute lm32_monitor_ram_0_0_1 WRITEMODE_B NORMAL

   567     // exemplar attribute lm32_monitor_ram_0_0_1 WRITEMODE_A NORMAL

   568     // exemplar attribute lm32_monitor_ram_0_0_1 GSR DISABLED

   569     // exemplar attribute lm32_monitor_ram_0_0_1 RESETMODE SYNC

   570     // exemplar attribute lm32_monitor_ram_0_0_1 REGMODE_B NOREG

   571     // exemplar attribute lm32_monitor_ram_0_0_1 REGMODE_A NOREG

   572     // exemplar attribute lm32_monitor_ram_0_0_1 DATA_WIDTH_B 18

   573     // exemplar attribute lm32_monitor_ram_0_0_1 DATA_WIDTH_A 18

   574     // exemplar attribute lm32_monitor_ram_0_1_0 MEM_LPC_FILE lm32_monitor_ram.lpc

   575     // exemplar attribute lm32_monitor_ram_0_1_0 MEM_INIT_FILE lm32_monitor.mem

   576     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   577     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   578     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   579     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   580     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   581     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   582     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_19 0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF

   583     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_18 0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482

   584     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_17 0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03

   585     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_16 0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF

   586     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_15 0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10

   587     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_14 0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70

   588     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_13 0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7

   589     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_12 0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418

   590     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_11 0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84

   591     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_10 0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4

   592     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0F 0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF

   593     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0E 0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF

   594     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0D 0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478

   595     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0C 0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7

   596     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0B 0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3

   597     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0A 0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7

   598     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_09 0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5

   599     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_08 0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1

   600     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_07 0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808

   601     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_06 0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE

   602     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA

   603     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8

   604     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_03 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

   605     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_02 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

   606     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_01 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

   607     // exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_00 0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600

   608     // exemplar attribute lm32_monitor_ram_0_1_0 CSDECODE_B 000

   609     // exemplar attribute lm32_monitor_ram_0_1_0 CSDECODE_A 000

   610     // exemplar attribute lm32_monitor_ram_0_1_0 WRITEMODE_B NORMAL

   611     // exemplar attribute lm32_monitor_ram_0_1_0 WRITEMODE_A NORMAL

   612     // exemplar attribute lm32_monitor_ram_0_1_0 GSR DISABLED

   613     // exemplar attribute lm32_monitor_ram_0_1_0 RESETMODE SYNC

   614     // exemplar attribute lm32_monitor_ram_0_1_0 REGMODE_B NOREG

   615     // exemplar attribute lm32_monitor_ram_0_1_0 REGMODE_A NOREG

   616     // exemplar attribute lm32_monitor_ram_0_1_0 DATA_WIDTH_B 18

   617     // exemplar attribute lm32_monitor_ram_0_1_0 DATA_WIDTH_A 18

   618     // exemplar end

   620       end else if (lat_family == "ECP2" || lat_family == "ECP2M" || lat_family == "XP2") begin

   622 /* Verilog netlist generated by SCUBA ispLever_v8.0_ALPHA (69) */

   623 /* Module Version: 7.0 */

   624 /* c:\ispTOOLS8_0\ispFPGA\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch ep5a00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr DISABLED -writemode NORMAL -resetmode SYNC -memfile ../../lm32_monitor.mem -memformat hex -e -n lm32_monitor_ram_ecp2  */

   625 /* Tue Jun 16 18:01:57 2009 */

   627     // synopsys translate_off

   628     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   629     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   630     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   631     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   632     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   633     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   634     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   635     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   636     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   637     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   638     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   639     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   640     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   641     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   642     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   643     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   644     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   645     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   646     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   647     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   648     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   649     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   650     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   651     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   652     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   653     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   654     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   655     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   656     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   657     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   658     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   659     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   660     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   661     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   662     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   663     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   664     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   665     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   666     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_19 = 320'h0000000000000000000000000000000000000000000000000000000000000000000000000003FF81 ;

   667     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_18 = 320'h300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000 ;

   668     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_17 = 320'h3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000 ;

   669     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_16 = 320'h068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1 ;

   670     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_15 = 320'h3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012 ;

   671     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_14 = 320'h00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800 ;

   672     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_13 = 320'h070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004 ;

   673     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_12 = 320'h200081000C0001030014200181001C00020300240000000000000001000000000000000000010000 ;

   674     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_11 = 320'h100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000 ;

   675     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_10 = 320'h30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010 ;

   676     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0F = 320'h30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3 ;

   677     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0E = 320'h1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED ;

   678     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0D = 320'h100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000 ;

   679     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0C = 320'h0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078 ;

   680     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0B = 320'h300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034 ;

   681     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0A = 320'h300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098 ;

   682     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_09 = 320'h20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054 ;

   683     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_08 = 320'h300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014 ;

   684     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_07 = 320'h300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF ;

   685     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_06 = 320'h1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C ;

   686     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_05 = 320'h1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C ;

   687     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_04 = 320'h1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000 ;

   688     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_03 = 320'h0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000 ;

   689     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_02 = 320'h0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000 ;

   690     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_01 = 320'h00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000 ;

   691     defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_00 = 320'h00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000 ;

   692     defparam lm32_monitor_ram_ecp2_0_0_1.CSDECODE_B =  3'b000 ;

   693     defparam lm32_monitor_ram_ecp2_0_0_1.CSDECODE_A =  3'b000 ;

   694     defparam lm32_monitor_ram_ecp2_0_0_1.WRITEMODE_B = "NORMAL" ;

   695     defparam lm32_monitor_ram_ecp2_0_0_1.WRITEMODE_A = "NORMAL" ;

   696     defparam lm32_monitor_ram_ecp2_0_0_1.GSR = "DISABLED" ;

   697     defparam lm32_monitor_ram_ecp2_0_0_1.RESETMODE = "SYNC" ;

   698     defparam lm32_monitor_ram_ecp2_0_0_1.REGMODE_B = "NOREG" ;

   699     defparam lm32_monitor_ram_ecp2_0_0_1.REGMODE_A = "NOREG" ;

   700     defparam lm32_monitor_ram_ecp2_0_0_1.DATA_WIDTH_B = 18 ;

   701     defparam lm32_monitor_ram_ecp2_0_0_1.DATA_WIDTH_A = 18 ;

   702     // synopsys translate_on

   703     DP16KB lm32_monitor_ram_ecp2_0_0_1 (.DIA0(DataInA[0]), .DIA1(DataInA[1]),

   704         .DIA2(DataInA[2]), .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]),

   705         .DIA6(DataInA[6]), .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]),

   706         .DIA10(DataInA[10]), .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]),

   707         .DIA14(DataInA[14]), .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]),

   708         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   709         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   710         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   711         .ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),

   712         .WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),

   713         .RSTA(ResetA), .DIB0(DataInB[0]), .DIB1(DataInB[1]), .DIB2(DataInB[2]),

   714         .DIB3(DataInB[3]), .DIB4(DataInB[4]), .DIB5(DataInB[5]), .DIB6(DataInB[6]),

   715         .DIB7(DataInB[7]), .DIB8(DataInB[8]), .DIB9(DataInB[9]), .DIB10(DataInB[10]),

   716         .DIB11(DataInB[11]), .DIB12(DataInB[12]), .DIB13(DataInB[13]), .DIB14(DataInB[14]),

   717         .DIB15(DataInB[15]), .DIB16(DataInB[16]), .DIB17(DataInB[17]), .ADB0(scuba_vhi),

   718         .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),

   719         .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),

   720         .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),

   721         .ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),

   722         .CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[0]),

   723         .DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]), .DOA4(QA[4]), .DOA5(QA[5]),

   724         .DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]), .DOA9(QA[9]), .DOA10(QA[10]),

   725         .DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]), .DOA14(QA[14]),

   726         .DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]), .DOB0(QB[0]), .DOB1(QB[1]),

   727         .DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]), .DOB5(QB[5]), .DOB6(QB[6]),

   728         .DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]), .DOB10(QB[10]), .DOB11(QB[11]),

   729         .DOB12(QB[12]), .DOB13(QB[13]), .DOB14(QB[14]), .DOB15(QB[15]),

   730         .DOB16(QB[16]), .DOB17(QB[17]))

   731              /* synthesis MEM_LPC_FILE="lm32_monitor_ram_ecp2.lpc" */

   732              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   733              /* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   734              /* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   735              /* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   736              /* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   737              /* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   738              /* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   739              /* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   740              /* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   741              /* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   742              /* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   743              /* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   744              /* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   745              /* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   746              /* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   747              /* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   748              /* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   749              /* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   750              /* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   751              /* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   752              /* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   753              /* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   754              /* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   755              /* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   756              /* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   757              /* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   758              /* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   759              /* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   760              /* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   761              /* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   762              /* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   763              /* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   764              /* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   765              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   766              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   767              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   768              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   769              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   770              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   771              /* synthesis INITVAL_19="0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81" */

   772              /* synthesis INITVAL_18="0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000" */

   773              /* synthesis INITVAL_17="0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000" */

   774              /* synthesis INITVAL_16="0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1" */

   775              /* synthesis INITVAL_15="0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012" */

   776              /* synthesis INITVAL_14="0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800" */

   777              /* synthesis INITVAL_13="0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004" */

   778              /* synthesis INITVAL_12="0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000" */

   779              /* synthesis INITVAL_11="0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000" */

   780              /* synthesis INITVAL_10="0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010" */

   781              /* synthesis INITVAL_0F="0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3" */

   782              /* synthesis INITVAL_0E="0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED" */

   783              /* synthesis INITVAL_0D="0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000" */

   784              /* synthesis INITVAL_0C="0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078" */

   785              /* synthesis INITVAL_0B="0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034" */

   786              /* synthesis INITVAL_0A="0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098" */

   787              /* synthesis INITVAL_09="0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054" */

   788              /* synthesis INITVAL_08="0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014" */

   789              /* synthesis INITVAL_07="0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF" */

   790              /* synthesis INITVAL_06="0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C" */

   791              /* synthesis INITVAL_05="0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C" */

   792              /* synthesis INITVAL_04="0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000" */

   793              /* synthesis INITVAL_03="0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000" */

   794              /* synthesis INITVAL_02="0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000" */

   795              /* synthesis INITVAL_01="0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000" */

   796              /* synthesis INITVAL_00="0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000" */

   797              /* synthesis CSDECODE_B="0b000" */

   798              /* synthesis CSDECODE_A="0b000" */

   799              /* synthesis WRITEMODE_B="NORMAL" */

   800              /* synthesis WRITEMODE_A="NORMAL" */

   801              /* synthesis GSR="DISABLED" */

   802              /* synthesis RESETMODE="SYNC" */

   803              /* synthesis REGMODE_B="NOREG" */

   804              /* synthesis REGMODE_A="NOREG" */

   805              /* synthesis DATA_WIDTH_B="18" */

   806              /* synthesis DATA_WIDTH_A="18" */;

   808     VHI scuba_vhi_inst (.Z(scuba_vhi));

   810     VLO scuba_vlo_inst (.Z(scuba_vlo));

   812     // synopsys translate_off

   813     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   814     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   815     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   816     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   817     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   818     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   819     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   820     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   821     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   822     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   823     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   824     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   825     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   826     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   827     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   828     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   829     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   830     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   831     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   832     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   833     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   834     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   835     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   836     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   837     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   838     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   839     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   840     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   841     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   842     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   843     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   844     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   845     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   846     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   847     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   848     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   849     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   850     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

   851     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_19 = 320'h000000000000000000000000000000000000000000000000000000000000000000000000000038FF ;

   852     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_18 = 320'h034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482 ;

   853     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_17 = 320'h038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03 ;

   854     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_16 = 320'h02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF ;

   855     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_15 = 320'h03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10 ;

   856     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_14 = 320'h0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70 ;

   857     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_13 = 320'h024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7 ;

   858     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_12 = 320'h00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418 ;

   859     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_11 = 320'h00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84 ;

   860     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_10 = 320'h00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4 ;

   861     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0F = 320'h016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF ;

   862     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0E = 320'h010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF ;

   863     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0D = 320'h016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478 ;

   864     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0C = 320'h011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7 ;

   865     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0B = 320'h00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3 ;

   866     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0A = 320'h00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7 ;

   867     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_09 = 320'h0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5 ;

   868     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_08 = 320'h00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1 ;

   869     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_07 = 320'h00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808 ;

   870     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_06 = 320'h00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE ;

   871     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA ;

   872     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8 ;

   873     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_03 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   874     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_02 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   875     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_01 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

   876     defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_00 = 320'h0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600 ;

   877     defparam lm32_monitor_ram_ecp2_0_1_0.CSDECODE_B =  3'b000 ;

   878     defparam lm32_monitor_ram_ecp2_0_1_0.CSDECODE_A =  3'b000 ;

   879     defparam lm32_monitor_ram_ecp2_0_1_0.WRITEMODE_B = "NORMAL" ;

   880     defparam lm32_monitor_ram_ecp2_0_1_0.WRITEMODE_A = "NORMAL" ;

   881     defparam lm32_monitor_ram_ecp2_0_1_0.GSR = "DISABLED" ;

   882     defparam lm32_monitor_ram_ecp2_0_1_0.RESETMODE = "SYNC" ;

   883     defparam lm32_monitor_ram_ecp2_0_1_0.REGMODE_B = "NOREG" ;

   884     defparam lm32_monitor_ram_ecp2_0_1_0.REGMODE_A = "NOREG" ;

   885     defparam lm32_monitor_ram_ecp2_0_1_0.DATA_WIDTH_B = 18 ;

   886     defparam lm32_monitor_ram_ecp2_0_1_0.DATA_WIDTH_A = 18 ;

   887     // synopsys translate_on

   888     DP16KB lm32_monitor_ram_ecp2_0_1_0 (.DIA0(DataInA[18]), .DIA1(DataInA[19]),

   889         .DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),

   890         .DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),

   891         .DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),

   892         .DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),

   893         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

   894         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

   895         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

   896         .ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),

   897         .WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),

   898         .RSTA(ResetA), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),

   899         .DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),

   900         .DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),

   901         .DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),

   902         .DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),

   903         .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),

   904         .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),

   905         .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),

   906         .ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),

   907         .CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[18]),

   908         .DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]), .DOA5(QA[23]),

   909         .DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]), .DOA10(QA[28]),

   910         .DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]), .DOA14(), .DOA15(),

   911         .DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]), .DOB2(QB[20]),

   912         .DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]), .DOB7(QB[25]),

   913         .DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]), .DOB12(QB[30]),

   914         .DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())

   915              /* synthesis MEM_LPC_FILE="lm32_monitor_ram_ecp2.lpc" */

   916              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

   917              /* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   918              /* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   919              /* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   920              /* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   921              /* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   922              /* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   923              /* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   924              /* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   925              /* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   926              /* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   927              /* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   928              /* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   929              /* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   930              /* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   931              /* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   932              /* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   933              /* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   934              /* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   935              /* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   936              /* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   937              /* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   938              /* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   939              /* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   940              /* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   941              /* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   942              /* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   943              /* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   944              /* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   945              /* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   946              /* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   947              /* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   948              /* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   949              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   950              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   951              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   952              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   953              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   954              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

   955              /* synthesis INITVAL_19="0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF" */

   956              /* synthesis INITVAL_18="0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482" */

   957              /* synthesis INITVAL_17="0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03" */

   958              /* synthesis INITVAL_16="0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF" */

   959              /* synthesis INITVAL_15="0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10" */

   960              /* synthesis INITVAL_14="0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70" */

   961              /* synthesis INITVAL_13="0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7" */

   962              /* synthesis INITVAL_12="0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418" */

   963              /* synthesis INITVAL_11="0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84" */

   964              /* synthesis INITVAL_10="0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4" */

   965              /* synthesis INITVAL_0F="0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF" */

   966              /* synthesis INITVAL_0E="0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF" */

   967              /* synthesis INITVAL_0D="0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478" */

   968              /* synthesis INITVAL_0C="0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7" */

   969              /* synthesis INITVAL_0B="0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3" */

   970              /* synthesis INITVAL_0A="0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7" */

   971              /* synthesis INITVAL_09="0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5" */

   972              /* synthesis INITVAL_08="0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1" */

   973              /* synthesis INITVAL_07="0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808" */

   974              /* synthesis INITVAL_06="0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE" */

   975              /* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */

   976              /* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */

   977              /* synthesis INITVAL_03="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   978              /* synthesis INITVAL_02="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   979              /* synthesis INITVAL_01="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

   980              /* synthesis INITVAL_00="0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600" */

   981              /* synthesis CSDECODE_B="0b000" */

   982              /* synthesis CSDECODE_A="0b000" */

   983              /* synthesis WRITEMODE_B="NORMAL" */

   984              /* synthesis WRITEMODE_A="NORMAL" */

   985              /* synthesis GSR="DISABLED" */

   986              /* synthesis RESETMODE="SYNC" */

   987              /* synthesis REGMODE_B="NOREG" */

   988              /* synthesis REGMODE_A="NOREG" */

   989              /* synthesis DATA_WIDTH_B="18" */

   990              /* synthesis DATA_WIDTH_A="18" */;

   994     // exemplar begin

   995     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 MEM_LPC_FILE lm32_monitor_ram_ecp2.lpc

   996     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 MEM_INIT_FILE lm32_monitor.mem

   997     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   998     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

   999     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1000     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1001     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1002     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1003     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1004     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1005     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1006     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1007     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1008     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1009     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1010     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1011     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1012     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1013     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1014     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1015     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1016     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1017     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1018     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1019     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1020     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1021     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1022     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1023     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1024     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1025     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1026     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1027     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1028     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1029     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1030     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1031     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1032     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1033     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1034     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1035     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_19 0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81

  1036     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_18 0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000

  1037     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_17 0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000

  1038     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_16 0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1

  1039     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_15 0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012

  1040     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_14 0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800

  1041     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_13 0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004

  1042     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_12 0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000

  1043     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_11 0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000

  1044     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_10 0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010

  1045     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0F 0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3

  1046     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0E 0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED

  1047     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0D 0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000

  1048     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0C 0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078

  1049     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0B 0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034

  1050     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0A 0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098

  1051     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_09 0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054

  1052     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_08 0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014

  1053     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_07 0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF

  1054     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_06 0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C

  1055     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_05 0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C

  1056     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_04 0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000

  1057     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_03 0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000

  1058     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_02 0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000

  1059     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_01 0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000

  1060     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_00 0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000

  1061     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 CSDECODE_B 0b000

  1062     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 CSDECODE_A 0b000

  1063     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 WRITEMODE_B NORMAL

  1064     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 WRITEMODE_A NORMAL

  1065     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 GSR DISABLED

  1066     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 RESETMODE SYNC

  1067     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 REGMODE_B NOREG

  1068     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 REGMODE_A NOREG

  1069     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 DATA_WIDTH_B 18

  1070     // exemplar attribute lm32_monitor_ram_ecp2_0_0_1 DATA_WIDTH_A 18

  1071     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 MEM_LPC_FILE lm32_monitor_ram_ecp2.lpc

  1072     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 MEM_INIT_FILE lm32_monitor.mem

  1073     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1074     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1075     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1076     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1077     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1078     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1079     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1080     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1081     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1082     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1083     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1084     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1085     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1086     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1087     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1088     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1089     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1090     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1091     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1092     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1093     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1094     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1095     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1096     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1097     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1098     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1099     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1100     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1101     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1102     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1103     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1104     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1105     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1106     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1107     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1108     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1109     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1110     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1111     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_19 0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF

  1112     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_18 0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482

  1113     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_17 0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03

  1114     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_16 0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF

  1115     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_15 0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10

  1116     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_14 0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70

  1117     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_13 0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7

  1118     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_12 0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418

  1119     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_11 0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84

  1120     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_10 0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4

  1121     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0F 0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF

  1122     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0E 0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF

  1123     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0D 0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478

  1124     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0C 0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7

  1125     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0B 0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3

  1126     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0A 0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7

  1127     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_09 0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5

  1128     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_08 0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1

  1129     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_07 0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808

  1130     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_06 0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE

  1131     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA

  1132     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8

  1133     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_03 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1134     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_02 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1135     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_01 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1136     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_00 0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600

  1137     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 CSDECODE_B 0b000

  1138     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 CSDECODE_A 0b000

  1139     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 WRITEMODE_B NORMAL

  1140     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 WRITEMODE_A NORMAL

  1141     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 GSR DISABLED

  1142     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 RESETMODE SYNC

  1143     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 REGMODE_B NOREG

  1144     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 REGMODE_A NOREG

  1145     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 DATA_WIDTH_B 18

  1146     // exemplar attribute lm32_monitor_ram_ecp2_0_1_0 DATA_WIDTH_A 18

  1147     // exemplar end

  1149       end   else if (lat_family == "SC" || lat_family == "SCM") begin

  1151 /* Verilog netlist generated by SCUBA ispLever_v8.0_ALPHA (69) */

  1152 /* Module Version: 7.0 */

  1153 /* c:\ispTOOLS8_0\ispFPGA\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch or5s00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr DISABLED -sync_reset -memfile ../../lm32_monitor.mem -memformat hex -e -n sc_rom_monitor  */

  1154 /* Tue Jun 16 18:01:58 2009 */

  1156     // synopsys translate_off

  1157     defparam sc_rom_monitor_0_0_1.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1158     defparam sc_rom_monitor_0_0_1.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1159     defparam sc_rom_monitor_0_0_1.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1160     defparam sc_rom_monitor_0_0_1.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1161     defparam sc_rom_monitor_0_0_1.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1162     defparam sc_rom_monitor_0_0_1.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1163     defparam sc_rom_monitor_0_0_1.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1164     defparam sc_rom_monitor_0_0_1.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1165     defparam sc_rom_monitor_0_0_1.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1166     defparam sc_rom_monitor_0_0_1.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1167     defparam sc_rom_monitor_0_0_1.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1168     defparam sc_rom_monitor_0_0_1.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1169     defparam sc_rom_monitor_0_0_1.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1170     defparam sc_rom_monitor_0_0_1.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1171     defparam sc_rom_monitor_0_0_1.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1172     defparam sc_rom_monitor_0_0_1.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1173     defparam sc_rom_monitor_0_0_1.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1174     defparam sc_rom_monitor_0_0_1.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1175     defparam sc_rom_monitor_0_0_1.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1176     defparam sc_rom_monitor_0_0_1.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1177     defparam sc_rom_monitor_0_0_1.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1178     defparam sc_rom_monitor_0_0_1.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1179     defparam sc_rom_monitor_0_0_1.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1180     defparam sc_rom_monitor_0_0_1.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1181     defparam sc_rom_monitor_0_0_1.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1182     defparam sc_rom_monitor_0_0_1.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1183     defparam sc_rom_monitor_0_0_1.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1184     defparam sc_rom_monitor_0_0_1.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1185     defparam sc_rom_monitor_0_0_1.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1186     defparam sc_rom_monitor_0_0_1.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1187     defparam sc_rom_monitor_0_0_1.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1188     defparam sc_rom_monitor_0_0_1.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1189     defparam sc_rom_monitor_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1190     defparam sc_rom_monitor_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1191     defparam sc_rom_monitor_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1192     defparam sc_rom_monitor_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1193     defparam sc_rom_monitor_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1194     defparam sc_rom_monitor_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1195     defparam sc_rom_monitor_0_0_1.INITVAL_19 = 320'h0000000000000000000000000000000000000000000000000000000000000000000000000003FF81 ;

  1196     defparam sc_rom_monitor_0_0_1.INITVAL_18 = 320'h300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000 ;

  1197     defparam sc_rom_monitor_0_0_1.INITVAL_17 = 320'h3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000 ;

  1198     defparam sc_rom_monitor_0_0_1.INITVAL_16 = 320'h068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1 ;

  1199     defparam sc_rom_monitor_0_0_1.INITVAL_15 = 320'h3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012 ;

  1200     defparam sc_rom_monitor_0_0_1.INITVAL_14 = 320'h00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800 ;

  1201     defparam sc_rom_monitor_0_0_1.INITVAL_13 = 320'h070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004 ;

  1202     defparam sc_rom_monitor_0_0_1.INITVAL_12 = 320'h200081000C0001030014200181001C00020300240000000000000001000000000000000000010000 ;

  1203     defparam sc_rom_monitor_0_0_1.INITVAL_11 = 320'h100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000 ;

  1204     defparam sc_rom_monitor_0_0_1.INITVAL_10 = 320'h30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010 ;

  1205     defparam sc_rom_monitor_0_0_1.INITVAL_0F = 320'h30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3 ;

  1206     defparam sc_rom_monitor_0_0_1.INITVAL_0E = 320'h1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED ;

  1207     defparam sc_rom_monitor_0_0_1.INITVAL_0D = 320'h100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000 ;

  1208     defparam sc_rom_monitor_0_0_1.INITVAL_0C = 320'h0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078 ;

  1209     defparam sc_rom_monitor_0_0_1.INITVAL_0B = 320'h300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034 ;

  1210     defparam sc_rom_monitor_0_0_1.INITVAL_0A = 320'h300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098 ;

  1211     defparam sc_rom_monitor_0_0_1.INITVAL_09 = 320'h20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054 ;

  1212     defparam sc_rom_monitor_0_0_1.INITVAL_08 = 320'h300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014 ;

  1213     defparam sc_rom_monitor_0_0_1.INITVAL_07 = 320'h300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF ;

  1214     defparam sc_rom_monitor_0_0_1.INITVAL_06 = 320'h1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C ;

  1215     defparam sc_rom_monitor_0_0_1.INITVAL_05 = 320'h1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C ;

  1216     defparam sc_rom_monitor_0_0_1.INITVAL_04 = 320'h1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000 ;

  1217     defparam sc_rom_monitor_0_0_1.INITVAL_03 = 320'h0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000 ;

  1218     defparam sc_rom_monitor_0_0_1.INITVAL_02 = 320'h0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000 ;

  1219     defparam sc_rom_monitor_0_0_1.INITVAL_01 = 320'h00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000 ;

  1220     defparam sc_rom_monitor_0_0_1.INITVAL_00 = 320'h00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000 ;

  1221     defparam sc_rom_monitor_0_0_1.CSDECODE_B =  3'b000 ;

  1222     defparam sc_rom_monitor_0_0_1.CSDECODE_A =  3'b000 ;

  1223     defparam sc_rom_monitor_0_0_1.WRITEMODE_B = "NORMAL" ;

  1224     defparam sc_rom_monitor_0_0_1.WRITEMODE_A = "NORMAL" ;

  1225     defparam sc_rom_monitor_0_0_1.GSR = "DISABLED" ;

  1226     defparam sc_rom_monitor_0_0_1.RESETMODE = "SYNC" ;

  1227     defparam sc_rom_monitor_0_0_1.REGMODE_B = "NOREG" ;

  1228     defparam sc_rom_monitor_0_0_1.REGMODE_A = "NOREG" ;

  1229     defparam sc_rom_monitor_0_0_1.DATA_WIDTH_B = 18 ;

  1230     defparam sc_rom_monitor_0_0_1.DATA_WIDTH_A = 18 ;

  1231     // synopsys translate_on

  1232     DP16KA sc_rom_monitor_0_0_1 (.DIA0(DataInA[0]), .DIA1(DataInA[1]), .DIA2(DataInA[2]),

  1233         .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]), .DIA6(DataInA[6]),

  1234         .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]), .DIA10(DataInA[10]),

  1235         .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]), .DIA14(DataInA[14]),

  1236         .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]), .ADA0(scuba_vhi),

  1237         .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo), .ADA4(AddressA[0]),

  1238         .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]), .ADA8(AddressA[4]),

  1239         .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]), .ADA12(AddressA[8]),

  1240         .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA), .CSA0(scuba_vlo),

  1241         .CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA), .DIB0(DataInB[0]),

  1242         .DIB1(DataInB[1]), .DIB2(DataInB[2]), .DIB3(DataInB[3]), .DIB4(DataInB[4]),

  1243         .DIB5(DataInB[5]), .DIB6(DataInB[6]), .DIB7(DataInB[7]), .DIB8(DataInB[8]),

  1244         .DIB9(DataInB[9]), .DIB10(DataInB[10]), .DIB11(DataInB[11]), .DIB12(DataInB[12]),

  1245         .DIB13(DataInB[13]), .DIB14(DataInB[14]), .DIB15(DataInB[15]), .DIB16(DataInB[16]),

  1246         .DIB17(DataInB[17]), .ADB0(scuba_vhi), .ADB1(scuba_vhi), .ADB2(scuba_vlo),

  1247         .ADB3(scuba_vlo), .ADB4(AddressB[0]), .ADB5(AddressB[1]), .ADB6(AddressB[2]),

  1248         .ADB7(AddressB[3]), .ADB8(AddressB[4]), .ADB9(AddressB[5]), .ADB10(AddressB[6]),

  1249         .ADB11(AddressB[7]), .ADB12(AddressB[8]), .ADB13(scuba_vlo), .CEB(ClockEnB),

  1250         .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo), .CSB2(scuba_vlo),

  1251         .RSTB(ResetB), .DOA0(QA[0]), .DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]),

  1252         .DOA4(QA[4]), .DOA5(QA[5]), .DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]),

  1253         .DOA9(QA[9]), .DOA10(QA[10]), .DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]),

  1254         .DOA14(QA[14]), .DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]),

  1255         .DOB0(QB[0]), .DOB1(QB[1]), .DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]),

  1256         .DOB5(QB[5]), .DOB6(QB[6]), .DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]),

  1257         .DOB10(QB[10]), .DOB11(QB[11]), .DOB12(QB[12]), .DOB13(QB[13]),

  1258         .DOB14(QB[14]), .DOB15(QB[15]), .DOB16(QB[16]), .DOB17(QB[17]))

  1259              /* synthesis MEM_LPC_FILE="sc_rom_monitor.lpc" */

  1260              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

  1261              /* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1262              /* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1263              /* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1264              /* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1265              /* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1266              /* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1267              /* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1268              /* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1269              /* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1270              /* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1271              /* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1272              /* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1273              /* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1274              /* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1275              /* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1276              /* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1277              /* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1278              /* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1279              /* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1280              /* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1281              /* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1282              /* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1283              /* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1284              /* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1285              /* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1286              /* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1287              /* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1288              /* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1289              /* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1290              /* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1291              /* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1292              /* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1293              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1294              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1295              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1296              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1297              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1298              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1299              /* synthesis INITVAL_19="0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81" */

  1300              /* synthesis INITVAL_18="0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000" */

  1301              /* synthesis INITVAL_17="0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000" */

  1302              /* synthesis INITVAL_16="0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1" */

  1303              /* synthesis INITVAL_15="0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012" */

  1304              /* synthesis INITVAL_14="0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800" */

  1305              /* synthesis INITVAL_13="0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004" */

  1306              /* synthesis INITVAL_12="0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000" */

  1307              /* synthesis INITVAL_11="0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000" */

  1308              /* synthesis INITVAL_10="0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010" */

  1309              /* synthesis INITVAL_0F="0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3" */

  1310              /* synthesis INITVAL_0E="0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED" */

  1311              /* synthesis INITVAL_0D="0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000" */

  1312              /* synthesis INITVAL_0C="0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078" */

  1313              /* synthesis INITVAL_0B="0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034" */

  1314              /* synthesis INITVAL_0A="0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098" */

  1315              /* synthesis INITVAL_09="0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054" */

  1316              /* synthesis INITVAL_08="0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014" */

  1317              /* synthesis INITVAL_07="0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF" */

  1318              /* synthesis INITVAL_06="0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C" */

  1319              /* synthesis INITVAL_05="0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C" */

  1320              /* synthesis INITVAL_04="0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000" */

  1321              /* synthesis INITVAL_03="0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000" */

  1322              /* synthesis INITVAL_02="0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000" */

  1323              /* synthesis INITVAL_01="0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000" */

  1324              /* synthesis INITVAL_00="0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000" */

  1325              /* synthesis CSDECODE_B="0b000" */

  1326              /* synthesis CSDECODE_A="0b000" */

  1327              /* synthesis WRITEMODE_B="NORMAL" */

  1328              /* synthesis WRITEMODE_A="NORMAL" */

  1329              /* synthesis GSR="DISABLED" */

  1330              /* synthesis RESETMODE="SYNC" */

  1331              /* synthesis REGMODE_B="NOREG" */

  1332              /* synthesis REGMODE_A="NOREG" */

  1333              /* synthesis DATA_WIDTH_B="18" */

  1334              /* synthesis DATA_WIDTH_A="18" */;

  1336     VHI scuba_vhi_inst (.Z(scuba_vhi));

  1338     VLO scuba_vlo_inst (.Z(scuba_vlo));

  1340     // synopsys translate_off

  1341     defparam sc_rom_monitor_0_1_0.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1342     defparam sc_rom_monitor_0_1_0.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1343     defparam sc_rom_monitor_0_1_0.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1344     defparam sc_rom_monitor_0_1_0.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1345     defparam sc_rom_monitor_0_1_0.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1346     defparam sc_rom_monitor_0_1_0.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1347     defparam sc_rom_monitor_0_1_0.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1348     defparam sc_rom_monitor_0_1_0.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1349     defparam sc_rom_monitor_0_1_0.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1350     defparam sc_rom_monitor_0_1_0.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1351     defparam sc_rom_monitor_0_1_0.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1352     defparam sc_rom_monitor_0_1_0.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1353     defparam sc_rom_monitor_0_1_0.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1354     defparam sc_rom_monitor_0_1_0.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1355     defparam sc_rom_monitor_0_1_0.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1356     defparam sc_rom_monitor_0_1_0.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1357     defparam sc_rom_monitor_0_1_0.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1358     defparam sc_rom_monitor_0_1_0.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1359     defparam sc_rom_monitor_0_1_0.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1360     defparam sc_rom_monitor_0_1_0.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1361     defparam sc_rom_monitor_0_1_0.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1362     defparam sc_rom_monitor_0_1_0.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1363     defparam sc_rom_monitor_0_1_0.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1364     defparam sc_rom_monitor_0_1_0.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1365     defparam sc_rom_monitor_0_1_0.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1366     defparam sc_rom_monitor_0_1_0.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1367     defparam sc_rom_monitor_0_1_0.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1368     defparam sc_rom_monitor_0_1_0.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1369     defparam sc_rom_monitor_0_1_0.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1370     defparam sc_rom_monitor_0_1_0.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1371     defparam sc_rom_monitor_0_1_0.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1372     defparam sc_rom_monitor_0_1_0.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1373     defparam sc_rom_monitor_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1374     defparam sc_rom_monitor_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1375     defparam sc_rom_monitor_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1376     defparam sc_rom_monitor_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1377     defparam sc_rom_monitor_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1378     defparam sc_rom_monitor_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;

  1379     defparam sc_rom_monitor_0_1_0.INITVAL_19 = 320'h000000000000000000000000000000000000000000000000000000000000000000000000000038FF ;

  1380     defparam sc_rom_monitor_0_1_0.INITVAL_18 = 320'h034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482 ;

  1381     defparam sc_rom_monitor_0_1_0.INITVAL_17 = 320'h038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03 ;

  1382     defparam sc_rom_monitor_0_1_0.INITVAL_16 = 320'h02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF ;

  1383     defparam sc_rom_monitor_0_1_0.INITVAL_15 = 320'h03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10 ;

  1384     defparam sc_rom_monitor_0_1_0.INITVAL_14 = 320'h0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70 ;

  1385     defparam sc_rom_monitor_0_1_0.INITVAL_13 = 320'h024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7 ;

  1386     defparam sc_rom_monitor_0_1_0.INITVAL_12 = 320'h00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418 ;

  1387     defparam sc_rom_monitor_0_1_0.INITVAL_11 = 320'h00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84 ;

  1388     defparam sc_rom_monitor_0_1_0.INITVAL_10 = 320'h00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4 ;

  1389     defparam sc_rom_monitor_0_1_0.INITVAL_0F = 320'h016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF ;

  1390     defparam sc_rom_monitor_0_1_0.INITVAL_0E = 320'h010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF ;

  1391     defparam sc_rom_monitor_0_1_0.INITVAL_0D = 320'h016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478 ;

  1392     defparam sc_rom_monitor_0_1_0.INITVAL_0C = 320'h011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7 ;

  1393     defparam sc_rom_monitor_0_1_0.INITVAL_0B = 320'h00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3 ;

  1394     defparam sc_rom_monitor_0_1_0.INITVAL_0A = 320'h00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7 ;

  1395     defparam sc_rom_monitor_0_1_0.INITVAL_09 = 320'h0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5 ;

  1396     defparam sc_rom_monitor_0_1_0.INITVAL_08 = 320'h00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1 ;

  1397     defparam sc_rom_monitor_0_1_0.INITVAL_07 = 320'h00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808 ;

  1398     defparam sc_rom_monitor_0_1_0.INITVAL_06 = 320'h00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE ;

  1399     defparam sc_rom_monitor_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA ;

  1400     defparam sc_rom_monitor_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8 ;

  1401     defparam sc_rom_monitor_0_1_0.INITVAL_03 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

  1402     defparam sc_rom_monitor_0_1_0.INITVAL_02 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

  1403     defparam sc_rom_monitor_0_1_0.INITVAL_01 = 320'h0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600 ;

  1404     defparam sc_rom_monitor_0_1_0.INITVAL_00 = 320'h0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600 ;

  1405     defparam sc_rom_monitor_0_1_0.CSDECODE_B =  3'b000 ;

  1406     defparam sc_rom_monitor_0_1_0.CSDECODE_A =  3'b000 ;

  1407     defparam sc_rom_monitor_0_1_0.WRITEMODE_B = "NORMAL" ;

  1408     defparam sc_rom_monitor_0_1_0.WRITEMODE_A = "NORMAL" ;

  1409     defparam sc_rom_monitor_0_1_0.GSR = "DISABLED" ;

  1410     defparam sc_rom_monitor_0_1_0.RESETMODE = "SYNC" ;

  1411     defparam sc_rom_monitor_0_1_0.REGMODE_B = "NOREG" ;

  1412     defparam sc_rom_monitor_0_1_0.REGMODE_A = "NOREG" ;

  1413     defparam sc_rom_monitor_0_1_0.DATA_WIDTH_B = 18 ;

  1414     defparam sc_rom_monitor_0_1_0.DATA_WIDTH_A = 18 ;

  1415     // synopsys translate_on

  1416     DP16KA sc_rom_monitor_0_1_0 (.DIA0(DataInA[18]), .DIA1(DataInA[19]),

  1417         .DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),

  1418         .DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),

  1419         .DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),

  1420         .DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),

  1421         .ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),

  1422         .ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),

  1423         .ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),

  1424         .ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),

  1425         .WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),

  1426         .RSTA(ResetA), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),

  1427         .DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),

  1428         .DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),

  1429         .DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),

  1430         .DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),

  1431         .ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),

  1432         .ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),

  1433         .ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),

  1434         .ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),

  1435         .CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[18]),

  1436         .DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]), .DOA5(QA[23]),

  1437         .DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]), .DOA10(QA[28]),

  1438         .DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]), .DOA14(), .DOA15(),

  1439         .DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]), .DOB2(QB[20]),

  1440         .DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]), .DOB7(QB[25]),

  1441         .DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]), .DOB12(QB[30]),

  1442         .DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())

  1443              /* synthesis MEM_LPC_FILE="sc_rom_monitor.lpc" */

  1444              /* synthesis MEM_INIT_FILE="lm32_monitor.mem" */

  1445              /* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1446              /* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1447              /* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1448              /* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1449              /* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1450              /* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1451              /* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1452              /* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1453              /* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1454              /* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1455              /* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1456              /* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1457              /* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1458              /* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1459              /* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1460              /* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1461              /* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1462              /* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1463              /* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1464              /* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1465              /* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1466              /* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1467              /* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1468              /* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1469              /* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1470              /* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1471              /* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1472              /* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1473              /* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1474              /* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1475              /* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1476              /* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1477              /* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1478              /* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1479              /* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1480              /* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1481              /* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1482              /* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */

  1483              /* synthesis INITVAL_19="0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF" */

  1484              /* synthesis INITVAL_18="0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482" */

  1485              /* synthesis INITVAL_17="0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03" */

  1486              /* synthesis INITVAL_16="0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF" */

  1487              /* synthesis INITVAL_15="0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10" */

  1488              /* synthesis INITVAL_14="0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70" */

  1489              /* synthesis INITVAL_13="0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7" */

  1490              /* synthesis INITVAL_12="0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418" */

  1491              /* synthesis INITVAL_11="0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84" */

  1492              /* synthesis INITVAL_10="0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4" */

  1493              /* synthesis INITVAL_0F="0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF" */

  1494              /* synthesis INITVAL_0E="0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF" */

  1495              /* synthesis INITVAL_0D="0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478" */

  1496              /* synthesis INITVAL_0C="0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7" */

  1497              /* synthesis INITVAL_0B="0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3" */

  1498              /* synthesis INITVAL_0A="0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7" */

  1499              /* synthesis INITVAL_09="0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5" */

  1500              /* synthesis INITVAL_08="0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1" */

  1501              /* synthesis INITVAL_07="0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808" */

  1502              /* synthesis INITVAL_06="0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE" */

  1503              /* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */

  1504              /* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */

  1505              /* synthesis INITVAL_03="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

  1506              /* synthesis INITVAL_02="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

  1507              /* synthesis INITVAL_01="0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600" */

  1508              /* synthesis INITVAL_00="0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600" */

  1509              /* synthesis CSDECODE_B="0b000" */

  1510              /* synthesis CSDECODE_A="0b000" */

  1511              /* synthesis WRITEMODE_B="NORMAL" */

  1512              /* synthesis WRITEMODE_A="NORMAL" */

  1513              /* synthesis GSR="DISABLED" */

  1514              /* synthesis RESETMODE="SYNC" */

  1515              /* synthesis REGMODE_B="NOREG" */

  1516              /* synthesis REGMODE_A="NOREG" */

  1517              /* synthesis DATA_WIDTH_B="18" */

  1518              /* synthesis DATA_WIDTH_A="18" */;

  1522     // exemplar begin

  1523     // exemplar attribute sc_rom_monitor_0_0_1 MEM_LPC_FILE sc_rom_monitor.lpc

  1524     // exemplar attribute sc_rom_monitor_0_0_1 MEM_INIT_FILE lm32_monitor.mem

  1525     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1526     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1527     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1528     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1529     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1530     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1531     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1532     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1533     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1534     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1535     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1536     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1537     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1538     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1539     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1540     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1541     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1542     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1543     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1544     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1545     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1546     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1547     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1548     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1549     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1550     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1551     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1552     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1553     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1554     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1555     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1556     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1557     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1558     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1559     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1560     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1561     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1562     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1563     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_19 0x0000000000000000000000000000000000000000000000000000000000000000000000000003FF81

  1564     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_18 0x300003FF83300003FF85300003FF873FF4A1004F3FF8A300003FF8C300003FF8E300003FF9030000

  1565     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_17 0x3FF92300003FF94300003FF96300003FFC100800070003FFFB0000130001100003FF5B1001700000

  1566     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_16 0x068003FF70058003FF723FFFB300013FF6A00001100001FFAB00000068003FF7B058003FF7D3FFB1

  1567     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_15 0x3FF8D008003FFB4300000FFB61001B000361001A0002F10019000381001800038100130003310012

  1568     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_14 0x00033100110003310010000331000900033100080003310007010003FF89058003FF9C3FFF900800

  1569     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_13 0x070000FFFB30800070003FFD63FFB200800000041000A0004110006010003FF9A000000002410004

  1570     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_12 0x200081000C0001030014200181001C00020300240000000000000001000000000000000000010000

  1571     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_11 0x100010FFF310063000501004D000471006D00046100720002C100570001F10077010003FFBC00000

  1572     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_10 0x30000044003FC0010000100540FFFF0080010000100540FFFF008000880010004200081000C00010

  1573     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0F 0x30014200181001C00020300240FFDC0000000008100043FFDD100083FFDF100093FFE11000A3FFE3

  1574     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0E 0x1000B10008100040FFF8000000000C1000410008100083FFE7100093FFE91000A3FFEB1000B3FFED

  1575     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0D 0x100040FFF400000200000FFFF01000000000000210054100000FFFF01000100FF00000100FF00000

  1576     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0C 0x0FFFE1010001000000000007430084200002009830000300943000030090300003008C2007C10078

  1577     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0B 0x300702006C1006800064300602005C1005800054300502004C1004800044300402003C1003800034

  1578     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0A 0x300302002C1002800024300202001C1001800014300102000C100080000000074200842000020098

  1579     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_09 0x20000200942000020090200002008C3008010078300702006C1006800064300602005C1005800054

  1580     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_08 0x300502004C1004800044300402003C1003800034300302002C1002800024300202001C1001800014

  1581     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_07 0x300102000C10008000001F9A00E000000041007810000100881000110001100011000110001100FF

  1582     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_06 0x1F9A0100940080010090008001008C008001009C008001009800800300802007C00074300702006C

  1583     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_05 0x1006800064300602005C1005800054300502004C1004800044300402003C1003800034300302002C

  1584     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_04 0x1002800024300202001C1001800014300102000C100080000000000106603FFC530000007F40E000

  1585     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_03 0x0003E000BC1000400800200840000A000000000000046000C4100040080020084000120000000000

  1586     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_02 0x0004E000CC1000400800200840001A000000000000056000D4100040080020084000220000000000

  1587     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_01 0x00086000DC1000400800300840002A000000000000066000E4100040080020084000320000000000

  1588     // exemplar attribute sc_rom_monitor_0_0_1 INITVAL_00 0x00096000EC1000400800300840003A000000000000000000000000000000000000003E0000000000

  1589     // exemplar attribute sc_rom_monitor_0_0_1 CSDECODE_B 0b000

  1590     // exemplar attribute sc_rom_monitor_0_0_1 CSDECODE_A 0b000

  1591     // exemplar attribute sc_rom_monitor_0_0_1 WRITEMODE_B NORMAL

  1592     // exemplar attribute sc_rom_monitor_0_0_1 WRITEMODE_A NORMAL

  1593     // exemplar attribute sc_rom_monitor_0_0_1 GSR DISABLED

  1594     // exemplar attribute sc_rom_monitor_0_0_1 RESETMODE SYNC

  1595     // exemplar attribute sc_rom_monitor_0_0_1 REGMODE_B NOREG

  1596     // exemplar attribute sc_rom_monitor_0_0_1 REGMODE_A NOREG

  1597     // exemplar attribute sc_rom_monitor_0_0_1 DATA_WIDTH_B 18

  1598     // exemplar attribute sc_rom_monitor_0_0_1 DATA_WIDTH_A 18

  1599     // exemplar attribute sc_rom_monitor_0_1_0 MEM_LPC_FILE sc_rom_monitor.lpc

  1600     // exemplar attribute sc_rom_monitor_0_1_0 MEM_INIT_FILE lm32_monitor.mem

  1601     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1602     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1603     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1604     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1605     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1606     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1607     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1608     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1609     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1610     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1611     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1612     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1613     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1614     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1615     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1616     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1617     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1618     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1619     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1620     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1621     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1622     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1623     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1624     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1625     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1626     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1627     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1628     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1629     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1630     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1631     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1632     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1633     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1634     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1635     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1636     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1637     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1638     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000

  1639     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_19 0x000000000000000000000000000000000000000000000000000000000000000000000000000038FF

  1640     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_18 0x034D2038FF034C2038FF0349A038FF03EFF00D00038FF034CA038FF03492038FF0348A038FF03482

  1641     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_17 0x038FF0344A038FF03442038FF0343A038FF02E7002430038FF00D6300D5A00C5803EFF0136300D03

  1642     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_16 0x02E0803EFF02E0803EFF038FF00D5A03EFF00D63010580136300D0302E0803EFF02E0803EFF038FF

  1643     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_15 0x03EFF02E88038FF034DA0170801F100110801F100110801F100110801F100110801F100110801F10

  1644     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_14 0x0110801F100110801F100110801F100110801F100110801F0802E0803EFF02E0803EFF038FF02E70

  1645     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_13 0x024500110C0287302430038FF03EFF02E700110801F100110801F0802E0803EFF030E800DE700AE7

  1646     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_12 0x00AE400AE400AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D0003418

  1647     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_11 0x00D000170801F100110801F100110801F100110801F100110801F100110801F0802E0803EFF00E84

  1648     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_10 0x00E7B01E0401E030347000D0001708024700347000D00017080247002E08016E7016E4016E4016E4

  1649     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0F 0x016E3016E3016E3016E3016E200DE7030E800DE700AE703EFF010E003EFF010E003EFF010E003EFF

  1650     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0E 0x010E0016E0016E700DE7030E800DE700AE700AE000CE003EFF00CE003EFF00CE003EFF00CE003EFF

  1651     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0D 0x016E700DE7030E8034700171002470030E80110801F0803470017100247000808030E80081003478

  1652     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0C 0x011080081002478030F800AE700AE70340F00AE70340700AE70344F00AE70343F00AE700AE700AE7

  1653     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0B 0x00AE600AE600AE600AE600AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE3

  1654     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0A 0x00AE200AE200AE200AE200AE100AE100AE100AE100AE000AE000AE0030F000AE700AE70340F00AE7

  1655     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_09 0x0340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE5

  1656     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_08 0x00AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE1

  1657     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_07 0x00AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E8000080000800008000080000800808

  1658     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_06 0x00DE8016E802400016E802448016E802438016E802410016E802408016EF016EF016EF016EE016EE

  1659     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA

  1660     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8

  1661     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_03 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1662     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_02 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1663     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_01 0x0380003E0000D0802EE0016E703E0002EE8026000380003E0000D0802EE0016E703E0002EE802600

  1664     // exemplar attribute sc_rom_monitor_0_1_0 INITVAL_00 0x0380003E0000D0802EE0016E703E0002EE80260000D0000D0000D0000D0000D0003E000340802600

  1665     // exemplar attribute sc_rom_monitor_0_1_0 CSDECODE_B 0b000

  1666     // exemplar attribute sc_rom_monitor_0_1_0 CSDECODE_A 0b000

  1667     // exemplar attribute sc_rom_monitor_0_1_0 WRITEMODE_B NORMAL

  1668     // exemplar attribute sc_rom_monitor_0_1_0 WRITEMODE_A NORMAL

  1669     // exemplar attribute sc_rom_monitor_0_1_0 GSR DISABLED

  1670     // exemplar attribute sc_rom_monitor_0_1_0 RESETMODE SYNC

  1671     // exemplar attribute sc_rom_monitor_0_1_0 REGMODE_B NOREG

  1672     // exemplar attribute sc_rom_monitor_0_1_0 REGMODE_A NOREG

  1673     // exemplar attribute sc_rom_monitor_0_1_0 DATA_WIDTH_B 18

  1674     // exemplar attribute sc_rom_monitor_0_1_0 DATA_WIDTH_A 18

  1675     // exemplar end

  1678       end

  1679    endgenerate

  1681 endmodule

IPCores/lm32_cpu / file revision

lm32_monitor_ram.v@a8e459b24c31

lm32_monitor_ram.v