1.1 --- a/src/memory.c Sun Dec 05 16:20:00 2010 +0000 1.2 +++ b/src/memory.c Mon Dec 06 01:26:37 2010 +0000 1.3 @@ -238,8 +238,13 @@ 1.4 case 0x050000: // Phone status 1.5 break; 1.6 case 0x060000: // DMA Count 1.7 + // U/OERR- is always inactive (bit set) 1.8 + data = (state.dma_count & 0x3fff) | 0x8000; 1.9 + handled = true; 1.10 break; 1.11 case 0x070000: // Line Printer Status Register 1.12 + data = 0x00120012; // no parity error, no line printer error, no irqs from FDD or HDD 1.13 + data |= (state.fdc_ctx.irql) ? 0x00080008 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.14 break; 1.15 case 0x080000: // Real Time Clock 1.16 break; 1.17 @@ -311,7 +316,7 @@ 1.18 break; 1.19 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.20 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.21 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.22 + printf("WD279X: rd32 %02X ==> %02X\n", (address >> 1) & 3, data); 1.23 handled = true; 1.24 break; 1.25 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.26 @@ -403,8 +408,13 @@ 1.27 case 0x050000: // Phone status 1.28 break; 1.29 case 0x060000: // DMA Count 1.30 + // U/OERR- is always inactive (bit set) 1.31 + data = (state.dma_count & 0x3fff) | 0x8000; 1.32 + handled = true; 1.33 break; 1.34 case 0x070000: // Line Printer Status Register 1.35 + data = 0x0012; // no parity error, no line printer error, no irqs from FDD or HDD 1.36 + data |= (state.fdc_ctx.irql) ? 0x0008 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.37 break; 1.38 case 0x080000: // Real Time Clock 1.39 break; 1.40 @@ -476,7 +486,7 @@ 1.41 break; 1.42 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.43 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.44 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.45 + printf("WD279X: rd16 %02X ==> %02X\n", (address >> 1) & 3, data); 1.46 handled = true; 1.47 break; 1.48 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.49 @@ -577,8 +587,16 @@ 1.50 case 0x050000: // Phone status 1.51 break; 1.52 case 0x060000: // DMA Count 1.53 + // TODO: how to handle this in 8bit mode? 1.54 break; 1.55 case 0x070000: // Line Printer Status Register 1.56 + printf("\tLPSR RD8 fdc irql=%d, irqe=%d\n", state.fdc_ctx.irql, state.fdc_ctx.irqe); 1.57 + if (address & 1) { 1.58 + data = 0x12; // no parity error, no line printer error, no irqs from FDD or HDD 1.59 + data |= (state.fdc_ctx.irql) ? 0x08 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.60 + } else { 1.61 + data = 0; 1.62 + } 1.63 break; 1.64 case 0x080000: // Real Time Clock 1.65 break; 1.66 @@ -650,7 +668,7 @@ 1.67 break; 1.68 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.69 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.70 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.71 + printf("WD279X: rd8 %02X ==> %02X\n", (address >> 1) & 3, data); 1.72 handled = true; 1.73 break; 1.74 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.75 @@ -736,6 +754,13 @@ 1.76 case 0x050000: // Phone status 1.77 break; 1.78 case 0x060000: // DMA Count 1.79 + printf("WR32 dmacount %08X\n", value); 1.80 + state.dma_count = (value & 0x3FFF); 1.81 + state.idmarw = ((value & 0x4000) == 0x4000); 1.82 + state.dmaen = ((value & 0x8000) == 0x8000); 1.83 + state.dmaenb = state.dmaen; 1.84 + printf("\tcount %04X, idmarw %d, dmaen %d\n", state.dma_count, state.idmarw, state.dmaen); 1.85 + handled = true; 1.86 break; 1.87 case 0x070000: // Line Printer Status Register 1.88 break; 1.89 @@ -797,6 +822,8 @@ 1.90 // A14 low -- set least significant bits 1.91 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.92 } 1.93 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.94 + handled = true; 1.95 break; 1.96 case 0x0E0000: // Disk Control Register 1.97 // B7 = FDD controller reset 1.98 @@ -806,6 +833,7 @@ 1.99 // B4 = HDD controller reset -- TODO 1.100 // B3 = HDD0 select -- TODO 1.101 // B2,1,0 = HDD0 head select 1.102 + handled = true; 1.103 break; 1.104 case 0x0F0000: // Line Printer Data Register 1.105 break; 1.106 @@ -835,9 +863,9 @@ 1.107 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.108 break; 1.109 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.110 + printf("WD279X: wr32 %02X ==> %02X\n", (address >> 1) & 3, value); 1.111 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.112 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.113 - //handled = true; 1.114 + handled = true; 1.115 break; 1.116 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.117 break; 1.118 @@ -929,6 +957,13 @@ 1.119 case 0x050000: // Phone status 1.120 break; 1.121 case 0x060000: // DMA Count 1.122 + printf("WR16 dmacount %08X\n", value); 1.123 + state.dma_count = (value & 0x3FFF); 1.124 + state.idmarw = ((value & 0x4000) == 0x4000); 1.125 + state.dmaen = ((value & 0x8000) == 0x8000); 1.126 + state.dmaenb = state.dmaen; 1.127 + printf("\tcount %04X, idmarw %d, dmaen %d\n", state.dma_count, state.idmarw, state.dmaen); 1.128 + handled = true; 1.129 break; 1.130 case 0x070000: // Line Printer Status Register 1.131 break; 1.132 @@ -990,6 +1025,8 @@ 1.133 // A14 low -- set least significant bits 1.134 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.135 } 1.136 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.137 + handled = true; 1.138 break; 1.139 case 0x0E0000: // Disk Control Register 1.140 // B7 = FDD controller reset 1.141 @@ -999,6 +1036,7 @@ 1.142 // B4 = HDD controller reset -- TODO 1.143 // B3 = HDD0 select -- TODO 1.144 // B2,1,0 = HDD0 head select 1.145 + handled = true; 1.146 break; 1.147 case 0x0F0000: // Line Printer Data Register 1.148 break; 1.149 @@ -1027,9 +1065,9 @@ 1.150 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.151 break; 1.152 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.153 + printf("WD279X: wr16 %02X ==> %02X\n", (address >> 1) & 3, value); 1.154 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.155 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.156 - //handled = true; 1.157 + handled = true; 1.158 break; 1.159 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.160 break; 1.161 @@ -1121,6 +1159,7 @@ 1.162 case 0x050000: // Phone status 1.163 break; 1.164 case 0x060000: // DMA Count 1.165 + // TODO: how to handle this in 8bit mode? 1.166 break; 1.167 case 0x070000: // Line Printer Status Register 1.168 break; 1.169 @@ -1155,6 +1194,8 @@ 1.170 } 1.171 break; 1.172 case 0x0A0000: // Miscellaneous Control Register 1.173 + // TODO: how to handle this in 8bit mode? 1.174 +/* 1.175 // TODO: handle the ctrl bits properly 1.176 if ((address & 1) == 0) { 1.177 // low byte 1.178 @@ -1170,6 +1211,7 @@ 1.179 (state.leds & 2) ? "Y" : "-", 1.180 (state.leds & 1) ? "R" : "-"); 1.181 handled = true; 1.182 +*/ 1.183 break; 1.184 case 0x0B0000: // TM/DIALWR 1.185 break; 1.186 @@ -1187,6 +1229,8 @@ 1.187 // A14 low -- set least significant bits 1.188 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.189 } 1.190 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.191 + handled = true; 1.192 break; 1.193 case 0x0E0000: // Disk Control Register 1.194 // B7 = FDD controller reset 1.195 @@ -1196,6 +1240,7 @@ 1.196 // B4 = HDD controller reset -- TODO 1.197 // B3 = HDD0 select -- TODO 1.198 // B2,1,0 = HDD0 head select 1.199 + handled = true; 1.200 break; 1.201 case 0x0F0000: // Line Printer Data Register 1.202 break; 1.203 @@ -1224,9 +1269,9 @@ 1.204 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.205 break; 1.206 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.207 + printf("WD279X: wr8 %02X ==> %02X\n", (address >> 1) & 3, value); 1.208 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.209 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.210 - //handled = true; 1.211 + handled = true; 1.212 break; 1.213 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.214 break;