1.1 diff -r a350dfa92895 -r e1693c4b8a0c src/memory.c 1.2 --- a/src/memory.c Sun Dec 05 16:20:00 2010 +0000 1.3 +++ b/src/memory.c Mon Dec 06 01:26:37 2010 +0000 1.4 @@ -238,8 +238,13 @@ 1.5 case 0x050000: // Phone status 1.6 break; 1.7 case 0x060000: // DMA Count 1.8 + // U/OERR- is always inactive (bit set) 1.9 + data = (state.dma_count & 0x3fff) | 0x8000; 1.10 + handled = true; 1.11 break; 1.12 case 0x070000: // Line Printer Status Register 1.13 + data = 0x00120012; // no parity error, no line printer error, no irqs from FDD or HDD 1.14 + data |= (state.fdc_ctx.irql) ? 0x00080008 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.15 break; 1.16 case 0x080000: // Real Time Clock 1.17 break; 1.18 @@ -311,7 +316,7 @@ 1.19 break; 1.20 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.21 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.22 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.23 + printf("WD279X: rd32 %02X ==> %02X\n", (address >> 1) & 3, data); 1.24 handled = true; 1.25 break; 1.26 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.27 @@ -403,8 +408,13 @@ 1.28 case 0x050000: // Phone status 1.29 break; 1.30 case 0x060000: // DMA Count 1.31 + // U/OERR- is always inactive (bit set) 1.32 + data = (state.dma_count & 0x3fff) | 0x8000; 1.33 + handled = true; 1.34 break; 1.35 case 0x070000: // Line Printer Status Register 1.36 + data = 0x0012; // no parity error, no line printer error, no irqs from FDD or HDD 1.37 + data |= (state.fdc_ctx.irql) ? 0x0008 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.38 break; 1.39 case 0x080000: // Real Time Clock 1.40 break; 1.41 @@ -476,7 +486,7 @@ 1.42 break; 1.43 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.44 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.45 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.46 + printf("WD279X: rd16 %02X ==> %02X\n", (address >> 1) & 3, data); 1.47 handled = true; 1.48 break; 1.49 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.50 @@ -577,8 +587,16 @@ 1.51 case 0x050000: // Phone status 1.52 break; 1.53 case 0x060000: // DMA Count 1.54 + // TODO: how to handle this in 8bit mode? 1.55 break; 1.56 case 0x070000: // Line Printer Status Register 1.57 + printf("\tLPSR RD8 fdc irql=%d, irqe=%d\n", state.fdc_ctx.irql, state.fdc_ctx.irqe); 1.58 + if (address & 1) { 1.59 + data = 0x12; // no parity error, no line printer error, no irqs from FDD or HDD 1.60 + data |= (state.fdc_ctx.irql) ? 0x08 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.61 + } else { 1.62 + data = 0; 1.63 + } 1.64 break; 1.65 case 0x080000: // Real Time Clock 1.66 break; 1.67 @@ -650,7 +668,7 @@ 1.68 break; 1.69 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.70 data = wd2797_read_reg(&state.fdc_ctx, (address >> 1) & 3); 1.71 - printf("WD279X: rd %02X ==> %02X\n", (address >> 1) & 3, data); 1.72 + printf("WD279X: rd8 %02X ==> %02X\n", (address >> 1) & 3, data); 1.73 handled = true; 1.74 break; 1.75 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.76 @@ -736,6 +754,13 @@ 1.77 case 0x050000: // Phone status 1.78 break; 1.79 case 0x060000: // DMA Count 1.80 + printf("WR32 dmacount %08X\n", value); 1.81 + state.dma_count = (value & 0x3FFF); 1.82 + state.idmarw = ((value & 0x4000) == 0x4000); 1.83 + state.dmaen = ((value & 0x8000) == 0x8000); 1.84 + state.dmaenb = state.dmaen; 1.85 + printf("\tcount %04X, idmarw %d, dmaen %d\n", state.dma_count, state.idmarw, state.dmaen); 1.86 + handled = true; 1.87 break; 1.88 case 0x070000: // Line Printer Status Register 1.89 break; 1.90 @@ -797,6 +822,8 @@ 1.91 // A14 low -- set least significant bits 1.92 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.93 } 1.94 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.95 + handled = true; 1.96 break; 1.97 case 0x0E0000: // Disk Control Register 1.98 // B7 = FDD controller reset 1.99 @@ -806,6 +833,7 @@ 1.100 // B4 = HDD controller reset -- TODO 1.101 // B3 = HDD0 select -- TODO 1.102 // B2,1,0 = HDD0 head select 1.103 + handled = true; 1.104 break; 1.105 case 0x0F0000: // Line Printer Data Register 1.106 break; 1.107 @@ -835,9 +863,9 @@ 1.108 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.109 break; 1.110 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.111 + printf("WD279X: wr32 %02X ==> %02X\n", (address >> 1) & 3, value); 1.112 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.113 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.114 - //handled = true; 1.115 + handled = true; 1.116 break; 1.117 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.118 break; 1.119 @@ -929,6 +957,13 @@ 1.120 case 0x050000: // Phone status 1.121 break; 1.122 case 0x060000: // DMA Count 1.123 + printf("WR16 dmacount %08X\n", value); 1.124 + state.dma_count = (value & 0x3FFF); 1.125 + state.idmarw = ((value & 0x4000) == 0x4000); 1.126 + state.dmaen = ((value & 0x8000) == 0x8000); 1.127 + state.dmaenb = state.dmaen; 1.128 + printf("\tcount %04X, idmarw %d, dmaen %d\n", state.dma_count, state.idmarw, state.dmaen); 1.129 + handled = true; 1.130 break; 1.131 case 0x070000: // Line Printer Status Register 1.132 break; 1.133 @@ -990,6 +1025,8 @@ 1.134 // A14 low -- set least significant bits 1.135 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.136 } 1.137 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.138 + handled = true; 1.139 break; 1.140 case 0x0E0000: // Disk Control Register 1.141 // B7 = FDD controller reset 1.142 @@ -999,6 +1036,7 @@ 1.143 // B4 = HDD controller reset -- TODO 1.144 // B3 = HDD0 select -- TODO 1.145 // B2,1,0 = HDD0 head select 1.146 + handled = true; 1.147 break; 1.148 case 0x0F0000: // Line Printer Data Register 1.149 break; 1.150 @@ -1027,9 +1065,9 @@ 1.151 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.152 break; 1.153 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.154 + printf("WD279X: wr16 %02X ==> %02X\n", (address >> 1) & 3, value); 1.155 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.156 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.157 - //handled = true; 1.158 + handled = true; 1.159 break; 1.160 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.161 break; 1.162 @@ -1121,6 +1159,7 @@ 1.163 case 0x050000: // Phone status 1.164 break; 1.165 case 0x060000: // DMA Count 1.166 + // TODO: how to handle this in 8bit mode? 1.167 break; 1.168 case 0x070000: // Line Printer Status Register 1.169 break; 1.170 @@ -1155,6 +1194,8 @@ 1.171 } 1.172 break; 1.173 case 0x0A0000: // Miscellaneous Control Register 1.174 + // TODO: how to handle this in 8bit mode? 1.175 +/* 1.176 // TODO: handle the ctrl bits properly 1.177 if ((address & 1) == 0) { 1.178 // low byte 1.179 @@ -1170,6 +1211,7 @@ 1.180 (state.leds & 2) ? "Y" : "-", 1.181 (state.leds & 1) ? "R" : "-"); 1.182 handled = true; 1.183 +*/ 1.184 break; 1.185 case 0x0B0000: // TM/DIALWR 1.186 break; 1.187 @@ -1187,6 +1229,8 @@ 1.188 // A14 low -- set least significant bits 1.189 state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.190 } 1.191 + printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.192 + handled = true; 1.193 break; 1.194 case 0x0E0000: // Disk Control Register 1.195 // B7 = FDD controller reset 1.196 @@ -1196,6 +1240,7 @@ 1.197 // B4 = HDD controller reset -- TODO 1.198 // B3 = HDD0 select -- TODO 1.199 // B2,1,0 = HDD0 head select 1.200 + handled = true; 1.201 break; 1.202 case 0x0F0000: // Line Printer Data Register 1.203 break; 1.204 @@ -1224,9 +1269,9 @@ 1.205 case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.206 break; 1.207 case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.208 + printf("WD279X: wr8 %02X ==> %02X\n", (address >> 1) & 3, value); 1.209 wd2797_write_reg(&state.fdc_ctx, (address >> 1) & 3, value); 1.210 - printf("WD279X: wr %02X ==> %02X\n\t", (address >> 1) & 3, value); 1.211 - //handled = true; 1.212 + handled = true; 1.213 break; 1.214 case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.215 break;