Tue, 15 Nov 2011 10:12:37 +0000
[musashi] Fix handling of bus errors
Patch-Author: Andrew Warkentin <andreww591!gmail>
Patch-MessageID: <4EC200CE.2020304@gmail.com>
I have fixed the first page fault test failure in FreeBee (the page fault test now hangs rather than errors out, because it is trying to read from the hard drive to test DMA page faults).
There were actually two bugs (the first bug was masking the second one).
First, the ancient version of Musashi that you used is unable to properly resume from bus errors that happen in the middle of certain instructions (some instructions are fetched in stages, with the PC being advanced to each part of the instruction, so basically what happens is the CPU core attempts to read the memory location referenced by the first operand, the bus error occurs, causing the PC to jump to the exception vector, but the faulting instruction is still in the middle of being fetched, so the PC is then advanced past the beginning of the exception handler). I fixed this by delaying the jump to the bus error vector until after the faulting instruction finishes.
The second bug is simpler - you had the UDS and LDS bits in BSR0 inverted (they are supposed to be active low).
philpem@48 | 1 | #ifndef _WD279X_H |
philpem@48 | 2 | #define _WD279X_H |
philpem@48 | 3 | |
philpem@48 | 4 | #include <stdbool.h> |
philpem@48 | 5 | #include <stddef.h> |
philpem@48 | 6 | #include <stdint.h> |
philpem@48 | 7 | #include <stdio.h> |
philpem@48 | 8 | |
philpem@49 | 9 | /// WD279x registers |
philpem@49 | 10 | typedef enum { |
philpem@49 | 11 | WD2797_REG_STATUS = 0, ///< Status register |
philpem@49 | 12 | WD2797_REG_COMMAND = 0, ///< Command register |
philpem@49 | 13 | WD2797_REG_TRACK = 1, ///< Track register |
philpem@49 | 14 | WD2797_REG_SECTOR = 2, ///< Sector register |
philpem@49 | 15 | WD2797_REG_DATA = 3 ///< Data register |
philpem@49 | 16 | } WD2797_REG; |
philpem@49 | 17 | |
philpem@49 | 18 | /// WD279x emulator error codes |
philpem@49 | 19 | typedef enum { |
philpem@49 | 20 | WD2797_ERR_OK = 0, ///< Operation succeeded |
philpem@49 | 21 | WD2797_ERR_BAD_GEOM = -1, ///< Bad geometry, or image file too small |
philpem@49 | 22 | WD2797_ERR_NO_MEMORY = -2 ///< Out of memory |
philpem@49 | 23 | } WD2797_ERR; |
philpem@48 | 24 | |
philpem@48 | 25 | typedef struct { |
philpem@48 | 26 | // Current track, head and sector |
philpem@48 | 27 | int track, head, sector; |
philpem@48 | 28 | // Geometry of current disc |
philpem@48 | 29 | int geom_secsz, geom_spt, geom_heads, geom_tracks; |
philpem@79 | 30 | // IRQ status |
philpem@79 | 31 | bool irq; |
philpem@48 | 32 | // Status of last command |
philpem@48 | 33 | uint8_t status; |
philpem@48 | 34 | // Last command uses DRQ bit? |
philpem@48 | 35 | bool cmd_has_drq; |
philpem@48 | 36 | // The last value written to the data register |
philpem@48 | 37 | uint8_t data_reg; |
philpem@48 | 38 | // Last step direction. -1 for "towards zero", 1 for "away from zero" |
philpem@48 | 39 | int last_step_dir; |
philpem@48 | 40 | // Data buffer, current DRQ pointer and length |
philpem@49 | 41 | uint8_t *data; |
philpem@48 | 42 | size_t data_pos, data_len; |
philpem@48 | 43 | // Current disc image file |
philpem@48 | 44 | FILE *disc_image; |
philpem@49 | 45 | } WD2797_CTX; |
philpem@49 | 46 | |
philpem@49 | 47 | /** |
philpem@49 | 48 | * @brief Initialise a WD2797 context. |
philpem@49 | 49 | * @param ctx WD2797 context. |
philpem@49 | 50 | * |
philpem@49 | 51 | * This must be run once when the context is created. |
philpem@49 | 52 | */ |
philpem@49 | 53 | void wd2797_init(WD2797_CTX *ctx); |
philpem@49 | 54 | |
philpem@49 | 55 | /** |
philpem@49 | 56 | * @brief Reset a WD2797 context. |
philpem@49 | 57 | * @param ctx WD2797 context. |
philpem@49 | 58 | * |
philpem@49 | 59 | * This should be run if the WD2797 needs to be reset (nRST line toggled). |
philpem@49 | 60 | */ |
philpem@49 | 61 | void wd2797_reset(WD2797_CTX *ctx); |
philpem@49 | 62 | |
philpem@49 | 63 | /** |
philpem@49 | 64 | * Deinitialise a WD2797 context. |
philpem@49 | 65 | * @param ctx WD2797 context. |
philpem@49 | 66 | */ |
philpem@49 | 67 | void wd2797_done(WD2797_CTX *ctx); |
philpem@49 | 68 | |
philpem@49 | 69 | /** |
philpem@49 | 70 | * @brief Read IRQ Rising Edge status. Clears Rising Edge status if it is set. |
philpem@49 | 71 | * @note No more IRQs will be sent until the Status Register is read, or a new command is written to the CR. |
philpem@49 | 72 | * @param ctx WD2797 context. |
philpem@49 | 73 | */ |
philpem@49 | 74 | bool wd2797_get_irq(WD2797_CTX *ctx); |
philpem@49 | 75 | |
philpem@49 | 76 | /** |
philpem@49 | 77 | * @brief Read DRQ status. |
philpem@49 | 78 | * @param ctx WD2797 context. |
philpem@49 | 79 | */ |
philpem@49 | 80 | bool wd2797_get_drq(WD2797_CTX *ctx); |
philpem@49 | 81 | |
philpem@49 | 82 | /** |
philpem@49 | 83 | * @brief Assign a disc image to the WD2797. |
philpem@49 | 84 | * @param ctx WD2797 context. |
philpem@49 | 85 | * @param fp Disc image file, already opened in "r+b" mode. |
philpem@49 | 86 | * @param secsz Sector size: either 128, 256, 512 or 1024. |
philpem@49 | 87 | * @param spt Sectors per track. |
philpem@49 | 88 | * @param heads Number of heads (1 or 2). |
philpem@49 | 89 | * @return Error code; WD279X_E_OK if everything worked OK. |
philpem@49 | 90 | */ |
philpem@49 | 91 | WD2797_ERR wd2797_load(WD2797_CTX *ctx, FILE *fp, int secsz, int spt, int heads); |
philpem@49 | 92 | |
philpem@49 | 93 | /** |
philpem@49 | 94 | * @brief Deassign the current image file. |
philpem@49 | 95 | * @param ctx WD2797 context. |
philpem@49 | 96 | */ |
philpem@49 | 97 | void wd2797_unload(WD2797_CTX *ctx); |
philpem@49 | 98 | |
philpem@49 | 99 | /** |
philpem@49 | 100 | * @brief Read WD279x register. |
philpem@49 | 101 | * @param ctx WD2797 context |
philpem@49 | 102 | * @param addr Register address (0, 1, 2 or 3) |
philpem@49 | 103 | */ |
philpem@49 | 104 | uint8_t wd2797_read_reg(WD2797_CTX *ctx, uint8_t addr); |
philpem@49 | 105 | |
philpem@49 | 106 | /** |
philpem@49 | 107 | * @brief Write WD279X register |
philpem@49 | 108 | * @param ctx WD2797 context |
philpem@49 | 109 | * @param addr Register address (0, 1, 2 or 3) |
philpem@49 | 110 | * @param val Value to write |
philpem@49 | 111 | */ |
philpem@49 | 112 | void wd2797_write_reg(WD2797_CTX *ctx, uint8_t addr, uint8_t val); |
philpem@49 | 113 | |
philpem@48 | 114 | |
philpem@48 | 115 | #endif |