1.1 diff -r 4c03f6433d0d -r 3246b74d96bc src/main.c 1.2 --- a/src/main.c Wed Jan 16 00:41:51 2013 +0000 1.3 +++ b/src/main.c Fri Jan 18 17:03:48 2013 +0000 1.4 @@ -291,49 +291,50 @@ 1.5 }else{ 1.6 printf("ERROR: DMA attempt with no drive selected!\n"); 1.7 } 1.8 - if (!access_check_dma(state.dma_reading)) { 1.9 - break; 1.10 - } 1.11 - uint32_t newAddr; 1.12 - // Map logical address to a physical RAM address 1.13 - newAddr = mapAddr(state.dma_address, !state.dma_reading); 1.14 + 1.15 + if (access_check_dma()) { 1.16 + 1.17 + uint32_t newAddr; 1.18 + // Map logical address to a physical RAM address 1.19 + newAddr = MAP_ADDR(state.dma_address); 1.20 1.21 - if (!state.dma_reading) { 1.22 - // Data available. Get it from the FDC or HDC. 1.23 - if (state.fd_selected) { 1.24 - d = wd2797_read_reg(&state.fdc_ctx, WD2797_REG_DATA); 1.25 - d <<= 8; 1.26 - d += wd2797_read_reg(&state.fdc_ctx, WD2797_REG_DATA); 1.27 - }else if (state.hd_selected) { 1.28 - d = wd2010_read_data(&state.hdc_ctx); 1.29 - d <<= 8; 1.30 - d += wd2010_read_data(&state.hdc_ctx); 1.31 - } 1.32 - if (newAddr <= 0x1FFFFF) { 1.33 - WR16(state.base_ram, newAddr, state.base_ram_size - 1, d); 1.34 - } else if (newAddr >= 0x200000) { 1.35 - WR16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1, d); 1.36 - } 1.37 - } else { 1.38 - // Data write to FDC or HDC. 1.39 + if (!state.dma_reading) { 1.40 + // Data available. Get it from the FDC or HDC. 1.41 + if (state.fd_selected) { 1.42 + d = wd2797_read_reg(&state.fdc_ctx, WD2797_REG_DATA); 1.43 + d <<= 8; 1.44 + d += wd2797_read_reg(&state.fdc_ctx, WD2797_REG_DATA); 1.45 + }else if (state.hd_selected) { 1.46 + d = wd2010_read_data(&state.hdc_ctx); 1.47 + d <<= 8; 1.48 + d += wd2010_read_data(&state.hdc_ctx); 1.49 + } 1.50 + if (newAddr <= 0x1FFFFF) { 1.51 + WR16(state.base_ram, newAddr, state.base_ram_size - 1, d); 1.52 + } else if (newAddr >= 0x200000) { 1.53 + WR16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1, d); 1.54 + } 1.55 + } else { 1.56 + // Data write to FDC or HDC. 1.57 1.58 - // Get the data from RAM 1.59 - if (newAddr <= 0x1fffff) { 1.60 - d = RD16(state.base_ram, newAddr, state.base_ram_size - 1); 1.61 - } else { 1.62 - if (newAddr <= (state.exp_ram_size + 0x200000 - 1)) 1.63 - d = RD16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1); 1.64 - else 1.65 - d = 0xffff; 1.66 - } 1.67 + // Get the data from RAM 1.68 + if (newAddr <= 0x1fffff) { 1.69 + d = RD16(state.base_ram, newAddr, state.base_ram_size - 1); 1.70 + } else { 1.71 + if (newAddr <= (state.exp_ram_size + 0x200000 - 1)) 1.72 + d = RD16(state.exp_ram, newAddr - 0x200000, state.exp_ram_size - 1); 1.73 + else 1.74 + d = 0xffff; 1.75 + } 1.76 1.77 - // Send the data to the FDD or HDD 1.78 - if (state.fd_selected){ 1.79 - wd2797_write_reg(&state.fdc_ctx, WD2797_REG_DATA, (d >> 8)); 1.80 - wd2797_write_reg(&state.fdc_ctx, WD2797_REG_DATA, (d & 0xff)); 1.81 - }else if (state.hd_selected){ 1.82 - wd2010_write_data(&state.hdc_ctx, (d >> 8)); 1.83 - wd2010_write_data(&state.hdc_ctx, (d & 0xff)); 1.84 + // Send the data to the FDD or HDD 1.85 + if (state.fd_selected){ 1.86 + wd2797_write_reg(&state.fdc_ctx, WD2797_REG_DATA, (d >> 8)); 1.87 + wd2797_write_reg(&state.fdc_ctx, WD2797_REG_DATA, (d & 0xff)); 1.88 + }else if (state.hd_selected){ 1.89 + wd2010_write_data(&state.hdc_ctx, (d >> 8)); 1.90 + wd2010_write_data(&state.hdc_ctx, (d & 0xff)); 1.91 + } 1.92 } 1.93 } 1.94