1.1 diff -r 96f3df0b3cbb -r 8b9bb78a2794 src/memory.c 1.2 --- a/src/memory.c Tue Dec 28 17:23:04 2010 +0000 1.3 +++ b/src/memory.c Tue Dec 28 17:25:46 2010 +0000 1.4 @@ -561,10 +561,10 @@ 1.5 } else if (address <= 0x3fffff) { 1.6 // RAM access 1.7 uint32_t newAddr = mapAddr(address, false); 1.8 -// if (newAddr < state.base_ram_size) 1.9 + if (newAddr <= 0x1fffff) 1.10 return RD32(state.base_ram, newAddr, state.base_ram_size - 1); 1.11 -// else 1.12 -// return 0xFFFFFFFF; 1.13 + else 1.14 + return 0xFFFFFFFF; 1.15 // TODO: expansion RAM 1.16 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.17 // I/O register space, zone A 1.18 @@ -607,10 +607,10 @@ 1.19 } else if (address <= 0x3fffff) { 1.20 // RAM access 1.21 uint32_t newAddr = mapAddr(address, false); 1.22 -// if (newAddr < state.base_ram_size) 1.23 + if (newAddr <= 0x1fffff) 1.24 return RD16(state.base_ram, newAddr, state.base_ram_size - 1); 1.25 -// else 1.26 -// return 0xFFFFFFFF; 1.27 + else 1.28 + return 0xFFFF; 1.29 // TODO: expansion RAM 1.30 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.31 // I/O register space, zone A 1.32 @@ -653,10 +653,10 @@ 1.33 } else if (address <= 0x3fffff) { 1.34 // RAM access 1.35 uint32_t newAddr = mapAddr(address, false); 1.36 -// if (newAddr < state.base_ram_size) 1.37 + if (newAddr <= 0x1fffff) 1.38 return RD8(state.base_ram, newAddr, state.base_ram_size - 1); 1.39 -// else 1.40 -// return 0xFFFFFFFF; 1.41 + else 1.42 + return 0xFFFFFFFF; 1.43 // TODO: expansion RAM 1.44 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.45 // I/O register space, zone A 1.46 @@ -696,8 +696,9 @@ 1.47 } else if (address <= 0x3FFFFF) { 1.48 // RAM access 1.49 uint32_t newAddr = mapAddr(address, true); 1.50 - if (newAddr <= 0x1fffff) //(state.base_ram_size - 1)) 1.51 + if (newAddr <= 0x1fffff) 1.52 WR32(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.53 + // TODO: expansion ram 1.54 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.55 // I/O register space, zone A 1.56 switch (address & 0x0F0000) { 1.57 @@ -734,8 +735,9 @@ 1.58 } else if (address <= 0x3FFFFF) { 1.59 // RAM access 1.60 uint32_t newAddr = mapAddr(address, true); 1.61 - if (newAddr <= 0x1fffff) //(state.base_ram_size - 1)) 1.62 + if (newAddr <= 0x1fffff) 1.63 WR16(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.64 + // TODO: expansion ram 1.65 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.66 // I/O register space, zone A 1.67 switch (address & 0x0F0000) { 1.68 @@ -772,8 +774,9 @@ 1.69 } else if (address <= 0x3FFFFF) { 1.70 // RAM access 1.71 uint32_t newAddr = mapAddr(address, true); 1.72 - if (newAddr <= 0x1fffff) //(state.base_ram_size - 1)) 1.73 + if (newAddr <= 0x1fffff) 1.74 WR8(state.base_ram, newAddr, state.base_ram_size - 1, value); 1.75 + // TODO: expansion ram 1.76 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.77 // I/O register space, zone A 1.78 switch (address & 0x0F0000) {