1.1 diff -r 87662afa1d98 -r b948045ca964 src/main.c 1.2 --- a/src/main.c Thu Dec 02 20:58:12 2010 +0000 1.3 +++ b/src/main.c Thu Dec 02 22:27:43 2010 +0000 1.4 @@ -233,6 +233,18 @@ 1.5 } \ 1.6 } while (false) 1.7 1.8 +// Logging macros 1.9 +#define LOG_NOT_HANDLED_R(bits) \ 1.10 + do { \ 1.11 + if (!handled) \ 1.12 + printf("unhandled read%02d, addr=0x%08X\n", bits, address); \ 1.13 + } while (0); 1.14 + 1.15 +#define LOG_NOT_HANDLED_W(bits) \ 1.16 + do { \ 1.17 + if (!handled) \ 1.18 + printf("unhandled write%02d, addr=0x%08X, data=0x%08X\n", bits, address, value); \ 1.19 + } while (0); 1.20 1.21 /** 1.22 * @brief Read M68K memory, 32-bit 1.23 @@ -240,6 +252,7 @@ 1.24 uint32_t m68k_read_memory_32(uint32_t address) 1.25 { 1.26 uint32_t data = 0xFFFFFFFF; 1.27 + bool handled = false; 1.28 1.29 // If ROMLMAP is set, force system to access ROM 1.30 if (!state.romlmap) 1.31 @@ -251,9 +264,11 @@ 1.32 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.33 // ROM access 1.34 data = RD32(state.rom, address, ROM_SIZE - 1); 1.35 + handled = true; 1.36 } else if (address <= (state.ram_size - 1)) { 1.37 // RAM access 1.38 data = RD32(state.ram, mapAddr(address, false), state.ram_size - 1); 1.39 + handled = true; 1.40 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.41 // I/O register space, zone A 1.42 // printf("RD32 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.43 @@ -261,17 +276,24 @@ 1.44 case 0x000000: // Map RAM access 1.45 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD32 from MapRAM mirror, addr=0x%08X\n", address); 1.46 data = RD32(state.map, address, 0x7FF); 1.47 + handled = true; 1.48 break; 1.49 case 0x010000: // General Status Register 1.50 data = ((uint32_t)state.genstat << 16) + (uint32_t)state.genstat; 1.51 + handled = true; 1.52 break; 1.53 case 0x020000: // Video RAM 1.54 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD32 from VideoRAM mirror, addr=0x%08X\n", address); 1.55 data = RD32(state.vram, address, 0x7FFF); 1.56 + handled = true; 1.57 break; 1.58 case 0x030000: // Bus Status Register 0 1.59 + data = ((uint32_t)state.bsr0 << 16) + (uint32_t)state.bsr0; 1.60 + handled = true; 1.61 break; 1.62 case 0x040000: // Bus Status Register 1 1.63 + data = ((uint32_t)state.bsr1 << 16) + (uint32_t)state.bsr1; 1.64 + handled = true; 1.65 break; 1.66 case 0x050000: // Phone status 1.67 break; 1.68 @@ -324,7 +346,6 @@ 1.69 } 1.70 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.71 // I/O register space, zone B 1.72 -// printf("RD32 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.73 switch (address & 0xF00000) { 1.74 case 0xC00000: // Expansion slots 1.75 case 0xD00000: 1.76 @@ -371,7 +392,9 @@ 1.77 case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.78 break; 1.79 } 1.80 + break; 1.81 case 0x050000: // [ef][5d]xxxx ==> 8274 1.82 + break; 1.83 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.84 switch (address & 0x07F000) { 1.85 default: 1.86 @@ -379,11 +402,12 @@ 1.87 } 1.88 break; 1.89 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.90 - default: 1.91 - fprintf(stderr, "NOTE: RD32 from undefined E/F-block address 0x%08X", address); 1.92 + break; 1.93 } 1.94 } 1.95 } 1.96 + 1.97 + LOG_NOT_HANDLED_R(32); 1.98 return data; 1.99 } 1.100 1.101 @@ -393,6 +417,7 @@ 1.102 uint32_t m68k_read_memory_16(uint32_t address) 1.103 { 1.104 uint16_t data = 0xFFFF; 1.105 + bool handled = false; 1.106 1.107 // If ROMLMAP is set, force system to access ROM 1.108 if (!state.romlmap) 1.109 @@ -404,27 +429,35 @@ 1.110 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.111 // ROM access 1.112 data = RD16(state.rom, address, ROM_SIZE - 1); 1.113 + handled = true; 1.114 } else if (address <= (state.ram_size - 1)) { 1.115 // RAM access 1.116 data = RD16(state.ram, mapAddr(address, false), state.ram_size - 1); 1.117 + handled = true; 1.118 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.119 // I/O register space, zone A 1.120 -// printf("RD16 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.121 switch (address & 0x0F0000) { 1.122 case 0x000000: // Map RAM access 1.123 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD16 from MapRAM mirror, addr=0x%08X\n", address); 1.124 data = RD16(state.map, address, 0x7FF); 1.125 + handled = true; 1.126 break; 1.127 case 0x010000: // General Status Register 1.128 data = state.genstat; 1.129 + handled = true; 1.130 break; 1.131 case 0x020000: // Video RAM 1.132 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD16 from VideoRAM mirror, addr=0x%08X\n", address); 1.133 data = RD16(state.vram, address, 0x7FFF); 1.134 + handled = true; 1.135 break; 1.136 case 0x030000: // Bus Status Register 0 1.137 + data = state.bsr0; 1.138 + handled = true; 1.139 break; 1.140 case 0x040000: // Bus Status Register 1 1.141 + data = state.bsr1; 1.142 + handled = true; 1.143 break; 1.144 case 0x050000: // Phone status 1.145 break; 1.146 @@ -477,7 +510,6 @@ 1.147 } 1.148 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.149 // I/O register space, zone B 1.150 -// printf("RD16 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.151 switch (address & 0xF00000) { 1.152 case 0xC00000: // Expansion slots 1.153 case 0xD00000: 1.154 @@ -524,7 +556,9 @@ 1.155 case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.156 break; 1.157 } 1.158 + break; 1.159 case 0x050000: // [ef][5d]xxxx ==> 8274 1.160 + break; 1.161 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.162 switch (address & 0x07F000) { 1.163 default: 1.164 @@ -532,11 +566,12 @@ 1.165 } 1.166 break; 1.167 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.168 - default: 1.169 - fprintf(stderr, "NOTE: RD16 from undefined E/F-block address 0x%08X", address); 1.170 + break; 1.171 } 1.172 } 1.173 } 1.174 + 1.175 + LOG_NOT_HANDLED_R(32); 1.176 return data; 1.177 } 1.178 1.179 @@ -546,6 +581,7 @@ 1.180 uint32_t m68k_read_memory_8(uint32_t address) 1.181 { 1.182 uint8_t data = 0xFF; 1.183 + bool handled = false; 1.184 1.185 // If ROMLMAP is set, force system to access ROM 1.186 if (!state.romlmap) 1.187 @@ -557,26 +593,198 @@ 1.188 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.189 // ROM access 1.190 data = RD8(state.rom, address, ROM_SIZE - 1); 1.191 + handled = true; 1.192 } else if (address <= (state.ram_size - 1)) { 1.193 // RAM access 1.194 data = RD8(state.ram, mapAddr(address, false), state.ram_size - 1); 1.195 + handled = true; 1.196 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.197 // I/O register space, zone A 1.198 -// printf("RD8 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.199 switch (address & 0x0F0000) { 1.200 case 0x000000: // Map RAM access 1.201 if (address > 0x4007FF) fprintf(stderr, "NOTE: RD8 from MapRAM mirror, addr=0x%08X\n", address); 1.202 data = RD8(state.map, address, 0x7FF); 1.203 + handled = true; 1.204 break; 1.205 case 0x010000: // General Status Register 1.206 if ((address & 1) == 0) 1.207 data = (state.genstat >> 8) & 0xff; 1.208 else 1.209 data = (state.genstat) & 0xff; 1.210 + handled = true; 1.211 break; 1.212 case 0x020000: // Video RAM 1.213 if (address > 0x427FFF) fprintf(stderr, "NOTE: RD8 from VideoRAM mirror, addr=0x%08X\n", address); 1.214 data = RD8(state.vram, address, 0x7FFF); 1.215 + handled = true; 1.216 + break; 1.217 + case 0x030000: // Bus Status Register 0 1.218 + if ((address & 1) == 0) 1.219 + data = (state.bsr0 >> 8) & 0xff; 1.220 + else 1.221 + data = (state.bsr0) & 0xff; 1.222 + handled = true; 1.223 + break; 1.224 + case 0x040000: // Bus Status Register 1 1.225 + if ((address & 1) == 0) 1.226 + data = (state.bsr1 >> 8) & 0xff; 1.227 + else 1.228 + data = (state.bsr1) & 0xff; 1.229 + handled = true; 1.230 + break; 1.231 + case 0x050000: // Phone status 1.232 + break; 1.233 + case 0x060000: // DMA Count 1.234 + break; 1.235 + case 0x070000: // Line Printer Status Register 1.236 + break; 1.237 + case 0x080000: // Real Time Clock 1.238 + break; 1.239 + case 0x090000: // Phone registers 1.240 + switch (address & 0x0FF000) { 1.241 + case 0x090000: // Handset relay 1.242 + case 0x098000: 1.243 + break; 1.244 + case 0x091000: // Line select 2 1.245 + case 0x099000: 1.246 + break; 1.247 + case 0x092000: // Hook relay 1 1.248 + case 0x09A000: 1.249 + break; 1.250 + case 0x093000: // Hook relay 2 1.251 + case 0x09B000: 1.252 + break; 1.253 + case 0x094000: // Line 1 hold 1.254 + case 0x09C000: 1.255 + break; 1.256 + case 0x095000: // Line 2 hold 1.257 + case 0x09D000: 1.258 + break; 1.259 + case 0x096000: // Line 1 A-lead 1.260 + case 0x09E000: 1.261 + break; 1.262 + case 0x097000: // Line 2 A-lead 1.263 + case 0x09F000: 1.264 + break; 1.265 + } 1.266 + break; 1.267 + case 0x0A0000: // Miscellaneous Control Register 1.268 + break; 1.269 + case 0x0B0000: // TM/DIALWR 1.270 + break; 1.271 + case 0x0C0000: // CSR 1.272 + break; 1.273 + case 0x0D0000: // DMA Address Register 1.274 + break; 1.275 + case 0x0E0000: // Disk Control Register 1.276 + break; 1.277 + case 0x0F0000: // Line Printer Data Register 1.278 + break; 1.279 + } 1.280 + } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.281 + // I/O register space, zone B 1.282 + switch (address & 0xF00000) { 1.283 + case 0xC00000: // Expansion slots 1.284 + case 0xD00000: 1.285 + switch (address & 0xFC0000) { 1.286 + case 0xC00000: // Expansion slot 0 1.287 + case 0xC40000: // Expansion slot 1 1.288 + case 0xC80000: // Expansion slot 2 1.289 + case 0xCC0000: // Expansion slot 3 1.290 + case 0xD00000: // Expansion slot 4 1.291 + case 0xD40000: // Expansion slot 5 1.292 + case 0xD80000: // Expansion slot 6 1.293 + case 0xDC0000: // Expansion slot 7 1.294 + fprintf(stderr, "NOTE: RD8 from expansion card space, addr=0x%08X\n", address); 1.295 + break; 1.296 + } 1.297 + break; 1.298 + case 0xE00000: // HDC, FDC, MCR2 and RTC data bits 1.299 + case 0xF00000: 1.300 + switch (address & 0x070000) { 1.301 + case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.302 + break; 1.303 + case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.304 + break; 1.305 + case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.306 + break; 1.307 + case 0x030000: // [ef][3b]xxxx ==> Real Time Clock data bits 1.308 + break; 1.309 + case 0x040000: // [ef][4c]xxxx ==> General Control Register 1.310 + switch (address & 0x077000) { 1.311 + case 0x040000: // [ef][4c][08]xxx ==> EE 1.312 + break; 1.313 + case 0x041000: // [ef][4c][19]xxx ==> P1E 1.314 + break; 1.315 + case 0x042000: // [ef][4c][2A]xxx ==> BP 1.316 + break; 1.317 + case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.318 + break; 1.319 + case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.320 + break; 1.321 + case 0x045000: // [ef][4c][5D]xxx ==> L2 MODEM 1.322 + break; 1.323 + case 0x046000: // [ef][4c][6E]xxx ==> D/N CONNECT 1.324 + break; 1.325 + case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.326 + break; 1.327 + } 1.328 + case 0x050000: // [ef][5d]xxxx ==> 8274 1.329 + break; 1.330 + case 0x060000: // [ef][6e]xxxx ==> Control regs 1.331 + switch (address & 0x07F000) { 1.332 + default: 1.333 + break; 1.334 + } 1.335 + break; 1.336 + case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.337 + break; 1.338 + } 1.339 + } 1.340 + } 1.341 + 1.342 + LOG_NOT_HANDLED_R(8); 1.343 + 1.344 + return data; 1.345 +} 1.346 + 1.347 +/** 1.348 + * @brief Write M68K memory, 32-bit 1.349 + */ 1.350 +void m68k_write_memory_32(uint32_t address, uint32_t value) 1.351 +{ 1.352 + bool handled = false; 1.353 + 1.354 + // If ROMLMAP is set, force system to access ROM 1.355 + if (!state.romlmap) 1.356 + address |= 0x800000; 1.357 + 1.358 + // Check access permissions 1.359 + ACCESS_CHECK_WR(address, 32); 1.360 + 1.361 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.362 + // ROM access 1.363 + handled = true; 1.364 + } else if (address <= (state.ram_size - 1)) { 1.365 + // RAM access 1.366 + WR32(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.367 + handled = true; 1.368 + } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.369 + // I/O register space, zone A 1.370 + switch (address & 0x0F0000) { 1.371 + case 0x000000: // Map RAM access 1.372 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR32 to MapRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.373 + WR32(state.map, address, 0x7FF, value); 1.374 + handled = true; 1.375 + break; 1.376 + case 0x010000: // General Status Register 1.377 + state.genstat = (value & 0xffff); 1.378 + handled = true; 1.379 + break; 1.380 + case 0x020000: // Video RAM 1.381 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR32 to VideoRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.382 + WR32(state.vram, address, 0x7FFF, value); 1.383 + handled = true; 1.384 break; 1.385 case 0x030000: // Bus Status Register 0 1.386 break; 1.387 @@ -633,7 +841,6 @@ 1.388 } 1.389 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.390 // I/O register space, zone B 1.391 -// printf("RD8 0x%08X ==> ??? %s\n", address, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.392 switch (address & 0xF00000) { 1.393 case 0xC00000: // Expansion slots 1.394 case 0xD00000: 1.395 @@ -646,7 +853,8 @@ 1.396 case 0xD40000: // Expansion slot 5 1.397 case 0xD80000: // Expansion slot 6 1.398 case 0xDC0000: // Expansion slot 7 1.399 - fprintf(stderr, "NOTE: RD8 from expansion card space, addr=0x%08X\n", address); 1.400 + fprintf(stderr, "NOTE: WR32 to expansion card space, addr=0x%08X, data=0x%08X\n", address, value); 1.401 + handled = true; 1.402 break; 1.403 } 1.404 break; 1.405 @@ -670,6 +878,7 @@ 1.406 case 0x042000: // [ef][4c][2A]xxx ==> BP 1.407 break; 1.408 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.409 + state.romlmap = ((value & 0x8000) == 0x8000); 1.410 break; 1.411 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.412 break; 1.413 @@ -681,6 +890,7 @@ 1.414 break; 1.415 } 1.416 case 0x050000: // [ef][5d]xxxx ==> 8274 1.417 + break; 1.418 case 0x060000: // [ef][6e]xxxx ==> Control regs 1.419 switch (address & 0x07F000) { 1.420 default: 1.421 @@ -688,50 +898,56 @@ 1.422 } 1.423 break; 1.424 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.425 - default: 1.426 - fprintf(stderr, "NOTE: RD8 from undefined E/F-block address 0x%08X", address); 1.427 + break; 1.428 } 1.429 } 1.430 } 1.431 - return data; 1.432 + 1.433 + LOG_NOT_HANDLED_W(32); 1.434 } 1.435 1.436 /** 1.437 - * @brief Write M68K memory, 32-bit 1.438 + * @brief Write M68K memory, 16-bit 1.439 */ 1.440 -void m68k_write_memory_32(uint32_t address, uint32_t value) 1.441 +void m68k_write_memory_16(uint32_t address, uint32_t value) 1.442 { 1.443 + bool handled = false; 1.444 + 1.445 // If ROMLMAP is set, force system to access ROM 1.446 if (!state.romlmap) 1.447 address |= 0x800000; 1.448 1.449 // Check access permissions 1.450 - ACCESS_CHECK_WR(address, 32); 1.451 + ACCESS_CHECK_WR(address, 16); 1.452 1.453 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.454 // ROM access 1.455 - WR32(state.rom, address, ROM_SIZE - 1, value); 1.456 + handled = true; 1.457 } else if (address <= (state.ram_size - 1)) { 1.458 // RAM access 1.459 - WR32(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.460 + WR16(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.461 + handled = true; 1.462 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.463 // I/O register space, zone A 1.464 -// printf("WR32 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.465 switch (address & 0x0F0000) { 1.466 case 0x000000: // Map RAM access 1.467 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR32 to MapRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.468 - WR32(state.map, address, 0x7FF, value); 1.469 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR16 to MapRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.470 + WR16(state.map, address, 0x7FF, value); 1.471 + handled = true; 1.472 break; 1.473 - case 0x010000: // General Status Register 1.474 - state.genstat = (value & 0xffff); 1.475 + case 0x010000: // General Status Register (read only) 1.476 + handled = true; 1.477 break; 1.478 case 0x020000: // Video RAM 1.479 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR32 to VideoRAM mirror, addr=0x%08X, data=0x%08X\n", address, value); 1.480 - WR32(state.vram, address, 0x7FFF, value); 1.481 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR16 to VideoRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.482 + WR16(state.vram, address, 0x7FFF, value); 1.483 + handled = true; 1.484 break; 1.485 - case 0x030000: // Bus Status Register 0 1.486 + case 0x030000: // Bus Status Register 0 (read only) 1.487 + handled = true; 1.488 break; 1.489 - case 0x040000: // Bus Status Register 1 1.490 + case 0x040000: // Bus Status Register 1 (read only) 1.491 + handled = true; 1.492 break; 1.493 case 0x050000: // Phone status 1.494 break; 1.495 @@ -784,7 +1000,6 @@ 1.496 } 1.497 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.498 // I/O register space, zone B 1.499 -// printf("WR32 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.500 switch (address & 0xF00000) { 1.501 case 0xC00000: // Expansion slots 1.502 case 0xD00000: 1.503 @@ -797,7 +1012,7 @@ 1.504 case 0xD40000: // Expansion slot 5 1.505 case 0xD80000: // Expansion slot 6 1.506 case 0xDC0000: // Expansion slot 7 1.507 - fprintf(stderr, "NOTE: WR32 to expansion card space, addr=0x%08X, data=0x%08X\n", address, value); 1.508 + fprintf(stderr, "NOTE: WR16 to expansion card space, addr=0x%08X, data=0x%04X\n", address, value); 1.509 break; 1.510 } 1.511 break; 1.512 @@ -822,6 +1037,7 @@ 1.513 break; 1.514 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.515 state.romlmap = ((value & 0x8000) == 0x8000); 1.516 + handled = true; 1.517 break; 1.518 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.519 break; 1.520 @@ -842,49 +1058,55 @@ 1.521 break; 1.522 case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.523 break; 1.524 - default: 1.525 - fprintf(stderr, "NOTE: WR32 to undefined E/F-block space, addr=0x%08X, data=0x%08X\n", address, value); 1.526 } 1.527 } 1.528 } 1.529 + 1.530 + LOG_NOT_HANDLED_W(16); 1.531 } 1.532 1.533 /** 1.534 - * @brief Write M68K memory, 16-bit 1.535 + * @brief Write M68K memory, 8-bit 1.536 */ 1.537 -void m68k_write_memory_16(uint32_t address, uint32_t value) 1.538 +void m68k_write_memory_8(uint32_t address, uint32_t value) 1.539 { 1.540 + bool handled = false; 1.541 + 1.542 // If ROMLMAP is set, force system to access ROM 1.543 if (!state.romlmap) 1.544 address |= 0x800000; 1.545 1.546 // Check access permissions 1.547 - ACCESS_CHECK_WR(address, 16); 1.548 + ACCESS_CHECK_WR(address, 8); 1.549 1.550 if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.551 - // ROM access 1.552 - WR16(state.rom, address, ROM_SIZE - 1, value); 1.553 + // ROM access (read only!) 1.554 + handled = true; 1.555 } else if (address <= (state.ram_size - 1)) { 1.556 // RAM access 1.557 - WR16(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.558 + WR8(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.559 + handled = true; 1.560 } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.561 // I/O register space, zone A 1.562 -// printf("WR16 0x%08X ==> 0x%04X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.563 switch (address & 0x0F0000) { 1.564 case 0x000000: // Map RAM access 1.565 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR16 to MapRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.566 - WR16(state.map, address, 0x7FF, value); 1.567 + if (address > 0x4007FF) fprintf(stderr, "NOTE: WR8 to MapRAM mirror, addr=%08X, data=%02X\n", address, value); 1.568 + WR8(state.map, address, 0x7FF, value); 1.569 + handled = true; 1.570 break; 1.571 case 0x010000: // General Status Register 1.572 - state.genstat = (value & 0xffff); 1.573 + handled = true; 1.574 break; 1.575 case 0x020000: // Video RAM 1.576 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR16 to VideoRAM mirror, addr=0x%08X, data=0x%04X\n", address, value); 1.577 - WR16(state.vram, address, 0x7FFF, value); 1.578 + if (address > 0x427FFF) fprintf(stderr, "NOTE: WR8 to VideoRAM mirror, addr=%08X\n, data=0x%02X", address, value); 1.579 + WR8(state.vram, address, 0x7FFF, value); 1.580 + handled = true; 1.581 break; 1.582 case 0x030000: // Bus Status Register 0 1.583 + handled = true; 1.584 break; 1.585 case 0x040000: // Bus Status Register 1 1.586 + handled = true; 1.587 break; 1.588 case 0x050000: // Phone status 1.589 break; 1.590 @@ -937,160 +1159,6 @@ 1.591 } 1.592 } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.593 // I/O register space, zone B 1.594 -// printf("WR16 0x%08X ==> 0x%04X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.595 - switch (address & 0xF00000) { 1.596 - case 0xC00000: // Expansion slots 1.597 - case 0xD00000: 1.598 - switch (address & 0xFC0000) { 1.599 - case 0xC00000: // Expansion slot 0 1.600 - case 0xC40000: // Expansion slot 1 1.601 - case 0xC80000: // Expansion slot 2 1.602 - case 0xCC0000: // Expansion slot 3 1.603 - case 0xD00000: // Expansion slot 4 1.604 - case 0xD40000: // Expansion slot 5 1.605 - case 0xD80000: // Expansion slot 6 1.606 - case 0xDC0000: // Expansion slot 7 1.607 - fprintf(stderr, "NOTE: WR16 to expansion card space, addr=0x%08X, data=0x%04X\n", address, value); 1.608 - break; 1.609 - } 1.610 - break; 1.611 - case 0xE00000: // HDC, FDC, MCR2 and RTC data bits 1.612 - case 0xF00000: 1.613 - switch (address & 0x070000) { 1.614 - case 0x000000: // [ef][08]xxxx ==> WD1010 hard disc controller 1.615 - break; 1.616 - case 0x010000: // [ef][19]xxxx ==> WD2797 floppy disc controller 1.617 - break; 1.618 - case 0x020000: // [ef][2a]xxxx ==> Miscellaneous Control Register 2 1.619 - break; 1.620 - case 0x030000: // [ef][3b]xxxx ==> Real Time Clock data bits 1.621 - break; 1.622 - case 0x040000: // [ef][4c]xxxx ==> General Control Register 1.623 - switch (address & 0x077000) { 1.624 - case 0x040000: // [ef][4c][08]xxx ==> EE 1.625 - break; 1.626 - case 0x041000: // [ef][4c][19]xxx ==> P1E 1.627 - break; 1.628 - case 0x042000: // [ef][4c][2A]xxx ==> BP 1.629 - break; 1.630 - case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.631 - state.romlmap = ((value & 0x8000) == 0x8000); 1.632 - break; 1.633 - case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.634 - break; 1.635 - case 0x045000: // [ef][4c][5D]xxx ==> L2 MODEM 1.636 - break; 1.637 - case 0x046000: // [ef][4c][6E]xxx ==> D/N CONNECT 1.638 - break; 1.639 - case 0x047000: // [ef][4c][7F]xxx ==> Whole screen reverse video 1.640 - break; 1.641 - } 1.642 - case 0x050000: // [ef][5d]xxxx ==> 8274 1.643 - break; 1.644 - case 0x060000: // [ef][6e]xxxx ==> Control regs 1.645 - switch (address & 0x07F000) { 1.646 - default: 1.647 - break; 1.648 - } 1.649 - break; 1.650 - case 0x070000: // [ef][7f]xxxx ==> 6850 Keyboard Controller 1.651 - break; 1.652 - default: 1.653 - fprintf(stderr, "NOTE: WR32 to undefined E/F-block space, addr=0x%08X, data=0x%08X\n", address, value); 1.654 - } 1.655 - } 1.656 - } 1.657 -} 1.658 - 1.659 -/** 1.660 - * @brief Write M68K memory, 8-bit 1.661 - */ 1.662 -void m68k_write_memory_8(uint32_t address, uint32_t value) 1.663 -{ 1.664 - // If ROMLMAP is set, force system to access ROM 1.665 - if (!state.romlmap) 1.666 - address |= 0x800000; 1.667 - 1.668 - // Check access permissions 1.669 - ACCESS_CHECK_WR(address, 8); 1.670 - 1.671 - if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 1.672 - // ROM access 1.673 - WR8(state.rom, address, ROM_SIZE - 1, value); 1.674 - } else if (address <= (state.ram_size - 1)) { 1.675 - // RAM access 1.676 - WR8(state.ram, mapAddr(address, false), state.ram_size - 1, value); 1.677 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 1.678 - // I/O register space, zone A 1.679 -// printf("WR8 0x%08X ==> %02X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.680 - switch (address & 0x0F0000) { 1.681 - case 0x000000: // Map RAM access 1.682 - if (address > 0x4007FF) fprintf(stderr, "NOTE: WR8 to MapRAM mirror, addr=%08X, data=%02X\n", address, value); 1.683 - WR8(state.map, address, 0x7FF, value); 1.684 - break; 1.685 - case 0x010000: // General Status Register 1.686 - state.genstat = (value & 0xffff); 1.687 - break; 1.688 - case 0x020000: // Video RAM 1.689 - if (address > 0x427FFF) fprintf(stderr, "NOTE: WR8 to VideoRAM mirror, addr=%08X\n, data=0x%02X", address, value); 1.690 - WR8(state.vram, address, 0x7FFF, value); 1.691 - break; 1.692 - case 0x030000: // Bus Status Register 0 1.693 - break; 1.694 - case 0x040000: // Bus Status Register 1 1.695 - break; 1.696 - case 0x050000: // Phone status 1.697 - break; 1.698 - case 0x060000: // DMA Count 1.699 - break; 1.700 - case 0x070000: // Line Printer Status Register 1.701 - break; 1.702 - case 0x080000: // Real Time Clock 1.703 - break; 1.704 - case 0x090000: // Phone registers 1.705 - switch (address & 0x0FF000) { 1.706 - case 0x090000: // Handset relay 1.707 - case 0x098000: 1.708 - break; 1.709 - case 0x091000: // Line select 2 1.710 - case 0x099000: 1.711 - break; 1.712 - case 0x092000: // Hook relay 1 1.713 - case 0x09A000: 1.714 - break; 1.715 - case 0x093000: // Hook relay 2 1.716 - case 0x09B000: 1.717 - break; 1.718 - case 0x094000: // Line 1 hold 1.719 - case 0x09C000: 1.720 - break; 1.721 - case 0x095000: // Line 2 hold 1.722 - case 0x09D000: 1.723 - break; 1.724 - case 0x096000: // Line 1 A-lead 1.725 - case 0x09E000: 1.726 - break; 1.727 - case 0x097000: // Line 2 A-lead 1.728 - case 0x09F000: 1.729 - break; 1.730 - } 1.731 - break; 1.732 - case 0x0A0000: // Miscellaneous Control Register 1.733 - break; 1.734 - case 0x0B0000: // TM/DIALWR 1.735 - break; 1.736 - case 0x0C0000: // CSR 1.737 - break; 1.738 - case 0x0D0000: // DMA Address Register 1.739 - break; 1.740 - case 0x0E0000: // Disk Control Register 1.741 - break; 1.742 - case 0x0F0000: // Line Printer Data Register 1.743 - break; 1.744 - } 1.745 - } else if ((address >= 0xC00000) && (address <= 0xFFFFFF)) { 1.746 - // I/O register space, zone B 1.747 -// printf("WR8 0x%08X ==> 0x%08X %s\n", address, value, m68k_get_reg(NULL, M68K_REG_SR) & 0x2000 ? "[SV]" : ""); 1.748 switch (address & 0xF00000) { 1.749 case 0xC00000: // Expansion slots 1.750 case 0xD00000: 1.751 @@ -1128,7 +1196,8 @@ 1.752 break; 1.753 case 0x043000: // [ef][4c][3B]xxx ==> ROMLMAP 1.754 if ((address & 1) == 0) 1.755 - state.romlmap = ((value & 0x8000) == 0x8000); 1.756 + state.romlmap = ((value & 0x80) == 0x80); 1.757 + handled = true; 1.758 break; 1.759 case 0x044000: // [ef][4c][4C]xxx ==> L1 MODEM 1.760 break; 1.761 @@ -1155,6 +1224,8 @@ 1.762 } 1.763 } 1.764 } 1.765 + 1.766 + LOG_NOT_HANDLED_W(8); 1.767 } 1.768 1.769