1.1 diff -r b3f309d46e97 -r feb84193a43a src/memory.c 1.2 --- a/src/memory.c Mon Dec 13 03:00:43 2010 +0000 1.3 +++ b/src/memory.c Tue Dec 14 02:41:40 2010 +0000 1.4 @@ -596,10 +596,11 @@ 1.5 if (address & 1) { 1.6 data = 0x12; // no parity error, no line printer error, no irqs from FDD or HDD 1.7 data |= (state.fdc_ctx.irql) ? 0x08 : 0; // FIXME! HACKHACKHACK! shouldn't peek inside FDC structs like this 1.8 - data |= 0x04; // HDD interrupt, i.e. command complete -- HACKHACKHACK! 1.9 +// data |= 0x04; // HDD interrupt, i.e. command complete -- HACKHACKHACK! 1.10 } else { 1.11 data = 0; 1.12 } 1.13 + handled = true; 1.14 break; 1.15 case 0x080000: // Real Time Clock 1.16 break; 1.17 @@ -824,12 +825,12 @@ 1.18 case 0x0D0000: // DMA Address Register 1.19 if (address & 0x004000) { 1.20 // A14 high -- set most significant bits 1.21 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.22 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.23 } else { 1.24 // A14 low -- set least significant bits 1.25 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.26 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.27 } 1.28 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.29 + printf("WR32 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.30 handled = true; 1.31 break; 1.32 case 0x0E0000: // Disk Control Register 1.33 @@ -1031,12 +1032,12 @@ 1.34 case 0x0D0000: // DMA Address Register 1.35 if (address & 0x004000) { 1.36 // A14 high -- set most significant bits 1.37 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.38 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.39 } else { 1.40 // A14 low -- set least significant bits 1.41 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.42 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.43 } 1.44 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.45 + printf("WR16 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.46 handled = true; 1.47 break; 1.48 case 0x0E0000: // Disk Control Register 1.49 @@ -1235,12 +1236,12 @@ 1.50 case 0x0D0000: // DMA Address Register 1.51 if (address & 0x004000) { 1.52 // A14 high -- set most significant bits 1.53 - state.dma_address = (state.dma_address & 0xff) | ((address & 0x3fff) << 7); 1.54 + state.dma_address = (state.dma_address & 0x1fe) | ((address & 0x3ffe) << 8); 1.55 } else { 1.56 // A14 low -- set least significant bits 1.57 - state.dma_address = (state.dma_address & 0x3fff00) | (address & 0xff); 1.58 + state.dma_address = (state.dma_address & 0x3ffe00) | (address & 0x1fe); 1.59 } 1.60 - printf("WR DMA_ADDR, now %08X\n", state.dma_address); 1.61 + printf("WR08 DMA_ADDR %s, now %08X\n", address & 0x004000 ? "HI" : "LO", state.dma_address); 1.62 handled = true; 1.63 break; 1.64 case 0x0E0000: // Disk Control Register