Sun, 28 Nov 2010 20:52:53 +0000
fix memory read stuff, now need to deal with memory write
Makefile | file | annotate | diff | revisions | |
src/main.c | file | annotate | diff | revisions |
1.1 diff -r e2dcbabc7e1c -r 3e99497dca33 Makefile 1.2 --- a/Makefile Sun Nov 28 20:02:45 2010 +0000 1.3 +++ b/Makefile Sun Nov 28 20:52:53 2010 +0000 1.4 @@ -115,7 +115,7 @@ 1.5 TARGET = freebee 1.6 1.7 # source files that produce object files 1.8 -SRC = main.c musashi/m68kcpu.c musashi/m68kops.c musashi/m68kopac.c musashi/m68kopdm.c musashi/m68kopnz.c 1.9 +SRC = main.c musashi/m68kcpu.c musashi/m68kdasm.c musashi/m68kops.c musashi/m68kopac.c musashi/m68kopdm.c musashi/m68kopnz.c 1.10 1.11 # source type - either "c" or "cpp" (C or C++) 1.12 SRC_TYPE = c
2.1 diff -r e2dcbabc7e1c -r 3e99497dca33 src/main.c 2.2 --- a/src/main.c Sun Nov 28 20:02:45 2010 +0000 2.3 +++ b/src/main.c Sun Nov 28 20:52:53 2010 +0000 2.4 @@ -7,7 +7,7 @@ 2.5 #include "musashi/m68k.h" 2.6 #include "version.h" 2.7 2.8 -#define ROM_SIZE (32768/4) 2.9 +#define ROM_SIZE (32768/2) 2.10 2.11 void state_done(void); 2.12 2.13 @@ -21,10 +21,10 @@ 2.14 2.15 struct { 2.16 // Boot PROM can be up to 32Kbytes total size 2.17 - uint32_t rom[ROM_SIZE]; 2.18 + uint16_t rom[ROM_SIZE]; 2.19 2.20 // Main system RAM 2.21 - uint32_t *ram; 2.22 + uint16_t *ram; 2.23 size_t ram_size; // number of RAM bytes allocated 2.24 uint32_t ram_addr_mask; // address mask 2.25 2.26 @@ -74,12 +74,8 @@ 2.27 fread(romdat2, 1, romlen2, r14c); 2.28 2.29 // convert the ROM data 2.30 - for (size_t i=0; i<romlen; i+=2) { 2.31 - state.rom[i/2] = ( 2.32 - (romdat1[i+0] << 24) | 2.33 - (romdat2[i+0] << 16) | 2.34 - (romdat1[i+1] << 8) | 2.35 - (romdat2[i+1])); 2.36 + for (size_t i=0; i<romlen; i++) { 2.37 + state.rom[i] = ((romdat1[i] << 8) | (romdat2[i])); 2.38 } 2.39 2.40 // free the data arrays and close the files 2.41 @@ -102,48 +98,56 @@ 2.42 // TODO: find a way to make musashi use function pointers instead of hard coded callbacks, maybe use a context struct too 2.43 uint32_t m68k_read_memory_32(uint32_t address) 2.44 { 2.45 + uint32_t data = 0xFFFFFFFF; 2.46 + 2.47 + printf("RD32 %08X %d", address, state.romlmap); 2.48 + 2.49 // If ROMLMAP is set, force system to access ROM 2.50 if (!state.romlmap) 2.51 address |= 0x800000; 2.52 2.53 - if (address >= 0xC00000) { 2.54 - // I/O Registers B 2.55 - // TODO 2.56 - } else if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.57 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.58 // ROM access 2.59 - return state.rom[(address & (ROM_SIZE-1)) / 4]; 2.60 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 2.61 - // I/O Registers A 2.62 - // TODO 2.63 + data = ((state.rom[(address & (ROM_SIZE-1)) / 2] << 16) | (state.rom[((address & (ROM_SIZE-1)) / 2)+1])); 2.64 } else if (address <= 0x3FFFFF) { 2.65 // RAM 2.66 - return state.ram[(address & state.ram_addr_mask) / 4]; 2.67 + data = state.ram[(address & state.ram_addr_mask) / 2]; 2.68 } 2.69 - return 0xffffffff; 2.70 + 2.71 + printf(" ==> %04X\n", data); 2.72 + return data; 2.73 } 2.74 2.75 uint32_t m68k_read_memory_16(uint32_t address) 2.76 { 2.77 - if (address & 2) { 2.78 - return m68k_read_memory_32(address) & 0xFFFF; 2.79 - } else { 2.80 - return (m68k_read_memory_32(address) >> 16) & 0xFFFF; 2.81 - } 2.82 + uint16_t data = 0xFFFF; 2.83 + 2.84 + printf("RD16 %08X %d", address, state.romlmap); 2.85 + 2.86 + // If ROMLMAP is set, force system to access ROM 2.87 + if (!state.romlmap) 2.88 + address |= 0x800000; 2.89 + 2.90 + data = (m68k_read_memory_32(address) >> 16) & 0xFFFF; 2.91 + 2.92 + printf(" ==> %04X\n", data); 2.93 + return data; 2.94 } 2.95 2.96 uint32_t m68k_read_memory_8(uint32_t address) 2.97 { 2.98 + uint8_t data = 0xFF; 2.99 + 2.100 + printf("RD 8 %08X %d ", address, state.romlmap); 2.101 + 2.102 // If ROMLMAP is set, force system to access ROM 2.103 if (!state.romlmap) 2.104 address |= 0x800000; 2.105 2.106 - switch (address & 3) { 2.107 - case 3: return m68k_read_memory_32(address) & 0xFF; 2.108 - case 2: return (m68k_read_memory_32(address) >> 8) & 0xFF; 2.109 - case 1: return (m68k_read_memory_32(address) >> 16) & 0xFF; 2.110 - case 0: return (m68k_read_memory_32(address) >> 24) & 0xFF; 2.111 - } 2.112 - return 0xffffffff; 2.113 + data = m68k_read_memory_32(address) & 0xFF; 2.114 + 2.115 + printf("==> %02X\n", data); 2.116 + return data; 2.117 } 2.118 2.119 // write m68k memory 2.120 @@ -153,18 +157,19 @@ 2.121 if (!state.romlmap) 2.122 address |= 0x800000; 2.123 2.124 - if (address >= 0xC00000) { 2.125 - // I/O Registers B 2.126 - // TODO 2.127 - } else if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.128 + printf("WR32 %08X %d %02X\n", address, state.romlmap, value); 2.129 + 2.130 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.131 // ROM access 2.132 // TODO: bus error here? can't write to rom! 2.133 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 2.134 - // I/O Registers A 2.135 - // TODO 2.136 } else if (address <= 0x3FFFFF) { 2.137 // RAM 2.138 - state.ram[(address & state.ram_addr_mask) / 4] = value; 2.139 + state.ram[(address & state.ram_addr_mask) / 2] = (value >> 16); 2.140 + state.ram[((address & state.ram_addr_mask) / 2)+1] = value & 0xffff; 2.141 + } else { 2.142 + switch (address) { 2.143 + case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); 2.144 + } 2.145 } 2.146 } 2.147 2.148 @@ -174,21 +179,18 @@ 2.149 if (!state.romlmap) 2.150 address |= 0x800000; 2.151 2.152 - if (address >= 0xC00000) { 2.153 - // I/O Registers B 2.154 - // TODO 2.155 - } else if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.156 + printf("WR16 %08X %d %02X\n", address, state.romlmap, value); 2.157 + 2.158 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.159 // ROM access 2.160 // TODO: bus error here? can't write to rom! 2.161 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 2.162 - // I/O Registers A 2.163 - // TODO 2.164 } else if (address <= 0x3FFFFF) { 2.165 // RAM 2.166 - if (address & 2) 2.167 - state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0xFFFF0000) | (value & 0xFFFF); 2.168 - else 2.169 - state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0x0000FFFF) | ((value & 0xFFFF) << 16); 2.170 + state.ram[(address & state.ram_addr_mask) / 2] = value & 0xFFFF; 2.171 + } else { 2.172 + switch (address) { 2.173 + case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); 2.174 + } 2.175 } 2.176 } 2.177 2.178 @@ -198,26 +200,31 @@ 2.179 if (!state.romlmap) 2.180 address |= 0x800000; 2.181 2.182 - if (address >= 0xC00000) { 2.183 - // I/O Registers B 2.184 - // TODO 2.185 - } else if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.186 + printf("WR 8 %08X %d %02X\n", address, state.romlmap, value); 2.187 + 2.188 + if ((address >= 0x800000) && (address <= 0xBFFFFF)) { 2.189 // ROM access 2.190 // TODO: bus error here? can't write to rom! 2.191 - } else if ((address >= 0x400000) && (address <= 0x7FFFFF)) { 2.192 - // I/O Registers A 2.193 - // TODO 2.194 } else if (address <= 0x3FFFFF) { 2.195 // RAM 2.196 switch (address & 3) { 2.197 + // FIXME 2.198 case 3: state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0xFFFFFF00) | (value & 0xFF); 2.199 case 2: state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0xFFFF00FF) | ((value & 0xFF) << 8); 2.200 case 1: state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0xFF00FFFF) | ((value & 0xFF) << 16); 2.201 case 0: state.ram[(address & state.ram_addr_mask) / 4] = (state.ram[(address & state.ram_addr_mask) / 4] & 0x00FFFFFF) | ((value & 0xFF) << 24); 2.202 } 2.203 + } else { 2.204 + switch (address) { 2.205 + case 0xE43000: state.romlmap = ((value & 0x80) == 0x80); 2.206 + } 2.207 } 2.208 } 2.209 2.210 +uint32_t m68k_read_disassembler_32(uint32_t addr) { return m68k_read_memory_32(addr); } 2.211 +uint32_t m68k_read_disassembler_16(uint32_t addr) { return m68k_read_memory_16(addr); } 2.212 +uint32_t m68k_read_disassembler_8 (uint32_t addr) { return m68k_read_memory_8 (addr); } 2.213 + 2.214 int main(void) 2.215 { 2.216 // copyright banner 2.217 @@ -234,6 +241,10 @@ 2.218 m68k_set_cpu_type(M68K_CPU_TYPE_68010); 2.219 m68k_pulse_reset(); 2.220 2.221 + char dasm[512]; 2.222 + m68k_disassemble(dasm, 0x80001a, M68K_CPU_TYPE_68010); 2.223 + printf("%s\n", dasm); 2.224 + 2.225 // set up SDL 2.226 2.227 // emulation loop!