Tue, 15 Nov 2011 09:30:57 +0000
Fix BSR0 UDS/LDS bit polarity
Patch-Author: Andrew Warkentin <andreww591!gmail>
Patch-MessageID: <4EC200CE.2020304@gmail.com>
... "The second bug is simpler - you had the UDS and LDS bits in BSR0 inverted (they are supposed to be active low)."
| src/memory.c | file | annotate | diff | revisions |
1.1 diff -r 566cfc70ef33 -r 5f7faf5ecbf4 src/memory.c 1.2 --- a/src/memory.c Fri Mar 04 02:12:25 2011 +0000 1.3 +++ b/src/memory.c Tue Nov 15 09:30:57 2011 +0000 1.4 @@ -153,7 +153,7 @@ 1.5 if (bits >= 16) \ 1.6 state.bsr0 = 0x7C00; \ 1.7 else \ 1.8 - state.bsr0 = (address & 1) ? 0x7D00 : 0x7E00; \ 1.9 + state.bsr0 = (address & 1) ? 0x7E00 : 0x7D00; \ 1.10 state.bsr0 |= (address >> 16); \ 1.11 state.bsr1 = address & 0xffff; \ 1.12 LOG("Bus Error while writing, addr %08X, statcode %d", address, st); \ 1.13 @@ -203,7 +203,7 @@ 1.14 if (bits >= 16) \ 1.15 state.bsr0 = 0x7C00; \ 1.16 else \ 1.17 - state.bsr0 = (address & 1) ? 0x7D00 : 0x7E00; \ 1.18 + state.bsr0 = (address & 1) ? 0x7E00 : 0x7D00; \ 1.19 state.bsr0 |= (address >> 16); \ 1.20 state.bsr1 = address & 0xffff; \ 1.21 LOG("Bus Error while reading, addr %08X, statcode %d", address, st); \