Wed, 01 Dec 2010 22:11:06 +0000
add VRAM emulation
| src/main.c | file | annotate | diff | revisions | |
| src/state.h | file | annotate | diff | revisions |
1.1 diff -r 3d964a6aa59b -r 724d2f6deb37 src/main.c 1.2 --- a/src/main.c Wed Dec 01 22:01:58 2010 +0000 1.3 +++ b/src/main.c Wed Dec 01 22:11:06 2010 +0000 1.4 @@ -39,6 +39,12 @@ 1.5 ((uint32_t)state.ram[address + 1] << 16) | 1.6 ((uint32_t)state.ram[address + 2] << 8) | 1.7 ((uint32_t)state.ram[address + 3])); 1.8 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.9 + // VRAM 1.10 + data = (((uint32_t)state.vram[(address + 0) & 0x7fff] << 24) | 1.11 + ((uint32_t)state.vram[(address + 1) & 0x7fff] << 16) | 1.12 + ((uint32_t)state.vram[(address + 2) & 0x7fff] << 8) | 1.13 + ((uint32_t)state.vram[(address + 3) & 0x7fff])); 1.14 } else { 1.15 // I/O register -- TODO 1.16 printf("RD32 0x%08X [unknown I/O register]\n", address); 1.17 @@ -62,6 +68,10 @@ 1.18 // RAM 1.19 data = ((state.ram[address + 0] << 8) | 1.20 (state.ram[address + 1])); 1.21 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.22 + // VRAM 1.23 + data = (((uint16_t)state.vram[(address + 0) & 0x7fff] << 8) | 1.24 + ((uint16_t)state.vram[(address + 1) & 0x7fff])); 1.25 } else { 1.26 // I/O register -- TODO 1.27 printf("RD16 0x%08X [unknown I/O register]\n", address); 1.28 @@ -84,6 +94,9 @@ 1.29 } else if (address < state.ram_size) { 1.30 // RAM access 1.31 data = state.ram[address + 0]; 1.32 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.33 + // VRAM 1.34 + data = state.vram[(address + 0) & 0x7fff]; 1.35 } else { 1.36 // I/O register -- TODO 1.37 printf("RD08 0x%08X [unknown I/O register]\n", address); 1.38 @@ -108,6 +121,12 @@ 1.39 state.ram[address + 1] = (value >> 16) & 0xff; 1.40 state.ram[address + 2] = (value >> 8) & 0xff; 1.41 state.ram[address + 3] = value & 0xff; 1.42 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.43 + // VRAM access 1.44 + state.vram[(address + 0) & 0x7fff] = (value >> 24) & 0xff; 1.45 + state.vram[(address + 1) & 0x7fff] = (value >> 16) & 0xff; 1.46 + state.vram[(address + 2) & 0x7fff] = (value >> 8) & 0xff; 1.47 + state.vram[(address + 3) & 0x7fff] = value & 0xff; 1.48 } else { 1.49 switch (address) { 1.50 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP 1.51 @@ -129,6 +148,10 @@ 1.52 // RAM access 1.53 state.ram[address + 0] = (value >> 8) & 0xff; 1.54 state.ram[address + 1] = value & 0xff; 1.55 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.56 + // VRAM access 1.57 + state.vram[(address + 0) & 0x7fff] = (value >> 8) & 0xff; 1.58 + state.vram[(address + 1) & 0x7fff] = value & 0xff; 1.59 } else { 1.60 switch (address) { 1.61 case 0xE43000: state.romlmap = ((value & 0x8000) == 0x8000); break; // GCR3: ROMLMAP 1.62 @@ -148,6 +171,9 @@ 1.63 // TODO: bus error here? can't write to rom! 1.64 } else if (address < state.ram_size) { 1.65 state.ram[address] = value & 0xff; 1.66 + } else if ((address >= 0x420000) && (address <= 0x427FFF)) { 1.67 + // VRAM access 1.68 + state.vram[address & 0x7fff] = value; 1.69 } else { 1.70 switch (address) { 1.71 case 0xE43000: state.romlmap = ((value & 0x80) == 0x80); break; // GCR3: ROMLMAP
2.1 diff -r 3d964a6aa59b -r 724d2f6deb37 src/state.h 2.2 --- a/src/state.h Wed Dec 01 22:01:58 2010 +0000 2.3 +++ b/src/state.h Wed Dec 01 22:11:06 2010 +0000 2.4 @@ -21,10 +21,13 @@ 2.5 uint8_t *ram; ///< RAM data buffer 2.6 size_t ram_size; ///< Size of RAM buffer in bytes 2.7 2.8 + // Video RAM 2.9 + uint8_t vram[0x8000]; ///< Video RAM 2.10 + 2.11 // GENERAL CONTROL REGISTER 2.12 /// GENCON.ROMLMAP -- false ORs the address with 0x800000, forcing the 2.13 /// 68010 to access ROM instead of RAM when booting. TRM page 2-36. 2.14 - bool romlmap; 2.15 + bool romlmap; 2.16 } S_state; 2.17 2.18 // Global emulator state. Yes, I know global variables are evil, please don't