initial commit

     1.1 diff -r 000000000000 -r 8bf1bf91a36d .hgignore
     1.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 +++ b/.hgignore	Sat Nov 27 01:13:12 2010 +0000
     1.4 @@ -0,0 +1,7 @@
     1.5 +syntax: glob
     1.6 +obj/*.o
     1.7 +dep/*.d
     1.8 +*~
     1.9 +.*.sw?
    1.10 +.~lock*
    1.11 +.buildnum

     2.1 diff -r 000000000000 -r 8bf1bf91a36d Makefile
     2.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.3 +++ b/Makefile	Sat Nov 27 01:13:12 2010 +0000
     2.4 @@ -0,0 +1,454 @@
     2.5 +# Phil's multiplatform makefile template
     2.6 +# With auto-incrementing build number and automatic version.h generation
     2.7 +# Version 1.8, 2010-02-15
     2.8 +#
     2.9 +# The latest version of this Makefile can be found at http://www.philpem.me.uk/
    2.10 +#
    2.11 +#
    2.12 +# Copyright (c) 2010 Philip Pemberton <code@philpem.me.uk>
    2.13 +#
    2.14 +# Permission is hereby granted, free of charge, to any person obtaining a copy
    2.15 +# of this software and associated documentation files (the "Software"), to deal
    2.16 +# in the Software without restriction, including without limitation the rights
    2.17 +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    2.18 +# copies of the Software, and to permit persons to whom the Software is
    2.19 +# furnished to do so, subject to the following conditions:
    2.20 +#
    2.21 +# The above copyright notice and this permission notice shall be included in
    2.22 +# all copies or substantial portions of the Software.
    2.23 +#
    2.24 +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    2.25 +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    2.26 +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
    2.27 +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    2.28 +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    2.29 +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    2.30 +# THE SOFTWARE.
    2.31 +#
    2.32 +#
    2.33 +# Instructions for use:
    2.34 +#   Run 'make init' to create the required directories
    2.35 +#   Add your source files to the 'SOURCES' list, and change the TARGET filename
    2.36 +#   Set the desired build type and platform in the BUILD_TYPE and PLATFORM
    2.37 +#     variables respectively
    2.38 +#   Set your project type (C only, or C++) in the SRC_TYPE variable
    2.39 +#   Add any libraries you need to link against to the 'LIB' list
    2.40 +#   Run 'make'
    2.41 +#
    2.42 +# Object files are created in the 'obj' subdirectory, from source code in the
    2.43 +# 'src' directory. Dependency files are created in the 'dep' directory from
    2.44 +# the same source code the object files are created from.
    2.45 +#
    2.46 +# Supported targets are:
    2.47 +#   all                 Build everything.
    2.48 +#   update-revision     Increment the build number without building anything.
    2.49 +#   clean-versioninfo   Delete src/version.h (will be rebuilt on the next
    2.50 +#                       'make all').
    2.51 +#   init                Initialise the build system for a new project.
    2.52 +#                       WARNING: overwrites .buildnum and src/version.h.in!
    2.53 +#   cleandep            Delete all dependency files.
    2.54 +#   clean               Delete all dependency, intermediate and target files.
    2.55 +#   tidy                Delete all dependency and intermediate files, leaving
    2.56 +#                       the target file intact.
    2.57 +#
    2.58 +# If you want to reset the build number to zero, delete '.buildnum'. This
    2.59 +# should be done whenever the major or minor version changes. Excluding
    2.60 +# .buildnum from version control may also be a good idea, depending on how
    2.61 +# you want your build numbers to work.
    2.62 +#
    2.63 +# The BUILD_TYPE variable contains the current build type. There are two
    2.64 +# supported build types:
    2.65 +#   debug       Debug mode - object files are compiled with debug information
    2.66 +#               and the target is left unstripped.
    2.67 +#   release     Release mode - object files are not compiled with debug info,
    2.68 +#               and the target is fed through strip to remove redundant
    2.69 +#               data.
    2.70 +#
    2.71 +# The PLATFORM variable contains the current target platform. There are two
    2.72 +# supported platforms:
    2.73 +#   linux       GNU/Linux with GNU Compiler Collection
    2.74 +#   win32       Windows 32-bit with MinGW
    2.75 +#
    2.76 +# The EXTSRC variable is used to specify other files to build. It is typically
    2.77 +# used to specify platform or build-type specific source files, e.g.
    2.78 +#
    2.79 +# ifeq ($(BUILD_TYPE),debug-memwatch)
    2.80 +#   CFLAGS += -g -ggdb
    2.81 +#   CPPFLAGS += -DMEMWATCH
    2.82 +#   INCPATH += ./memwatch
    2.83 +#   EXTSRC += memwatch/memwatch.c
    2.84 +# endif
    2.85 +#
    2.86 +# (example taken from one of my projects that allowed the use of Memwatch to
    2.87 +#  track down memory allocation/deallocation bugs)
    2.88 +#
    2.89 +#
    2.90 +# Change history:
    2.91 +#   1.8 - Now supports the use of the wxWidgets GUI framework. To turn
    2.92 +#         this on, set ENABLE_WX to "yes".
    2.93 +#   1.7 - Now creates a basic Hgignore file and directory keepers for the
    2.94 +#         dep and obj directories.
    2.95 +#   1.6 - Added CFLAGS and CXXFLAGS to the command-lines for the dependency
    2.96 +#         building commands. This was causing issues with C99 / C++0x mode.
    2.97 +#   1.5 - Added support for Mercurial revision (changeset ID) display
    2.98 +#         Fixed a few issues with Subversion support (svn: and version 0 would
    2.99 +#         be displayed for exported code)
   2.100 +#
   2.101 +
   2.102 +####
   2.103 +# Build configuration
   2.104 +####
   2.105 +
   2.106 +# version information -- major.minor.extra
   2.107 +# note that VER_EXTRA can be overridden on the command line, e.g.:
   2.108 +# make VER_EXTRA=12345 all
   2.109 +VER_MAJOR	= 0
   2.110 +VER_MINOR	= 0
   2.111 +VER_EXTRA	?= 
   2.112 +
   2.113 +# build platform: win32 or linux
   2.114 +PLATFORM	?=	linux
   2.115 +# build type: release or debug
   2.116 +BUILD_TYPE	?=	debug
   2.117 +
   2.118 +# target executable
   2.119 +TARGET		=	3b1emu
   2.120 +
   2.121 +# source files that produce object files
   2.122 +SRC			=	main.c musashi/m68kcpu.c musashi/m68kops.c
   2.123 +
   2.124 +# source type - either "c" or "cpp" (C or C++)
   2.125 +SRC_TYPE	=	c
   2.126 +
   2.127 +# additional object files that don't necessarily include source
   2.128 +EXT_OBJ		=
   2.129 +# libraries to link in -- these will be specified as "-l" parameters, the -l
   2.130 +# is prepended automatically
   2.131 +LIB			=	sdl
   2.132 +# library paths -- where to search for the above libraries
   2.133 +LIBPATH		=	musashi
   2.134 +# include paths -- where to search for #include files (in addition to the
   2.135 +# standard paths
   2.136 +INCPATH		=	musashi
   2.137 +# garbage files that should be deleted on a 'make clean' or 'make tidy'
   2.138 +GARBAGE		=	obj/musashi/m68kmake obj/musashi/m68kmake.exe obj/musashi/m68kmake.o
   2.139 +
   2.140 +# extra dependencies - files that we don't necessarily know how to build, but
   2.141 +# that are required for building the application; e.g. object files or
   2.142 +# libraries in sub or parent directories
   2.143 +EXTDEP		=
   2.144 +
   2.145 +# Extra libraries
   2.146 +# wxWidgets: set to "yes" to enable, anything else to disable
   2.147 +ENABLE_WX	=	no
   2.148 +# wxWidgets: list of wxWidgets libraries to enable
   2.149 +WX_LIBS		=	std
   2.150 +
   2.151 +####
   2.152 +# Win32 target-specific settings
   2.153 +####
   2.154 +ifeq ($(strip $(PLATFORM)),win32)
   2.155 +	# windows executables have a .exe suffix
   2.156 +	TARGET := $(addsuffix .exe,$(TARGET))
   2.157 +	# console mode application
   2.158 +	EXT_CFLAGS = -mconsole
   2.159 +endif
   2.160 +
   2.161 +
   2.162 +####
   2.163 +# Tool setup
   2.164 +####
   2.165 +MAKE	=	make
   2.166 +CC		=	gcc
   2.167 +CXX		=	g++
   2.168 +CFLAGS	=	-Wall -pedantic -std=gnu99 $(EXT_CFLAGS)
   2.169 +CXXFLAGS=	-Wall -pedantic -std=gnu++0x $(EXT_CXXFLAGS)
   2.170 +LDFLAGS	=	$(EXT_LDFLAGS)
   2.171 +RM		=	rm
   2.172 +STRIP	=	strip
   2.173 +
   2.174 +###############################################################################
   2.175 +# You should not need to touch anything below here, unless you're adding a new
   2.176 +# platform or build type (or changing the version string format)
   2.177 +###############################################################################
   2.178 +
   2.179 +####
   2.180 +# A quick sanity check on the platform type
   2.181 +####
   2.182 +ifneq ($(PLATFORM),linux)
   2.183 +ifneq ($(PLATFORM),win32)
   2.184 +    $(error Platform '$(PLATFORM)' not supported. Supported platforms are: linux, win32)
   2.185 +endif
   2.186 +endif
   2.187 +
   2.188 +####
   2.189 +# Version info generation
   2.190 +####
   2.191 +# get the current build number
   2.192 +VER_BUILDNUM	= $(shell cat .buildnum)
   2.193 +
   2.194 +#### --- begin Subversion revision grabber ---
   2.195 +# there are two ways to get the SVN revision - use svnversion, or use svn info
   2.196 +# then pipe through awk. which one you use is up to you.
   2.197 +VER_SVNREV		= $(shell LANG=C svn info 2>/dev/null || echo 'Revision: exported' | awk '/^Revision:/ { print$$2 }' )
   2.198 +#VER_SVNREV		= $(shell svnversion .)
   2.199 +
   2.200 +# if the version string is "exported", then the CSD was not checked out of SVN
   2.201 +# note that if the CSD is not an SVN checkout, then @@svnrev@@ will be set to
   2.202 +# zero.
   2.203 +ifeq ($(VER_SVNREV),exported)
   2.204 +    VER_VCS		= none
   2.205 +    VER_VCSREV	= 0
   2.206 +else
   2.207 +    VER_VCS		= svn
   2.208 +    VER_VCSREV	= $(VER_SVNREV)
   2.209 +endif
   2.210 +
   2.211 +#### --- begin Mercurial revision grabber ---
   2.212 +# If SVN didn't give us a revision, try Mercurial instead
   2.213 +ifeq ($(VER_VCS),none)
   2.214 +    # get the current Mercurial changeset number
   2.215 +	VER_HGREV=$(shell ((hg tip --template "{node|short}") || echo "000000000000") 2>/dev/null)
   2.216 +    ifneq ($(VER_HGREV),000000000000)
   2.217 +        # a non-empty repo
   2.218 +        VER_VCS		= hg
   2.219 +        VER_VCSREV	= $(VER_HGREV)
   2.220 +    else
   2.221 +        # either an empty Hg repo, or no repo at all
   2.222 +        VER_VCS		= none
   2.223 +        VER_VCSREV	= 0
   2.224 +    endif
   2.225 +endif
   2.226 +
   2.227 +#### --- end version grabbers ---
   2.228 +
   2.229 +# start creating the revision string
   2.230 +VER_FULLSTR		= $(VER_MAJOR).$(VER_MINOR).$(VER_BUILDNUM)$(VER_EXTRA)
   2.231 +
   2.232 +# if this is a VCS release, include the SVN revision in the version string
   2.233 +# also create a revision string that is either "svn:12345", "hg:12345" or
   2.234 +# blank
   2.235 +ifneq ($(VER_VCS),none)
   2.236 +    VER_FULLSTR	+= ($(VER_VCS) $(VER_VCSREV))
   2.237 +    VER_VCSSTR	= $(VER_VCS):$(VER_VCSREV)
   2.238 +else
   2.239 +    VER_VCSSTR	=
   2.240 +endif
   2.241 +
   2.242 +
   2.243 +####
   2.244 +# Build-type specific configuration
   2.245 +####
   2.246 +ifeq ($(BUILD_TYPE),debug)
   2.247 +	CFLAGS		+= -g -ggdb -DDEBUG
   2.248 +	CXXFLAGS	+= -g -ggdb -DDEBUG
   2.249 +else
   2.250 + ifeq ($(BUILD_TYPE),release)
   2.251 +	CFLAGS		+= -O2
   2.252 +	CXXFLAGS	+= -O2
   2.253 + else
   2.254 + 	$(error Unsupported build type: '$(BUILD_TYPE)')
   2.255 + endif
   2.256 +endif
   2.257 +
   2.258 +####
   2.259 +# wxWidgets support
   2.260 +####
   2.261 +ifeq ($(ENABLE_WX),yes)
   2.262 +	ifeq ($(BUILD_TYPE),debug)
   2.263 +		LIBLNK		+=	`wx-config --debug --libs $(WX_LIBS)`
   2.264 +		CFLAGS		+=	`wx-config --debug --cflags $(WX_LIBS)`
   2.265 +		CXXFLAGS	+=	`wx-config --debug --cxxflags $(WX_LIBS)`
   2.266 +		CPPFLAGS	+=	`wx-config --debug --cppflags $(WX_LIBS)`
   2.267 +	else
   2.268 +		ifeq ($(BUILD_TYPE),release)
   2.269 +			LIBLNK		+=	`wx-config --libs $(WX_LIBS)`
   2.270 +			CFLAGS		+=	`wx-config --cflags $(WX_LIBS)`
   2.271 +			CPPFLAGS	+=	`wx-config --cppflags $(WX_LIBS)`
   2.272 +			CXXFLAGS	+=	`wx-config --cxxflags $(WX_LIBS)`
   2.273 +		else
   2.274 +			$(error Unsupported build type: '$(BUILD_TYPE)')
   2.275 +		endif
   2.276 +	endif
   2.277 +endif
   2.278 +
   2.279 +####
   2.280 +# rules
   2.281 +####
   2.282 +
   2.283 +# object files
   2.284 +OBJ		=	$(addprefix obj/, $(addsuffix .o, $(basename $(SRC))) $(EXT_OBJ)) $(addsuffix .o, $(basename $(EXTSRC)))
   2.285 +
   2.286 +# dependency files
   2.287 +DEPFILES =	$(addprefix dep/, $(addsuffix .d, $(basename $(SRC))) $(EXT_OBJ)) $(addsuffix .d, $(basename $(EXTSRC)))
   2.288 +
   2.289 +# path commands
   2.290 +LIBLNK	+=	$(addprefix -l, $(LIB))
   2.291 +LIBPTH	+=	$(addprefix -L, $(LIBPATH))
   2.292 +INCPTH	+=	$(addprefix -I, $(INCPATH))
   2.293 +
   2.294 +CPPFLAGS +=	$(INCPTH)
   2.295 +
   2.296 +####
   2.297 +# Make sure there is at least one object file to be linked in
   2.298 +####
   2.299 +ifeq ($(strip $(OBJ)),)
   2.300 +    $(error Unable to build: no object or source files specified in Makefile)
   2.301 +endif
   2.302 +
   2.303 +####
   2.304 +# targets
   2.305 +####
   2.306 +.PHONY:	default all update-revision versionheader clean-versioninfo init cleandep clean tidy
   2.307 +
   2.308 +all:	update-revision
   2.309 +	@$(MAKE) versionheader
   2.310 +	$(MAKE) $(TARGET)
   2.311 +
   2.312 +# increment the current build number
   2.313 +NEWBUILD=$(shell expr $(VER_BUILDNUM) + 1)
   2.314 +update-revision:
   2.315 +	@echo $(NEWBUILD) > .buildnum
   2.316 +
   2.317 +versionheader:
   2.318 +	@sed -e 's/@@date@@/$(shell LC_ALL=C date)/g'			\
   2.319 +		 -e 's/@@time@@/$(shell LC_ALL=C date +%T)/g'		\
   2.320 +		 -e 's/@@whoami@@/$(shell whoami)/g'				\
   2.321 +		 -e 's/@@hostname@@/$(shell hostname)/g'			\
   2.322 +		 -e 's|@@compiler@@|$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1 | sed -e "s;|;/;")|g'	\
   2.323 +		 -e 's/@@majorver@@/$(VER_MAJOR)/g'					\
   2.324 +		 -e 's/@@minorver@@/$(VER_MINOR)/g'					\
   2.325 +		 -e 's/@@extraver@@/$(subst \",,$(VER_EXTRA))/g'	\
   2.326 +		 -e 's/@@buildnum@@/$(VER_BUILDNUM)/g'				\
   2.327 +		 -e 's/@@buildtype@@/$(BUILD_TYPE)/g'				\
   2.328 +		 -e 's/@@vcs@@/$(VER_VCS)/g'						\
   2.329 +		 -e 's/@@vcsrev@@/$(VER_VCSREV)/g'					\
   2.330 +		 -e 's/@@vcsstr@@/$(VER_VCSSTR)/g'					\
   2.331 +		 -e 's/@@fullverstr@@/$(VER_FULLSTR)/g'				\
   2.332 +		 -e 's/@@cflags@@/$(CFLAGS)/g'						\
   2.333 +		 < src/version.h.in > src/version.h
   2.334 +
   2.335 +# version.h creation stuff based on code from the Xen makefile
   2.336 +clean-versioninfo:
   2.337 +	@if [ ! -r src/version.h -o -O src/version.h ]; then \
   2.338 +		rm -f src/version.h; \
   2.339 +	fi
   2.340 +	@echo 0 > .buildnum
   2.341 +
   2.342 +# initialise the build system for a new project
   2.343 +init:
   2.344 +	@mkdir -p src dep obj
   2.345 +	@echo "This file is a directory-keeper. Do not delete it." > dep/.keepme
   2.346 +	@echo "This file is a directory-keeper. Do not delete it." > obj/.keepme
   2.347 +	@echo 0 > .buildnum
   2.348 +	@echo 'syntax: glob' > .hgignore
   2.349 +	@echo 'obj/*.o' >> .hgignore
   2.350 +	@echo 'dep/*.d' >> .hgignore
   2.351 +	@echo '*~' >> .hgignore
   2.352 +	@echo '.*.sw?' >> .hgignore
   2.353 +	@echo '#define VER_COMPILE_DATE	"@@date@@"'				> src/version.h.in
   2.354 +	@echo '#define VER_COMPILE_TIME	"@@time@@"'				>> src/version.h.in
   2.355 +	@echo '#define VER_COMPILE_BY		"@@whoami@@"'		>> src/version.h.in
   2.356 +	@echo '#define VER_COMPILE_HOST	"@@hostname@@"'			>> src/version.h.in
   2.357 +	@echo '#define VER_COMPILER		"@@compiler@@"'			>> src/version.h.in
   2.358 +	@echo '#define VER_BUILD_TYPE		"@@buildtype@@"'	>> src/version.h.in
   2.359 +	@echo '#define VER_CFLAGS			"@@cflags@@"'		>> src/version.h.in
   2.360 +	@echo ''												>> src/version.h.in
   2.361 +	@echo '#define VER_MAJOR			@@majorver@@'		>> src/version.h.in
   2.362 +	@echo '#define VER_MINOR			@@minorver@@'		>> src/version.h.in
   2.363 +	@echo '#define VER_BUILDNUM		@@buildnum@@'			>> src/version.h.in
   2.364 +	@echo '#define VER_EXTRA			"@@extraver@@"'		>> src/version.h.in
   2.365 +	@echo '#define VER_VCSREV			"@@vcsstr@@"'		>> src/version.h.in
   2.366 +	@echo ''												>> src/version.h.in
   2.367 +	@echo '#define VER_FULLSTR			"@@fullverstr@@"'	>> src/version.h.in
   2.368 +	@echo ''												>> src/version.h.in
   2.369 +	@echo Build system initialised
   2.370 +
   2.371 +# remove the dependency files
   2.372 +cleandep:
   2.373 +	-rm $(DEPFILES)
   2.374 +
   2.375 +# remove the dependency files and any target or intermediate build files
   2.376 +clean:	cleandep clean-versioninfo
   2.377 +	-rm $(OBJ) $(TARGET) $(GARBAGE)
   2.378 +
   2.379 +# remove any dependency or intermediate build files
   2.380 +tidy:	cleandep clean-versioninfo
   2.381 +	-rm $(OBJ) $(GARBAGE)
   2.382 +
   2.383 +#################################
   2.384 +
   2.385 +$(TARGET):	$(OBJ) $(EXTDEP)
   2.386 +ifeq ($(SRC_TYPE),c)
   2.387 +	$(CC) $(CXXFLAGS) $(LDFLAGS) $(OBJ) $(LIBPTH) $(LIBLNK) -o $@
   2.388 +else
   2.389 +	$(CXX) $(CXXFLAGS) $(LDFLAGS) $(OBJ) $(LIBPTH) $(LIBLNK) -o $@
   2.390 +endif
   2.391 +ifeq ($(BUILD_TYPE),release)
   2.392 +	$(STRIP) $(TARGET)
   2.393 +endif
   2.394 +
   2.395 +###
   2.396 +# extra rules
   2.397 +# example:
   2.398 +#src/parser.c:	src/parser.h
   2.399 +
   2.400 +
   2.401 +####
   2.402 +## musashi build rules
   2.403 +# 68k CPU builder
   2.404 +obj/musashi/m68kmake:	obj/musashi/m68kmake.o
   2.405 +	$(CC) $(CFLAGS) $(CPPFLAGS) obj/musashi/m68kmake.o -o $@
   2.406 +# 68k CPU sources
   2.407 +src/musashi/m68kops.h src/musashi/m68kops.c:	obj/musashi/m68kmake src/musashi/m68k_in.c
   2.408 +	./obj/musashi/m68kmake src/musashi src/musashi/m68k_in.c
   2.409 +
   2.410 +####
   2.411 +# make object files from C source files
   2.412 +obj/%.o:	src/%.c
   2.413 +	$(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@
   2.414 +
   2.415 +##
   2.416 +# make object files from C++ source files
   2.417 +obj/%.o:	src/%.cc
   2.418 +	$(CXX) -c $(CXXFLAGS) $(CPPFLAGS) $< -o $@
   2.419 +
   2.420 +obj/%.o:	src/%.cpp
   2.421 +	$(CXX) -c $(CXXFLAGS) $(CPPFLAGS) $< -o $@
   2.422 +
   2.423 +###
   2.424 +# make C files from yacc/bison source
   2.425 +src/%.h src/%.c:	src/%.y
   2.426 +	$(YACC) $(YFLAGS) -d $<
   2.427 +	mv -f y.tab.c $*.c
   2.428 +	mv -f y.tab.h $*.h
   2.429 +
   2.430 +###
   2.431 +# make C files from lex/flex source
   2.432 +src/%.c:	src/%.l
   2.433 +	$(LEX) $(LFLAGS) -o$@ $<
   2.434 +
   2.435 +###
   2.436 +# make dependencies for our source files
   2.437 +dep/%.d:	src/%.c
   2.438 +	$(CC) -MM $(CFLAGS) $(CPPFLAGS) $< > $@.$$$$; \
   2.439 +		sed 's,\($*\)\.o[ :]*,obj/\1.o $@ : ,g' < $@.$$$$ > $@; \
   2.440 +		rm -f $@.$$$$
   2.441 +
   2.442 +dep/%.d:	src/%.cpp
   2.443 +	$(CXX) -MM $(CXXFLAGS) $(CPPFLAGS) $< > $@.$$$$; \
   2.444 +		sed 's,\($*\)\.o[ :]*,obj/\1.o $@ : ,g' < $@.$$$$ > $@; \
   2.445 +		rm -f $@.$$$$
   2.446 +
   2.447 +dep/%.d:	src/%.cc
   2.448 +	$(CXX) -MM $(CXXFLAGS) $(CPPFLAGS) $< > $@.$$$$; \
   2.449 +		sed 's,\($*\)\.o[ :]*,obj/\1.o $@ : ,g' < $@.$$$$ > $@; \
   2.450 +		rm -f $@.$$$$
   2.451 +
   2.452 +####
   2.453 +# pull in the dependency files, but only for 'make $(TARGET)'
   2.454 +####
   2.455 +
   2.456 +ifeq ($(MAKECMDGOALS),$(TARGET))
   2.457 +  -include $(DEPFILES)
   2.458 +endif

     3.1 diff -r 000000000000 -r 8bf1bf91a36d dep/.keepme
     3.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.3 +++ b/dep/.keepme	Sat Nov 27 01:13:12 2010 +0000
     3.4 @@ -0,0 +1,1 @@
     3.5 +This file is a directory-keeper. Do not delete it.

     5.1 diff -r 000000000000 -r 8bf1bf91a36d obj/.keepme
     5.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.3 +++ b/obj/.keepme	Sat Nov 27 01:13:12 2010 +0000
     5.4 @@ -0,0 +1,1 @@
     5.5 +This file is a directory-keeper. Do not delete it.

     7.1 diff -r 000000000000 -r 8bf1bf91a36d src/main.c
     7.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.3 +++ b/src/main.c	Sat Nov 27 01:13:12 2010 +0000
     7.4 @@ -0,0 +1,6 @@
     7.5 +#include <stdio.h>
     7.6 +
     7.7 +int main(void)
     7.8 +{
     7.9 +	return 0;
    7.10 +}

     8.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/LICENSE
     8.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.3 +++ b/src/musashi/LICENSE	Sat Nov 27 01:13:12 2010 +0000
     8.4 @@ -0,0 +1,16 @@
     8.5 +From private email, dated 2010-Nov-26, 20:43 GMT:
     8.6 +
     8.7 +From: Karl Stenerud <kstenerud@gmail.com>
     8.8 +Subject: Re: Musashi 68k emulator
     8.9 +
    8.10 +On 2010-11-26, at 12:36 PM, Philip Pemberton wrote:
    8.11 +
    8.12 +> > I do have one question, though more related to licensing than the core itself...
    8.13 +> > 
    8.14 +> > I was planning to release my emulator under an open-source licence, probably the GPL or something along those lines (the worst case scenario IMO would be someone adding a ton of nice features then refusing to release the source).
    8.15 +> > 
    8.16 +> > The "non-commercial use only" restriction in the Musashi license would seem to be at odds with the GPL, and would make it somewhat more difficult to tie in GPL-licensed libraries. Is there any possibility of getting v3.31 released under a less restrictive license, maybe GPL or LGPL?
    8.17 +> > 
    8.18 +
    8.19 +Sure, no problem.  I usually release stuff under an Apache license nowadays, but feel free to pick any FOSS license.
    8.20 +

     9.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/Makefile
     9.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.3 +++ b/src/musashi/example/Makefile	Sat Nov 27 01:13:12 2010 +0000
     9.4 @@ -0,0 +1,40 @@
     9.5 +CC =     gcc
     9.6 +WARNINGS = -Wall -pedantic
     9.7 +CFLAGS = $(WARNINGS) -c -Iobj -I. -I..
     9.8 +LFLAGS = $(WARNINGS)
     9.9 +
    9.10 +all: obj sim
    9.11 +
    9.12 +clean:
    9.13 +	rm -rf obj
    9.14 +	rm -f sim
    9.15 +
    9.16 +obj:
    9.17 +	mkdir obj
    9.18 +
    9.19 +sim: obj/sim.o obj/m68kcpu.o obj/m68kops.o obj/m68kopac.o obj/m68kopdm.o obj/m68kopnz.o
    9.20 +	$(CC) $(LFLAGS) obj/sim.o obj/m68kcpu.o obj/m68kops.o obj/m68kopac.o obj/m68kopdm.o obj/m68kopnz.o -o sim
    9.21 +
    9.22 +obj/sim.o: sim.c sim.h ../m68k.h ../m68kconf.h
    9.23 +	$(CC) $(CFLAGS) sim.c -o obj/sim.o
    9.24 +
    9.25 +obj/m68kcpu.o: sim.h obj/m68kops.h sim.h ../m68k.h ../m68kconf.h
    9.26 +	$(CC) $(CFLAGS) ../m68kcpu.c -o obj/m68kcpu.o
    9.27 +
    9.28 +obj/m68kops.o: obj/m68kmake obj/m68kops.h obj/m68kops.c sim.h ../m68k.h ../m68kconf.h
    9.29 +	$(CC) $(CFLAGS) obj/m68kops.c -o obj/m68kops.o
    9.30 +
    9.31 +obj/m68kopac.o: obj/m68kmake obj/m68kops.h obj/m68kopac.c sim.h ../m68k.h ../m68kconf.h
    9.32 +	$(CC) $(CFLAGS) obj/m68kopac.c -o obj/m68kopac.o
    9.33 +
    9.34 +obj/m68kopdm.o: obj/m68kmake obj/m68kops.h obj/m68kopdm.c sim.h ../m68k.h ../m68kconf.h
    9.35 +	$(CC) $(CFLAGS) obj/m68kopdm.c -o obj/m68kopdm.o
    9.36 +
    9.37 +obj/m68kopnz.o: obj/m68kmake obj/m68kops.h obj/m68kopnz.c sim.h ../m68k.h ../m68kconf.h
    9.38 +	$(CC) $(CFLAGS) obj/m68kopnz.c -o obj/m68kopnz.o
    9.39 +
    9.40 +obj/m68kops.h: obj/m68kmake
    9.41 +	obj/m68kmake obj ../m68k_in.c
    9.42 +
    9.43 +obj/m68kmake: ../m68kmake.c ../m68k_in.c
    9.44 +	$(CC) $(WARNINGS) ../m68kmake.c -o obj/m68kmake

    10.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/example.txt
    10.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.3 +++ b/src/musashi/example/example.txt	Sat Nov 27 01:13:12 2010 +0000
    10.4 @@ -0,0 +1,301 @@
    10.5 +EXAMPLE:
    10.6 +-------
    10.7 +As an example, I'll build an imaginary hardware platform.
    10.8 +
    10.9 +
   10.10 +The system is fairly simple, comprising of a 000, an input device, an output
   10.11 +device, a non-maskable-interrupt device, and an interrupt controller.
   10.12 +
   10.13 +
   10.14 +The input device receives input from the user and asserts its interrupt
   10.15 +request line until its value is read.  Reading from the input device's
   10.16 +memory-mapped port will both clear its interrupt request and read an ASCII
   10.17 +representation (8 bits) of what the user entered.
   10.18 +
   10.19 +The output device reads value when it is selected through its memory-mapped
   10.20 +port and outputs it to a display.  The value it reads will be interpreted as
   10.21 +an ASCII value and output to the display. The output device is fairly slow
   10.22 +(it can only process 1 byte per second), and so it asserts its interrupt
   10.23 +request line when it is ready to receive a byte.  Writing to the output device
   10.24 +sends a byte to it.  If the output device is not ready, the write is ignored.
   10.25 +Reading from the output device returns 0 and clears its interrupt request line
   10.26 +until another byte is written to it and 1 second elapses.
   10.27 +
   10.28 +The non-maskable-interrupt (NMI) device, as can be surmised from the name,
   10.29 +generates a non-maskable-interrupt.  This is connected to some kind of external
   10.30 +switch that the user can push to generate a NMI.
   10.31 +
   10.32 +Since there are 3 devices interrupting the CPU, an interrupt controller is
   10.33 +needed.  The interrupt controller takes 7 inputs and encodes the highest
   10.34 +priority asserted line on the 3 output pins.  the input device is wired to IN2
   10.35 +and the output device is wired to IN1 on the controller.  The NMI device is
   10.36 +wired to IN7 and all the other inputs are wired low.
   10.37 +
   10.38 +The bus is also connected to a 1K ROM and a 256 byte RAM.
   10.39 +Beware: This platform places ROM and RAM in the same address range and uses
   10.40 +        the FC pins to select the correct address space!
   10.41 +        (You didn't expect me to make it easy, did you? =)
   10.42 +
   10.43 +There are two ways to handle address spaces with Musashi:
   10.44 +
   10.45 +1. Enable M68K_SEPARATE_READS and make handler functions for immediate and
   10.46 +   pc-relative reads.
   10.47 +
   10.48 +2. Enable M68K_EMULATE_FC and make a callback function for function code
   10.49 +   changes.
   10.50 +
   10.51 +Both methods will work in this case, but I've opted for the "more correct"
   10.52 +function code pin emulation for this example.
   10.53 +
   10.54 +
   10.55 +
   10.56 +Here is the schematic in all its ASCII splendour:
   10.57 +-------------------------------------------------
   10.58 +
   10.59 +     NMI     TIED
   10.60 +    SWITCH   LOW
   10.61 +      |       |
   10.62 +      | +-+-+-+
   10.63 +      | | | | | +------------------------------------------------+
   10.64 +      | | | | | | +------------------------------------+         |
   10.65 +      | | | | | | |                                    |         |
   10.66 +     +-------------+                                   |         |
   10.67 +     |7 6 5 4 3 2 1|                                   |         |
   10.68 +     |             |                                   |         |
   10.69 +     | INT CONTRLR |                                   |         |
   10.70 +     |             |                                   |         |
   10.71 +     |i i i        |                                   |         |
   10.72 +     |2 1 0        |                                   |         |
   10.73 +     +-------------+                                   |         |
   10.74 +      | | |                                            |         |
   10.75 +      | | |     +--------------------------------+--+  |         |
   10.76 +      o o o     |                                |  |  |         |
   10.77 +    +--------------+  +-------+  +----------+  +---------+  +----------+
   10.78 +    | I I I     a  |  |       |  |          |  | r  a  i |  |    i     |
   10.79 +    | 2 1 0    23  |  |       |  |          |  | e  c    |  |          |
   10.80 +    |              |  |       |  |          |  | a  k    |  |          |
   10.81 +    |              |  |       |  |          |  | d       |  |          |
   10.82 +    |              |  |       |  |          |  |         |  |          |
   10.83 +    |    M68000    |  |  ROM  |  |   RAM    |  |   IN    |  |   OUT    |
   10.84 +    |              |  |       |  |          |  |         |  |          |
   10.85 +    |            a9|--|a9     |--|          |--|         |--|          |
   10.86 +    |            a8|--|a8     |--|          |--|         |--|          |
   10.87 +    |            a7|--|a7     |--|a7        |--|         |--|          |
   10.88 +    |            a6|--|a6     |--|a6        |--|         |--|          |
   10.89 +    |            a5|--|a5     |--|a5        |--|         |--|          |
   10.90 +    |            a4|--|a4     |--|a4        |--|         |--|          |
   10.91 +    |            a3|--|a3     |--|a3        |--|         |--|          |
   10.92 +    |            a2|--|a2     |--|a2        |--|         |--|          |
   10.93 +    |            a1|--|a1     |--|a1        |--|         |--|          |
   10.94 +    |            a0|--|a0     |--|a0        |--|         |--|          |
   10.95 +    |              |  |       |  |          |  |         |  |          |
   10.96 +    |           d15|--|d15    |--|d15       |--|         |--|          |
   10.97 +    |           d14|--|d14    |--|d14       |--|         |--|          |
   10.98 +    |           d13|--|d13    |--|d13       |--|         |--|          |
   10.99 +    |           d12|--|d12    |--|d12       |--|         |--|          |
  10.100 +    |           d11|--|d11    |--|d11       |--|         |--|          |
  10.101 +    |           d10|--|d10    |--|d10       |--|         |--|          |
  10.102 +    |            d9|--|d9     |--|d9        |--|         |--|          |
  10.103 +    |            d8|--|d8     |--|d8        |--|         |--|          |
  10.104 +    |            d7|--|d7     |--|d7        |--|d7       |--|d7        |
  10.105 +    |            d6|--|d6     |--|d6        |--|d6       |--|d6        |
  10.106 +    |            d5|--|d5     |--|d5        |--|d5       |--|d5        |
  10.107 +    |            d4|--|d4     |--|d4        |--|d4       |--|d4        |
  10.108 +    |            d3|--|d3     |--|d3        |--|d3       |--|d3        |
  10.109 +    |            d2|--|d2     |--|d2        |--|d2       |--|d2        |
  10.110 +    |            d1|--|d1     |--|d1        |--|d1       |--|d1  w     |
  10.111 +    |            d0|--|d0     |--|d0        |--|d0       |--|d0  r     |
  10.112 +    |              |  |       |  |          |  |         |  |    i   a |
  10.113 +    | a      F F F |  |       |  |          |  |         |  |    t   c |
  10.114 +    |22  rW  2 1 0 |  |  cs   |  | cs   rW  |  |         |  |    e   k |
  10.115 +    +--------------+  +-------+  +----------+  +---------+  +----------+
  10.116 +      |   |  | | |        |         |    |                       |   |
  10.117 +      |   |  | | |        |         |    |                       |   |
  10.118 +      |   |  | | |    +-------+  +-----+ |                     +---+ |
  10.119 +      |   |  | | |    |  IC1  |  | IC2 | |                     |AND| |
  10.120 +      |   |  | | |    |a b c d|  |a b c| |                     +---+ |
  10.121 +      |   |  | | |    +-------+  +-----+ |                      | |  |
  10.122 +      |   |  | | |     | | | |    | | |  |                      | +--+
  10.123 +      |   |  | | |     | | | |    | | |  |                      | |
  10.124 +      |   |  | | |     | | | |    | | |  |                      | |
  10.125 +      |   |  | | |     | | | |    | | |  |                      | |
  10.126 +      |   |  | | +-----)-)-+-)----)-)-+  |                      | |
  10.127 +      |   |  | +-------)-+---)----)-+    |                      | |
  10.128 +      |   |  +---------+-----)----+      |                      | |
  10.129 +      |   |                  |           |                      | |
  10.130 +      |   +------------------+-----------+----------------------+ |
  10.131 +      |                                                           |
  10.132 +      +-----------------------------------------------------------+
  10.133 +
  10.134 +IC1: output=1 if a=0 and b=1 and c=0 and d=0
  10.135 +IC2: output=1 if a=0 and b=0 and c=1
  10.136 +
  10.137 +
  10.138 +
  10.139 +Here is the listing for program.bin:
  10.140 +-----------------------------------
  10.141 +
  10.142 +                        INPUT_ADDRESS   equ $800000
  10.143 +                        OUTPUT_ADDRESS  equ $400000
  10.144 +                        CIRCULAR_BUFFER equ $c0
  10.145 +                        CAN_OUTPUT      equ $d0
  10.146 +                        STACK_AREA      equ $100
  10.147 +                        
  10.148 +                        vector_table:
  10.149 +00000000 0000 0100      	dc.l STACK_AREA				*  0: SP
  10.150 +00000004 0000 00c0      	dc.l init					*  1: PC
  10.151 +00000008 0000 0148      	dc.l unhandled_exception	*  2: bus error
  10.152 +0000000c 0000 0148      	dc.l unhandled_exception	*  3: address error
  10.153 +00000010 0000 0148      	dc.l unhandled_exception	*  4: illegal instruction
  10.154 +00000014 0000 0148      	dc.l unhandled_exception	*  5: zero divide
  10.155 +00000018 0000 0148      	dc.l unhandled_exception	*  6: chk
  10.156 +0000001c 0000 0148      	dc.l unhandled_exception	*  7: trapv
  10.157 +00000020 0000 0148      	dc.l unhandled_exception	*  8: privilege violation
  10.158 +00000024 0000 0148      	dc.l unhandled_exception	*  9: trace
  10.159 +00000028 0000 0148      	dc.l unhandled_exception	* 10: 1010
  10.160 +0000002c 0000 0148      	dc.l unhandled_exception	* 11: 1111
  10.161 +00000030 0000 0148      	dc.l unhandled_exception	* 12: -
  10.162 +00000034 0000 0148      	dc.l unhandled_exception	* 13: -
  10.163 +00000038 0000 0148      	dc.l unhandled_exception	* 14: -
  10.164 +0000003c 0000 0148      	dc.l unhandled_exception	* 15: uninitialized interrupt
  10.165 +00000040 0000 0148      	dc.l unhandled_exception	* 16: -
  10.166 +00000044 0000 0148      	dc.l unhandled_exception	* 17: -
  10.167 +00000048 0000 0148      	dc.l unhandled_exception	* 18: -
  10.168 +0000004c 0000 0148      	dc.l unhandled_exception	* 19: -
  10.169 +00000050 0000 0148      	dc.l unhandled_exception	* 20: -
  10.170 +00000054 0000 0148      	dc.l unhandled_exception	* 21: -
  10.171 +00000058 0000 0148      	dc.l unhandled_exception	* 22: -
  10.172 +0000005c 0000 0148      	dc.l unhandled_exception	* 23: -
  10.173 +00000060 0000 0148      	dc.l unhandled_exception	* 24: spurious interrupt
  10.174 +00000064 0000 0136      	dc.l output_ready			* 25: l1 irq
  10.175 +00000068 0000 010e      	dc.l input_ready			* 26: l2 irq
  10.176 +0000006c 0000 0148      	dc.l unhandled_exception	* 27: l3 irq
  10.177 +00000070 0000 0148      	dc.l unhandled_exception	* 28: l4 irq
  10.178 +00000074 0000 0148      	dc.l unhandled_exception	* 29: l5 irq
  10.179 +00000078 0000 0148      	dc.l unhandled_exception	* 30: l6 irq
  10.180 +0000007c 0000 014e      	dc.l nmi					* 31: l7 irq
  10.181 +00000080 0000 0148      	dc.l unhandled_exception	* 32: trap 0
  10.182 +00000084 0000 0148      	dc.l unhandled_exception	* 33: trap 1
  10.183 +00000088 0000 0148      	dc.l unhandled_exception	* 34: trap 2
  10.184 +0000008c 0000 0148      	dc.l unhandled_exception	* 35: trap 3
  10.185 +00000090 0000 0148      	dc.l unhandled_exception	* 36: trap 4
  10.186 +00000094 0000 0148      	dc.l unhandled_exception	* 37: trap 5
  10.187 +00000098 0000 0148      	dc.l unhandled_exception	* 38: trap 6
  10.188 +0000009c 0000 0148      	dc.l unhandled_exception	* 39: trap 7
  10.189 +000000a0 0000 0148      	dc.l unhandled_exception	* 40: trap 8
  10.190 +000000a4 0000 0148      	dc.l unhandled_exception	* 41: trap 9
  10.191 +000000a8 0000 0148      	dc.l unhandled_exception	* 42: trap 10
  10.192 +000000ac 0000 0148      	dc.l unhandled_exception	* 43: trap 11
  10.193 +000000b0 0000 0148      	dc.l unhandled_exception	* 44: trap 12
  10.194 +000000b4 0000 0148      	dc.l unhandled_exception	* 45: trap 13
  10.195 +000000b8 0000 0148      	dc.l unhandled_exception	* 46: trap 14
  10.196 +000000bc 0000 0148      	dc.l unhandled_exception	* 47: trap 15
  10.197 +                        * This is the end of the useful part of the table.
  10.198 +                        * We will now do the Capcom thing and put code starting at $c0.
  10.199 +                        
  10.200 +                        init:
  10.201 +                        * Copy the exception vector table to RAM.
  10.202 +000000c0 227c 0000 0000 	move.l  #0, a1						* a1 is RAM index
  10.203 +000000c6 303c 002f      	move.w  #47, d0						* d0 is counter (48 vectors)
  10.204 +000000ca 41fa 0006      	lea.l   (copy_table,PC), a0			* a0 is scratch
  10.205 +000000ce 2208           	move.l  a0, d1						* d1 is ROM index
  10.206 +000000d0 4481           	neg.l   d1
  10.207 +                        copy_table:
  10.208 +000000d2 22fb 18fe      	dc.l    $22fb18fe					* #%#$ as68k generates 020 code here
  10.209 +                        *	move.l  (copy_table,PC,d1.l), (a1)+
  10.210 +000000d6 5841           	addq    #4, d1
  10.211 +000000d8 51c8 fff8      	dbf     d0, copy_table
  10.212 +                        
  10.213 +                        main_init:
  10.214 +                        * Initialize main program
  10.215 +000000dc 11fc 0000 00d0 	move.b  #0, CAN_OUTPUT
  10.216 +000000e2 4df8 00c0      	lea.l   CIRCULAR_BUFFER, a6
  10.217 +000000e6 7c00           	moveq   #0, d6						* output buffer ptr
  10.218 +000000e8 7e00           	moveq   #0, d7						* input buffer ptr
  10.219 +000000ea 027c f8ff      	andi    #$f8ff, SR					* clear interrupt mask
  10.220 +                        main:
  10.221 +                        * Main program
  10.222 +000000ee 4a38 00d0      	tst.b   CAN_OUTPUT					* can we output?
  10.223 +000000f2 67fa           	beq     main
  10.224 +000000f4 be06           	cmp.b   d6, d7						* is there data?
  10.225 +000000f6 67f6           	beq     main
  10.226 +000000f8 11fc 0000 00d0 	move.b  #0, CAN_OUTPUT
  10.227 +000000fe 13f6 6000 0040 	move.b  (0,a6,d6.w), OUTPUT_ADDRESS	* write data
  10.228 +         0000
  10.229 +00000106 5246           	addq    #1, d6
  10.230 +00000108 0206 000f      	andi.b  #15, d6						* update circular buffer
  10.231 +0000010c 60e0           	bra     main
  10.232 +                        
  10.233 +                        
  10.234 +                        input_ready:
  10.235 +0000010e 2f00           	move.l  d0, -(a7)
  10.236 +00000110 2f01           	move.l  d1, -(a7)
  10.237 +00000112 1239 0080 0000 	move.b  INPUT_ADDRESS, d1			* read data
  10.238 +00000118 1007           	move.b  d7, d0						* check if buffer full
  10.239 +0000011a 5240           	addq    #1, d0
  10.240 +0000011c 0200 000f      	andi.b  #15, d0
  10.241 +00000120 bc00           	cmp.b   d0, d6
  10.242 +00000122 6700 000c      	beq     input_ready_quit			* throw away if full
  10.243 +00000126 1d81 7000      	move.b  d1, (0,a6,d7.w)				* store the data
  10.244 +0000012a 5247           	addq    #1, d7
  10.245 +0000012c 0207 000f      	andi.b  #15, d7						* update circular buffer
  10.246 +                        input_ready_quit:
  10.247 +00000130 221f           	move.l  (a7)+, d1
  10.248 +00000132 201f           	move.l  (a7)+, d0
  10.249 +00000134 4e73           	rte
  10.250 +                        
  10.251 +                        output_ready:
  10.252 +00000136 2f00           	move.l  d0, -(a7)
  10.253 +00000138 11fc 0001 00d0 	move.b  #1, CAN_OUTPUT
  10.254 +0000013e 1039 0040 0000 	move.b  OUTPUT_ADDRESS, d0			* acknowledge the interrupt
  10.255 +00000144 201f           	move.l  (a7)+, d0
  10.256 +00000146 4e73           	rte
  10.257 +                        
  10.258 +                        unhandled_exception:
  10.259 +00000148 4e72 2700      	stop	#$2700						* wait for NMI
  10.260 +0000014c 60fa           	bra     unhandled_exception			* shouldn't get here
  10.261 +                        
  10.262 +                        nmi:
  10.263 +                        * perform a soft reset
  10.264 +0000014e 46fc 2700      	move    #$2700, SR					* set status register
  10.265 +00000152 2e7a feac      	move.l  (vector_table,PC), a7		* reset stack pointer
  10.266 +00000156 4e70           	reset								* reset peripherals
  10.267 +00000158 4efa feaa      	jmp     (vector_table+4,PC)			* reset program counter
  10.268 +                        
  10.269 +                        END
  10.270 +
  10.271 +
  10.272 +
  10.273 +Compiling the example host environment:
  10.274 +--------------------------------------
  10.275 +
  10.276 +The following assumes that you are using a GNU-based compiler such as gcc or
  10.277 +djgpp for DOS (available free from www.delorie.com).
  10.278 +If you are using a commercial compiler, you may have to modify the makefile
  10.279 +or generate your own project file.
  10.280 +Also note that part of the compilation process involves the compilation and
  10.281 +invokation of the m68kmake program.
  10.282 +
  10.283 +- Copy the m68k files to a directory.  Then copy the host environment files to
  10.284 +  the same directory, overwriting m68kconf.h.  program.bin is the actual 68000
  10.285 +  program you will be running.
  10.286 +- Modify osd_get_key() in sim.c to suit your environment (currently set for
  10.287 +  the free djgpp compiler, available from www.delorie.com, under DOS).
  10.288 +- Type make
  10.289 +- Perform the necessary animal sacrifices.
  10.290 +- Type sim program.bin
  10.291 +
  10.292 +
  10.293 +Keys:
  10.294 +	ESC           - quits the simulator
  10.295 +	~             - generates an NMI interrupt
  10.296 +	Any other key - Genearate input for the input device
  10.297 +
  10.298 +
  10.299 +Note: I've cheated a bit in the emulation.  There is no speed control
  10.300 +      to set the speed the CPU runs at; it simply runs as fast as your
  10.301 +      processor can run it.
  10.302 +      To add speed control, you will need a high-precision timestamp
  10.303 +      function (like the RDTSC instruction for newer Pentium CPUs)
  10.304 +      and a bit of arithmetic to make the cycles argument for m68k_execute().
  10.305 +      I'll leave that as an excercise to the reader.

    11.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/history.txt
    11.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    11.3 +++ b/src/musashi/example/history.txt	Sat Nov 27 01:13:12 2010 +0000
    11.4 @@ -0,0 +1,114 @@
    11.5 +The history of Musashi for anyone who might be interested:
    11.6 +---------------------------------------------------------
    11.7 +
    11.8 +Musashi was born out of sheer boredom.
    11.9 +I needed something to code, and so having had fun with a few of the emulators
   11.10 +around, I decided to try my hand at CPU emulation.
   11.11 +I had owned an Amiga for many years and had done some assembly coding on it so
   11.12 +I figured it would be the ideal chip to cut my teeth on.
   11.13 +Had I known then how much work was involved in emulating a chip like this, I
   11.14 +may not have even started ;-)
   11.15 +
   11.16 +
   11.17 +
   11.18 +12-May-1998: First outline
   11.19 +
   11.20 +11-Jun-1998: Early disassembler
   11.21 +
   11.22 +20-Nov-1998: First prototype v0.1
   11.23 +
   11.24 +04-Dec-1998: Final prototype v0.4
   11.25 +
   11.26 +20-Dec-1998: Beta release of Musashi v0.5 that could run Rastan Saga under MAME
   11.27 +             (barely).
   11.28 +
   11.29 +06-Jan-1999: Musashi 1.0 released
   11.30 +
   11.31 +17-Mar-1999: Musashi 2.0 released
   11.32 +             - Major code overhaul.
   11.33 +             - Replaced monolithic codebase with a code generator program.
   11.34 +             - Added correct m68000 timing.
   11.35 +             - Moved timing into the opcode handlers.
   11.36 +
   11.37 +25-Mar-1999: Musashi 2.1 released
   11.38 +             - Added support for m68010.
   11.39 +             - Many bugfixes.
   11.40 +
   11.41 +13-May-1999: Musashi 2.2 released
   11.42 +             - Added support for m68020.
   11.43 +             - Lots of bugfixes.
   11.44 +
   11.45 +05-Apr-2000: Musashi 3.0 released
   11.46 +             - Major code overhaul.
   11.47 +             - Rewrote code generator program and changed the format of
   11.48 +               m68k_in.c.
   11.49 +             - Added support for m68ec020.
   11.50 +             - Removed timing from the opcode handlers.
   11.51 +             - Added correct timing for m68000, m68010, and m68020.
   11.52 +               Note: 68020 timing is the cache timing from the manual.
   11.53 +             - Removed the m68k_peek_xxx() and m68k_poke_xxx() instructions and
   11.54 +               replaced them with m68k_get_reg() and m68k_set_reg().
   11.55 +             - Added support for function codes.
   11.56 +             - Revamped m68kconf.h to be easier to configure and more powerful.
   11.57 +             - Added option to separate immediate and normal reads.
   11.58 +             - Added support for (undocumented) m68000 instruction prefetch.
   11.59 +             - Rewrote indexed addressing mode handling.
   11.60 +             - Rewrote interrupt handling.
   11.61 +             - Fixed a masking bug for m68k_get_reg() when requesting the PC.
   11.62 +             - Moved the instruction table sorting routine to m68kmake.c so
   11.63 +               that it is invoked at compile time rather than at runtime.
   11.64 +             - Rewrote the exception handling routines to support different
   11.65 +               stack frames (needed for m68020 emulation).
   11.66 +             - Rewrote faster status register and condition code flag handling
   11.67 +               functions / macros.
   11.68 +             - Fixed function code handling to fetch from program space when
   11.69 +               using pc-relative addressing.
   11.70 +             - Fixed initial program counter and stack pointer fetching on
   11.71 +               reset (loads from program space now).
   11.72 +             - A lot of code cleanup.
   11.73 +             - LOTS of bugfixes (especially in the m68020 code).
   11.74 +
   11.75 +28-May-2000: Musashi 3.1 released
   11.76 +             - Fixed bug in m68k_get_reg() that retrieved the wrong value for
   11.77 +               the status register.
   11.78 +             - Fixed register bug in movec.
   11.79 +             - Fixed cpu type comparison problem that caused indexed
   11.80 +               addressing modes to be incorrectly interpreted when in m68ec020
   11.81 +               mode.
   11.82 +             - Added code to speed up busy waiting on some branch instructions.
   11.83 +             - Fixed some bfxxx opcode bugs.
   11.84 +
   11.85 +14-Aug-2000: Musashi 3.2 released
   11.86 +             - Fixed RTE bug that killed the program counter when in m68020
   11.87 +               mode.
   11.88 +             - Minor fixes in negx and nbcd.
   11.89 +             - renamed d68k.c to m68kdasm.c and merged d68k.h into m68k.h.
   11.90 +               d68k_read_xxx() instructions have been renamed to
   11.91 +               m68k_read_xxx_disassembler().
   11.92 +             - Rewrote exception processing and fixed 68020 stack frame
   11.93 +               problems.
   11.94 +             - FINALLY fixed the mull and divl instructions.
   11.95 +             - Added 64-bit safe code fixes.
   11.96 +             - Added 64-bit optimizations (these will only  be ANSI compliant
   11.97 +               under c9x, and so to use them you must turn on M68K_USE_64_BIT
   11.98 +               in m68kconf.h).
   11.99 +
  11.100 +27-Jan-2001: Musashi 3.3 released
  11.101 +             Note: This is the last release of Musashi before I separate the
  11.102 +                   68020 core.
  11.103 +             - Fixed problem when displaying negative numbers in disassembler
  11.104 +             - Fixed cpu type selector - was allowing 020 instructions to be
  11.105 +               disassembled when in 000 mode.
  11.106 +             - Fixed opcode jumptable generator (ambiguous operators in the
  11.107 +               test for f-line ops)
  11.108 +             - Fixed signed/unsigned problem in divl and mull opcodes (not
  11.109 +               sure if this was causing an error but best to be sure)
  11.110 +             - Cleaned up the naming scheme for the opcode handlers
  11.111 +
  11.112 +02-Feb-2001: Musashi 3.3.1 released
  11.113 +             Note: due to the pc-relative requirement for some new drivers
  11.114 +                   in MAME, I've released this small update.
  11.115 +             - Added pc-relative read modes
  11.116 +             - small optimizations to the exception handling that will help
  11.117 +               when splitting the cores
  11.118 +             - Updated the example (oops!)

    13.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/readme.txt
    13.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    13.3 +++ b/src/musashi/example/readme.txt	Sat Nov 27 01:13:12 2010 +0000
    13.4 @@ -0,0 +1,315 @@
    13.5 +                                    MUSASHI
    13.6 +                                    =======
    13.7 +
    13.8 +                                  Version 3.3
    13.9 +
   13.10 +             A portable Motorola M680x0 processor emulation engine.
   13.11 +            Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   13.12 +
   13.13 +
   13.14 +
   13.15 +INTRODUCTION:
   13.16 +------------
   13.17 +
   13.18 +Musashi is a Motorola 68000, 68010, 68EC020, and 68020 emulator written in C.
   13.19 +This emulator was written with two goals in mind: portability and speed.
   13.20 +
   13.21 +The emulator is written to ANSI C specifications with the exception that I use
   13.22 +inline functions.  This is not compliant to the ANSI spec, but will be
   13.23 +compliant to the ANSI C9X spec.
   13.24 +
   13.25 +It has been successfully running in the MAME project (www.mame.net) for over 2
   13.26 +years and so has had time to mature.
   13.27 +
   13.28 +
   13.29 +
   13.30 +LICENSE AND COPYRIGHT:
   13.31 +---------------------
   13.32 +
   13.33 +The Musashi M680x0 emulator is copyright 1998-2001 Karl Stenerud.
   13.34 +
   13.35 +The source code included in this archive is provided AS-IS, free for any
   13.36 +non-commercial purpose.
   13.37 +
   13.38 +If you build a program using this core, please give credit to the author.
   13.39 +
   13.40 +If you wish to use this core in a commercial environment, please contact
   13.41 +the author to discuss commercial licensing.
   13.42 +
   13.43 +
   13.44 +
   13.45 +AVAILABILITY:
   13.46 +------------
   13.47 +The latest version of this code can be obtained at:
   13.48 +http://kstenerud.cjb.net
   13.49 +
   13.50 +
   13.51 +
   13.52 +CONTACTING THE AUTHOR:
   13.53 +---------------------
   13.54 +I can be reached at kstenerud@mame.net
   13.55 +
   13.56 +
   13.57 +
   13.58 +BASIC CONFIGURATION:
   13.59 +-------------------
   13.60 +The basic configuration will give you a standard 68000 that has sufficient
   13.61 +functionality to work in a primitive environment.
   13.62 +
   13.63 +This setup assumes that you only have 1 device interrupting it, that the
   13.64 +device will always request an autovectored interrupt, and it will always clear
   13.65 +the interrupt before the interrupt service routine finishes (but could
   13.66 +possibly re-assert the interrupt).
   13.67 +You will have only one address space, no tracing, and no instruction prefetch.
   13.68 +
   13.69 +To implement the basic configuration:
   13.70 +
   13.71 +- Open m68kconf.h and verify that the settings for INLINE and DECL_SPEC will
   13.72 +  work with your compiler. (They are set for gcc)
   13.73 +
   13.74 +- In your host program, implement the following functions:
   13.75 +    unsigned int  m68k_read_memory_8(unsigned int address);
   13.76 +    unsigned int  m68k_read_memory_16(unsigned int address);
   13.77 +    unsigned int  m68k_read_memory_32(unsigned int address);
   13.78 +    void m68k_write_memory_8(unsigned int address, unsigned int value);
   13.79 +    void m68k_write_memory_16(unsigned int address, unsigned int value);
   13.80 +    void m68k_write_memory_32(unsigned int address, unsigned int value);
   13.81 +
   13.82 +- In your host program, be sure to call m68k_pulse_reset() once before calling
   13.83 +  any of the other functions as this initializes the core.
   13.84 +
   13.85 +- Use m68k_execute() to execute instructions and m68k_set_irq() to cause an
   13.86 +  interrupt.
   13.87 +
   13.88 +
   13.89 +
   13.90 +ADDING PROPER INTERRUPT HANDLING:
   13.91 +--------------------------------
   13.92 +The interrupt handling in the basic configuration doesn't emulate the
   13.93 +interrupt acknowledge phase of the CPU and automatically clears an interrupt
   13.94 +request during interrupt processing.
   13.95 +While this works for most systems, you may need more accurate interrupt
   13.96 +handling.
   13.97 +
   13.98 +To add proper interrupt handling:
   13.99 +
  13.100 +- In m68kconf.h, set M68K_EMULATE_INT_ACK to OPT_SPECIFY_HANDLER
  13.101 +
  13.102 +- In m68kconf.h, set M68K_INT_ACK_CALLBACK(A) to your interrupt acknowledge
  13.103 +  routine
  13.104 +
  13.105 +- Your interrupt acknowledge routine must return an interrupt vector,
  13.106 +  M68K_INT_ACK_AUTOVECTOR, or M68K_INT_ACK_SPURIOUS.  most m68k
  13.107 +  implementations just use autovectored interrupts.
  13.108 +
  13.109 +- When the interrupting device is satisfied, you must call m68k_set_irq(0) to
  13.110 +  remove the interrupt request.
  13.111 +
  13.112 +
  13.113 +
  13.114 +MULTIPLE INTERRUPTS:
  13.115 +-------------------
  13.116 +The above system will work if you have only one device interrupting the CPU,
  13.117 +but if you have more than one device, you must do a bit more.
  13.118 +
  13.119 +To add multiple interrupts:
  13.120 +
  13.121 +- You must make an interrupt arbitration device that will take the highest
  13.122 +  priority interrupt and encode it onto the IRQ pins on the CPU.
  13.123 +
  13.124 +- The interrupt arbitration device should use m68k_set_irq() to set the
  13.125 +  highest pending interrupt, or 0 for no interrupts pending.
  13.126 +
  13.127 +
  13.128 +
  13.129 +SEPARATE IMMEDIATE AND PC-RELATIVE READS:
  13.130 +----------------------------------------
  13.131 +You can write faster memory access functions if you know whether you are
  13.132 +fetching from ROM or RAM.  Immediate reads are always from the program space
  13.133 +(Always in ROM unless it is running self-modifying code).
  13.134 +This will also separate the pc-relative reads, since some systems treat
  13.135 +PROGRAM mode reads and DATA mode reads differently (for program encryption,
  13.136 +for instance).  See the section below (ADDRESS SPACE) for an explanation of
  13.137 +PROGRAM and DATA mode.
  13.138 +
  13.139 +To enable separate reads:
  13.140 +
  13.141 +- In m68kconf.h, turn on M68K_SEPARATE_READS.
  13.142 +
  13.143 +- In your host program, implement the following functions:
  13.144 +    unsigned int  m68k_read_immediate_16(unsigned int address);
  13.145 +    unsigned int  m68k_read_immediate_32(unsigned int address);
  13.146 +
  13.147 +    unsigned int  m68k_read_pcrelative_8(unsigned int address);
  13.148 +    unsigned int  m68k_read_pcrelative_16(unsigned int address);
  13.149 +    unsigned int  m68k_read_pcrelative_32(unsigned int address);
  13.150 +
  13.151 +- If you need to know the current PC (for banking and such), set
  13.152 +  M68K_MONITOR_PC to OPT_SPECIFY_HANDLER, and set M68K_SET_PC_CALLBACK(A) to
  13.153 +  your routine.
  13.154 +
  13.155 +
  13.156 +
  13.157 +ADDRESS SPACES:
  13.158 +--------------
  13.159 +Most systems will only implement one address space, placing ROM at the lower
  13.160 +addresses and RAM at the higher.  However, there is the possibility that a
  13.161 +system will implement ROM and RAM in the same address range, but in different
  13.162 +address spaces, or will have different mamory types that require different
  13.163 +handling for the program and the data.
  13.164 +
  13.165 +The 68k accomodates this by allowing different program spaces, the most
  13.166 +important to us being PROGRAM and DATA space.  Here is a breakdown of
  13.167 +how information is fetched:
  13.168 +
  13.169 +- All immediate reads are fetched from PROGRAM space.
  13.170 +
  13.171 +- All PC-relative reads are fetched from PROGRAM space.
  13.172 +
  13.173 +- The initial stack pointer and program counter are fetched from PROGRAM space.
  13.174 +
  13.175 +- All other reads (except for those from the moves instruction for 68020)
  13.176 +   are fetched from DATA space.
  13.177 +
  13.178 +The m68k deals with this by encoding the requested address space on the
  13.179 +function code pins:
  13.180 +
  13.181 +                       FC
  13.182 +    Address Space      210
  13.183 +    ------------------ ---
  13.184 +    USER DATA          001
  13.185 +    USER PROGRAM       010
  13.186 +    SUPERVISOR DATA    101
  13.187 +    SUPERVISOR PROGRAM 110
  13.188 +    CPU SPACE          111 <-- not emulated in this core since we emulate
  13.189 +                               interrupt acknowledge in another way.
  13.190 +
  13.191 +Problems arise here if you need to emulate this distinction (if, for example,
  13.192 +your ROM and RAM are at the same address range, with RAM and ROM enable
  13.193 +wired to the function code pins).
  13.194 +
  13.195 +There are 2 ways to deal with this situation using Musashi:
  13.196 +
  13.197 +1. If you only need the distinction between PROGRAM and DATA (the most common),
  13.198 +   you can just separate the reads (see the preceeding section).  This is the
  13.199 +   faster solution.
  13.200 +
  13.201 +2. You can emulate the function code pins entirely.
  13.202 +
  13.203 +To emulate the function code pins:
  13.204 +
  13.205 +- In m68kconf.h, set M68K_EMULATE_FC to OPT_SPECIFY_HANDLER and set
  13.206 +  M68K_SET_FC_CALLBACK(A) to your function code handler function.
  13.207 +
  13.208 +- Your function code handler should select the proper address space for
  13.209 +  subsequent calls to m68k_read_xx (and m68k_write_xx for 68010+).
  13.210 +
  13.211 +Note: immediate reads are always done from program space, so technically you
  13.212 +      don't need to implement the separate immediate reads, although you could
  13.213 +      gain more speed improvements leaving them in and doing some clever
  13.214 +      programming.
  13.215 +
  13.216 +
  13.217 +
  13.218 +USING DIFFERENT CPU TYPES:
  13.219 +-------------------------
  13.220 +The default is to enable only the 68000 cpu type.  To change this, change the
  13.221 +settings for M68K_EMULATE_010 etc in m68kconf.h.
  13.222 +
  13.223 +To set the CPU type you want to use:
  13.224 +
  13.225 +- Make sure it is enabled in m68kconf.h.  Current switches are:
  13.226 +    M68K_EMULATE_010
  13.227 +    M68K_EMULATE_EC020
  13.228 +    M68K_EMULATE_020
  13.229 +
  13.230 +- In your host program, call m68k_set_cpu_type() and then call
  13.231 +  m68k_pulse_reset().  Valid CPU types are:
  13.232 +    M68K_CPU_TYPE_68000,
  13.233 +    M68K_CPU_TYPE_68010,
  13.234 +    M68K_CPU_TYPE_68EC020,
  13.235 +    M68K_CPU_TYPE_68020
  13.236 +
  13.237 +
  13.238 +
  13.239 +CLOCK FREQUENCY:
  13.240 +---------------
  13.241 +In order to emulate the correct clock frequency, you will have to calculate
  13.242 +how long it takes the emulation to execute a certain number of "cycles" and
  13.243 +vary your calls to m68k_execute() accordingly.
  13.244 +As well, it is a good idea to take away the CPU's timeslice when it writes to
  13.245 +a memory-mapped port in order to give the device it wrote to a chance to
  13.246 +react.
  13.247 +
  13.248 +You can use the functions m68k_cycles_run(), m68k_cycles_remaining(),
  13.249 +m68k_modify_timeslice(), and m68k_end_timeslice() to do this.
  13.250 +Try to use large cycle values in your calls to m68k_execute() since it will
  13.251 +increase throughput.  You can always take away the timeslice later.
  13.252 +
  13.253 +
  13.254 +
  13.255 +MORE CORRECT EMULATION:
  13.256 +----------------------
  13.257 +You may need to enable these in order to properly emulate some of the more
  13.258 +obscure functions of the m68k:
  13.259 +
  13.260 +- M68K_EMULATE_BKPT_ACK causes the CPU to call a breakpoint handler on a BKPT
  13.261 +  instruction
  13.262 +
  13.263 +- M68K_EMULATE_TRACE causes the CPU to generate trace exceptions when the
  13.264 +  trace bits are set
  13.265 +
  13.266 +- M68K_EMULATE_RESET causes the CPU to call a reset handler on a RESET
  13.267 +  instruction.
  13.268 +
  13.269 +- M68K_EMULATE_PREFETCH emulates the 4-word instruction prefetch that is part
  13.270 +  of the 68000/68010 (needed for Amiga emulation).
  13.271 +
  13.272 +- call m68k_pulse_halt() to emulate the HALT pin.
  13.273 +
  13.274 +
  13.275 +
  13.276 +CONVENIENCE FUNCTIONS:
  13.277 +---------------------
  13.278 +These are in here for programmer convenience:
  13.279 +
  13.280 +- M68K_INSTRUCTION_HOOK lets you call a handler before each instruction.
  13.281 +
  13.282 +- M68K_LOG_ENABLE and M68K_LOG_1010_1111 lets you log illegal and A/F-line
  13.283 +  instructions.
  13.284 +
  13.285 +
  13.286 +
  13.287 +MULTIPLE CPU EMULATION:
  13.288 +----------------------
  13.289 +The default is to use only one CPU.  To use more than one CPU in this core,
  13.290 +there are some things to keep in mind:
  13.291 +
  13.292 +- To have different cpus call different functions, use OPT_ON instead of
  13.293 +  OPT_SPECIFY_HANDLER, and use the m68k_set_xxx_callback() functions to set
  13.294 +  your callback handlers on a per-cpu basis.
  13.295 +
  13.296 +- Be sure to call set_cpu_type() for each CPU you use.
  13.297 +
  13.298 +- Use m68k_set_context() and m68k_get_context() to switch to another CPU.
  13.299 +
  13.300 +
  13.301 +
  13.302 +LOAD AND SAVE CPU CONTEXTS FROM DISK:
  13.303 +------------------------------------
  13.304 +You can use them68k_load_context() and m68k_save_context() functions to load
  13.305 +and save the CPU state to disk.
  13.306 +
  13.307 +
  13.308 +
  13.309 +GET/SET INFORMATION FROM THE CPU:
  13.310 +--------------------------------
  13.311 +You can use m68k_get_reg() and m68k_set_reg() to gain access to the internals
  13.312 +of the CPU.
  13.313 +
  13.314 +
  13.315 +
  13.316 +EXAMPLE:
  13.317 +-------
  13.318 +
  13.319 +I have included a file example.zip that contains a full example.

    14.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/sim.c
    14.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.3 +++ b/src/musashi/example/sim.c	Sat Nov 27 01:13:12 2010 +0000
    14.4 @@ -0,0 +1,478 @@
    14.5 +#include <stdio.h>
    14.6 +#include <stdlib.h>
    14.7 +#include <stdarg.h>
    14.8 +#include <time.h>
    14.9 +#include "sim.h"
   14.10 +#include "m68k.h"
   14.11 +
   14.12 +/* Memory-mapped IO ports */
   14.13 +#define INPUT_ADDRESS 0x800000
   14.14 +#define OUTPUT_ADDRESS 0x400000
   14.15 +
   14.16 +/* IRQ connections */
   14.17 +#define IRQ_NMI_DEVICE 7
   14.18 +#define IRQ_INPUT_DEVICE 2
   14.19 +#define IRQ_OUTPUT_DEVICE 1
   14.20 +
   14.21 +/* Time between characters sent to output device (seconds) */
   14.22 +#define OUTPUT_DEVICE_PERIOD 1
   14.23 +
   14.24 +/* ROM and RAM sizes */
   14.25 +#define MAX_ROM 0xfff
   14.26 +#define MAX_RAM 0xff
   14.27 +
   14.28 +
   14.29 +/* Read/write macros */
   14.30 +#define READ_BYTE(BASE, ADDR) (BASE)[ADDR]
   14.31 +#define READ_WORD(BASE, ADDR) (((BASE)[ADDR]<<8) |			\
   14.32 +							  (BASE)[(ADDR)+1])
   14.33 +#define READ_LONG(BASE, ADDR) (((BASE)[ADDR]<<24) |			\
   14.34 +							  ((BASE)[(ADDR)+1]<<16) |		\
   14.35 +							  ((BASE)[(ADDR)+2]<<8) |		\
   14.36 +							  (BASE)[(ADDR)+3])
   14.37 +
   14.38 +#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[ADDR] = (VAL)%0xff
   14.39 +#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>8) & 0xff;		\
   14.40 +									(BASE)[(ADDR)+1] = (VAL)&0xff
   14.41 +#define WRITE_LONG(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>24) & 0xff;		\
   14.42 +									(BASE)[(ADDR)+1] = ((VAL)>>16)&0xff;	\
   14.43 +									(BASE)[(ADDR)+2] = ((VAL)>>8)&0xff;		\
   14.44 +									(BASE)[(ADDR)+3] = (VAL)&0xff
   14.45 +
   14.46 +
   14.47 +/* Prototypes */
   14.48 +void exit_error(char* fmt, ...);
   14.49 +int osd_get_char(void);
   14.50 +
   14.51 +unsigned int m68k_read_memory_8(unsigned int address);
   14.52 +unsigned int m68k_read_memory_16(unsigned int address);
   14.53 +unsigned int m68k_read_memory_32(unsigned int address);
   14.54 +void m68k_write_memory_8(unsigned int address, unsigned int value);
   14.55 +void m68k_write_memory_16(unsigned int address, unsigned int value);
   14.56 +void m68k_write_memory_32(unsigned int address, unsigned int value);
   14.57 +void cpu_pulse_reset(void);
   14.58 +void cpu_set_fc(unsigned int fc);
   14.59 +int cpu_irq_ack(int level);
   14.60 +
   14.61 +void nmi_device_reset(void);
   14.62 +void nmi_device_update(void);
   14.63 +int nmi_device_ack(void);
   14.64 +
   14.65 +void input_device_reset(void);
   14.66 +void input_device_update(void);
   14.67 +int input_device_ack(void);
   14.68 +unsigned int input_device_read(void);
   14.69 +void input_device_write(unsigned int value);
   14.70 +
   14.71 +void output_device_reset(void);
   14.72 +void output_device_update(void);
   14.73 +int output_device_ack(void);
   14.74 +unsigned int output_device_read(void);
   14.75 +void output_device_write(unsigned int value);
   14.76 +
   14.77 +void int_controller_set(unsigned int value);
   14.78 +void int_controller_clear(unsigned int value);
   14.79 +
   14.80 +void get_user_input(void);
   14.81 +
   14.82 +
   14.83 +/* Data */
   14.84 +unsigned int g_quit = 0;						/* 1 if we want to quit */
   14.85 +unsigned int g_nmi = 0;							/* 1 if nmi pending */
   14.86 +
   14.87 +int g_input_device_value = -1;					/* Current value in input device */
   14.88 +
   14.89 +unsigned int g_output_device_ready = 0;			/* 1 if output device is ready */
   14.90 +time_t g_output_device_last_output;				/* Time of last char output */
   14.91 +
   14.92 +unsigned int g_int_controller_pending = 0;		/* list of pending interrupts */
   14.93 +unsigned int g_int_controller_highest_int = 0;	/* Highest pending interrupt */
   14.94 +
   14.95 +unsigned char g_rom[MAX_ROM+1];					/* ROM */
   14.96 +unsigned char g_ram[MAX_RAM+1];					/* RAM */
   14.97 +unsigned int g_fc;								/* Current function code from CPU */
   14.98 +
   14.99 +
  14.100 +/* Exit with an error message.  Use printf syntax. */
  14.101 +void exit_error(char* fmt, ...)
  14.102 +{
  14.103 +	va_list args;
  14.104 +	va_start(args, fmt);
  14.105 +	vfprintf(stderr, fmt, args);
  14.106 +	va_end(args);
  14.107 +	fprintf(stderr, "\n");
  14.108 +
  14.109 +	exit(EXIT_FAILURE);
  14.110 +}
  14.111 +
  14.112 +/* OS-dependant code to get a character from the user.
  14.113 + * This function must not block, and must either return an ASCII code or -1.
  14.114 + */
  14.115 +//#include <conio.h>
  14.116 +int osd_get_char(void)
  14.117 +{
  14.118 +	int ch = -1;
  14.119 +/*	if(kbhit())
  14.120 +	{
  14.121 +		while(kbhit())
  14.122 +			ch = getch();
  14.123 +	}
  14.124 +*/	return ch;
  14.125 +}
  14.126 +
  14.127 +
  14.128 +/* Read data from RAM, ROM, or a device */
  14.129 +unsigned int m68k_read_memory_8(unsigned int address)
  14.130 +{
  14.131 +	if(g_fc & 2)	/* Program */
  14.132 +	{
  14.133 +		if(address > MAX_ROM)
  14.134 +			exit_error("Attempted to read byte from ROM address %08x", address);
  14.135 +		return READ_BYTE(g_rom, address);
  14.136 +	}
  14.137 +
  14.138 +	/* Otherwise it's data space */
  14.139 +	switch(address)
  14.140 +	{
  14.141 +		case INPUT_ADDRESS:
  14.142 +			return input_device_read();
  14.143 +		case OUTPUT_ADDRESS:
  14.144 +			return output_device_read();
  14.145 +		default:
  14.146 +			break;
  14.147 +	}
  14.148 +	if(address > MAX_RAM)
  14.149 +		exit_error("Attempted to read byte from RAM address %08x", address);
  14.150 +		return READ_BYTE(g_ram, address);
  14.151 +}
  14.152 +
  14.153 +unsigned int m68k_read_memory_16(unsigned int address)
  14.154 +{
  14.155 +	if(g_fc & 2)	/* Program */
  14.156 +	{
  14.157 +		if(address > MAX_ROM)
  14.158 +			exit_error("Attempted to read word from ROM address %08x", address);
  14.159 +		return READ_WORD(g_rom, address);
  14.160 +	}
  14.161 +
  14.162 +	/* Otherwise it's data space */
  14.163 +	switch(address)
  14.164 +	{
  14.165 +		case INPUT_ADDRESS:
  14.166 +			return input_device_read();
  14.167 +		case OUTPUT_ADDRESS:
  14.168 +			return output_device_read();
  14.169 +		default:
  14.170 +			break;
  14.171 +	}
  14.172 +	if(address > MAX_RAM)
  14.173 +		exit_error("Attempted to read word from RAM address %08x", address);
  14.174 +		return READ_WORD(g_ram, address);
  14.175 +}
  14.176 +
  14.177 +unsigned int m68k_read_memory_32(unsigned int address)
  14.178 +{
  14.179 +	if(g_fc & 2)	/* Program */
  14.180 +	{
  14.181 +		if(address > MAX_ROM)
  14.182 +			exit_error("Attempted to read long from ROM address %08x", address);
  14.183 +		return READ_LONG(g_rom, address);
  14.184 +	}
  14.185 +
  14.186 +	/* Otherwise it's data space */
  14.187 +	switch(address)
  14.188 +	{
  14.189 +		case INPUT_ADDRESS:
  14.190 +			return input_device_read();
  14.191 +		case OUTPUT_ADDRESS:
  14.192 +			return output_device_read();
  14.193 +		default:
  14.194 +			break;
  14.195 +	}
  14.196 +	if(address > MAX_RAM)
  14.197 +		exit_error("Attempted to read long from RAM address %08x", address);
  14.198 +		return READ_LONG(g_ram, address);
  14.199 +}
  14.200 +
  14.201 +
  14.202 +/* Write data to RAM or a device */
  14.203 +void m68k_write_memory_8(unsigned int address, unsigned int value)
  14.204 +{
  14.205 +	if(g_fc & 2)	/* Program */
  14.206 +		exit_error("Attempted to write %02x to ROM address %08x", value&0xff, address);
  14.207 +
  14.208 +	/* Otherwise it's data space */
  14.209 +	switch(address)
  14.210 +	{
  14.211 +		case INPUT_ADDRESS:
  14.212 +			input_device_write(value&0xff);
  14.213 +			return;
  14.214 +		case OUTPUT_ADDRESS:
  14.215 +			output_device_write(value&0xff);
  14.216 +			return;
  14.217 +		default:
  14.218 +			break;
  14.219 +	}
  14.220 +	if(address > MAX_RAM)
  14.221 +		exit_error("Attempted to write %02x to RAM address %08x", value&0xff, address);
  14.222 +	WRITE_BYTE(g_ram, address, value);
  14.223 +}
  14.224 +
  14.225 +void m68k_write_memory_16(unsigned int address, unsigned int value)
  14.226 +{
  14.227 +	if(g_fc & 2)	/* Program */
  14.228 +		exit_error("Attempted to write %04x to ROM address %08x", value&0xffff, address);
  14.229 +
  14.230 +	/* Otherwise it's data space */
  14.231 +	switch(address)
  14.232 +	{
  14.233 +		case INPUT_ADDRESS:
  14.234 +			input_device_write(value&0xffff);
  14.235 +			return;
  14.236 +		case OUTPUT_ADDRESS:
  14.237 +			output_device_write(value&0xffff);
  14.238 +			return;
  14.239 +		default:
  14.240 +			break;
  14.241 +	}
  14.242 +	if(address > MAX_RAM)
  14.243 +		exit_error("Attempted to write %04x to RAM address %08x", value&0xffff, address);
  14.244 +	WRITE_WORD(g_ram, address, value);
  14.245 +}
  14.246 +
  14.247 +void m68k_write_memory_32(unsigned int address, unsigned int value)
  14.248 +{
  14.249 +	if(g_fc & 2)	/* Program */
  14.250 +		exit_error("Attempted to write %08x to ROM address %08x", value, address);
  14.251 +
  14.252 +	/* Otherwise it's data space */
  14.253 +	switch(address)
  14.254 +	{
  14.255 +		case INPUT_ADDRESS:
  14.256 +			input_device_write(value);
  14.257 +			return;
  14.258 +		case OUTPUT_ADDRESS:
  14.259 +			output_device_write(value);
  14.260 +			return;
  14.261 +		default:
  14.262 +			break;
  14.263 +	}
  14.264 +	if(address > MAX_RAM)
  14.265 +		exit_error("Attempted to write %08x to RAM address %08x", value, address);
  14.266 +	WRITE_LONG(g_ram, address, value);
  14.267 +}
  14.268 +
  14.269 +/* Called when the CPU pulses the RESET line */
  14.270 +void cpu_pulse_reset(void)
  14.271 +{
  14.272 +	nmi_device_reset();
  14.273 +	output_device_reset();
  14.274 +	input_device_reset();
  14.275 +}
  14.276 +
  14.277 +/* Called when the CPU changes the function code pins */
  14.278 +void cpu_set_fc(unsigned int fc)
  14.279 +{
  14.280 +	g_fc = fc;
  14.281 +}
  14.282 +
  14.283 +/* Called when the CPU acknowledges an interrupt */
  14.284 +int cpu_irq_ack(int level)
  14.285 +{
  14.286 +	switch(level)
  14.287 +	{
  14.288 +		case IRQ_NMI_DEVICE:
  14.289 +			return nmi_device_ack();
  14.290 +		case IRQ_INPUT_DEVICE:
  14.291 +			return input_device_ack();
  14.292 +		case IRQ_OUTPUT_DEVICE:
  14.293 +			return output_device_ack();
  14.294 +	}
  14.295 +	return M68K_INT_ACK_SPURIOUS;
  14.296 +}
  14.297 +
  14.298 +
  14.299 +
  14.300 +
  14.301 +/* Implementation for the NMI device */
  14.302 +void nmi_device_reset(void)
  14.303 +{
  14.304 +	g_nmi = 0;
  14.305 +}
  14.306 +
  14.307 +void nmi_device_update(void)
  14.308 +{
  14.309 +	if(g_nmi)
  14.310 +	{
  14.311 +		g_nmi = 0;
  14.312 +		int_controller_set(IRQ_NMI_DEVICE);
  14.313 +	}
  14.314 +}
  14.315 +
  14.316 +int nmi_device_ack(void)
  14.317 +{
  14.318 +	printf("\nNMI\n");fflush(stdout);
  14.319 +	int_controller_clear(IRQ_NMI_DEVICE);
  14.320 +	return M68K_INT_ACK_AUTOVECTOR;
  14.321 +}
  14.322 +
  14.323 +
  14.324 +/* Implementation for the input device */
  14.325 +void input_device_reset(void)
  14.326 +{
  14.327 +	g_input_device_value = -1;
  14.328 +	int_controller_clear(IRQ_INPUT_DEVICE);
  14.329 +}
  14.330 +
  14.331 +void input_device_update(void)
  14.332 +{
  14.333 +	if(g_input_device_value >= 0)
  14.334 +		int_controller_set(IRQ_INPUT_DEVICE);
  14.335 +}
  14.336 +
  14.337 +int input_device_ack(void)
  14.338 +{
  14.339 +	return M68K_INT_ACK_AUTOVECTOR;
  14.340 +}
  14.341 +
  14.342 +unsigned int input_device_read(void)
  14.343 +{
  14.344 +	int value = g_input_device_value > 0 ? g_input_device_value : 0;
  14.345 +	int_controller_clear(IRQ_INPUT_DEVICE);
  14.346 +	g_input_device_value = -1;
  14.347 +	return value;
  14.348 +}
  14.349 +
  14.350 +void input_device_write(unsigned int value)
  14.351 +{
  14.352 +}
  14.353 +
  14.354 +
  14.355 +/* Implementation for the output device */
  14.356 +void output_device_reset(void)
  14.357 +{
  14.358 +	g_output_device_last_output = time(NULL);
  14.359 +	g_output_device_ready = 0;
  14.360 +	int_controller_clear(IRQ_OUTPUT_DEVICE);
  14.361 +}
  14.362 +
  14.363 +void output_device_update(void)
  14.364 +{
  14.365 +	if(!g_output_device_ready)
  14.366 +	{
  14.367 +		if((time(NULL) - g_output_device_last_output) >= OUTPUT_DEVICE_PERIOD)
  14.368 +		{
  14.369 +			g_output_device_ready = 1;
  14.370 +			int_controller_set(IRQ_OUTPUT_DEVICE);
  14.371 +		}
  14.372 +	}
  14.373 +}
  14.374 +
  14.375 +int output_device_ack(void)
  14.376 +{
  14.377 +	return M68K_INT_ACK_AUTOVECTOR;
  14.378 +}
  14.379 +
  14.380 +unsigned int output_device_read(void)
  14.381 +{
  14.382 +	int_controller_clear(IRQ_OUTPUT_DEVICE);
  14.383 +	return 0;
  14.384 +}
  14.385 +
  14.386 +void output_device_write(unsigned int value)
  14.387 +{
  14.388 +	char ch;
  14.389 +	if(g_output_device_ready)
  14.390 +	{
  14.391 +		ch = value & 0xff;
  14.392 +		printf("%c", ch);
  14.393 +		g_output_device_last_output = time(NULL);
  14.394 +		g_output_device_ready = 0;
  14.395 +		int_controller_clear(IRQ_OUTPUT_DEVICE);
  14.396 +	}
  14.397 +}
  14.398 +
  14.399 +
  14.400 +/* Implementation for the interrupt controller */
  14.401 +void int_controller_set(unsigned int value)
  14.402 +{
  14.403 +	unsigned int old_pending = g_int_controller_pending;
  14.404 +
  14.405 +	g_int_controller_pending |= (1<<value);
  14.406 +
  14.407 +	if(old_pending != g_int_controller_pending && value > g_int_controller_highest_int)
  14.408 +	{
  14.409 +		g_int_controller_highest_int = value;
  14.410 +		m68k_set_irq(g_int_controller_highest_int);
  14.411 +	}
  14.412 +}
  14.413 +
  14.414 +void int_controller_clear(unsigned int value)
  14.415 +{
  14.416 +	g_int_controller_pending &= ~(1<<value);
  14.417 +
  14.418 +	for(g_int_controller_highest_int = 7;g_int_controller_highest_int > 0;g_int_controller_highest_int--)
  14.419 +		if(g_int_controller_pending & (1<<g_int_controller_highest_int))
  14.420 +			break;
  14.421 +
  14.422 +	m68k_set_irq(g_int_controller_highest_int);
  14.423 +}
  14.424 +
  14.425 +
  14.426 +/* Parse user input and update any devices that need user input */
  14.427 +void get_user_input(void)
  14.428 +{
  14.429 +	static int last_ch = -1;
  14.430 +	int ch = osd_get_char();
  14.431 +
  14.432 +	if(ch >= 0)
  14.433 +	{
  14.434 +		switch(ch)
  14.435 +		{
  14.436 +			case 0x1b:
  14.437 +				g_quit = 1;
  14.438 +				break;
  14.439 +			case '~':
  14.440 +				if(last_ch != ch)
  14.441 +					g_nmi = 1;
  14.442 +				break;
  14.443 +			default:
  14.444 +				g_input_device_value = ch;
  14.445 +		}
  14.446 +	}
  14.447 +	last_ch = ch;
  14.448 +}
  14.449 +
  14.450 +
  14.451 +/* The main loop */
  14.452 +int main(int argc, char* argv[])
  14.453 +{
  14.454 +	FILE* fhandle;
  14.455 +
  14.456 +	if(argc != 2)
  14.457 +		exit_error("Usage: sim <program file>");
  14.458 +
  14.459 +	if((fhandle = fopen(argv[1], "rb")) == NULL)
  14.460 +		exit_error("Unable to open %s", argv[1]);
  14.461 +
  14.462 +	if(fread(g_rom, 1, MAX_ROM+1, fhandle) <= 0)
  14.463 +		exit_error("Error reading %s", argv[1]);
  14.464 +
  14.465 +
  14.466 +	m68k_pulse_reset();
  14.467 +	input_device_reset();
  14.468 +	output_device_reset();
  14.469 +	nmi_device_reset();
  14.470 +
  14.471 +	g_quit = 0;
  14.472 +	while(!g_quit)
  14.473 +	{
  14.474 +		get_user_input();
  14.475 +		/* Note that I am not emulating the correct clock speed! */
  14.476 +		m68k_execute(1000);
  14.477 +		output_device_update();
  14.478 +		input_device_update();
  14.479 +		nmi_device_update();
  14.480 +	}
  14.481 +	return 0;
  14.482 +}

    15.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/example/sim.h
    15.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    15.3 +++ b/src/musashi/example/sim.h	Sat Nov 27 01:13:12 2010 +0000
    15.4 @@ -0,0 +1,14 @@
    15.5 +#ifndef SIM__HEADER
    15.6 +#define SIM__HEADER
    15.7 +
    15.8 +unsigned int m68k_read_memory_8(unsigned int address);
    15.9 +unsigned int m68k_read_memory_16(unsigned int address);
   15.10 +unsigned int m68k_read_memory_32(unsigned int address);
   15.11 +void m68k_write_memory_8(unsigned int address, unsigned int value);
   15.12 +void m68k_write_memory_16(unsigned int address, unsigned int value);
   15.13 +void m68k_write_memory_32(unsigned int address, unsigned int value);
   15.14 +void cpu_pulse_reset(void);
   15.15 +void cpu_set_fc(unsigned int fc);
   15.16 +int  cpu_irq_ack(int level);
   15.17 +
   15.18 +#endif /* SIM__HEADER */

    16.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/history.txt
    16.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.3 +++ b/src/musashi/history.txt	Sat Nov 27 01:13:12 2010 +0000
    16.4 @@ -0,0 +1,114 @@
    16.5 +The history of Musashi for anyone who might be interested:
    16.6 +---------------------------------------------------------
    16.7 +
    16.8 +Musashi was born out of sheer boredom.
    16.9 +I needed something to code, and so having had fun with a few of the emulators
   16.10 +around, I decided to try my hand at CPU emulation.
   16.11 +I had owned an Amiga for many years and had done some assembly coding on it so
   16.12 +I figured it would be the ideal chip to cut my teeth on.
   16.13 +Had I known then how much work was involved in emulating a chip like this, I
   16.14 +may not have even started ;-)
   16.15 +
   16.16 +
   16.17 +
   16.18 +12-May-1998: First outline
   16.19 +
   16.20 +11-Jun-1998: Early disassembler
   16.21 +
   16.22 +20-Nov-1998: First prototype v0.1
   16.23 +
   16.24 +04-Dec-1998: Final prototype v0.4
   16.25 +
   16.26 +20-Dec-1998: Beta release of Musashi v0.5 that could run Rastan Saga under MAME
   16.27 +             (barely).
   16.28 +
   16.29 +06-Jan-1999: Musashi 1.0 released
   16.30 +
   16.31 +17-Mar-1999: Musashi 2.0 released
   16.32 +             - Major code overhaul.
   16.33 +             - Replaced monolithic codebase with a code generator program.
   16.34 +             - Added correct m68000 timing.
   16.35 +             - Moved timing into the opcode handlers.
   16.36 +
   16.37 +25-Mar-1999: Musashi 2.1 released
   16.38 +             - Added support for m68010.
   16.39 +             - Many bugfixes.
   16.40 +
   16.41 +13-May-1999: Musashi 2.2 released
   16.42 +             - Added support for m68020.
   16.43 +             - Lots of bugfixes.
   16.44 +
   16.45 +05-Apr-2000: Musashi 3.0 released
   16.46 +             - Major code overhaul.
   16.47 +             - Rewrote code generator program and changed the format of
   16.48 +               m68k_in.c.
   16.49 +             - Added support for m68ec020.
   16.50 +             - Removed timing from the opcode handlers.
   16.51 +             - Added correct timing for m68000, m68010, and m68020.
   16.52 +               Note: 68020 timing is the cache timing from the manual.
   16.53 +             - Removed the m68k_peek_xxx() and m68k_poke_xxx() instructions and
   16.54 +               replaced them with m68k_get_reg() and m68k_set_reg().
   16.55 +             - Added support for function codes.
   16.56 +             - Revamped m68kconf.h to be easier to configure and more powerful.
   16.57 +             - Added option to separate immediate and normal reads.
   16.58 +             - Added support for (undocumented) m68000 instruction prefetch.
   16.59 +             - Rewrote indexed addressing mode handling.
   16.60 +             - Rewrote interrupt handling.
   16.61 +             - Fixed a masking bug for m68k_get_reg() when requesting the PC.
   16.62 +             - Moved the instruction table sorting routine to m68kmake.c so
   16.63 +               that it is invoked at compile time rather than at runtime.
   16.64 +             - Rewrote the exception handling routines to support different
   16.65 +               stack frames (needed for m68020 emulation).
   16.66 +             - Rewrote faster status register and condition code flag handling
   16.67 +               functions / macros.
   16.68 +             - Fixed function code handling to fetch from program space when
   16.69 +               using pc-relative addressing.
   16.70 +             - Fixed initial program counter and stack pointer fetching on
   16.71 +               reset (loads from program space now).
   16.72 +             - A lot of code cleanup.
   16.73 +             - LOTS of bugfixes (especially in the m68020 code).
   16.74 +
   16.75 +28-May-2000: Musashi 3.1 released
   16.76 +             - Fixed bug in m68k_get_reg() that retrieved the wrong value for
   16.77 +               the status register.
   16.78 +             - Fixed register bug in movec.
   16.79 +             - Fixed cpu type comparison problem that caused indexed
   16.80 +               addressing modes to be incorrectly interpreted when in m68ec020
   16.81 +               mode.
   16.82 +             - Added code to speed up busy waiting on some branch instructions.
   16.83 +             - Fixed some bfxxx opcode bugs.
   16.84 +
   16.85 +14-Aug-2000: Musashi 3.2 released
   16.86 +             - Fixed RTE bug that killed the program counter when in m68020
   16.87 +               mode.
   16.88 +             - Minor fixes in negx and nbcd.
   16.89 +             - renamed d68k.c to m68kdasm.c and merged d68k.h into m68k.h.
   16.90 +               d68k_read_xxx() instructions have been renamed to
   16.91 +               m68k_read_xxx_disassembler().
   16.92 +             - Rewrote exception processing and fixed 68020 stack frame
   16.93 +               problems.
   16.94 +             - FINALLY fixed the mull and divl instructions.
   16.95 +             - Added 64-bit safe code fixes.
   16.96 +             - Added 64-bit optimizations (these will only  be ANSI compliant
   16.97 +               under c9x, and so to use them you must turn on M68K_USE_64_BIT
   16.98 +               in m68kconf.h).
   16.99 +
  16.100 +27-Jan-2001: Musashi 3.3 released
  16.101 +             Note: This is the last release of Musashi before I separate the
  16.102 +                   68020 core.
  16.103 +             - Fixed problem when displaying negative numbers in disassembler
  16.104 +             - Fixed cpu type selector - was allowing 020 instructions to be
  16.105 +               disassembled when in 000 mode.
  16.106 +             - Fixed opcode jumptable generator (ambiguous operators in the
  16.107 +               test for f-line ops)
  16.108 +             - Fixed signed/unsigned problem in divl and mull opcodes (not
  16.109 +               sure if this was causing an error but best to be sure)
  16.110 +             - Cleaned up the naming scheme for the opcode handlers
  16.111 +
  16.112 +02-Feb-2001: Musashi 3.3.1 released
  16.113 +             Note: due to the pc-relative requirement for some new drivers
  16.114 +                   in MAME, I've released this small update.
  16.115 +             - Added pc-relative read modes
  16.116 +             - small optimizations to the exception handling that will help
  16.117 +               when splitting the cores
  16.118 +             - Updated the example (oops!)

    17.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68k.h
    17.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    17.3 +++ b/src/musashi/m68k.h	Sat Nov 27 01:13:12 2010 +0000
    17.4 @@ -0,0 +1,339 @@
    17.5 +#ifndef M68K__HEADER
    17.6 +#define M68K__HEADER
    17.7 +
    17.8 +/* ======================================================================== */
    17.9 +/* ========================= LICENSING & COPYRIGHT ======================== */
   17.10 +/* ======================================================================== */
   17.11 +/*
   17.12 + *                                  MUSASHI
   17.13 + *                                Version 3.3
   17.14 + *
   17.15 + * A portable Motorola M680x0 processor emulation engine.
   17.16 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   17.17 + *
   17.18 + * This code may be freely used for non-commercial purposes as long as this
   17.19 + * copyright notice remains unaltered in the source code and any binary files
   17.20 + * containing this code in compiled form.
   17.21 + *
   17.22 + * All other lisencing terms must be negotiated with the author
   17.23 + * (Karl Stenerud).
   17.24 + *
   17.25 + * The latest version of this code can be obtained at:
   17.26 + * http://kstenerud.cjb.net
   17.27 + */
   17.28 +
   17.29 +
   17.30 +
   17.31 +/* ======================================================================== */
   17.32 +/* ============================ GENERAL DEFINES =========================== */
   17.33 +
   17.34 +/* ======================================================================== */
   17.35 +
   17.36 +/* There are 7 levels of interrupt to the 68K.
   17.37 + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
   17.38 + */
   17.39 +#define M68K_IRQ_NONE 0
   17.40 +#define M68K_IRQ_1    1
   17.41 +#define M68K_IRQ_2    2
   17.42 +#define M68K_IRQ_3    3
   17.43 +#define M68K_IRQ_4    4
   17.44 +#define M68K_IRQ_5    5
   17.45 +#define M68K_IRQ_6    6
   17.46 +#define M68K_IRQ_7    7
   17.47 +
   17.48 +
   17.49 +/* Special interrupt acknowledge values.
   17.50 + * Use these as special returns from the interrupt acknowledge callback
   17.51 + * (specified later in this header).
   17.52 + */
   17.53 +
   17.54 +/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
   17.55 + * This happens in a real 68K if VPA or AVEC is asserted during an interrupt
   17.56 + * acknowledge cycle instead of DTACK.
   17.57 + */
   17.58 +#define M68K_INT_ACK_AUTOVECTOR    0xffffffff
   17.59 +
   17.60 +/* Causes the spurious interrupt vector (0x18) to be taken
   17.61 + * This happens in a real 68K if BERR is asserted during the interrupt
   17.62 + * acknowledge cycle (i.e. no devices responded to the acknowledge).
   17.63 + */
   17.64 +#define M68K_INT_ACK_SPURIOUS      0xfffffffe
   17.65 +
   17.66 +
   17.67 +/* CPU types for use in m68k_set_cpu_type() */
   17.68 +enum
   17.69 +{
   17.70 +	M68K_CPU_TYPE_INVALID,
   17.71 +	M68K_CPU_TYPE_68000,
   17.72 +	M68K_CPU_TYPE_68010,
   17.73 +	M68K_CPU_TYPE_68EC020,
   17.74 +	M68K_CPU_TYPE_68020,
   17.75 +	M68K_CPU_TYPE_68030,	/* Supported by disassembler ONLY */
   17.76 +	M68K_CPU_TYPE_68040		/* Supported by disassembler ONLY */
   17.77 +};
   17.78 +
   17.79 +/* Registers used by m68k_get_reg() and m68k_set_reg() */
   17.80 +typedef enum
   17.81 +{
   17.82 +	/* Real registers */
   17.83 +	M68K_REG_D0,		/* Data registers */
   17.84 +	M68K_REG_D1,
   17.85 +	M68K_REG_D2,
   17.86 +	M68K_REG_D3,
   17.87 +	M68K_REG_D4,
   17.88 +	M68K_REG_D5,
   17.89 +	M68K_REG_D6,
   17.90 +	M68K_REG_D7,
   17.91 +	M68K_REG_A0,		/* Address registers */
   17.92 +	M68K_REG_A1,
   17.93 +	M68K_REG_A2,
   17.94 +	M68K_REG_A3,
   17.95 +	M68K_REG_A4,
   17.96 +	M68K_REG_A5,
   17.97 +	M68K_REG_A6,
   17.98 +	M68K_REG_A7,
   17.99 +	M68K_REG_PC,		/* Program Counter */
  17.100 +	M68K_REG_SR,		/* Status Register */
  17.101 +	M68K_REG_SP,		/* The current Stack Pointer (located in A7) */
  17.102 +	M68K_REG_USP,		/* User Stack Pointer */
  17.103 +	M68K_REG_ISP,		/* Interrupt Stack Pointer */
  17.104 +	M68K_REG_MSP,		/* Master Stack Pointer */
  17.105 +	M68K_REG_SFC,		/* Source Function Code */
  17.106 +	M68K_REG_DFC,		/* Destination Function Code */
  17.107 +	M68K_REG_VBR,		/* Vector Base Register */
  17.108 +	M68K_REG_CACR,		/* Cache Control Register */
  17.109 +	M68K_REG_CAAR,		/* Cache Address Register */
  17.110 +
  17.111 +	/* Assumed registers */
  17.112 +	/* These are cheat registers which emulate the 1-longword prefetch
  17.113 +	 * present in the 68000 and 68010.
  17.114 +	 */ 
  17.115 +	M68K_REG_PREF_ADDR,	/* Last prefetch address */
  17.116 +	M68K_REG_PREF_DATA,	/* Last prefetch data */
  17.117 +
  17.118 +	/* Convenience registers */
  17.119 +	M68K_REG_PPC,		/* Previous value in the program counter */
  17.120 +	M68K_REG_IR,		/* Instruction register */
  17.121 +	M68K_REG_CPU_TYPE	/* Type of CPU being run */
  17.122 +} m68k_register_t;
  17.123 +
  17.124 +/* ======================================================================== */
  17.125 +/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
  17.126 +/* ======================================================================== */
  17.127 +
  17.128 +/* You will have to implement these functions */
  17.129 +
  17.130 +/* read/write functions called by the CPU to access memory.
  17.131 + * while values used are 32 bits, only the appropriate number
  17.132 + * of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
  17.133 + * of value should be written to memory).
  17.134 + *
  17.135 + * NOTE: I have separated the immediate and PC-relative memory fetches
  17.136 + *       from the other memory fetches because some systems require
  17.137 + *       differentiation between PROGRAM and DATA fetches (usually
  17.138 + *       for security setups such as encryption).
  17.139 + *       This separation can either be achieved by setting
  17.140 + *       M68K_SEPARATE_READS in m68kconf.h and defining
  17.141 + *       the read functions, or by setting M68K_EMULATE_FC and
  17.142 + *       making a function code callback function.
  17.143 + *       Using the callback offers better emulation coverage
  17.144 + *       because you can also monitor whether the CPU is in SYSTEM or
  17.145 + *       USER mode, but it is also slower.
  17.146 + */
  17.147 +
  17.148 +/* Read from anywhere */
  17.149 +unsigned int  m68k_read_memory_8(unsigned int address);
  17.150 +unsigned int  m68k_read_memory_16(unsigned int address);
  17.151 +unsigned int  m68k_read_memory_32(unsigned int address);
  17.152 +
  17.153 +/* Read data immediately following the PC */
  17.154 +unsigned int  m68k_read_immediate_16(unsigned int address);
  17.155 +unsigned int  m68k_read_immediate_32(unsigned int address);
  17.156 +
  17.157 +/* Read data relative to the PC */
  17.158 +unsigned int  m68k_read_pcrelative_8(unsigned int address);
  17.159 +unsigned int  m68k_read_pcrelative_16(unsigned int address);
  17.160 +unsigned int  m68k_read_pcrelative_32(unsigned int address);
  17.161 +
  17.162 +/* Memory access for the disassembler */
  17.163 +unsigned int m68k_read_disassembler_8  (unsigned int address);
  17.164 +unsigned int m68k_read_disassembler_16 (unsigned int address);
  17.165 +unsigned int m68k_read_disassembler_32 (unsigned int address);
  17.166 +
  17.167 +/* Write to anywhere */
  17.168 +void m68k_write_memory_8(unsigned int address, unsigned int value);
  17.169 +void m68k_write_memory_16(unsigned int address, unsigned int value);
  17.170 +void m68k_write_memory_32(unsigned int address, unsigned int value);
  17.171 +
  17.172 +
  17.173 +
  17.174 +/* ======================================================================== */
  17.175 +/* ============================== CALLBACKS =============================== */
  17.176 +/* ======================================================================== */
  17.177 +
  17.178 +/* These functions allow you to set callbacks to the host when specific events
  17.179 + * occur.  Note that you must enable the corresponding value in m68kconf.h
  17.180 + * in order for these to do anything useful.
  17.181 + * Note: I have defined default callbacks which are used if you have enabled
  17.182 + * the corresponding #define in m68kconf.h but either haven't assigned a
  17.183 + * callback or have assigned a callback of NULL.
  17.184 + */
  17.185 +
  17.186 +/* Set the callback for an interrupt acknowledge.
  17.187 + * You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
  17.188 + * The CPU will call the callback with the interrupt level being acknowledged.
  17.189 + * The host program must return either a vector from 0x02-0xff, or one of the
  17.190 + * special interrupt acknowledge values specified earlier in this header.
  17.191 + * If this is not implemented, the CPU will always assume an autovectored
  17.192 + * interrupt, and will automatically clear the interrupt request when it
  17.193 + * services the interrupt.
  17.194 + * Default behavior: return M68K_INT_ACK_AUTOVECTOR.
  17.195 + */
  17.196 +void m68k_set_int_ack_callback(int  (*callback)(int int_level));
  17.197 +
  17.198 +
  17.199 +/* Set the callback for a breakpoint acknowledge (68010+).
  17.200 + * You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h.
  17.201 + * The CPU will call the callback with whatever was in the data field of the
  17.202 + * BKPT instruction for 68020+, or 0 for 68010.
  17.203 + * Default behavior: do nothing.
  17.204 + */
  17.205 +void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data));
  17.206 +
  17.207 +
  17.208 +/* Set the callback for the RESET instruction.
  17.209 + * You must enable M68K_EMULATE_RESET in m68kconf.h.
  17.210 + * The CPU calls this callback every time it encounters a RESET instruction.
  17.211 + * Default behavior: do nothing.
  17.212 + */
  17.213 +void m68k_set_reset_instr_callback(void  (*callback)(void));
  17.214 +
  17.215 +
  17.216 +/* Set the callback for informing of a large PC change.
  17.217 + * You must enable M68K_MONITOR_PC in m68kconf.h.
  17.218 + * The CPU calls this callback with the new PC value every time the PC changes
  17.219 + * by a large value (currently set for changes by longwords).
  17.220 + * Default behavior: do nothing.
  17.221 + */
  17.222 +void m68k_set_pc_changed_callback(void  (*callback)(unsigned int new_pc));
  17.223 +
  17.224 +
  17.225 +/* Set the callback for CPU function code changes.
  17.226 + * You must enable M68K_EMULATE_FC in m68kconf.h.
  17.227 + * The CPU calls this callback with the function code before every memory
  17.228 + * access to set the CPU's function code according to what kind of memory
  17.229 + * access it is (supervisor/user, program/data and such).
  17.230 + * Default behavior: do nothing.
  17.231 + */
  17.232 +void m68k_set_fc_callback(void  (*callback)(unsigned int new_fc));
  17.233 +
  17.234 +
  17.235 +/* Set a callback for the instruction cycle of the CPU.
  17.236 + * You must enable M68K_INSTRUCTION_HOOK in m68kconf.h.
  17.237 + * The CPU calls this callback just before fetching the opcode in the
  17.238 + * instruction cycle.
  17.239 + * Default behavior: do nothing.
  17.240 + */
  17.241 +void m68k_set_instr_hook_callback(void  (*callback)(void));
  17.242 +
  17.243 +
  17.244 +
  17.245 +/* ======================================================================== */
  17.246 +/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
  17.247 +/* ======================================================================== */
  17.248 +
  17.249 +/* Use this function to set the CPU type you want to emulate.
  17.250 + * Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68010,
  17.251 + * M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020.
  17.252 + */
  17.253 +void m68k_set_cpu_type(unsigned int cpu_type);
  17.254 +
  17.255 +/* Pulse the RESET pin on the CPU.
  17.256 + * You *MUST* reset the CPU at least once to initialize the emulation
  17.257 + * Note: If you didn't call m68k_set_cpu_type() before resetting
  17.258 + *       the CPU for the first time, the CPU will be set to
  17.259 + *       M68K_CPU_TYPE_68000.
  17.260 + */
  17.261 +void m68k_pulse_reset(void);
  17.262 +
  17.263 +/* execute num_cycles worth of instructions.  returns number of cycles used */
  17.264 +int m68k_execute(int num_cycles);
  17.265 +
  17.266 +/* These functions let you read/write/modify the number of cycles left to run
  17.267 + * while m68k_execute() is running.
  17.268 + * These are useful if the 68k accesses a memory-mapped port on another device
  17.269 + * that requires immediate processing by another CPU.
  17.270 + */
  17.271 +int m68k_cycles_run(void);              /* Number of cycles run so far */
  17.272 +int m68k_cycles_remaining(void);        /* Number of cycles left */
  17.273 +void m68k_modify_timeslice(int cycles); /* Modify cycles left */
  17.274 +void m68k_end_timeslice(void);          /* End timeslice now */
  17.275 +
  17.276 +/* Set the IPL0-IPL2 pins on the CPU (IRQ).
  17.277 + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
  17.278 + * Setting IRQ to 0 will clear an interrupt request.
  17.279 + */
  17.280 +void m68k_set_irq(unsigned int int_level);
  17.281 +
  17.282 +
  17.283 +/* Halt the CPU as if you pulsed the HALT pin. */
  17.284 +void m68k_pulse_halt(void);
  17.285 +
  17.286 +
  17.287 +/* Context switching to allow multiple CPUs */
  17.288 +
  17.289 +/* Get the size of the cpu context in bytes */
  17.290 +unsigned int m68k_context_size(void);
  17.291 +
  17.292 +/* Get a cpu context */
  17.293 +unsigned int m68k_get_context(void* dst);
  17.294 +
  17.295 +/* set the current cpu context */
  17.296 +void m68k_set_context(void* dst);
  17.297 +
  17.298 +/* Save the current cpu context to disk.
  17.299 + * You must provide a function pointer of the form:
  17.300 + * void save_value(char* identifier, unsigned int value)
  17.301 + */
  17.302 +void m68k_save_context(	void (*save_value)(char* identifier, unsigned int value));
  17.303 +
  17.304 +/* Load a cpu context from disk.
  17.305 + * You must provide a function pointer of the form:
  17.306 + * unsigned int load_value(char* identifier)
  17.307 + */
  17.308 +void m68k_load_context(unsigned int (*load_value)(char* identifier));
  17.309 +
  17.310 +
  17.311 +
  17.312 +/* Peek at the internals of a CPU context.  This can either be a context
  17.313 + * retrieved using m68k_get_context() or the currently running context.
  17.314 + * If context is NULL, the currently running CPU context will be used.
  17.315 + */
  17.316 +unsigned int m68k_get_reg(void* context, m68k_register_t reg);
  17.317 +
  17.318 +/* Poke values into the internals of the currently running CPU context */
  17.319 +void m68k_set_reg(m68k_register_t reg, unsigned int value);
  17.320 +
  17.321 +/* Check if an instruction is valid for the specified CPU type */
  17.322 +unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
  17.323 +
  17.324 +/* Disassemble 1 instruction using the epecified CPU type at pc.  Stores
  17.325 + * disassembly in str_buff and returns the size of the instruction in bytes.
  17.326 + */
  17.327 +unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);
  17.328 +
  17.329 +
  17.330 +/* ======================================================================== */
  17.331 +/* ============================= CONFIGURATION ============================ */
  17.332 +/* ======================================================================== */
  17.333 +
  17.334 +/* Import the configuration for this build */
  17.335 +#include "m68kconf.h"
  17.336 +
  17.337 +
  17.338 +
  17.339 +/* ======================================================================== */
  17.340 +/* ============================== END OF FILE ============================= */
  17.341 +/* ======================================================================== */
  17.342 +
  17.343 +#endif /* M68K__HEADER */

    18.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68k_in.c
    18.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    18.3 +++ b/src/musashi/m68k_in.c	Sat Nov 27 01:13:12 2010 +0000
    18.4 @@ -0,0 +1,9989 @@
    18.5 +/* ======================================================================== */
    18.6 +/* ========================= LICENSING & COPYRIGHT ======================== */
    18.7 +/* ======================================================================== */
    18.8 +/*
    18.9 + *                                  MUSASHI
   18.10 + *                                Version 3.3
   18.11 + *
   18.12 + * A portable Motorola M680x0 processor emulation engine.
   18.13 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   18.14 + *
   18.15 + * This code may be freely used for non-commercial purposes as long as this
   18.16 + * copyright notice remains unaltered in the source code and any binary files
   18.17 + * containing this code in compiled form.
   18.18 + *
   18.19 + * All other lisencing terms must be negotiated with the author
   18.20 + * (Karl Stenerud).
   18.21 + *
   18.22 + * The latest version of this code can be obtained at:
   18.23 + * http://kstenerud.cjb.net
   18.24 + */
   18.25 +
   18.26 +
   18.27 +
   18.28 +/* Input file for m68kmake
   18.29 + * -----------------------
   18.30 + *
   18.31 + * All sections begin with 80 X's in a row followed by an end-of-line
   18.32 + * sequence.
   18.33 + * After this, m68kmake will expect to find one of the following section
   18.34 + * identifiers:
   18.35 + *    M68KMAKE_PROTOTYPE_HEADER      - header for opcode handler prototypes
   18.36 + *    M68KMAKE_PROTOTYPE_FOOTER      - footer for opcode handler prototypes
   18.37 + *    M68KMAKE_TABLE_HEADER          - header for opcode handler jumptable
   18.38 + *    M68KMAKE_TABLE_FOOTER          - footer for opcode handler jumptable
   18.39 + *    M68KMAKE_TABLE_BODY            - the table itself
   18.40 + *    M68KMAKE_OPCODE_HANDLER_HEADER - header for opcode handler implementation
   18.41 + *    M68KMAKE_OPCODE_HANDLER_FOOTER - footer for opcode handler implementation
   18.42 + *    M68KMAKE_OPCODE_HANDLER_BODY   - body section for opcode handler implementation
   18.43 + *
   18.44 + * NOTE: M68KMAKE_OPCODE_HANDLER_BODY must be last in the file and
   18.45 + *       M68KMAKE_TABLE_BODY must be second last in the file.
   18.46 + *
   18.47 + * The M68KMAKE_OPHANDLER_BODY section contains the opcode handler
   18.48 + * primitives themselves.  Each opcode handler begins with:
   18.49 + *    M68KMAKE_OP(A, B, C, D)
   18.50 + *
   18.51 + * where A is the opcode handler name, B is the size of the operation,
   18.52 + * C denotes any special processing mode, and D denotes a specific
   18.53 + * addressing mode.
   18.54 + * For C and D where nothing is specified, use "."
   18.55 + *
   18.56 + * Example:
   18.57 + *     M68KMAKE_OP(abcd, 8, rr, .)   abcd, size 8, register to register, default EA
   18.58 + *     M68KMAKE_OP(abcd, 8, mm, ax7) abcd, size 8, memory to memory, register X is A7
   18.59 + *     M68KMAKE_OP(tst, 16, ., pcix) tst, size 16, PCIX addressing
   18.60 + *
   18.61 + * All opcode handler primitives end with a closing curly brace "}" at column 1
   18.62 + *
   18.63 + * NOTE: Do not place a M68KMAKE_OP() directive inside the opcode handler,
   18.64 + *       and do not put a closing curly brace at column 1 unless it is
   18.65 + *       marking the end of the handler!
   18.66 + *
   18.67 + * Inside the handler, m68kmake will recognize M68KMAKE_GET_OPER_xx_xx,
   18.68 + * M68KMAKE_GET_EA_xx_xx, and M68KMAKE_CC directives, and create multiple
   18.69 + * opcode handlers to handle variations in the opcode handler.
   18.70 + * Note: M68KMAKE_CC will only be interpreted in condition code opcodes.
   18.71 + * As well, M68KMAKE_GET_EA_xx_xx and M68KMAKE_GET_OPER_xx_xx will only
   18.72 + * be interpreted on instructions where the corresponding table entry
   18.73 + * specifies multiple effective addressing modes.
   18.74 + * Example:
   18.75 + * clr       32  .     .     0100001010......  A+-DXWL...  U U U   12   6   4
   18.76 + *
   18.77 + * This table entry says that the clr.l opcde has 7 variations (A+-DXWL).
   18.78 + * It is run in user or supervisor mode for all CPUs, and uses 12 cycles for
   18.79 + * 68000, 6 cycles for 68010, and 4 cycles for 68020.
   18.80 + */
   18.81 +
   18.82 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
   18.83 +M68KMAKE_PROTOTYPE_HEADER
   18.84 +
   18.85 +#ifndef M68KOPS__HEADER
   18.86 +#define M68KOPS__HEADER
   18.87 +
   18.88 +/* ======================================================================== */
   18.89 +/* ============================ OPCODE HANDLERS =========================== */
   18.90 +/* ======================================================================== */
   18.91 +
   18.92 +
   18.93 +
   18.94 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
   18.95 +M68KMAKE_PROTOTYPE_FOOTER
   18.96 +
   18.97 +
   18.98 +/* Build the opcode handler table */
   18.99 +void m68ki_build_opcode_table(void);
  18.100 +
  18.101 +extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
  18.102 +extern unsigned char m68ki_cycles[][0x10000];
  18.103 +
  18.104 +
  18.105 +/* ======================================================================== */
  18.106 +/* ============================== END OF FILE ============================= */
  18.107 +/* ======================================================================== */
  18.108 +
  18.109 +#endif /* M68KOPS__HEADER */
  18.110 +
  18.111 +
  18.112 +
  18.113 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.114 +M68KMAKE_TABLE_HEADER
  18.115 +
  18.116 +/* ======================================================================== */
  18.117 +/* ========================= OPCODE TABLE BUILDER ========================= */
  18.118 +/* ======================================================================== */
  18.119 +
  18.120 +#include "m68kops.h"
  18.121 +
  18.122 +#define NUM_CPU_TYPES 3
  18.123 +
  18.124 +void  (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
  18.125 +unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
  18.126 +
  18.127 +/* This is used to generate the opcode handler jump table */
  18.128 +typedef struct
  18.129 +{
  18.130 +	void (*opcode_handler)(void);        /* handler function */
  18.131 +	unsigned int  mask;                  /* mask on opcode */
  18.132 +	unsigned int  match;                 /* what to match after masking */
  18.133 +	unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
  18.134 +} opcode_handler_struct;
  18.135 +
  18.136 +
  18.137 +/* Opcode handler table */
  18.138 +static opcode_handler_struct m68k_opcode_handler_table[] =
  18.139 +{
  18.140 +/*   function                      mask    match    000  010  020 */
  18.141 +
  18.142 +
  18.143 +
  18.144 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.145 +M68KMAKE_TABLE_FOOTER
  18.146 +
  18.147 +	{0, 0, 0, {0, 0, 0}}
  18.148 +};
  18.149 +
  18.150 +
  18.151 +/* Build the opcode handler jump table */
  18.152 +void m68ki_build_opcode_table(void)
  18.153 +{
  18.154 +	opcode_handler_struct *ostruct;
  18.155 +	int instr;
  18.156 +	int i;
  18.157 +	int j;
  18.158 +	int k;
  18.159 +
  18.160 +	for(i = 0; i < 0x10000; i++)
  18.161 +	{
  18.162 +		/* default to illegal */
  18.163 +		m68ki_instruction_jump_table[i] = m68k_op_illegal;
  18.164 +		for(k=0;k<NUM_CPU_TYPES;k++)
  18.165 +			m68ki_cycles[k][i] = 0;
  18.166 +	}
  18.167 +
  18.168 +	ostruct = m68k_opcode_handler_table;
  18.169 +	while(ostruct->mask != 0xff00)
  18.170 +	{
  18.171 +		for(i = 0;i < 0x10000;i++)
  18.172 +		{
  18.173 +			if((i & ostruct->mask) == ostruct->match)
  18.174 +			{
  18.175 +				m68ki_instruction_jump_table[i] = ostruct->opcode_handler;
  18.176 +				for(k=0;k<NUM_CPU_TYPES;k++)
  18.177 +					m68ki_cycles[k][i] = ostruct->cycles[k];
  18.178 +			}
  18.179 +		}
  18.180 +		ostruct++;
  18.181 +	}
  18.182 +	while(ostruct->mask == 0xff00)
  18.183 +	{
  18.184 +		for(i = 0;i <= 0xff;i++)
  18.185 +		{
  18.186 +			m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
  18.187 +			for(k=0;k<NUM_CPU_TYPES;k++)
  18.188 +				m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
  18.189 +		}
  18.190 +		ostruct++;
  18.191 +	}
  18.192 +	while(ostruct->mask == 0xf1f8)
  18.193 +	{
  18.194 +		for(i = 0;i < 8;i++)
  18.195 +		{
  18.196 +			for(j = 0;j < 8;j++)
  18.197 +			{
  18.198 +				instr = ostruct->match | (i << 9) | j;
  18.199 +				m68ki_instruction_jump_table[instr] = ostruct->opcode_handler;
  18.200 +				for(k=0;k<NUM_CPU_TYPES;k++)
  18.201 +					m68ki_cycles[k][instr] = ostruct->cycles[k];
  18.202 +				if((instr & 0xf000) == 0xe000 && (!(instr & 0x20)))
  18.203 +					m68ki_cycles[0][instr] = m68ki_cycles[1][instr] = ostruct->cycles[k] + ((((j-1)&7)+1)<<1);
  18.204 +			}
  18.205 +		}
  18.206 +		ostruct++;
  18.207 +	}
  18.208 +	while(ostruct->mask == 0xfff0)
  18.209 +	{
  18.210 +		for(i = 0;i <= 0x0f;i++)
  18.211 +		{
  18.212 +			m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
  18.213 +			for(k=0;k<NUM_CPU_TYPES;k++)
  18.214 +				m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
  18.215 +		}
  18.216 +		ostruct++;
  18.217 +	}
  18.218 +	while(ostruct->mask == 0xf1ff)
  18.219 +	{
  18.220 +		for(i = 0;i <= 0x07;i++)
  18.221 +		{
  18.222 +			m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler;
  18.223 +			for(k=0;k<NUM_CPU_TYPES;k++)
  18.224 +				m68ki_cycles[k][ostruct->match | (i << 9)] = ostruct->cycles[k];
  18.225 +		}
  18.226 +		ostruct++;
  18.227 +	}
  18.228 +	while(ostruct->mask == 0xfff8)
  18.229 +	{
  18.230 +		for(i = 0;i <= 0x07;i++)
  18.231 +		{
  18.232 +			m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
  18.233 +			for(k=0;k<NUM_CPU_TYPES;k++)
  18.234 +				m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
  18.235 +		}
  18.236 +		ostruct++;
  18.237 +	}
  18.238 +	while(ostruct->mask == 0xffff)
  18.239 +	{
  18.240 +		m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler;
  18.241 +		for(k=0;k<NUM_CPU_TYPES;k++)
  18.242 +			m68ki_cycles[k][ostruct->match] = ostruct->cycles[k];
  18.243 +		ostruct++;
  18.244 +	}
  18.245 +}
  18.246 +
  18.247 +
  18.248 +/* ======================================================================== */
  18.249 +/* ============================== END OF FILE ============================= */
  18.250 +/* ======================================================================== */
  18.251 +
  18.252 +
  18.253 +
  18.254 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.255 +M68KMAKE_OPCODE_HANDLER_HEADER
  18.256 +
  18.257 +#include "m68kcpu.h"
  18.258 +
  18.259 +/* ======================================================================== */
  18.260 +/* ========================= INSTRUCTION HANDLERS ========================= */
  18.261 +/* ======================================================================== */
  18.262 +
  18.263 +
  18.264 +
  18.265 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.266 +M68KMAKE_OPCODE_HANDLER_FOOTER
  18.267 +
  18.268 +/* ======================================================================== */
  18.269 +/* ============================== END OF FILE ============================= */
  18.270 +/* ======================================================================== */
  18.271 +
  18.272 +
  18.273 +
  18.274 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.275 +M68KMAKE_TABLE_BODY
  18.276 +
  18.277 +The following table is arranged as follows:
  18.278 +
  18.279 +name:        Opcode mnemonic
  18.280 +
  18.281 +size:        Operation size
  18.282 +
  18.283 +spec proc:   Special processing mode:
  18.284 +                 .:    normal
  18.285 +                 s:    static operand
  18.286 +                 r:    register operand
  18.287 +                 rr:   register to register
  18.288 +                 mm:   memory to memory
  18.289 +                 er:   effective address to register
  18.290 +                 re:   register to effective address
  18.291 +                 dd:   data register to data register
  18.292 +                 da:   data register to address register
  18.293 +                 aa:   address register to address register
  18.294 +                 cr:   control register to register
  18.295 +                 rc:   register to control register
  18.296 +                 toc:  to condition code register
  18.297 +                 tos:  to status register
  18.298 +                 tou:  to user stack pointer
  18.299 +                 frc:  from condition code register
  18.300 +                 frs:  from status register
  18.301 +                 fru:  from user stack pointer
  18.302 +                 * for move.x, the special processing mode is a specific
  18.303 +                   destination effective addressing mode.
  18.304 +
  18.305 +spec ea:     Specific effective addressing mode:
  18.306 +                 .:    normal
  18.307 +                 i:    immediate
  18.308 +                 d:    data register
  18.309 +                 a:    address register
  18.310 +                 ai:   address register indirect
  18.311 +                 pi:   address register indirect with postincrement
  18.312 +                 pd:   address register indirect with predecrement
  18.313 +                 di:   address register indirect with displacement
  18.314 +                 ix:   address register indirect with index
  18.315 +                 aw:   absolute word address
  18.316 +                 al:   absolute long address
  18.317 +                 pcdi: program counter relative with displacement
  18.318 +                 pcix: program counter relative with index
  18.319 +                 a7:   register specified in instruction is A7
  18.320 +                 ax7:  register field X of instruction is A7
  18.321 +                 ay7:  register field Y of instruction is A7
  18.322 +                 axy7: register fields X and Y of instruction are A7
  18.323 +
  18.324 +bit pattern: Pattern to recognize this opcode.  "." means don't care.
  18.325 +
  18.326 +allowed ea:  List of allowed addressing modes:
  18.327 +                 .: not present
  18.328 +                 A: address register indirect
  18.329 +                 +: ARI (address register indirect) with postincrement
  18.330 +                 -: ARI with predecrement
  18.331 +                 D: ARI with displacement
  18.332 +                 X: ARI with index
  18.333 +                 W: absolute word address
  18.334 +                 L: absolute long address
  18.335 +                 d: program counter indirect with displacement
  18.336 +                 x: program counter indirect with index
  18.337 +                 I: immediate
  18.338 +mode:        CPU operating mode for each cpu type.  U = user or supervisor,
  18.339 +             S = supervisor only, "." = opcode not present.
  18.340 +
  18.341 +cpu cycles:  Base number of cycles required to execute this opcode on the
  18.342 +             specified CPU type.
  18.343 +             Use "." if CPU does not have this opcode.
  18.344 +
  18.345 +
  18.346 +
  18.347 +              spec  spec                    allowed ea  mode   cpu cycles
  18.348 +name    size  proc   ea   bit pattern       A+-DXWLdxI  0 1 2  000 010 020  comments
  18.349 +======  ====  ====  ====  ================  ==========  = = =  === === ===  =============
  18.350 +M68KMAKE_TABLE_START
  18.351 +1010       0  .     .     1010............  ..........  U U U    4   4   4
  18.352 +1111       0  .     .     1111............  ..........  U U U    4   4   4
  18.353 +abcd       8  rr    .     1100...100000...  ..........  U U U    6   6   4
  18.354 +abcd       8  mm    ax7   1100111100001...  ..........  U U U   18  18  16
  18.355 +abcd       8  mm    ay7   1100...100001111  ..........  U U U   18  18  16
  18.356 +abcd       8  mm    axy7  1100111100001111  ..........  U U U   18  18  16
  18.357 +abcd       8  mm    .     1100...100001...  ..........  U U U   18  18  16
  18.358 +add        8  er    d     1101...000000...  ..........  U U U    4   4   2
  18.359 +add        8  er    .     1101...000......  A+-DXWLdxI  U U U    4   4   2
  18.360 +add       16  er    d     1101...001000...  ..........  U U U    4   4   2
  18.361 +add       16  er    a     1101...001001...  ..........  U U U    4   4   2
  18.362 +add       16  er    .     1101...001......  A+-DXWLdxI  U U U    4   4   2
  18.363 +add       32  er    d     1101...010000...  ..........  U U U    6   6   2
  18.364 +add       32  er    a     1101...010001...  ..........  U U U    6   6   2
  18.365 +add       32  er    .     1101...010......  A+-DXWLdxI  U U U    6   6   2
  18.366 +add        8  re    .     1101...100......  A+-DXWL...  U U U    8   8   4
  18.367 +add       16  re    .     1101...101......  A+-DXWL...  U U U    8   8   4
  18.368 +add       32  re    .     1101...110......  A+-DXWL...  U U U   12  12   4
  18.369 +adda      16  .     d     1101...011000...  ..........  U U U    8   8   2
  18.370 +adda      16  .     a     1101...011001...  ..........  U U U    8   8   2
  18.371 +adda      16  .     .     1101...011......  A+-DXWLdxI  U U U    8   8   2
  18.372 +adda      32  .     d     1101...111000...  ..........  U U U    6   6   2
  18.373 +adda      32  .     a     1101...111001...  ..........  U U U    6   6   2
  18.374 +adda      32  .     .     1101...111......  A+-DXWLdxI  U U U    6   6   2
  18.375 +addi       8  .     d     0000011000000...  ..........  U U U    8   8   2
  18.376 +addi       8  .     .     0000011000......  A+-DXWL...  U U U   12  12   4
  18.377 +addi      16  .     d     0000011001000...  ..........  U U U    8   8   2
  18.378 +addi      16  .     .     0000011001......  A+-DXWL...  U U U   12  12   4
  18.379 +addi      32  .     d     0000011010000...  ..........  U U U   16  14   2
  18.380 +addi      32  .     .     0000011010......  A+-DXWL...  U U U   20  20   4
  18.381 +addq       8  .     d     0101...000000...  ..........  U U U    4   4   2
  18.382 +addq       8  .     .     0101...000......  A+-DXWL...  U U U    8   8   4
  18.383 +addq      16  .     d     0101...001000...  ..........  U U U    4   4   2
  18.384 +addq      16  .     a     0101...001001...  ..........  U U U    4   4   2
  18.385 +addq      16  .     .     0101...001......  A+-DXWL...  U U U    8   8   4
  18.386 +addq      32  .     d     0101...010000...  ..........  U U U    8   8   2
  18.387 +addq      32  .     a     0101...010001...  ..........  U U U    8   8   2
  18.388 +addq      32  .     .     0101...010......  A+-DXWL...  U U U   12  12   4
  18.389 +addx       8  rr    .     1101...100000...  ..........  U U U    4   4   2
  18.390 +addx      16  rr    .     1101...101000...  ..........  U U U    4   4   2
  18.391 +addx      32  rr    .     1101...110000...  ..........  U U U    8   6   2
  18.392 +addx       8  mm    ax7   1101111100001...  ..........  U U U   18  18  12
  18.393 +addx       8  mm    ay7   1101...100001111  ..........  U U U   18  18  12
  18.394 +addx       8  mm    axy7  1101111100001111  ..........  U U U   18  18  12
  18.395 +addx       8  mm    .     1101...100001...  ..........  U U U   18  18  12
  18.396 +addx      16  mm    .     1101...101001...  ..........  U U U   18  18  12
  18.397 +addx      32  mm    .     1101...110001...  ..........  U U U   30  30  12
  18.398 +and        8  er    d     1100...000000...  ..........  U U U    4   4   2
  18.399 +and        8  er    .     1100...000......  A+-DXWLdxI  U U U    4   4   2
  18.400 +and       16  er    d     1100...001000...  ..........  U U U    4   4   2
  18.401 +and       16  er    .     1100...001......  A+-DXWLdxI  U U U    4   4   2
  18.402 +and       32  er    d     1100...010000...  ..........  U U U    6   6   2
  18.403 +and       32  er    .     1100...010......  A+-DXWLdxI  U U U    6   6   2
  18.404 +and        8  re    .     1100...100......  A+-DXWL...  U U U    8   8   4
  18.405 +and       16  re    .     1100...101......  A+-DXWL...  U U U    8   8   4
  18.406 +and       32  re    .     1100...110......  A+-DXWL...  U U U   12  12   4
  18.407 +andi      16  toc   .     0000001000111100  ..........  U U U   20  16  12
  18.408 +andi      16  tos   .     0000001001111100  ..........  S S S   20  16  12
  18.409 +andi       8  .     d     0000001000000...  ..........  U U U    8   8   2
  18.410 +andi       8  .     .     0000001000......  A+-DXWL...  U U U   12  12   4
  18.411 +andi      16  .     d     0000001001000...  ..........  U U U    8   8   2
  18.412 +andi      16  .     .     0000001001......  A+-DXWL...  U U U   12  12   4
  18.413 +andi      32  .     d     0000001010000...  ..........  U U U   14  14   2
  18.414 +andi      32  .     .     0000001010......  A+-DXWL...  U U U   20  20   4
  18.415 +asr        8  s     .     1110...000000...  ..........  U U U    6   6   6
  18.416 +asr       16  s     .     1110...001000...  ..........  U U U    6   6   6
  18.417 +asr       32  s     .     1110...010000...  ..........  U U U    8   8   6
  18.418 +asr        8  r     .     1110...000100...  ..........  U U U    6   6   6
  18.419 +asr       16  r     .     1110...001100...  ..........  U U U    6   6   6
  18.420 +asr       32  r     .     1110...010100...  ..........  U U U    8   8   6
  18.421 +asr       16  .     .     1110000011......  A+-DXWL...  U U U    8   8   5
  18.422 +asl        8  s     .     1110...100000...  ..........  U U U    6   6   8
  18.423 +asl       16  s     .     1110...101000...  ..........  U U U    6   6   8
  18.424 +asl       32  s     .     1110...110000...  ..........  U U U    8   8   8
  18.425 +asl        8  r     .     1110...100100...  ..........  U U U    6   6   8
  18.426 +asl       16  r     .     1110...101100...  ..........  U U U    6   6   8
  18.427 +asl       32  r     .     1110...110100...  ..........  U U U    8   8   8
  18.428 +asl       16  .     .     1110000111......  A+-DXWL...  U U U    8   8   6
  18.429 +bcc        8  .     .     0110............  ..........  U U U    8   8   6
  18.430 +bcc       16  .     .     0110....00000000  ..........  U U U   10  10   6
  18.431 +bcc       32  .     .     0110....11111111  ..........  . . U    .   .   6
  18.432 +bchg       8  r     .     0000...101......  A+-DXWL...  U U U    8   8   4
  18.433 +bchg      32  r     d     0000...101000...  ..........  U U U    8   8   4
  18.434 +bchg       8  s     .     0000100001......  A+-DXWL...  U U U   12  12   4
  18.435 +bchg      32  s     d     0000100001000...  ..........  U U U   12  12   4
  18.436 +bclr       8  r     .     0000...110......  A+-DXWL...  U U U    8  10   4
  18.437 +bclr      32  r     d     0000...110000...  ..........  U U U   10  10   4
  18.438 +bclr       8  s     .     0000100010......  A+-DXWL...  U U U   12  12   4
  18.439 +bclr      32  s     d     0000100010000...  ..........  U U U   14  14   4
  18.440 +bfchg     32  .     d     1110101011000...  ..........  . . U    .   .  12  timing not quite correct
  18.441 +bfchg     32  .     .     1110101011......  A..DXWL...  . . U    .   .  20
  18.442 +bfclr     32  .     d     1110110011000...  ..........  . . U    .   .  12
  18.443 +bfclr     32  .     .     1110110011......  A..DXWL...  . . U    .   .  20
  18.444 +bfexts    32  .     d     1110101111000...  ..........  . . U    .   .   8
  18.445 +bfexts    32  .     .     1110101111......  A..DXWLdx.  . . U    .   .  15
  18.446 +bfextu    32  .     d     1110100111000...  ..........  . . U    .   .   8
  18.447 +bfextu    32  .     .     1110100111......  A..DXWLdx.  . . U    .   .  15
  18.448 +bfffo     32  .     d     1110110111000...  ..........  . . U    .   .  18
  18.449 +bfffo     32  .     .     1110110111......  A..DXWLdx.  . . U    .   .  28
  18.450 +bfins     32  .     d     1110111111000...  ..........  . . U    .   .  10
  18.451 +bfins     32  .     .     1110111111......  A..DXWL...  . . U    .   .  17
  18.452 +bfset     32  .     d     1110111011000...  ..........  . . U    .   .  12
  18.453 +bfset     32  .     .     1110111011......  A..DXWL...  . . U    .   .  20
  18.454 +bftst     32  .     d     1110100011000...  ..........  . . U    .   .   6
  18.455 +bftst     32  .     .     1110100011......  A..DXWLdx.  . . U    .   .  13
  18.456 +bkpt       0  .     .     0100100001001...  ..........  . U U    .  10  10
  18.457 +bra        8  .     .     01100000........  ..........  U U U   10  10  10
  18.458 +bra       16  .     .     0110000000000000  ..........  U U U   10  10  10
  18.459 +bra       32  .     .     0110000011111111  ..........  U U U    .   .  10
  18.460 +bset      32  r     d     0000...111000...  ..........  U U U    8   8   4
  18.461 +bset       8  r     .     0000...111......  A+-DXWL...  U U U    8   8   4
  18.462 +bset       8  s     .     0000100011......  A+-DXWL...  U U U   12  12   4
  18.463 +bset      32  s     d     0000100011000...  ..........  U U U   12  12   4
  18.464 +bsr        8  .     .     01100001........  ..........  U U U   18  18   7
  18.465 +bsr       16  .     .     0110000100000000  ..........  U U U   18  18   7
  18.466 +bsr       32  .     .     0110000111111111  ..........  . . U    .   .   7
  18.467 +btst       8  r     .     0000...100......  A+-DXWLdxI  U U U    4   4   4
  18.468 +btst      32  r     d     0000...100000...  ..........  U U U    6   6   4
  18.469 +btst       8  s     .     0000100000......  A+-DXWLdx.  U U U    8   8   4
  18.470 +btst      32  s     d     0000100000000...  ..........  U U U   10  10   4
  18.471 +callm     32  .     .     0000011011......  A..DXWLdx.  . . U    .   .  60  not properly emulated
  18.472 +cas        8  .     .     0000101011......  A+-DXWL...  . . U    .   .  12
  18.473 +cas       16  .     .     0000110011......  A+-DXWL...  . . U    .   .  12
  18.474 +cas       32  .     .     0000111011......  A+-DXWL...  . . U    .   .  12
  18.475 +cas2      16  .     .     0000110011111100  ..........  . . U    .   .  12
  18.476 +cas2      32  .     .     0000111011111100  ..........  . . U    .   .  12
  18.477 +chk       16  .     d     0100...110000...  ..........  U U U   10   8   8
  18.478 +chk       16  .     .     0100...110......  A+-DXWLdxI  U U U   10   8   8
  18.479 +chk       32  .     d     0100...100000...  ..........  . . U    .   .   8
  18.480 +chk       32  .     .     0100...100......  A+-DXWLdxI  . . U    .   .   8
  18.481 +chk2cmp2   8  .     .     0000000011......  A..DXWLdx.  . . U    .   .  18
  18.482 +chk2cmp2  16  .     .     0000001011......  A..DXWLdx.  . . U    .   .  18
  18.483 +chk2cmp2  32  .     .     0000010011......  A..DXWLdx.  . . U    .   .  18
  18.484 +clr        8  .     d     0100001000000...  ..........  U U U    4   4   2
  18.485 +clr        8  .     .     0100001000......  A+-DXWL...  U U U    8   4   4
  18.486 +clr       16  .     d     0100001001000...  ..........  U U U    4   4   2
  18.487 +clr       16  .     .     0100001001......  A+-DXWL...  U U U    8   4   4
  18.488 +clr       32  .     d     0100001010000...  ..........  U U U    6   6   2
  18.489 +clr       32  .     .     0100001010......  A+-DXWL...  U U U   12   6   4
  18.490 +cmp        8  .     d     1011...000000...  ..........  U U U    4   4   2
  18.491 +cmp        8  .     .     1011...000......  A+-DXWLdxI  U U U    4   4   2
  18.492 +cmp       16  .     d     1011...001000...  ..........  U U U    4   4   2
  18.493 +cmp       16  .     a     1011...001001...  ..........  U U U    4   4   2
  18.494 +cmp       16  .     .     1011...001......  A+-DXWLdxI  U U U    4   4   2
  18.495 +cmp       32  .     d     1011...010000...  ..........  U U U    6   6   2
  18.496 +cmp       32  .     a     1011...010001...  ..........  U U U    6   6   2
  18.497 +cmp       32  .     .     1011...010......  A+-DXWLdxI  U U U    6   6   2
  18.498 +cmpa      16  .     d     1011...011000...  ..........  U U U    6   6   4
  18.499 +cmpa      16  .     a     1011...011001...  ..........  U U U    6   6   4
  18.500 +cmpa      16  .     .     1011...011......  A+-DXWLdxI  U U U    6   6   4
  18.501 +cmpa      32  .     d     1011...111000...  ..........  U U U    6   6   4
  18.502 +cmpa      32  .     a     1011...111001...  ..........  U U U    6   6   4
  18.503 +cmpa      32  .     .     1011...111......  A+-DXWLdxI  U U U    6   6   4
  18.504 +cmpi       8  .     d     0000110000000...  ..........  U U U    8   8   2
  18.505 +cmpi       8  .     .     0000110000......  A+-DXWL...  U U U    8   8   2
  18.506 +cmpi       8  .     pcdi  0000110000111010  ..........  . . U    .   .   7
  18.507 +cmpi       8  .     pcix  0000110000111011  ..........  . . U    .   .   9
  18.508 +cmpi      16  .     d     0000110001000...  ..........  U U U    8   8   2
  18.509 +cmpi      16  .     .     0000110001......  A+-DXWL...  U U U    8   8   2
  18.510 +cmpi      16  .     pcdi  0000110001111010  ..........  . . U    .   .   7
  18.511 +cmpi      16  .     pcix  0000110001111011  ..........  . . U    .   .   9
  18.512 +cmpi      32  .     d     0000110010000...  ..........  U U U   14  12   2
  18.513 +cmpi      32  .     .     0000110010......  A+-DXWL...  U U U   12  12   2
  18.514 +cmpi      32  .     pcdi  0000110010111010  ..........  . . U    .   .   7
  18.515 +cmpi      32  .     pcix  0000110010111011  ..........  . . U    .   .   9
  18.516 +cmpm       8  .     ax7   1011111100001...  ..........  U U U   12  12   9
  18.517 +cmpm       8  .     ay7   1011...100001111  ..........  U U U   12  12   9
  18.518 +cmpm       8  .     axy7  1011111100001111  ..........  U U U   12  12   9
  18.519 +cmpm       8  .     .     1011...100001...  ..........  U U U   12  12   9
  18.520 +cmpm      16  .     .     1011...101001...  ..........  U U U   12  12   9
  18.521 +cmpm      32  .     .     1011...110001...  ..........  U U U   20  20   9
  18.522 +cpbcc     32  .     .     1111...01.......  ..........  . . U    .   .   4  unemulated
  18.523 +cpdbcc    32  .     .     1111...001001...  ..........  . . U    .   .   4  unemulated
  18.524 +cpgen     32  .     .     1111...000......  ..........  . . U    .   .   4  unemulated
  18.525 +cpscc     32  .     .     1111...001......  ..........  . . U    .   .   4  unemulated
  18.526 +cptrapcc  32  .     .     1111...001111...  ..........  . . U    .   .   4  unemulated
  18.527 +dbt       16  .     .     0101000011001...  ..........  U U U   12  12   6
  18.528 +dbf       16  .     .     0101000111001...  ..........  U U U   14  14   6
  18.529 +dbcc      16  .     .     0101....11001...  ..........  U U U   12  12   6
  18.530 +divs      16  .     d     1000...111000...  ..........  U U U  158 122  56
  18.531 +divs      16  .     .     1000...111......  A+-DXWLdxI  U U U  158 122  56
  18.532 +divu      16  .     d     1000...011000...  ..........  U U U  140 108  44
  18.533 +divu      16  .     .     1000...011......  A+-DXWLdxI  U U U  140 108  44
  18.534 +divl      32  .     d     0100110001000...  ..........  . . U    .   .  84
  18.535 +divl      32  .     .     0100110001......  A+-DXWLdxI  . . U    .   .  84
  18.536 +eor        8  .     d     1011...100000...  ..........  U U U    4   4   2
  18.537 +eor        8  .     .     1011...100......  A+-DXWL...  U U U    8   8   4
  18.538 +eor       16  .     d     1011...101000...  ..........  U U U    4   4   2
  18.539 +eor       16  .     .     1011...101......  A+-DXWL...  U U U    8   8   4
  18.540 +eor       32  .     d     1011...110000...  ..........  U U U    8   6   2
  18.541 +eor       32  .     .     1011...110......  A+-DXWL...  U U U   12  12   4
  18.542 +eori      16  toc   .     0000101000111100  ..........  U U U   20  16  12
  18.543 +eori      16  tos   .     0000101001111100  ..........  S S S   20  16  12
  18.544 +eori       8  .     d     0000101000000...  ..........  U U U    8   8   2
  18.545 +eori       8  .     .     0000101000......  A+-DXWL...  U U U   12  12   4
  18.546 +eori      16  .     d     0000101001000...  ..........  U U U    8   8   2
  18.547 +eori      16  .     .     0000101001......  A+-DXWL...  U U U   12  12   4
  18.548 +eori      32  .     d     0000101010000...  ..........  U U U   16  14   2
  18.549 +eori      32  .     .     0000101010......  A+-DXWL...  U U U   20  20   4
  18.550 +exg       32  dd    .     1100...101000...  ..........  U U U    6   6   2
  18.551 +exg       32  aa    .     1100...101001...  ..........  U U U    6   6   2
  18.552 +exg       32  da    .     1100...110001...  ..........  U U U    6   6   2
  18.553 +ext       16  .     .     0100100010000...  ..........  U U U    4   4   4
  18.554 +ext       32  .     .     0100100011000...  ..........  U U U    4   4   4
  18.555 +extb      32  .     .     0100100111000...  ..........  . . U    .   .   4
  18.556 +illegal    0  .     .     0100101011111100  ..........  U U U    4   4   4
  18.557 +jmp       32  .     .     0100111011......  A..DXWLdx.  U U U    4   4   0
  18.558 +jsr       32  .     .     0100111010......  A..DXWLdx.  U U U   12  12   0
  18.559 +lea       32  .     .     0100...111......  A..DXWLdx.  U U U    0   0   2
  18.560 +link      16  .     a7    0100111001010111  ..........  U U U   16  16   5
  18.561 +link      16  .     .     0100111001010...  ..........  U U U   16  16   5
  18.562 +link      32  .     a7    0100100000001111  ..........  . . U    .   .   6
  18.563 +link      32  .     .     0100100000001...  ..........  . . U    .   .   6
  18.564 +lsr        8  s     .     1110...000001...  ..........  U U U    6   6   4
  18.565 +lsr       16  s     .     1110...001001...  ..........  U U U    6   6   4
  18.566 +lsr       32  s     .     1110...010001...  ..........  U U U    8   8   4
  18.567 +lsr        8  r     .     1110...000101...  ..........  U U U    6   6   6
  18.568 +lsr       16  r     .     1110...001101...  ..........  U U U    6   6   6
  18.569 +lsr       32  r     .     1110...010101...  ..........  U U U    8   8   6
  18.570 +lsr       16  .     .     1110001011......  A+-DXWL...  U U U    8   8   5
  18.571 +lsl        8  s     .     1110...100001...  ..........  U U U    6   6   4
  18.572 +lsl       16  s     .     1110...101001...  ..........  U U U    6   6   4
  18.573 +lsl       32  s     .     1110...110001...  ..........  U U U    8   8   4
  18.574 +lsl        8  r     .     1110...100101...  ..........  U U U    6   6   6
  18.575 +lsl       16  r     .     1110...101101...  ..........  U U U    6   6   6
  18.576 +lsl       32  r     .     1110...110101...  ..........  U U U    8   8   6
  18.577 +lsl       16  .     .     1110001111......  A+-DXWL...  U U U    8   8   5
  18.578 +move       8  d     d     0001...000000...  ..........  U U U    4   4   2
  18.579 +move       8  d     .     0001...000......  A+-DXWLdxI  U U U    4   4   2
  18.580 +move       8  ai    d     0001...010000...  ..........  U U U    8   8   4
  18.581 +move       8  ai    .     0001...010......  A+-DXWLdxI  U U U    8   8   4
  18.582 +move       8  pi    d     0001...011000...  ..........  U U U    8   8   4
  18.583 +move       8  pi    .     0001...011......  A+-DXWLdxI  U U U    8   8   4
  18.584 +move       8  pi7   d     0001111011000...  ..........  U U U    8   8   4
  18.585 +move       8  pi7   .     0001111011......  A+-DXWLdxI  U U U    8   8   4
  18.586 +move       8  pd    d     0001...100000...  ..........  U U U    8   8   5
  18.587 +move       8  pd    .     0001...100......  A+-DXWLdxI  U U U    8   8   5
  18.588 +move       8  pd7   d     0001111100000...  ..........  U U U    8   8   5
  18.589 +move       8  pd7   .     0001111100......  A+-DXWLdxI  U U U    8   8   5
  18.590 +move       8  di    d     0001...101000...  ..........  U U U   12  12   5
  18.591 +move       8  di    .     0001...101......  A+-DXWLdxI  U U U   12  12   5
  18.592 +move       8  ix    d     0001...110000...  ..........  U U U   14  14   7
  18.593 +move       8  ix    .     0001...110......  A+-DXWLdxI  U U U   14  14   7
  18.594 +move       8  aw    d     0001000111000...  ..........  U U U   12  12   4
  18.595 +move       8  aw    .     0001000111......  A+-DXWLdxI  U U U   12  12   4
  18.596 +move       8  al    d     0001001111000...  ..........  U U U   16  16   6
  18.597 +move       8  al    .     0001001111......  A+-DXWLdxI  U U U   16  16   6
  18.598 +move      16  d     d     0011...000000...  ..........  U U U    4   4   2
  18.599 +move      16  d     a     0011...000001...  ..........  U U U    4   4   2
  18.600 +move      16  d     .     0011...000......  A+-DXWLdxI  U U U    4   4   2
  18.601 +move      16  ai    d     0011...010000...  ..........  U U U    8   8   4
  18.602 +move      16  ai    a     0011...010001...  ..........  U U U    8   8   4
  18.603 +move      16  ai    .     0011...010......  A+-DXWLdxI  U U U    8   8   4
  18.604 +move      16  pi    d     0011...011000...  ..........  U U U    8   8   4
  18.605 +move      16  pi    a     0011...011001...  ..........  U U U    8   8   4
  18.606 +move      16  pi    .     0011...011......  A+-DXWLdxI  U U U    8   8   4
  18.607 +move      16  pd    d     0011...100000...  ..........  U U U    8   8   5
  18.608 +move      16  pd    a     0011...100001...  ..........  U U U    8   8   5
  18.609 +move      16  pd    .     0011...100......  A+-DXWLdxI  U U U    8   8   5
  18.610 +move      16  di    d     0011...101000...  ..........  U U U   12  12   5
  18.611 +move      16  di    a     0011...101001...  ..........  U U U   12  12   5
  18.612 +move      16  di    .     0011...101......  A+-DXWLdxI  U U U   12  12   5
  18.613 +move      16  ix    d     0011...110000...  ..........  U U U   14  14   7
  18.614 +move      16  ix    a     0011...110001...  ..........  U U U   14  14   7
  18.615 +move      16  ix    .     0011...110......  A+-DXWLdxI  U U U   14  14   7
  18.616 +move      16  aw    d     0011000111000...  ..........  U U U   12  12   4
  18.617 +move      16  aw    a     0011000111001...  ..........  U U U   12  12   4
  18.618 +move      16  aw    .     0011000111......  A+-DXWLdxI  U U U   12  12   4
  18.619 +move      16  al    d     0011001111000...  ..........  U U U   16  16   6
  18.620 +move      16  al    a     0011001111001...  ..........  U U U   16  16   6
  18.621 +move      16  al    .     0011001111......  A+-DXWLdxI  U U U   16  16   6
  18.622 +move      32  d     d     0010...000000...  ..........  U U U    4   4   2
  18.623 +move      32  d     a     0010...000001...  ..........  U U U    4   4   2
  18.624 +move      32  d     .     0010...000......  A+-DXWLdxI  U U U    4   4   2
  18.625 +move      32  ai    d     0010...010000...  ..........  U U U   12  12   4
  18.626 +move      32  ai    a     0010...010001...  ..........  U U U   12  12   4
  18.627 +move      32  ai    .     0010...010......  A+-DXWLdxI  U U U   12  12   4
  18.628 +move      32  pi    d     0010...011000...  ..........  U U U   12  12   4
  18.629 +move      32  pi    a     0010...011001...  ..........  U U U   12  12   4
  18.630 +move      32  pi    .     0010...011......  A+-DXWLdxI  U U U   12  12   4
  18.631 +move      32  pd    d     0010...100000...  ..........  U U U   12  14   5
  18.632 +move      32  pd    a     0010...100001...  ..........  U U U   12  14   5
  18.633 +move      32  pd    .     0010...100......  A+-DXWLdxI  U U U   12  14   5
  18.634 +move      32  di    d     0010...101000...  ..........  U U U   16  16   5
  18.635 +move      32  di    a     0010...101001...  ..........  U U U   16  16   5
  18.636 +move      32  di    .     0010...101......  A+-DXWLdxI  U U U   16  16   5
  18.637 +move      32  ix    d     0010...110000...  ..........  U U U   18  18   7
  18.638 +move      32  ix    a     0010...110001...  ..........  U U U   18  18   7
  18.639 +move      32  ix    .     0010...110......  A+-DXWLdxI  U U U   18  18   7
  18.640 +move      32  aw    d     0010000111000...  ..........  U U U   16  16   4
  18.641 +move      32  aw    a     0010000111001...  ..........  U U U   16  16   4
  18.642 +move      32  aw    .     0010000111......  A+-DXWLdxI  U U U   16  16   4
  18.643 +move      32  al    d     0010001111000...  ..........  U U U   20  20   6
  18.644 +move      32  al    a     0010001111001...  ..........  U U U   20  20   6
  18.645 +move      32  al    .     0010001111......  A+-DXWLdxI  U U U   20  20   6
  18.646 +movea     16  .     d     0011...001000...  ..........  U U U    4   4   2
  18.647 +movea     16  .     a     0011...001001...  ..........  U U U    4   4   2
  18.648 +movea     16  .     .     0011...001......  A+-DXWLdxI  U U U    4   4   2
  18.649 +movea     32  .     d     0010...001000...  ..........  U U U    4   4   2
  18.650 +movea     32  .     a     0010...001001...  ..........  U U U    4   4   2
  18.651 +movea     32  .     .     0010...001......  A+-DXWLdxI  U U U    4   4   2
  18.652 +move      16  frc   d     0100001011000...  ..........  . U U    .   4   4
  18.653 +move      16  frc   .     0100001011......  A+-DXWL...  . U U    .   8   4
  18.654 +move      16  toc   d     0100010011000...  ..........  U U U   12  12   4
  18.655 +move      16  toc   .     0100010011......  A+-DXWLdxI  U U U   12  12   4
  18.656 +move      16  frs   d     0100000011000...  ..........  U S S    6   4   8 U only for 000
  18.657 +move      16  frs   .     0100000011......  A+-DXWL...  U S S    8   8   8 U only for 000
  18.658 +move      16  tos   d     0100011011000...  ..........  S S S   12  12   8
  18.659 +move      16  tos   .     0100011011......  A+-DXWLdxI  S S S   12  12   8
  18.660 +move      32  fru   .     0100111001101...  ..........  S S S    4   6   2
  18.661 +move      32  tou   .     0100111001100...  ..........  S S S    4   6   2
  18.662 +movec     32  cr    .     0100111001111010  ..........  . S S    .  12   6
  18.663 +movec     32  rc    .     0100111001111011  ..........  . S S    .  10  12
  18.664 +movem     16  re    pd    0100100010100...  ..........  U U U    8   8   4
  18.665 +movem     16  re    .     0100100010......  A..DXWL...  U U U    8   8   4
  18.666 +movem     32  re    pd    0100100011100...  ..........  U U U    8   8   4
  18.667 +movem     32  re    .     0100100011......  A..DXWL...  U U U    8   8   4
  18.668 +movem     16  er    pi    0100110010011...  ..........  U U U   12  12   8
  18.669 +movem     16  er    .     0100110010......  A..DXWLdx.  U U U   12  12   8
  18.670 +movem     32  er    pi    0100110011011...  ..........  U U U   12  12   8
  18.671 +movem     32  er    .     0100110011......  A..DXWLdx.  U U U   12  12   8
  18.672 +movep     16  er    .     0000...100001...  ..........  U U U   16  16  12
  18.673 +movep     32  er    .     0000...101001...  ..........  U U U   24  24  18
  18.674 +movep     16  re    .     0000...110001...  ..........  U U U   16  16  11
  18.675 +movep     32  re    .     0000...111001...  ..........  U U U   24  24  17
  18.676 +moveq     32  .     .     0111...0........  ..........  U U U    4   4   2
  18.677 +moves      8  .     .     0000111000......  A+-DXWL...  . S S    .  14   5
  18.678 +moves     16  .     .     0000111001......  A+-DXWL...  . S S    .  14   5
  18.679 +moves     32  .     .     0000111010......  A+-DXWL...  . S S    .  16   5
  18.680 +muls      16  .     d     1100...111000...  ..........  U U U   54  32  27
  18.681 +muls      16  .     .     1100...111......  A+-DXWLdxI  U U U   54  32  27
  18.682 +mulu      16  .     d     1100...011000...  ..........  U U U   54  30  27
  18.683 +mulu      16  .     .     1100...011......  A+-DXWLdxI  U U U   54  30  27
  18.684 +mull      32  .     d     0100110000000...  ..........  . . U    .   .  43
  18.685 +mull      32  .     .     0100110000......  A+-DXWLdxI  . . U    .   .  43
  18.686 +nbcd       8  .     d     0100100000000...  ..........  U U U    6   6   6
  18.687 +nbcd       8  .     .     0100100000......  A+-DXWL...  U U U    8   8   6
  18.688 +neg        8  .     d     0100010000000...  ..........  U U U    4   4   2
  18.689 +neg        8  .     .     0100010000......  A+-DXWL...  U U U    8   8   4
  18.690 +neg       16  .     d     0100010001000...  ..........  U U U    4   4   2
  18.691 +neg       16  .     .     0100010001......  A+-DXWL...  U U U    8   8   4
  18.692 +neg       32  .     d     0100010010000...  ..........  U U U    6   6   2
  18.693 +neg       32  .     .     0100010010......  A+-DXWL...  U U U   12  12   4
  18.694 +negx       8  .     d     0100000000000...  ..........  U U U    4   4   2
  18.695 +negx       8  .     .     0100000000......  A+-DXWL...  U U U    8   8   4
  18.696 +negx      16  .     d     0100000001000...  ..........  U U U    4   4   2
  18.697 +negx      16  .     .     0100000001......  A+-DXWL...  U U U    8   8   4
  18.698 +negx      32  .     d     0100000010000...  ..........  U U U    6   6   2
  18.699 +negx      32  .     .     0100000010......  A+-DXWL...  U U U   12  12   4
  18.700 +nop        0  .     .     0100111001110001  ..........  U U U    4   4   2
  18.701 +not        8  .     d     0100011000000...  ..........  U U U    4   4   2
  18.702 +not        8  .     .     0100011000......  A+-DXWL...  U U U    8   8   4
  18.703 +not       16  .     d     0100011001000...  ..........  U U U    4   4   2
  18.704 +not       16  .     .     0100011001......  A+-DXWL...  U U U    8   8   4
  18.705 +not       32  .     d     0100011010000...  ..........  U U U    6   6   2
  18.706 +not       32  .     .     0100011010......  A+-DXWL...  U U U   12  12   4
  18.707 +or         8  er    d     1000...000000...  ..........  U U U    4   4   2
  18.708 +or         8  er    .     1000...000......  A+-DXWLdxI  U U U    4   4   2
  18.709 +or        16  er    d     1000...001000...  ..........  U U U    4   4   2
  18.710 +or        16  er    .     1000...001......  A+-DXWLdxI  U U U    4   4   2
  18.711 +or        32  er    d     1000...010000...  ..........  U U U    6   6   2
  18.712 +or        32  er    .     1000...010......  A+-DXWLdxI  U U U    6   6   2
  18.713 +or         8  re    .     1000...100......  A+-DXWL...  U U U    8   8   4
  18.714 +or        16  re    .     1000...101......  A+-DXWL...  U U U    8   8   4
  18.715 +or        32  re    .     1000...110......  A+-DXWL...  U U U   12  12   4
  18.716 +ori       16  toc   .     0000000000111100  ..........  U U U   20  16  12
  18.717 +ori       16  tos   .     0000000001111100  ..........  S S S   20  16  12
  18.718 +ori        8  .     d     0000000000000...  ..........  U U U    8   8   2
  18.719 +ori        8  .     .     0000000000......  A+-DXWL...  U U U   12  12   4
  18.720 +ori       16  .     d     0000000001000...  ..........  U U U    8   8   2
  18.721 +ori       16  .     .     0000000001......  A+-DXWL...  U U U   12  12   4
  18.722 +ori       32  .     d     0000000010000...  ..........  U U U   16  14   2
  18.723 +ori       32  .     .     0000000010......  A+-DXWL...  U U U   20  20   4
  18.724 +pack      16  rr    .     1000...101000...  ..........  . . U    .   .   6
  18.725 +pack      16  mm    ax7   1000111101001...  ..........  . . U    .   .  13
  18.726 +pack      16  mm    ay7   1000...101001111  ..........  . . U    .   .  13
  18.727 +pack      16  mm    axy7  1000111101001111  ..........  . . U    .   .  13
  18.728 +pack      16  mm    .     1000...101001...  ..........  . . U    .   .  13
  18.729 +pea       32  .     .     0100100001......  A..DXWLdx.  U U U    6   6   5
  18.730 +reset      0  .     .     0100111001110000  ..........  S S S    0   0   0
  18.731 +ror        8  s     .     1110...000011...  ..........  U U U    6   6   8
  18.732 +ror       16  s     .     1110...001011...  ..........  U U U    6   6   8
  18.733 +ror       32  s     .     1110...010011...  ..........  U U U    8   8   8
  18.734 +ror        8  r     .     1110...000111...  ..........  U U U    6   6   8
  18.735 +ror       16  r     .     1110...001111...  ..........  U U U    6   6   8
  18.736 +ror       32  r     .     1110...010111...  ..........  U U U    8   8   8
  18.737 +ror       16  .     .     1110011011......  A+-DXWL...  U U U    8   8   7
  18.738 +rol        8  s     .     1110...100011...  ..........  U U U    6   6   8
  18.739 +rol       16  s     .     1110...101011...  ..........  U U U    6   6   8
  18.740 +rol       32  s     .     1110...110011...  ..........  U U U    8   8   8
  18.741 +rol        8  r     .     1110...100111...  ..........  U U U    6   6   8
  18.742 +rol       16  r     .     1110...101111...  ..........  U U U    6   6   8
  18.743 +rol       32  r     .     1110...110111...  ..........  U U U    8   8   8
  18.744 +rol       16  .     .     1110011111......  A+-DXWL...  U U U    8   8   7
  18.745 +roxr       8  s     .     1110...000010...  ..........  U U U    6   6  12
  18.746 +roxr      16  s     .     1110...001010...  ..........  U U U    6   6  12
  18.747 +roxr      32  s     .     1110...010010...  ..........  U U U    8   8  12
  18.748 +roxr       8  r     .     1110...000110...  ..........  U U U    6   6  12
  18.749 +roxr      16  r     .     1110...001110...  ..........  U U U    6   6  12
  18.750 +roxr      32  r     .     1110...010110...  ..........  U U U    8   8  12
  18.751 +roxr      16  .     .     1110010011......  A+-DXWL...  U U U    8   8   5
  18.752 +roxl       8  s     .     1110...100010...  ..........  U U U    6   6  12
  18.753 +roxl      16  s     .     1110...101010...  ..........  U U U    6   6  12
  18.754 +roxl      32  s     .     1110...110010...  ..........  U U U    8   8  12
  18.755 +roxl       8  r     .     1110...100110...  ..........  U U U    6   6  12
  18.756 +roxl      16  r     .     1110...101110...  ..........  U U U    6   6  12
  18.757 +roxl      32  r     .     1110...110110...  ..........  U U U    8   8  12
  18.758 +roxl      16  .     .     1110010111......  A+-DXWL...  U U U    8   8   5
  18.759 +rtd       32  .     .     0100111001110100  ..........  . U U    .  16  10
  18.760 +rte       32  .     .     0100111001110011  ..........  S S S   20  24  20  bus fault not emulated
  18.761 +rtm       32  .     .     000001101100....  ..........  . . U    .   .  19  not properly emulated
  18.762 +rtr       32  .     .     0100111001110111  ..........  U U U   20  20  14
  18.763 +rts       32  .     .     0100111001110101  ..........  U U U   16  16  10
  18.764 +sbcd       8  rr    .     1000...100000...  ..........  U U U    6   6   4
  18.765 +sbcd       8  mm    ax7   1000111100001...  ..........  U U U   18  18  16
  18.766 +sbcd       8  mm    ay7   1000...100001111  ..........  U U U   18  18  16
  18.767 +sbcd       8  mm    axy7  1000111100001111  ..........  U U U   18  18  16
  18.768 +sbcd       8  mm    .     1000...100001...  ..........  U U U   18  18  16
  18.769 +st         8  .     d     0101000011000...  ..........  U U U    6   4   4
  18.770 +st         8  .     .     0101000011......  A+-DXWL...  U U U    8   8   6
  18.771 +sf         8  .     d     0101000111000...  ..........  U U U    4   4   4
  18.772 +sf         8  .     .     0101000111......  A+-DXWL...  U U U    8   8   6
  18.773 +scc        8  .     d     0101....11000...  ..........  U U U    4   4   4
  18.774 +scc        8  .     .     0101....11......  A+-DXWL...  U U U    8   8   6
  18.775 +stop       0  .     .     0100111001110010  ..........  S S S    4   4   8
  18.776 +sub        8  er    d     1001...000000...  ..........  U U U    4   4   2
  18.777 +sub        8  er    .     1001...000......  A+-DXWLdxI  U U U    4   4   2
  18.778 +sub       16  er    d     1001...001000...  ..........  U U U    4   4   2
  18.779 +sub       16  er    a     1001...001001...  ..........  U U U    4   4   2
  18.780 +sub       16  er    .     1001...001......  A+-DXWLdxI  U U U    4   4   2
  18.781 +sub       32  er    d     1001...010000...  ..........  U U U    6   6   2
  18.782 +sub       32  er    a     1001...010001...  ..........  U U U    6   6   2
  18.783 +sub       32  er    .     1001...010......  A+-DXWLdxI  U U U    6   6   2
  18.784 +sub        8  re    .     1001...100......  A+-DXWL...  U U U    8   8   4
  18.785 +sub       16  re    .     1001...101......  A+-DXWL...  U U U    8   8   4
  18.786 +sub       32  re    .     1001...110......  A+-DXWL...  U U U   12  12   4
  18.787 +suba      16  .     d     1001...011000...  ..........  U U U    8   8   2
  18.788 +suba      16  .     a     1001...011001...  ..........  U U U    8   8   2
  18.789 +suba      16  .     .     1001...011......  A+-DXWLdxI  U U U    8   8   2
  18.790 +suba      32  .     d     1001...111000...  ..........  U U U    6   6   2
  18.791 +suba      32  .     a     1001...111001...  ..........  U U U    6   6   2
  18.792 +suba      32  .     .     1001...111......  A+-DXWLdxI  U U U    6   6   2
  18.793 +subi       8  .     d     0000010000000...  ..........  U U U    8   8   2
  18.794 +subi       8  .     .     0000010000......  A+-DXWL...  U U U   12  12   4
  18.795 +subi      16  .     d     0000010001000...  ..........  U U U    8   8   2
  18.796 +subi      16  .     .     0000010001......  A+-DXWL...  U U U   12  12   4
  18.797 +subi      32  .     d     0000010010000...  ..........  U U U   16  14   2
  18.798 +subi      32  .     .     0000010010......  A+-DXWL...  U U U   20  20   4
  18.799 +subq       8  .     d     0101...100000...  ..........  U U U    4   4   2
  18.800 +subq       8  .     .     0101...100......  A+-DXWL...  U U U    8   8   4
  18.801 +subq      16  .     d     0101...101000...  ..........  U U U    4   4   2
  18.802 +subq      16  .     a     0101...101001...  ..........  U U U    8   4   2
  18.803 +subq      16  .     .     0101...101......  A+-DXWL...  U U U    8   8   4
  18.804 +subq      32  .     d     0101...110000...  ..........  U U U    8   8   2
  18.805 +subq      32  .     a     0101...110001...  ..........  U U U    8   8   2
  18.806 +subq      32  .     .     0101...110......  A+-DXWL...  U U U   12  12   4
  18.807 +subx       8  rr    .     1001...100000...  ..........  U U U    4   4   2
  18.808 +subx      16  rr    .     1001...101000...  ..........  U U U    4   4   2
  18.809 +subx      32  rr    .     1001...110000...  ..........  U U U    8   6   2
  18.810 +subx       8  mm    ax7   1001111100001...  ..........  U U U   18  18  12
  18.811 +subx       8  mm    ay7   1001...100001111  ..........  U U U   18  18  12
  18.812 +subx       8  mm    axy7  1001111100001111  ..........  U U U   18  18  12
  18.813 +subx       8  mm    .     1001...100001...  ..........  U U U   18  18  12
  18.814 +subx      16  mm    .     1001...101001...  ..........  U U U   18  18  12
  18.815 +subx      32  mm    .     1001...110001...  ..........  U U U   30  30  12
  18.816 +swap      32  .     .     0100100001000...  ..........  U U U    4   4   4
  18.817 +tas        8  .     d     0100101011000...  ..........  U U U    4   4   4
  18.818 +tas        8  .     .     0100101011......  A+-DXWL...  U U U   14  14  12
  18.819 +trap       0  .     .     010011100100....  ..........  U U U    4   4   4
  18.820 +trapt      0  .     .     0101000011111100  ..........  . . U    .   .   4
  18.821 +trapt     16  .     .     0101000011111010  ..........  . . U    .   .   6
  18.822 +trapt     32  .     .     0101000011111011  ..........  . . U    .   .   8
  18.823 +trapf      0  .     .     0101000111111100  ..........  . . U    .   .   4
  18.824 +trapf     16  .     .     0101000111111010  ..........  . . U    .   .   6
  18.825 +trapf     32  .     .     0101000111111011  ..........  . . U    .   .   8
  18.826 +trapcc     0  .     .     0101....11111100  ..........  . . U    .   .   4
  18.827 +trapcc    16  .     .     0101....11111010  ..........  . . U    .   .   6
  18.828 +trapcc    32  .     .     0101....11111011  ..........  . . U    .   .   8
  18.829 +trapv      0  .     .     0100111001110110  ..........  U U U    4   4   4
  18.830 +tst        8  .     d     0100101000000...  ..........  U U U    4   4   2
  18.831 +tst        8  .     .     0100101000......  A+-DXWL...  U U U    4   4   2
  18.832 +tst        8  .     pcdi  0100101000111010  ..........  . . U    .   .   7
  18.833 +tst        8  .     pcix  0100101000111011  ..........  . . U    .   .   9
  18.834 +tst        8  .     i     0100101000111100  ..........  . . U    .   .   6
  18.835 +tst       16  .     d     0100101001000...  ..........  U U U    4   4   2
  18.836 +tst       16  .     a     0100101001001...  ..........  . . U    .   .   2
  18.837 +tst       16  .     .     0100101001......  A+-DXWL...  U U U    4   4   2
  18.838 +tst       16  .     pcdi  0100101001111010  ..........  . . U    .   .   7
  18.839 +tst       16  .     pcix  0100101001111011  ..........  . . U    .   .   9
  18.840 +tst       16  .     i     0100101001111100  ..........  . . U    .   .   6
  18.841 +tst       32  .     d     0100101010000...  ..........  U U U    4   4   2
  18.842 +tst       32  .     a     0100101010001...  ..........  . . U    .   .   2
  18.843 +tst       32  .     .     0100101010......  A+-DXWL...  U U U    4   4   2
  18.844 +tst       32  .     pcdi  0100101010111010  ..........  . . U    .   .   7
  18.845 +tst       32  .     pcix  0100101010111011  ..........  . . U    .   .   9
  18.846 +tst       32  .     i     0100101010111100  ..........  . . U    .   .   6
  18.847 +unlk      32  .     a7    0100111001011111  ..........  U U U   12  12   6
  18.848 +unlk      32  .     .     0100111001011...  ..........  U U U   12  12   6
  18.849 +unpk      16  rr    .     1000...110000...  ..........  . . U    .   .   8
  18.850 +unpk      16  mm    ax7   1000111110001...  ..........  . . U    .   .  13
  18.851 +unpk      16  mm    ay7   1000...110001111  ..........  . . U    .   .  13
  18.852 +unpk      16  mm    axy7  1000111110001111  ..........  . . U    .   .  13
  18.853 +unpk      16  mm    .     1000...110001...  ..........  . . U    .   .  13
  18.854 +
  18.855 +
  18.856 +
  18.857 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
  18.858 +M68KMAKE_OPCODE_HANDLER_BODY
  18.859 +
  18.860 +M68KMAKE_OP(1010, 0, ., .)
  18.861 +{
  18.862 +	m68ki_exception_1010();
  18.863 +}
  18.864 +
  18.865 +
  18.866 +M68KMAKE_OP(1111, 0, ., .)
  18.867 +{
  18.868 +	m68ki_exception_1111();
  18.869 +}
  18.870 +
  18.871 +
  18.872 +M68KMAKE_OP(abcd, 8, rr, .)
  18.873 +{
  18.874 +	uint* r_dst = &DX;
  18.875 +	uint src = DY;
  18.876 +	uint dst = *r_dst;
  18.877 +	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
  18.878 +
  18.879 +	if(res > 9)
  18.880 +		res += 6;
  18.881 +	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
  18.882 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
  18.883 +	if(FLAG_C)
  18.884 +		res -= 0xa0;
  18.885 +
  18.886 +	FLAG_N = NFLAG_8(res); /* officially undefined */
  18.887 +
  18.888 +	res = MASK_OUT_ABOVE_8(res);
  18.889 +	FLAG_Z |= res;
  18.890 +
  18.891 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
  18.892 +}
  18.893 +
  18.894 +
  18.895 +M68KMAKE_OP(abcd, 8, mm, ax7)
  18.896 +{
  18.897 +	uint src = OPER_AY_PD_8();
  18.898 +	uint ea  = EA_A7_PD_8();
  18.899 +	uint dst = m68ki_read_8(ea);
  18.900 +	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
  18.901 +
  18.902 +	if(res > 9)
  18.903 +		res += 6;
  18.904 +	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
  18.905 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
  18.906 +	if(FLAG_C)
  18.907 +		res -= 0xa0;
  18.908 +
  18.909 +	FLAG_N = NFLAG_8(res); /* officially undefined */
  18.910 +
  18.911 +	res = MASK_OUT_ABOVE_8(res);
  18.912 +	FLAG_Z |= res;
  18.913 +
  18.914 +	m68ki_write_8(ea, res);
  18.915 +}
  18.916 +
  18.917 +
  18.918 +M68KMAKE_OP(abcd, 8, mm, ay7)
  18.919 +{
  18.920 +	uint src = OPER_A7_PD_8();
  18.921 +	uint ea  = EA_AX_PD_8();
  18.922 +	uint dst = m68ki_read_8(ea);
  18.923 +	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
  18.924 +
  18.925 +	if(res > 9)
  18.926 +		res += 6;
  18.927 +	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
  18.928 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
  18.929 +	if(FLAG_C)
  18.930 +		res -= 0xa0;
  18.931 +
  18.932 +	FLAG_N = NFLAG_8(res); /* officially undefined */
  18.933 +
  18.934 +	res = MASK_OUT_ABOVE_8(res);
  18.935 +	FLAG_Z |= res;
  18.936 +
  18.937 +	m68ki_write_8(ea, res);
  18.938 +}
  18.939 +
  18.940 +
  18.941 +M68KMAKE_OP(abcd, 8, mm, axy7)
  18.942 +{
  18.943 +	uint src = OPER_A7_PD_8();
  18.944 +	uint ea  = EA_A7_PD_8();
  18.945 +	uint dst = m68ki_read_8(ea);
  18.946 +	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
  18.947 +
  18.948 +	if(res > 9)
  18.949 +		res += 6;
  18.950 +	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
  18.951 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
  18.952 +	if(FLAG_C)
  18.953 +		res -= 0xa0;
  18.954 +
  18.955 +	FLAG_N = NFLAG_8(res); /* officially undefined */
  18.956 +
  18.957 +	res = MASK_OUT_ABOVE_8(res);
  18.958 +	FLAG_Z |= res;
  18.959 +
  18.960 +	m68ki_write_8(ea, res);
  18.961 +}
  18.962 +
  18.963 +
  18.964 +M68KMAKE_OP(abcd, 8, mm, .)
  18.965 +{
  18.966 +	uint src = OPER_AY_PD_8();
  18.967 +	uint ea  = EA_AX_PD_8();
  18.968 +	uint dst = m68ki_read_8(ea);
  18.969 +	uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
  18.970 +
  18.971 +	if(res > 9)
  18.972 +		res += 6;
  18.973 +	res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
  18.974 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
  18.975 +	if(FLAG_C)
  18.976 +		res -= 0xa0;
  18.977 +
  18.978 +	FLAG_N = NFLAG_8(res); /* officially undefined */
  18.979 +
  18.980 +	res = MASK_OUT_ABOVE_8(res);
  18.981 +	FLAG_Z |= res;
  18.982 +
  18.983 +	m68ki_write_8(ea, res);
  18.984 +}
  18.985 +
  18.986 +
  18.987 +M68KMAKE_OP(add, 8, er, d)
  18.988 +{
  18.989 +	uint* r_dst = &DX;
  18.990 +	uint src = MASK_OUT_ABOVE_8(DY);
  18.991 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
  18.992 +	uint res = src + dst;
  18.993 +
  18.994 +	FLAG_N = NFLAG_8(res);
  18.995 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
  18.996 +	FLAG_X = FLAG_C = CFLAG_8(res);
  18.997 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
  18.998 +
  18.999 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.1000 +}
 18.1001 +
 18.1002 +
 18.1003 +M68KMAKE_OP(add, 8, er, .)
 18.1004 +{
 18.1005 +	uint* r_dst = &DX;
 18.1006 +	uint src = M68KMAKE_GET_OPER_AY_8;
 18.1007 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.1008 +	uint res = src + dst;
 18.1009 +
 18.1010 +	FLAG_N = NFLAG_8(res);
 18.1011 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1012 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1013 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1014 +
 18.1015 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.1016 +}
 18.1017 +
 18.1018 +
 18.1019 +M68KMAKE_OP(add, 16, er, d)
 18.1020 +{
 18.1021 +	uint* r_dst = &DX;
 18.1022 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.1023 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1024 +	uint res = src + dst;
 18.1025 +
 18.1026 +	FLAG_N = NFLAG_16(res);
 18.1027 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1028 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1029 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1030 +
 18.1031 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.1032 +}
 18.1033 +
 18.1034 +
 18.1035 +M68KMAKE_OP(add, 16, er, a)
 18.1036 +{
 18.1037 +	uint* r_dst = &DX;
 18.1038 +	uint src = MASK_OUT_ABOVE_16(AY);
 18.1039 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1040 +	uint res = src + dst;
 18.1041 +
 18.1042 +	FLAG_N = NFLAG_16(res);
 18.1043 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1044 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1045 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1046 +
 18.1047 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.1048 +}
 18.1049 +
 18.1050 +
 18.1051 +M68KMAKE_OP(add, 16, er, .)
 18.1052 +{
 18.1053 +	uint* r_dst = &DX;
 18.1054 +	uint src = M68KMAKE_GET_OPER_AY_16;
 18.1055 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1056 +	uint res = src + dst;
 18.1057 +
 18.1058 +	FLAG_N = NFLAG_16(res);
 18.1059 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1060 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1061 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1062 +
 18.1063 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.1064 +}
 18.1065 +
 18.1066 +
 18.1067 +M68KMAKE_OP(add, 32, er, d)
 18.1068 +{
 18.1069 +	uint* r_dst = &DX;
 18.1070 +	uint src = DY;
 18.1071 +	uint dst = *r_dst;
 18.1072 +	uint res = src + dst;
 18.1073 +
 18.1074 +	FLAG_N = NFLAG_32(res);
 18.1075 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1076 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1077 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1078 +
 18.1079 +	*r_dst = FLAG_Z;
 18.1080 +}
 18.1081 +
 18.1082 +
 18.1083 +M68KMAKE_OP(add, 32, er, a)
 18.1084 +{
 18.1085 +	uint* r_dst = &DX;
 18.1086 +	uint src = AY;
 18.1087 +	uint dst = *r_dst;
 18.1088 +	uint res = src + dst;
 18.1089 +
 18.1090 +	FLAG_N = NFLAG_32(res);
 18.1091 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1092 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1093 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1094 +
 18.1095 +	*r_dst = FLAG_Z;
 18.1096 +}
 18.1097 +
 18.1098 +
 18.1099 +M68KMAKE_OP(add, 32, er, .)
 18.1100 +{
 18.1101 +	uint* r_dst = &DX;
 18.1102 +	uint src = M68KMAKE_GET_OPER_AY_32;
 18.1103 +	uint dst = *r_dst;
 18.1104 +	uint res = src + dst;
 18.1105 +
 18.1106 +	FLAG_N = NFLAG_32(res);
 18.1107 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1108 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1109 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1110 +
 18.1111 +	*r_dst = FLAG_Z;
 18.1112 +}
 18.1113 +
 18.1114 +
 18.1115 +M68KMAKE_OP(add, 8, re, .)
 18.1116 +{
 18.1117 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.1118 +	uint src = MASK_OUT_ABOVE_8(DX);
 18.1119 +	uint dst = m68ki_read_8(ea);
 18.1120 +	uint res = src + dst;
 18.1121 +
 18.1122 +	FLAG_N = NFLAG_8(res);
 18.1123 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1124 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1125 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1126 +
 18.1127 +	m68ki_write_8(ea, FLAG_Z);
 18.1128 +}
 18.1129 +
 18.1130 +
 18.1131 +M68KMAKE_OP(add, 16, re, .)
 18.1132 +{
 18.1133 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1134 +	uint src = MASK_OUT_ABOVE_16(DX);
 18.1135 +	uint dst = m68ki_read_16(ea);
 18.1136 +	uint res = src + dst;
 18.1137 +
 18.1138 +	FLAG_N = NFLAG_16(res);
 18.1139 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1140 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1141 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1142 +
 18.1143 +	m68ki_write_16(ea, FLAG_Z);
 18.1144 +}
 18.1145 +
 18.1146 +
 18.1147 +M68KMAKE_OP(add, 32, re, .)
 18.1148 +{
 18.1149 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.1150 +	uint src = DX;
 18.1151 +	uint dst = m68ki_read_32(ea);
 18.1152 +	uint res = src + dst;
 18.1153 +
 18.1154 +	FLAG_N = NFLAG_32(res);
 18.1155 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1156 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1157 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1158 +
 18.1159 +	m68ki_write_32(ea, FLAG_Z);
 18.1160 +}
 18.1161 +
 18.1162 +
 18.1163 +M68KMAKE_OP(adda, 16, ., d)
 18.1164 +{
 18.1165 +	uint* r_dst = &AX;
 18.1166 +
 18.1167 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));
 18.1168 +}
 18.1169 +
 18.1170 +
 18.1171 +M68KMAKE_OP(adda, 16, ., a)
 18.1172 +{
 18.1173 +	uint* r_dst = &AX;
 18.1174 +
 18.1175 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));
 18.1176 +}
 18.1177 +
 18.1178 +
 18.1179 +M68KMAKE_OP(adda, 16, ., .)
 18.1180 +{
 18.1181 +	uint* r_dst = &AX;
 18.1182 +
 18.1183 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
 18.1184 +}
 18.1185 +
 18.1186 +
 18.1187 +M68KMAKE_OP(adda, 32, ., d)
 18.1188 +{
 18.1189 +	uint* r_dst = &AX;
 18.1190 +
 18.1191 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);
 18.1192 +}
 18.1193 +
 18.1194 +
 18.1195 +M68KMAKE_OP(adda, 32, ., a)
 18.1196 +{
 18.1197 +	uint* r_dst = &AX;
 18.1198 +
 18.1199 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);
 18.1200 +}
 18.1201 +
 18.1202 +
 18.1203 +M68KMAKE_OP(adda, 32, ., .)
 18.1204 +{
 18.1205 +	uint* r_dst = &AX;
 18.1206 +
 18.1207 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + M68KMAKE_GET_OPER_AY_32);
 18.1208 +}
 18.1209 +
 18.1210 +
 18.1211 +M68KMAKE_OP(addi, 8, ., d)
 18.1212 +{
 18.1213 +	uint* r_dst = &DY;
 18.1214 +	uint src = OPER_I_8();
 18.1215 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.1216 +	uint res = src + dst;
 18.1217 +
 18.1218 +	FLAG_N = NFLAG_8(res);
 18.1219 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1220 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1221 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1222 +
 18.1223 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.1224 +}
 18.1225 +
 18.1226 +
 18.1227 +M68KMAKE_OP(addi, 8, ., .)
 18.1228 +{
 18.1229 +	uint src = OPER_I_8();
 18.1230 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.1231 +	uint dst = m68ki_read_8(ea);
 18.1232 +	uint res = src + dst;
 18.1233 +
 18.1234 +	FLAG_N = NFLAG_8(res);
 18.1235 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1236 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1237 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1238 +
 18.1239 +	m68ki_write_8(ea, FLAG_Z);
 18.1240 +}
 18.1241 +
 18.1242 +
 18.1243 +M68KMAKE_OP(addi, 16, ., d)
 18.1244 +{
 18.1245 +	uint* r_dst = &DY;
 18.1246 +	uint src = OPER_I_16();
 18.1247 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1248 +	uint res = src + dst;
 18.1249 +
 18.1250 +	FLAG_N = NFLAG_16(res);
 18.1251 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1252 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1253 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1254 +
 18.1255 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.1256 +}
 18.1257 +
 18.1258 +
 18.1259 +M68KMAKE_OP(addi, 16, ., .)
 18.1260 +{
 18.1261 +	uint src = OPER_I_16();
 18.1262 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1263 +	uint dst = m68ki_read_16(ea);
 18.1264 +	uint res = src + dst;
 18.1265 +
 18.1266 +	FLAG_N = NFLAG_16(res);
 18.1267 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1268 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1269 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1270 +
 18.1271 +	m68ki_write_16(ea, FLAG_Z);
 18.1272 +}
 18.1273 +
 18.1274 +
 18.1275 +M68KMAKE_OP(addi, 32, ., d)
 18.1276 +{
 18.1277 +	uint* r_dst = &DY;
 18.1278 +	uint src = OPER_I_32();
 18.1279 +	uint dst = *r_dst;
 18.1280 +	uint res = src + dst;
 18.1281 +
 18.1282 +	FLAG_N = NFLAG_32(res);
 18.1283 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1284 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1285 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1286 +
 18.1287 +	*r_dst = FLAG_Z;
 18.1288 +}
 18.1289 +
 18.1290 +
 18.1291 +M68KMAKE_OP(addi, 32, ., .)
 18.1292 +{
 18.1293 +	uint src = OPER_I_32();
 18.1294 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.1295 +	uint dst = m68ki_read_32(ea);
 18.1296 +	uint res = src + dst;
 18.1297 +
 18.1298 +	FLAG_N = NFLAG_32(res);
 18.1299 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1300 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1301 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1302 +
 18.1303 +	m68ki_write_32(ea, FLAG_Z);
 18.1304 +}
 18.1305 +
 18.1306 +
 18.1307 +M68KMAKE_OP(addq, 8, ., d)
 18.1308 +{
 18.1309 +	uint* r_dst = &DY;
 18.1310 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1311 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.1312 +	uint res = src + dst;
 18.1313 +
 18.1314 +	FLAG_N = NFLAG_8(res);
 18.1315 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1316 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1317 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1318 +
 18.1319 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.1320 +}
 18.1321 +
 18.1322 +
 18.1323 +M68KMAKE_OP(addq, 8, ., .)
 18.1324 +{
 18.1325 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1326 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.1327 +	uint dst = m68ki_read_8(ea);
 18.1328 +	uint res = src + dst;
 18.1329 +
 18.1330 +	FLAG_N = NFLAG_8(res);
 18.1331 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1332 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1333 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1334 +
 18.1335 +	m68ki_write_8(ea, FLAG_Z);
 18.1336 +}
 18.1337 +
 18.1338 +
 18.1339 +M68KMAKE_OP(addq, 16, ., d)
 18.1340 +{
 18.1341 +	uint* r_dst = &DY;
 18.1342 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1343 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1344 +	uint res = src + dst;
 18.1345 +
 18.1346 +	FLAG_N = NFLAG_16(res);
 18.1347 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1348 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1349 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1350 +
 18.1351 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.1352 +}
 18.1353 +
 18.1354 +
 18.1355 +M68KMAKE_OP(addq, 16, ., a)
 18.1356 +{
 18.1357 +	uint* r_dst = &AY;
 18.1358 +
 18.1359 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
 18.1360 +}
 18.1361 +
 18.1362 +
 18.1363 +M68KMAKE_OP(addq, 16, ., .)
 18.1364 +{
 18.1365 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1366 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1367 +	uint dst = m68ki_read_16(ea);
 18.1368 +	uint res = src + dst;
 18.1369 +
 18.1370 +	FLAG_N = NFLAG_16(res);
 18.1371 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1372 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1373 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1374 +
 18.1375 +	m68ki_write_16(ea, FLAG_Z);
 18.1376 +}
 18.1377 +
 18.1378 +
 18.1379 +M68KMAKE_OP(addq, 32, ., d)
 18.1380 +{
 18.1381 +	uint* r_dst = &DY;
 18.1382 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1383 +	uint dst = *r_dst;
 18.1384 +	uint res = src + dst;
 18.1385 +
 18.1386 +	FLAG_N = NFLAG_32(res);
 18.1387 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1388 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1389 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1390 +
 18.1391 +	*r_dst = FLAG_Z;
 18.1392 +}
 18.1393 +
 18.1394 +
 18.1395 +M68KMAKE_OP(addq, 32, ., a)
 18.1396 +{
 18.1397 +	uint* r_dst = &AY;
 18.1398 +
 18.1399 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
 18.1400 +}
 18.1401 +
 18.1402 +
 18.1403 +M68KMAKE_OP(addq, 32, ., .)
 18.1404 +{
 18.1405 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1406 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.1407 +	uint dst = m68ki_read_32(ea);
 18.1408 +	uint res = src + dst;
 18.1409 +
 18.1410 +
 18.1411 +	FLAG_N = NFLAG_32(res);
 18.1412 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1413 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1414 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.1415 +
 18.1416 +	m68ki_write_32(ea, FLAG_Z);
 18.1417 +}
 18.1418 +
 18.1419 +
 18.1420 +M68KMAKE_OP(addx, 8, rr, .)
 18.1421 +{
 18.1422 +	uint* r_dst = &DX;
 18.1423 +	uint src = MASK_OUT_ABOVE_8(DY);
 18.1424 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.1425 +	uint res = src + dst + XFLAG_AS_1();
 18.1426 +
 18.1427 +	FLAG_N = NFLAG_8(res);
 18.1428 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1429 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1430 +
 18.1431 +	res = MASK_OUT_ABOVE_8(res);
 18.1432 +	FLAG_Z |= res;
 18.1433 +
 18.1434 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.1435 +}
 18.1436 +
 18.1437 +
 18.1438 +M68KMAKE_OP(addx, 16, rr, .)
 18.1439 +{
 18.1440 +	uint* r_dst = &DX;
 18.1441 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.1442 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.1443 +	uint res = src + dst + XFLAG_AS_1();
 18.1444 +
 18.1445 +	FLAG_N = NFLAG_16(res);
 18.1446 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1447 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1448 +
 18.1449 +	res = MASK_OUT_ABOVE_16(res);
 18.1450 +	FLAG_Z |= res;
 18.1451 +
 18.1452 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.1453 +}
 18.1454 +
 18.1455 +
 18.1456 +M68KMAKE_OP(addx, 32, rr, .)
 18.1457 +{
 18.1458 +	uint* r_dst = &DX;
 18.1459 +	uint src = DY;
 18.1460 +	uint dst = *r_dst;
 18.1461 +	uint res = src + dst + XFLAG_AS_1();
 18.1462 +
 18.1463 +	FLAG_N = NFLAG_32(res);
 18.1464 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1465 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1466 +
 18.1467 +	res = MASK_OUT_ABOVE_32(res);
 18.1468 +	FLAG_Z |= res;
 18.1469 +
 18.1470 +	*r_dst = res;
 18.1471 +}
 18.1472 +
 18.1473 +
 18.1474 +M68KMAKE_OP(addx, 8, mm, ax7)
 18.1475 +{
 18.1476 +	uint src = OPER_AY_PD_8();
 18.1477 +	uint ea  = EA_A7_PD_8();
 18.1478 +	uint dst = m68ki_read_8(ea);
 18.1479 +	uint res = src + dst + XFLAG_AS_1();
 18.1480 +
 18.1481 +	FLAG_N = NFLAG_8(res);
 18.1482 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1483 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1484 +
 18.1485 +	res = MASK_OUT_ABOVE_8(res);
 18.1486 +	FLAG_Z |= res;
 18.1487 +
 18.1488 +	m68ki_write_8(ea, res);
 18.1489 +}
 18.1490 +
 18.1491 +
 18.1492 +M68KMAKE_OP(addx, 8, mm, ay7)
 18.1493 +{
 18.1494 +	uint src = OPER_A7_PD_8();
 18.1495 +	uint ea  = EA_AX_PD_8();
 18.1496 +	uint dst = m68ki_read_8(ea);
 18.1497 +	uint res = src + dst + XFLAG_AS_1();
 18.1498 +
 18.1499 +	FLAG_N = NFLAG_8(res);
 18.1500 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1501 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1502 +
 18.1503 +	res = MASK_OUT_ABOVE_8(res);
 18.1504 +	FLAG_Z |= res;
 18.1505 +
 18.1506 +	m68ki_write_8(ea, res);
 18.1507 +}
 18.1508 +
 18.1509 +
 18.1510 +M68KMAKE_OP(addx, 8, mm, axy7)
 18.1511 +{
 18.1512 +	uint src = OPER_A7_PD_8();
 18.1513 +	uint ea  = EA_A7_PD_8();
 18.1514 +	uint dst = m68ki_read_8(ea);
 18.1515 +	uint res = src + dst + XFLAG_AS_1();
 18.1516 +
 18.1517 +	FLAG_N = NFLAG_8(res);
 18.1518 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1519 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1520 +
 18.1521 +	res = MASK_OUT_ABOVE_8(res);
 18.1522 +	FLAG_Z |= res;
 18.1523 +
 18.1524 +	m68ki_write_8(ea, res);
 18.1525 +}
 18.1526 +
 18.1527 +
 18.1528 +M68KMAKE_OP(addx, 8, mm, .)
 18.1529 +{
 18.1530 +	uint src = OPER_AY_PD_8();
 18.1531 +	uint ea  = EA_AX_PD_8();
 18.1532 +	uint dst = m68ki_read_8(ea);
 18.1533 +	uint res = src + dst + XFLAG_AS_1();
 18.1534 +
 18.1535 +	FLAG_N = NFLAG_8(res);
 18.1536 +	FLAG_V = VFLAG_ADD_8(src, dst, res);
 18.1537 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.1538 +
 18.1539 +	res = MASK_OUT_ABOVE_8(res);
 18.1540 +	FLAG_Z |= res;
 18.1541 +
 18.1542 +	m68ki_write_8(ea, res);
 18.1543 +}
 18.1544 +
 18.1545 +
 18.1546 +M68KMAKE_OP(addx, 16, mm, .)
 18.1547 +{
 18.1548 +	uint src = OPER_AY_PD_16();
 18.1549 +	uint ea  = EA_AX_PD_16();
 18.1550 +	uint dst = m68ki_read_16(ea);
 18.1551 +	uint res = src + dst + XFLAG_AS_1();
 18.1552 +
 18.1553 +	FLAG_N = NFLAG_16(res);
 18.1554 +	FLAG_V = VFLAG_ADD_16(src, dst, res);
 18.1555 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.1556 +
 18.1557 +	res = MASK_OUT_ABOVE_16(res);
 18.1558 +	FLAG_Z |= res;
 18.1559 +
 18.1560 +	m68ki_write_16(ea, res);
 18.1561 +}
 18.1562 +
 18.1563 +
 18.1564 +M68KMAKE_OP(addx, 32, mm, .)
 18.1565 +{
 18.1566 +	uint src = OPER_AY_PD_32();
 18.1567 +	uint ea  = EA_AX_PD_32();
 18.1568 +	uint dst = m68ki_read_32(ea);
 18.1569 +	uint res = src + dst + XFLAG_AS_1();
 18.1570 +
 18.1571 +	FLAG_N = NFLAG_32(res);
 18.1572 +	FLAG_V = VFLAG_ADD_32(src, dst, res);
 18.1573 +	FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
 18.1574 +
 18.1575 +	res = MASK_OUT_ABOVE_32(res);
 18.1576 +	FLAG_Z |= res;
 18.1577 +
 18.1578 +	m68ki_write_32(ea, res);
 18.1579 +}
 18.1580 +
 18.1581 +
 18.1582 +M68KMAKE_OP(and, 8, er, d)
 18.1583 +{
 18.1584 +	FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));
 18.1585 +
 18.1586 +	FLAG_N = NFLAG_8(FLAG_Z);
 18.1587 +	FLAG_C = CFLAG_CLEAR;
 18.1588 +	FLAG_V = VFLAG_CLEAR;
 18.1589 +}
 18.1590 +
 18.1591 +
 18.1592 +M68KMAKE_OP(and, 8, er, .)
 18.1593 +{
 18.1594 +	FLAG_Z = MASK_OUT_ABOVE_8(DX &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
 18.1595 +
 18.1596 +	FLAG_N = NFLAG_8(FLAG_Z);
 18.1597 +	FLAG_C = CFLAG_CLEAR;
 18.1598 +	FLAG_V = VFLAG_CLEAR;
 18.1599 +}
 18.1600 +
 18.1601 +
 18.1602 +M68KMAKE_OP(and, 16, er, d)
 18.1603 +{
 18.1604 +	FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));
 18.1605 +
 18.1606 +	FLAG_N = NFLAG_16(FLAG_Z);
 18.1607 +	FLAG_C = CFLAG_CLEAR;
 18.1608 +	FLAG_V = VFLAG_CLEAR;
 18.1609 +}
 18.1610 +
 18.1611 +
 18.1612 +M68KMAKE_OP(and, 16, er, .)
 18.1613 +{
 18.1614 +	FLAG_Z = MASK_OUT_ABOVE_16(DX &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
 18.1615 +
 18.1616 +	FLAG_N = NFLAG_16(FLAG_Z);
 18.1617 +	FLAG_C = CFLAG_CLEAR;
 18.1618 +	FLAG_V = VFLAG_CLEAR;
 18.1619 +}
 18.1620 +
 18.1621 +
 18.1622 +M68KMAKE_OP(and, 32, er, d)
 18.1623 +{
 18.1624 +	FLAG_Z = DX &= DY;
 18.1625 +
 18.1626 +	FLAG_N = NFLAG_32(FLAG_Z);
 18.1627 +	FLAG_C = CFLAG_CLEAR;
 18.1628 +	FLAG_V = VFLAG_CLEAR;
 18.1629 +}
 18.1630 +
 18.1631 +
 18.1632 +M68KMAKE_OP(and, 32, er, .)
 18.1633 +{
 18.1634 +	FLAG_Z = DX &= M68KMAKE_GET_OPER_AY_32;
 18.1635 +
 18.1636 +	FLAG_N = NFLAG_32(FLAG_Z);
 18.1637 +	FLAG_C = CFLAG_CLEAR;
 18.1638 +	FLAG_V = VFLAG_CLEAR;
 18.1639 +}
 18.1640 +
 18.1641 +
 18.1642 +M68KMAKE_OP(and, 8, re, .)
 18.1643 +{
 18.1644 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.1645 +	uint res = DX & m68ki_read_8(ea);
 18.1646 +
 18.1647 +	FLAG_N = NFLAG_8(res);
 18.1648 +	FLAG_C = CFLAG_CLEAR;
 18.1649 +	FLAG_V = VFLAG_CLEAR;
 18.1650 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.1651 +
 18.1652 +	m68ki_write_8(ea, FLAG_Z);
 18.1653 +}
 18.1654 +
 18.1655 +
 18.1656 +M68KMAKE_OP(and, 16, re, .)
 18.1657 +{
 18.1658 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1659 +	uint res = DX & m68ki_read_16(ea);
 18.1660 +
 18.1661 +	FLAG_N = NFLAG_16(res);
 18.1662 +	FLAG_C = CFLAG_CLEAR;
 18.1663 +	FLAG_V = VFLAG_CLEAR;
 18.1664 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.1665 +
 18.1666 +	m68ki_write_16(ea, FLAG_Z);
 18.1667 +}
 18.1668 +
 18.1669 +
 18.1670 +M68KMAKE_OP(and, 32, re, .)
 18.1671 +{
 18.1672 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.1673 +	uint res = DX & m68ki_read_32(ea);
 18.1674 +
 18.1675 +	FLAG_N = NFLAG_32(res);
 18.1676 +	FLAG_Z = res;
 18.1677 +	FLAG_C = CFLAG_CLEAR;
 18.1678 +	FLAG_V = VFLAG_CLEAR;
 18.1679 +
 18.1680 +	m68ki_write_32(ea, res);
 18.1681 +}
 18.1682 +
 18.1683 +
 18.1684 +M68KMAKE_OP(andi, 8, ., d)
 18.1685 +{
 18.1686 +	FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
 18.1687 +
 18.1688 +	FLAG_N = NFLAG_8(FLAG_Z);
 18.1689 +	FLAG_C = CFLAG_CLEAR;
 18.1690 +	FLAG_V = VFLAG_CLEAR;
 18.1691 +}
 18.1692 +
 18.1693 +
 18.1694 +M68KMAKE_OP(andi, 8, ., .)
 18.1695 +{
 18.1696 +	uint src = OPER_I_8();
 18.1697 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.1698 +	uint res = src & m68ki_read_8(ea);
 18.1699 +
 18.1700 +	FLAG_N = NFLAG_8(res);
 18.1701 +	FLAG_Z = res;
 18.1702 +	FLAG_C = CFLAG_CLEAR;
 18.1703 +	FLAG_V = VFLAG_CLEAR;
 18.1704 +
 18.1705 +	m68ki_write_8(ea, res);
 18.1706 +}
 18.1707 +
 18.1708 +
 18.1709 +M68KMAKE_OP(andi, 16, ., d)
 18.1710 +{
 18.1711 +	FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
 18.1712 +
 18.1713 +	FLAG_N = NFLAG_16(FLAG_Z);
 18.1714 +	FLAG_C = CFLAG_CLEAR;
 18.1715 +	FLAG_V = VFLAG_CLEAR;
 18.1716 +}
 18.1717 +
 18.1718 +
 18.1719 +M68KMAKE_OP(andi, 16, ., .)
 18.1720 +{
 18.1721 +	uint src = OPER_I_16();
 18.1722 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1723 +	uint res = src & m68ki_read_16(ea);
 18.1724 +
 18.1725 +	FLAG_N = NFLAG_16(res);
 18.1726 +	FLAG_Z = res;
 18.1727 +	FLAG_C = CFLAG_CLEAR;
 18.1728 +	FLAG_V = VFLAG_CLEAR;
 18.1729 +
 18.1730 +	m68ki_write_16(ea, res);
 18.1731 +}
 18.1732 +
 18.1733 +
 18.1734 +M68KMAKE_OP(andi, 32, ., d)
 18.1735 +{
 18.1736 +	FLAG_Z = DY &= (OPER_I_32());
 18.1737 +
 18.1738 +	FLAG_N = NFLAG_32(FLAG_Z);
 18.1739 +	FLAG_C = CFLAG_CLEAR;
 18.1740 +	FLAG_V = VFLAG_CLEAR;
 18.1741 +}
 18.1742 +
 18.1743 +
 18.1744 +M68KMAKE_OP(andi, 32, ., .)
 18.1745 +{
 18.1746 +	uint src = OPER_I_32();
 18.1747 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.1748 +	uint res = src & m68ki_read_32(ea);
 18.1749 +
 18.1750 +	FLAG_N = NFLAG_32(res);
 18.1751 +	FLAG_Z = res;
 18.1752 +	FLAG_C = CFLAG_CLEAR;
 18.1753 +	FLAG_V = VFLAG_CLEAR;
 18.1754 +
 18.1755 +	m68ki_write_32(ea, res);
 18.1756 +}
 18.1757 +
 18.1758 +
 18.1759 +M68KMAKE_OP(andi, 16, toc, .)
 18.1760 +{
 18.1761 +	m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
 18.1762 +}
 18.1763 +
 18.1764 +
 18.1765 +M68KMAKE_OP(andi, 16, tos, .)
 18.1766 +{
 18.1767 +	if(FLAG_S)
 18.1768 +	{
 18.1769 +		uint src = OPER_I_16();
 18.1770 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.1771 +		m68ki_set_sr(m68ki_get_sr() & src);
 18.1772 +		return;
 18.1773 +	}
 18.1774 +	m68ki_exception_privilege_violation();
 18.1775 +}
 18.1776 +
 18.1777 +
 18.1778 +M68KMAKE_OP(asr, 8, s, .)
 18.1779 +{
 18.1780 +	uint* r_dst = &DY;
 18.1781 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1782 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.1783 +	uint res = src >> shift;
 18.1784 +
 18.1785 +	if(GET_MSB_8(src))
 18.1786 +		res |= m68ki_shift_8_table[shift];
 18.1787 +
 18.1788 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.1789 +
 18.1790 +	FLAG_N = NFLAG_8(res);
 18.1791 +	FLAG_Z = res;
 18.1792 +	FLAG_V = VFLAG_CLEAR;
 18.1793 +	FLAG_X = FLAG_C = src << (9-shift);
 18.1794 +}
 18.1795 +
 18.1796 +
 18.1797 +M68KMAKE_OP(asr, 16, s, .)
 18.1798 +{
 18.1799 +	uint* r_dst = &DY;
 18.1800 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1801 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.1802 +	uint res = src >> shift;
 18.1803 +
 18.1804 +	if(GET_MSB_16(src))
 18.1805 +		res |= m68ki_shift_16_table[shift];
 18.1806 +
 18.1807 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.1808 +
 18.1809 +	FLAG_N = NFLAG_16(res);
 18.1810 +	FLAG_Z = res;
 18.1811 +	FLAG_V = VFLAG_CLEAR;
 18.1812 +	FLAG_X = FLAG_C = src << (9-shift);
 18.1813 +}
 18.1814 +
 18.1815 +
 18.1816 +M68KMAKE_OP(asr, 32, s, .)
 18.1817 +{
 18.1818 +	uint* r_dst = &DY;
 18.1819 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.1820 +	uint src = *r_dst;
 18.1821 +	uint res = src >> shift;
 18.1822 +
 18.1823 +	if(GET_MSB_32(src))
 18.1824 +		res |= m68ki_shift_32_table[shift];
 18.1825 +
 18.1826 +	*r_dst = res;
 18.1827 +
 18.1828 +	FLAG_N = NFLAG_32(res);
 18.1829 +	FLAG_Z = res;
 18.1830 +	FLAG_V = VFLAG_CLEAR;
 18.1831 +	FLAG_X = FLAG_C = src << (9-shift);
 18.1832 +}
 18.1833 +
 18.1834 +
 18.1835 +M68KMAKE_OP(asr, 8, r, .)
 18.1836 +{
 18.1837 +	uint* r_dst = &DY;
 18.1838 +	uint shift = DX & 0x3f;
 18.1839 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.1840 +	uint res = src >> shift;
 18.1841 +
 18.1842 +	if(shift != 0)
 18.1843 +	{
 18.1844 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.1845 +
 18.1846 +		if(shift < 8)
 18.1847 +		{
 18.1848 +			if(GET_MSB_8(src))
 18.1849 +				res |= m68ki_shift_8_table[shift];
 18.1850 +
 18.1851 +			*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.1852 +
 18.1853 +			FLAG_X = FLAG_C = src << (9-shift);
 18.1854 +			FLAG_N = NFLAG_8(res);
 18.1855 +			FLAG_Z = res;
 18.1856 +			FLAG_V = VFLAG_CLEAR;
 18.1857 +			return;
 18.1858 +		}
 18.1859 +
 18.1860 +		if(GET_MSB_8(src))
 18.1861 +		{
 18.1862 +			*r_dst |= 0xff;
 18.1863 +			FLAG_C = CFLAG_SET;
 18.1864 +			FLAG_X = XFLAG_SET;
 18.1865 +			FLAG_N = NFLAG_SET;
 18.1866 +			FLAG_Z = ZFLAG_CLEAR;
 18.1867 +			FLAG_V = VFLAG_CLEAR;
 18.1868 +			return;
 18.1869 +		}
 18.1870 +
 18.1871 +		*r_dst &= 0xffffff00;
 18.1872 +		FLAG_C = CFLAG_CLEAR;
 18.1873 +		FLAG_X = XFLAG_CLEAR;
 18.1874 +		FLAG_N = NFLAG_CLEAR;
 18.1875 +		FLAG_Z = ZFLAG_SET;
 18.1876 +		FLAG_V = VFLAG_CLEAR;
 18.1877 +		return;
 18.1878 +	}
 18.1879 +
 18.1880 +	FLAG_C = CFLAG_CLEAR;
 18.1881 +	FLAG_N = NFLAG_8(src);
 18.1882 +	FLAG_Z = src;
 18.1883 +	FLAG_V = VFLAG_CLEAR;
 18.1884 +}
 18.1885 +
 18.1886 +
 18.1887 +M68KMAKE_OP(asr, 16, r, .)
 18.1888 +{
 18.1889 +	uint* r_dst = &DY;
 18.1890 +	uint shift = DX & 0x3f;
 18.1891 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.1892 +	uint res = src >> shift;
 18.1893 +
 18.1894 +	if(shift != 0)
 18.1895 +	{
 18.1896 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.1897 +
 18.1898 +		if(shift < 16)
 18.1899 +		{
 18.1900 +			if(GET_MSB_16(src))
 18.1901 +				res |= m68ki_shift_16_table[shift];
 18.1902 +
 18.1903 +			*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.1904 +
 18.1905 +			FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
 18.1906 +			FLAG_N = NFLAG_16(res);
 18.1907 +			FLAG_Z = res;
 18.1908 +			FLAG_V = VFLAG_CLEAR;
 18.1909 +			return;
 18.1910 +		}
 18.1911 +
 18.1912 +		if(GET_MSB_16(src))
 18.1913 +		{
 18.1914 +			*r_dst |= 0xffff;
 18.1915 +			FLAG_C = CFLAG_SET;
 18.1916 +			FLAG_X = XFLAG_SET;
 18.1917 +			FLAG_N = NFLAG_SET;
 18.1918 +			FLAG_Z = ZFLAG_CLEAR;
 18.1919 +			FLAG_V = VFLAG_CLEAR;
 18.1920 +			return;
 18.1921 +		}
 18.1922 +
 18.1923 +		*r_dst &= 0xffff0000;
 18.1924 +		FLAG_C = CFLAG_CLEAR;
 18.1925 +		FLAG_X = XFLAG_CLEAR;
 18.1926 +		FLAG_N = NFLAG_CLEAR;
 18.1927 +		FLAG_Z = ZFLAG_SET;
 18.1928 +		FLAG_V = VFLAG_CLEAR;
 18.1929 +		return;
 18.1930 +	}
 18.1931 +
 18.1932 +	FLAG_C = CFLAG_CLEAR;
 18.1933 +	FLAG_N = NFLAG_16(src);
 18.1934 +	FLAG_Z = src;
 18.1935 +	FLAG_V = VFLAG_CLEAR;
 18.1936 +}
 18.1937 +
 18.1938 +
 18.1939 +M68KMAKE_OP(asr, 32, r, .)
 18.1940 +{
 18.1941 +	uint* r_dst = &DY;
 18.1942 +	uint shift = DX & 0x3f;
 18.1943 +	uint src = *r_dst;
 18.1944 +	uint res = src >> shift;
 18.1945 +
 18.1946 +	if(shift != 0)
 18.1947 +	{
 18.1948 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.1949 +
 18.1950 +		if(shift < 32)
 18.1951 +		{
 18.1952 +			if(GET_MSB_32(src))
 18.1953 +				res |= m68ki_shift_32_table[shift];
 18.1954 +
 18.1955 +			*r_dst = res;
 18.1956 +
 18.1957 +			FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
 18.1958 +			FLAG_N = NFLAG_32(res);
 18.1959 +			FLAG_Z = res;
 18.1960 +			FLAG_V = VFLAG_CLEAR;
 18.1961 +			return;
 18.1962 +		}
 18.1963 +
 18.1964 +		if(GET_MSB_32(src))
 18.1965 +		{
 18.1966 +			*r_dst = 0xffffffff;
 18.1967 +			FLAG_C = CFLAG_SET;
 18.1968 +			FLAG_X = XFLAG_SET;
 18.1969 +			FLAG_N = NFLAG_SET;
 18.1970 +			FLAG_Z = ZFLAG_CLEAR;
 18.1971 +			FLAG_V = VFLAG_CLEAR;
 18.1972 +			return;
 18.1973 +		}
 18.1974 +
 18.1975 +		*r_dst = 0;
 18.1976 +		FLAG_C = CFLAG_CLEAR;
 18.1977 +		FLAG_X = XFLAG_CLEAR;
 18.1978 +		FLAG_N = NFLAG_CLEAR;
 18.1979 +		FLAG_Z = ZFLAG_SET;
 18.1980 +		FLAG_V = VFLAG_CLEAR;
 18.1981 +		return;
 18.1982 +	}
 18.1983 +
 18.1984 +	FLAG_C = CFLAG_CLEAR;
 18.1985 +	FLAG_N = NFLAG_32(src);
 18.1986 +	FLAG_Z = src;
 18.1987 +	FLAG_V = VFLAG_CLEAR;
 18.1988 +}
 18.1989 +
 18.1990 +
 18.1991 +M68KMAKE_OP(asr, 16, ., .)
 18.1992 +{
 18.1993 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.1994 +	uint src = m68ki_read_16(ea);
 18.1995 +	uint res = src >> 1;
 18.1996 +
 18.1997 +	if(GET_MSB_16(src))
 18.1998 +		res |= 0x8000;
 18.1999 +
 18.2000 +	m68ki_write_16(ea, res);
 18.2001 +
 18.2002 +	FLAG_N = NFLAG_16(res);
 18.2003 +	FLAG_Z = res;
 18.2004 +	FLAG_V = VFLAG_CLEAR;
 18.2005 +	FLAG_C = FLAG_X = src << 8;
 18.2006 +}
 18.2007 +
 18.2008 +
 18.2009 +M68KMAKE_OP(asl, 8, s, .)
 18.2010 +{
 18.2011 +	uint* r_dst = &DY;
 18.2012 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.2013 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.2014 +	uint res = MASK_OUT_ABOVE_8(src << shift);
 18.2015 +
 18.2016 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.2017 +
 18.2018 +	FLAG_X = FLAG_C = src << shift;
 18.2019 +	FLAG_N = NFLAG_8(res);
 18.2020 +	FLAG_Z = res;
 18.2021 +	src &= m68ki_shift_8_table[shift + 1];
 18.2022 +	FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;
 18.2023 +}
 18.2024 +
 18.2025 +
 18.2026 +M68KMAKE_OP(asl, 16, s, .)
 18.2027 +{
 18.2028 +	uint* r_dst = &DY;
 18.2029 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.2030 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.2031 +	uint res = MASK_OUT_ABOVE_16(src << shift);
 18.2032 +
 18.2033 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.2034 +
 18.2035 +	FLAG_N = NFLAG_16(res);
 18.2036 +	FLAG_Z = res;
 18.2037 +	FLAG_X = FLAG_C = src >> (8-shift);
 18.2038 +	src &= m68ki_shift_16_table[shift + 1];
 18.2039 +	FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
 18.2040 +}
 18.2041 +
 18.2042 +
 18.2043 +M68KMAKE_OP(asl, 32, s, .)
 18.2044 +{
 18.2045 +	uint* r_dst = &DY;
 18.2046 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.2047 +	uint src = *r_dst;
 18.2048 +	uint res = MASK_OUT_ABOVE_32(src << shift);
 18.2049 +
 18.2050 +	*r_dst = res;
 18.2051 +
 18.2052 +	FLAG_N = NFLAG_32(res);
 18.2053 +	FLAG_Z = res;
 18.2054 +	FLAG_X = FLAG_C = src >> (24-shift);
 18.2055 +	src &= m68ki_shift_32_table[shift + 1];
 18.2056 +	FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
 18.2057 +}
 18.2058 +
 18.2059 +
 18.2060 +M68KMAKE_OP(asl, 8, r, .)
 18.2061 +{
 18.2062 +	uint* r_dst = &DY;
 18.2063 +	uint shift = DX & 0x3f;
 18.2064 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.2065 +	uint res = MASK_OUT_ABOVE_8(src << shift);
 18.2066 +
 18.2067 +	if(shift != 0)
 18.2068 +	{
 18.2069 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.2070 +
 18.2071 +		if(shift < 8)
 18.2072 +		{
 18.2073 +			*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.2074 +			FLAG_X = FLAG_C = src << shift;
 18.2075 +			FLAG_N = NFLAG_8(res);
 18.2076 +			FLAG_Z = res;
 18.2077 +			src &= m68ki_shift_8_table[shift + 1];
 18.2078 +			FLAG_V = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;
 18.2079 +			return;
 18.2080 +		}
 18.2081 +
 18.2082 +		*r_dst &= 0xffffff00;
 18.2083 +		FLAG_X = FLAG_C = ((shift == 8 ? src & 1 : 0))<<8;
 18.2084 +		FLAG_N = NFLAG_CLEAR;
 18.2085 +		FLAG_Z = ZFLAG_SET;
 18.2086 +		FLAG_V = (!(src == 0))<<7;
 18.2087 +		return;
 18.2088 +	}
 18.2089 +
 18.2090 +	FLAG_C = CFLAG_CLEAR;
 18.2091 +	FLAG_N = NFLAG_8(src);
 18.2092 +	FLAG_Z = src;
 18.2093 +	FLAG_V = VFLAG_CLEAR;
 18.2094 +}
 18.2095 +
 18.2096 +
 18.2097 +M68KMAKE_OP(asl, 16, r, .)
 18.2098 +{
 18.2099 +	uint* r_dst = &DY;
 18.2100 +	uint shift = DX & 0x3f;
 18.2101 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.2102 +	uint res = MASK_OUT_ABOVE_16(src << shift);
 18.2103 +
 18.2104 +	if(shift != 0)
 18.2105 +	{
 18.2106 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.2107 +
 18.2108 +		if(shift < 16)
 18.2109 +		{
 18.2110 +			*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.2111 +			FLAG_X = FLAG_C = (src << shift) >> 8;
 18.2112 +			FLAG_N = NFLAG_16(res);
 18.2113 +			FLAG_Z = res;
 18.2114 +			src &= m68ki_shift_16_table[shift + 1];
 18.2115 +			FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
 18.2116 +			return;
 18.2117 +		}
 18.2118 +
 18.2119 +		*r_dst &= 0xffff0000;
 18.2120 +		FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;
 18.2121 +		FLAG_N = NFLAG_CLEAR;
 18.2122 +		FLAG_Z = ZFLAG_SET;
 18.2123 +		FLAG_V = (!(src == 0))<<7;
 18.2124 +		return;
 18.2125 +	}
 18.2126 +
 18.2127 +	FLAG_C = CFLAG_CLEAR;
 18.2128 +	FLAG_N = NFLAG_16(src);
 18.2129 +	FLAG_Z = src;
 18.2130 +	FLAG_V = VFLAG_CLEAR;
 18.2131 +}
 18.2132 +
 18.2133 +
 18.2134 +M68KMAKE_OP(asl, 32, r, .)
 18.2135 +{
 18.2136 +	uint* r_dst = &DY;
 18.2137 +	uint shift = DX & 0x3f;
 18.2138 +	uint src = *r_dst;
 18.2139 +	uint res = MASK_OUT_ABOVE_32(src << shift);
 18.2140 +
 18.2141 +	if(shift != 0)
 18.2142 +	{
 18.2143 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.2144 +
 18.2145 +		if(shift < 32)
 18.2146 +		{
 18.2147 +			*r_dst = res;
 18.2148 +			FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
 18.2149 +			FLAG_N = NFLAG_32(res);
 18.2150 +			FLAG_Z = res;
 18.2151 +			src &= m68ki_shift_32_table[shift + 1];
 18.2152 +			FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
 18.2153 +			return;
 18.2154 +		}
 18.2155 +
 18.2156 +		*r_dst = 0;
 18.2157 +		FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
 18.2158 +		FLAG_N = NFLAG_CLEAR;
 18.2159 +		FLAG_Z = ZFLAG_SET;
 18.2160 +		FLAG_V = (!(src == 0))<<7;
 18.2161 +		return;
 18.2162 +	}
 18.2163 +
 18.2164 +	FLAG_C = CFLAG_CLEAR;
 18.2165 +	FLAG_N = NFLAG_32(src);
 18.2166 +	FLAG_Z = src;
 18.2167 +	FLAG_V = VFLAG_CLEAR;
 18.2168 +}
 18.2169 +
 18.2170 +
 18.2171 +M68KMAKE_OP(asl, 16, ., .)
 18.2172 +{
 18.2173 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.2174 +	uint src = m68ki_read_16(ea);
 18.2175 +	uint res = MASK_OUT_ABOVE_16(src << 1);
 18.2176 +
 18.2177 +	m68ki_write_16(ea, res);
 18.2178 +
 18.2179 +	FLAG_N = NFLAG_16(res);
 18.2180 +	FLAG_Z = res;
 18.2181 +	FLAG_X = FLAG_C = src >> 7;
 18.2182 +	src &= 0xc000;
 18.2183 +	FLAG_V = (!(src == 0 || src == 0xc000))<<7;
 18.2184 +}
 18.2185 +
 18.2186 +
 18.2187 +M68KMAKE_OP(bcc, 8, ., .)
 18.2188 +{
 18.2189 +	if(M68KMAKE_CC)
 18.2190 +	{
 18.2191 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.2192 +		m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
 18.2193 +		return;
 18.2194 +	}
 18.2195 +	USE_CYCLES(CYC_BCC_NOTAKE_B);
 18.2196 +}
 18.2197 +
 18.2198 +
 18.2199 +M68KMAKE_OP(bcc, 16, ., .)
 18.2200 +{
 18.2201 +	if(M68KMAKE_CC)
 18.2202 +	{
 18.2203 +		uint offset = OPER_I_16();
 18.2204 +		REG_PC -= 2;
 18.2205 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.2206 +		m68ki_branch_16(offset);
 18.2207 +		return;
 18.2208 +	}
 18.2209 +	REG_PC += 2;
 18.2210 +	USE_CYCLES(CYC_BCC_NOTAKE_W);
 18.2211 +}
 18.2212 +
 18.2213 +
 18.2214 +M68KMAKE_OP(bcc, 32, ., .)
 18.2215 +{
 18.2216 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2217 +	{
 18.2218 +		if(M68KMAKE_CC)
 18.2219 +		{
 18.2220 +			uint offset = OPER_I_32();
 18.2221 +			REG_PC -= 4;
 18.2222 +			m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.2223 +			m68ki_branch_32(offset);
 18.2224 +			return;
 18.2225 +		}
 18.2226 +		REG_PC += 4;
 18.2227 +		return;
 18.2228 +	}
 18.2229 +	m68ki_exception_illegal();
 18.2230 +}
 18.2231 +
 18.2232 +
 18.2233 +M68KMAKE_OP(bchg, 32, r, d)
 18.2234 +{
 18.2235 +	uint* r_dst = &DY;
 18.2236 +	uint mask = 1 << (DX & 0x1f);
 18.2237 +
 18.2238 +	FLAG_Z = *r_dst & mask;
 18.2239 +	*r_dst ^= mask;
 18.2240 +}
 18.2241 +
 18.2242 +
 18.2243 +M68KMAKE_OP(bchg, 8, r, .)
 18.2244 +{
 18.2245 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.2246 +	uint src = m68ki_read_8(ea);
 18.2247 +	uint mask = 1 << (DX & 7);
 18.2248 +
 18.2249 +	FLAG_Z = src & mask;
 18.2250 +	m68ki_write_8(ea, src ^ mask);
 18.2251 +}
 18.2252 +
 18.2253 +
 18.2254 +M68KMAKE_OP(bchg, 32, s, d)
 18.2255 +{
 18.2256 +	uint* r_dst = &DY;
 18.2257 +	uint mask = 1 << (OPER_I_8() & 0x1f);
 18.2258 +
 18.2259 +	FLAG_Z = *r_dst & mask;
 18.2260 +	*r_dst ^= mask;
 18.2261 +}
 18.2262 +
 18.2263 +
 18.2264 +M68KMAKE_OP(bchg, 8, s, .)
 18.2265 +{
 18.2266 +	uint mask = 1 << (OPER_I_8() & 7);
 18.2267 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.2268 +	uint src = m68ki_read_8(ea);
 18.2269 +
 18.2270 +	FLAG_Z = src & mask;
 18.2271 +	m68ki_write_8(ea, src ^ mask);
 18.2272 +}
 18.2273 +
 18.2274 +
 18.2275 +M68KMAKE_OP(bclr, 32, r, d)
 18.2276 +{
 18.2277 +	uint* r_dst = &DY;
 18.2278 +	uint mask = 1 << (DX & 0x1f);
 18.2279 +
 18.2280 +	FLAG_Z = *r_dst & mask;
 18.2281 +	*r_dst &= ~mask;
 18.2282 +}
 18.2283 +
 18.2284 +
 18.2285 +M68KMAKE_OP(bclr, 8, r, .)
 18.2286 +{
 18.2287 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.2288 +	uint src = m68ki_read_8(ea);
 18.2289 +	uint mask = 1 << (DX & 7);
 18.2290 +
 18.2291 +	FLAG_Z = src & mask;
 18.2292 +	m68ki_write_8(ea, src & ~mask);
 18.2293 +}
 18.2294 +
 18.2295 +
 18.2296 +M68KMAKE_OP(bclr, 32, s, d)
 18.2297 +{
 18.2298 +	uint* r_dst = &DY;
 18.2299 +	uint mask = 1 << (OPER_I_8() & 0x1f);
 18.2300 +
 18.2301 +	FLAG_Z = *r_dst & mask;
 18.2302 +	*r_dst &= ~mask;
 18.2303 +}
 18.2304 +
 18.2305 +
 18.2306 +M68KMAKE_OP(bclr, 8, s, .)
 18.2307 +{
 18.2308 +	uint mask = 1 << (OPER_I_8() & 7);
 18.2309 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.2310 +	uint src = m68ki_read_8(ea);
 18.2311 +
 18.2312 +	FLAG_Z = src & mask;
 18.2313 +	m68ki_write_8(ea, src & ~mask);
 18.2314 +}
 18.2315 +
 18.2316 +
 18.2317 +M68KMAKE_OP(bfchg, 32, ., d)
 18.2318 +{
 18.2319 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2320 +	{
 18.2321 +		uint word2 = OPER_I_16();
 18.2322 +		uint offset = (word2>>6)&31;
 18.2323 +		uint width = word2;
 18.2324 +		uint* data = &DY;
 18.2325 +		uint64 mask;
 18.2326 +
 18.2327 +
 18.2328 +		if(BIT_B(word2))
 18.2329 +			offset = REG_D[offset&7];
 18.2330 +		if(BIT_5(word2))
 18.2331 +			width = REG_D[width&7];
 18.2332 +
 18.2333 +		offset &= 31;
 18.2334 +		width = ((width-1) & 31) + 1;
 18.2335 +
 18.2336 +		mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2337 +		mask = ROR_32(mask, offset);
 18.2338 +
 18.2339 +		FLAG_N = NFLAG_32(*data<<offset);
 18.2340 +		FLAG_Z = *data & mask;
 18.2341 +		FLAG_V = VFLAG_CLEAR;
 18.2342 +		FLAG_C = CFLAG_CLEAR;
 18.2343 +
 18.2344 +		*data ^= mask;
 18.2345 +
 18.2346 +		return;
 18.2347 +	}
 18.2348 +	m68ki_exception_illegal();
 18.2349 +}
 18.2350 +
 18.2351 +
 18.2352 +M68KMAKE_OP(bfchg, 32, ., .)
 18.2353 +{
 18.2354 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2355 +	{
 18.2356 +		uint word2 = OPER_I_16();
 18.2357 +		sint offset = (word2>>6)&31;
 18.2358 +		uint width = word2;
 18.2359 +		uint mask_base;
 18.2360 +		uint data_long;
 18.2361 +		uint mask_long;
 18.2362 +		uint data_byte = 0;
 18.2363 +		uint mask_byte = 0;
 18.2364 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2365 +
 18.2366 +
 18.2367 +		if(BIT_B(word2))
 18.2368 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2369 +		if(BIT_5(word2))
 18.2370 +			width = REG_D[width&7];
 18.2371 +
 18.2372 +		/* Offset is signed so we have to use ugly math =( */
 18.2373 +		ea += offset / 8;
 18.2374 +		offset %= 8;
 18.2375 +		if(offset < 0)
 18.2376 +		{
 18.2377 +			offset += 8;
 18.2378 +			ea--;
 18.2379 +		}
 18.2380 +		width = ((width-1) & 31) + 1;
 18.2381 +
 18.2382 +		mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2383 +		mask_long = mask_base >> offset;
 18.2384 +
 18.2385 +		data_long = m68ki_read_32(ea);
 18.2386 +		FLAG_N = NFLAG_32(data_long << offset);
 18.2387 +		FLAG_Z = data_long & mask_long;
 18.2388 +		FLAG_V = VFLAG_CLEAR;
 18.2389 +		FLAG_C = CFLAG_CLEAR;
 18.2390 +
 18.2391 +		m68ki_write_32(ea, data_long ^ mask_long);
 18.2392 +
 18.2393 +		if((width + offset) > 32)
 18.2394 +		{
 18.2395 +			mask_byte = MASK_OUT_ABOVE_8(mask_base);
 18.2396 +			data_byte = m68ki_read_8(ea+4);
 18.2397 +			FLAG_Z |= (data_byte & mask_byte);
 18.2398 +			m68ki_write_8(ea+4, data_byte ^ mask_byte);
 18.2399 +		}
 18.2400 +		return;
 18.2401 +	}
 18.2402 +	m68ki_exception_illegal();
 18.2403 +}
 18.2404 +
 18.2405 +
 18.2406 +M68KMAKE_OP(bfclr, 32, ., d)
 18.2407 +{
 18.2408 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2409 +	{
 18.2410 +		uint word2 = OPER_I_16();
 18.2411 +		uint offset = (word2>>6)&31;
 18.2412 +		uint width = word2;
 18.2413 +		uint* data = &DY;
 18.2414 +		uint64 mask;
 18.2415 +
 18.2416 +
 18.2417 +		if(BIT_B(word2))
 18.2418 +			offset = REG_D[offset&7];
 18.2419 +		if(BIT_5(word2))
 18.2420 +			width = REG_D[width&7];
 18.2421 +
 18.2422 +
 18.2423 +		offset &= 31;
 18.2424 +		width = ((width-1) & 31) + 1;
 18.2425 +
 18.2426 +
 18.2427 +		mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2428 +		mask = ROR_32(mask, offset);
 18.2429 +
 18.2430 +		FLAG_N = NFLAG_32(*data<<offset);
 18.2431 +		FLAG_Z = *data & mask;
 18.2432 +		FLAG_V = VFLAG_CLEAR;
 18.2433 +		FLAG_C = CFLAG_CLEAR;
 18.2434 +
 18.2435 +		*data &= ~mask;
 18.2436 +
 18.2437 +		return;
 18.2438 +	}
 18.2439 +	m68ki_exception_illegal();
 18.2440 +}
 18.2441 +
 18.2442 +
 18.2443 +M68KMAKE_OP(bfclr, 32, ., .)
 18.2444 +{
 18.2445 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2446 +	{
 18.2447 +		uint word2 = OPER_I_16();
 18.2448 +		sint offset = (word2>>6)&31;
 18.2449 +		uint width = word2;
 18.2450 +		uint mask_base;
 18.2451 +		uint data_long;
 18.2452 +		uint mask_long;
 18.2453 +		uint data_byte = 0;
 18.2454 +		uint mask_byte = 0;
 18.2455 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2456 +
 18.2457 +
 18.2458 +		if(BIT_B(word2))
 18.2459 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2460 +		if(BIT_5(word2))
 18.2461 +			width = REG_D[width&7];
 18.2462 +
 18.2463 +		/* Offset is signed so we have to use ugly math =( */
 18.2464 +		ea += offset / 8;
 18.2465 +		offset %= 8;
 18.2466 +		if(offset < 0)
 18.2467 +		{
 18.2468 +			offset += 8;
 18.2469 +			ea--;
 18.2470 +		}
 18.2471 +		width = ((width-1) & 31) + 1;
 18.2472 +
 18.2473 +		mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2474 +		mask_long = mask_base >> offset;
 18.2475 +
 18.2476 +		data_long = m68ki_read_32(ea);
 18.2477 +		FLAG_N = NFLAG_32(data_long << offset);
 18.2478 +		FLAG_Z = data_long & mask_long;
 18.2479 +		FLAG_V = VFLAG_CLEAR;
 18.2480 +		FLAG_C = CFLAG_CLEAR;
 18.2481 +
 18.2482 +		m68ki_write_32(ea, data_long & ~mask_long);
 18.2483 +
 18.2484 +		if((width + offset) > 32)
 18.2485 +		{
 18.2486 +			mask_byte = MASK_OUT_ABOVE_8(mask_base);
 18.2487 +			data_byte = m68ki_read_8(ea+4);
 18.2488 +			FLAG_Z |= (data_byte & mask_byte);
 18.2489 +			m68ki_write_8(ea+4, data_byte & ~mask_byte);
 18.2490 +		}
 18.2491 +		return;
 18.2492 +	}
 18.2493 +	m68ki_exception_illegal();
 18.2494 +}
 18.2495 +
 18.2496 +
 18.2497 +M68KMAKE_OP(bfexts, 32, ., d)
 18.2498 +{
 18.2499 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2500 +	{
 18.2501 +		uint word2 = OPER_I_16();
 18.2502 +		uint offset = (word2>>6)&31;
 18.2503 +		uint width = word2;
 18.2504 +		uint64 data = DY;
 18.2505 +
 18.2506 +
 18.2507 +		if(BIT_B(word2))
 18.2508 +			offset = REG_D[offset&7];
 18.2509 +		if(BIT_5(word2))
 18.2510 +			width = REG_D[width&7];
 18.2511 +
 18.2512 +		offset &= 31;
 18.2513 +		width = ((width-1) & 31) + 1;
 18.2514 +
 18.2515 +		data = ROL_32(data, offset);
 18.2516 +		FLAG_N = NFLAG_32(data);
 18.2517 +		data = MAKE_INT_32(data) >> (32 - width);
 18.2518 +
 18.2519 +		FLAG_Z = data;
 18.2520 +		FLAG_V = VFLAG_CLEAR;
 18.2521 +		FLAG_C = CFLAG_CLEAR;
 18.2522 +
 18.2523 +		REG_D[(word2>>12)&7] = data;
 18.2524 +
 18.2525 +		return;
 18.2526 +	}
 18.2527 +	m68ki_exception_illegal();
 18.2528 +}
 18.2529 +
 18.2530 +
 18.2531 +M68KMAKE_OP(bfexts, 32, ., .)
 18.2532 +{
 18.2533 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2534 +	{
 18.2535 +		uint word2 = OPER_I_16();
 18.2536 +		sint offset = (word2>>6)&31;
 18.2537 +		uint width = word2;
 18.2538 +		uint data;
 18.2539 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2540 +
 18.2541 +
 18.2542 +		if(BIT_B(word2))
 18.2543 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2544 +		if(BIT_5(word2))
 18.2545 +			width = REG_D[width&7];
 18.2546 +
 18.2547 +		/* Offset is signed so we have to use ugly math =( */
 18.2548 +		ea += offset / 8;
 18.2549 +		offset %= 8;
 18.2550 +		if(offset < 0)
 18.2551 +		{
 18.2552 +			offset += 8;
 18.2553 +			ea--;
 18.2554 +		}
 18.2555 +		width = ((width-1) & 31) + 1;
 18.2556 +
 18.2557 +		data = m68ki_read_32(ea);
 18.2558 +
 18.2559 +		data = MASK_OUT_ABOVE_32(data<<offset);
 18.2560 +
 18.2561 +		if((offset+width) > 32)
 18.2562 +			data |= (m68ki_read_8(ea+4) << offset) >> 8;
 18.2563 +
 18.2564 +		FLAG_N = NFLAG_32(data);
 18.2565 +		data  = MAKE_INT_32(data) >> (32 - width);
 18.2566 +
 18.2567 +		FLAG_Z = data;
 18.2568 +		FLAG_V = VFLAG_CLEAR;
 18.2569 +		FLAG_C = CFLAG_CLEAR;
 18.2570 +
 18.2571 +		REG_D[(word2 >> 12) & 7] = data;
 18.2572 +
 18.2573 +		return;
 18.2574 +	}
 18.2575 +	m68ki_exception_illegal();
 18.2576 +}
 18.2577 +
 18.2578 +
 18.2579 +M68KMAKE_OP(bfextu, 32, ., d)
 18.2580 +{
 18.2581 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2582 +	{
 18.2583 +		uint word2 = OPER_I_16();
 18.2584 +		uint offset = (word2>>6)&31;
 18.2585 +		uint width = word2;
 18.2586 +		uint64 data = DY;
 18.2587 +
 18.2588 +
 18.2589 +		if(BIT_B(word2))
 18.2590 +			offset = REG_D[offset&7];
 18.2591 +		if(BIT_5(word2))
 18.2592 +			width = REG_D[width&7];
 18.2593 +
 18.2594 +		offset &= 31;
 18.2595 +		width = ((width-1) & 31) + 1;
 18.2596 +
 18.2597 +		data = ROL_32(data, offset);
 18.2598 +		FLAG_N = NFLAG_32(data);
 18.2599 +		data >>= 32 - width;
 18.2600 +
 18.2601 +		FLAG_Z = data;
 18.2602 +		FLAG_V = VFLAG_CLEAR;
 18.2603 +		FLAG_C = CFLAG_CLEAR;
 18.2604 +
 18.2605 +		REG_D[(word2>>12)&7] = data;
 18.2606 +
 18.2607 +		return;
 18.2608 +	}
 18.2609 +	m68ki_exception_illegal();
 18.2610 +}
 18.2611 +
 18.2612 +
 18.2613 +M68KMAKE_OP(bfextu, 32, ., .)
 18.2614 +{
 18.2615 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2616 +	{
 18.2617 +		uint word2 = OPER_I_16();
 18.2618 +		sint offset = (word2>>6)&31;
 18.2619 +		uint width = word2;
 18.2620 +		uint data;
 18.2621 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2622 +
 18.2623 +
 18.2624 +		if(BIT_B(word2))
 18.2625 +		offset = MAKE_INT_32(REG_D[offset&7]);
 18.2626 +		if(BIT_5(word2))
 18.2627 +			width = REG_D[width&7];
 18.2628 +
 18.2629 +		/* Offset is signed so we have to use ugly math =( */
 18.2630 +		ea += offset / 8;
 18.2631 +		offset %= 8;
 18.2632 +		if(offset < 0)
 18.2633 +		{
 18.2634 +			offset += 8;
 18.2635 +			ea--;
 18.2636 +		}
 18.2637 +		width = ((width-1) & 31) + 1;
 18.2638 +
 18.2639 +		data = m68ki_read_32(ea);
 18.2640 +		data = MASK_OUT_ABOVE_32(data<<offset);
 18.2641 +
 18.2642 +		if((offset+width) > 32)
 18.2643 +			data |= (m68ki_read_8(ea+4) << offset) >> 8;
 18.2644 +
 18.2645 +		FLAG_N = NFLAG_32(data);
 18.2646 +		data  >>= (32 - width);
 18.2647 +
 18.2648 +		FLAG_Z = data;
 18.2649 +		FLAG_V = VFLAG_CLEAR;
 18.2650 +		FLAG_C = CFLAG_CLEAR;
 18.2651 +
 18.2652 +		REG_D[(word2 >> 12) & 7] = data;
 18.2653 +
 18.2654 +		return;
 18.2655 +	}
 18.2656 +	m68ki_exception_illegal();
 18.2657 +}
 18.2658 +
 18.2659 +
 18.2660 +M68KMAKE_OP(bfffo, 32, ., d)
 18.2661 +{
 18.2662 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2663 +	{
 18.2664 +		uint word2 = OPER_I_16();
 18.2665 +		uint offset = (word2>>6)&31;
 18.2666 +		uint width = word2;
 18.2667 +		uint64 data = DY;
 18.2668 +		uint bit;
 18.2669 +
 18.2670 +
 18.2671 +		if(BIT_B(word2))
 18.2672 +			offset = REG_D[offset&7];
 18.2673 +		if(BIT_5(word2))
 18.2674 +			width = REG_D[width&7];
 18.2675 +
 18.2676 +		offset &= 31;
 18.2677 +		width = ((width-1) & 31) + 1;
 18.2678 +
 18.2679 +		data = ROL_32(data, offset);
 18.2680 +		FLAG_N = NFLAG_32(data);
 18.2681 +		data >>= 32 - width;
 18.2682 +
 18.2683 +		FLAG_Z = data;
 18.2684 +		FLAG_V = VFLAG_CLEAR;
 18.2685 +		FLAG_C = CFLAG_CLEAR;
 18.2686 +
 18.2687 +		for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
 18.2688 +			offset++;
 18.2689 +
 18.2690 +		REG_D[(word2>>12)&7] = offset;
 18.2691 +
 18.2692 +		return;
 18.2693 +	}
 18.2694 +	m68ki_exception_illegal();
 18.2695 +}
 18.2696 +
 18.2697 +
 18.2698 +M68KMAKE_OP(bfffo, 32, ., .)
 18.2699 +{
 18.2700 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2701 +	{
 18.2702 +		uint word2 = OPER_I_16();
 18.2703 +		sint offset = (word2>>6)&31;
 18.2704 +		sint local_offset;
 18.2705 +		uint width = word2;
 18.2706 +		uint data;
 18.2707 +		uint bit;
 18.2708 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2709 +
 18.2710 +
 18.2711 +		if(BIT_B(word2))
 18.2712 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2713 +		if(BIT_5(word2))
 18.2714 +			width = REG_D[width&7];
 18.2715 +
 18.2716 +		/* Offset is signed so we have to use ugly math =( */
 18.2717 +		ea += offset / 8;
 18.2718 +		local_offset = offset % 8;
 18.2719 +		if(local_offset < 0)
 18.2720 +		{
 18.2721 +			local_offset += 8;
 18.2722 +			ea--;
 18.2723 +		}
 18.2724 +		width = ((width-1) & 31) + 1;
 18.2725 +
 18.2726 +		data = m68ki_read_32(ea);
 18.2727 +		data = MASK_OUT_ABOVE_32(data<<local_offset);
 18.2728 +
 18.2729 +		if((local_offset+width) > 32)
 18.2730 +			data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
 18.2731 +
 18.2732 +		FLAG_N = NFLAG_32(data);
 18.2733 +		data  >>= (32 - width);
 18.2734 +
 18.2735 +		FLAG_Z = data;
 18.2736 +		FLAG_V = VFLAG_CLEAR;
 18.2737 +		FLAG_C = CFLAG_CLEAR;
 18.2738 +
 18.2739 +		for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
 18.2740 +			offset++;
 18.2741 +
 18.2742 +		REG_D[(word2>>12)&7] = offset;
 18.2743 +
 18.2744 +		return;
 18.2745 +	}
 18.2746 +	m68ki_exception_illegal();
 18.2747 +}
 18.2748 +
 18.2749 +
 18.2750 +M68KMAKE_OP(bfins, 32, ., d)
 18.2751 +{
 18.2752 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2753 +	{
 18.2754 +		uint word2 = OPER_I_16();
 18.2755 +		uint offset = (word2>>6)&31;
 18.2756 +		uint width = word2;
 18.2757 +		uint* data = &DY;
 18.2758 +		uint64 mask;
 18.2759 +		uint64 insert = REG_D[(word2>>12)&7];
 18.2760 +
 18.2761 +
 18.2762 +		if(BIT_B(word2))
 18.2763 +			offset = REG_D[offset&7];
 18.2764 +		if(BIT_5(word2))
 18.2765 +			width = REG_D[width&7];
 18.2766 +
 18.2767 +
 18.2768 +		offset &= 31;
 18.2769 +		width = ((width-1) & 31) + 1;
 18.2770 +
 18.2771 +
 18.2772 +		mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2773 +		mask = ROR_32(mask, offset);
 18.2774 +
 18.2775 +		insert = MASK_OUT_ABOVE_32(insert << (32 - width));
 18.2776 +		FLAG_N = NFLAG_32(insert);
 18.2777 +		FLAG_Z = insert;
 18.2778 +		insert = ROR_32(insert, offset);
 18.2779 +
 18.2780 +		FLAG_V = VFLAG_CLEAR;
 18.2781 +		FLAG_C = CFLAG_CLEAR;
 18.2782 +
 18.2783 +		*data &= ~mask;
 18.2784 +		*data |= insert;
 18.2785 +
 18.2786 +		return;
 18.2787 +	}
 18.2788 +	m68ki_exception_illegal();
 18.2789 +}
 18.2790 +
 18.2791 +
 18.2792 +M68KMAKE_OP(bfins, 32, ., .)
 18.2793 +{
 18.2794 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2795 +	{
 18.2796 +		uint word2 = OPER_I_16();
 18.2797 +		sint offset = (word2>>6)&31;
 18.2798 +		uint width = word2;
 18.2799 +		uint insert_base = REG_D[(word2>>12)&7];
 18.2800 +		uint insert_long;
 18.2801 +		uint insert_byte;
 18.2802 +		uint mask_base;
 18.2803 +		uint data_long;
 18.2804 +		uint mask_long;
 18.2805 +		uint data_byte = 0;
 18.2806 +		uint mask_byte = 0;
 18.2807 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2808 +
 18.2809 +
 18.2810 +		if(BIT_B(word2))
 18.2811 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2812 +		if(BIT_5(word2))
 18.2813 +			width = REG_D[width&7];
 18.2814 +
 18.2815 +		/* Offset is signed so we have to use ugly math =( */
 18.2816 +		ea += offset / 8;
 18.2817 +		offset %= 8;
 18.2818 +		if(offset < 0)
 18.2819 +		{
 18.2820 +			offset += 8;
 18.2821 +			ea--;
 18.2822 +		}
 18.2823 +		width = ((width-1) & 31) + 1;
 18.2824 +
 18.2825 +		mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2826 +		mask_long = mask_base >> offset;
 18.2827 +
 18.2828 +		insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
 18.2829 +		FLAG_N = NFLAG_32(insert_base);
 18.2830 +		FLAG_Z = insert_base;
 18.2831 +		insert_long = insert_base >> offset;
 18.2832 +
 18.2833 +		data_long = m68ki_read_32(ea);
 18.2834 +		FLAG_V = VFLAG_CLEAR;
 18.2835 +		FLAG_C = CFLAG_CLEAR;
 18.2836 +
 18.2837 +		m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
 18.2838 +
 18.2839 +		if((width + offset) > 32)
 18.2840 +		{
 18.2841 +			mask_byte = MASK_OUT_ABOVE_8(mask_base);
 18.2842 +			insert_byte = MASK_OUT_ABOVE_8(insert_base);
 18.2843 +			data_byte = m68ki_read_8(ea+4);
 18.2844 +			FLAG_Z |= (data_byte & mask_byte);
 18.2845 +			m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
 18.2846 +		}
 18.2847 +		return;
 18.2848 +	}
 18.2849 +	m68ki_exception_illegal();
 18.2850 +}
 18.2851 +
 18.2852 +
 18.2853 +M68KMAKE_OP(bfset, 32, ., d)
 18.2854 +{
 18.2855 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2856 +	{
 18.2857 +		uint word2 = OPER_I_16();
 18.2858 +		uint offset = (word2>>6)&31;
 18.2859 +		uint width = word2;
 18.2860 +		uint* data = &DY;
 18.2861 +		uint64 mask;
 18.2862 +
 18.2863 +
 18.2864 +		if(BIT_B(word2))
 18.2865 +			offset = REG_D[offset&7];
 18.2866 +		if(BIT_5(word2))
 18.2867 +			width = REG_D[width&7];
 18.2868 +
 18.2869 +
 18.2870 +		offset &= 31;
 18.2871 +		width = ((width-1) & 31) + 1;
 18.2872 +
 18.2873 +
 18.2874 +		mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2875 +		mask = ROR_32(mask, offset);
 18.2876 +
 18.2877 +		FLAG_N = NFLAG_32(*data<<offset);
 18.2878 +		FLAG_Z = *data & mask;
 18.2879 +		FLAG_V = VFLAG_CLEAR;
 18.2880 +		FLAG_C = CFLAG_CLEAR;
 18.2881 +
 18.2882 +		*data |= mask;
 18.2883 +
 18.2884 +		return;
 18.2885 +	}
 18.2886 +	m68ki_exception_illegal();
 18.2887 +}
 18.2888 +
 18.2889 +
 18.2890 +M68KMAKE_OP(bfset, 32, ., .)
 18.2891 +{
 18.2892 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2893 +	{
 18.2894 +		uint word2 = OPER_I_16();
 18.2895 +		sint offset = (word2>>6)&31;
 18.2896 +		uint width = word2;
 18.2897 +		uint mask_base;
 18.2898 +		uint data_long;
 18.2899 +		uint mask_long;
 18.2900 +		uint data_byte = 0;
 18.2901 +		uint mask_byte = 0;
 18.2902 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2903 +
 18.2904 +
 18.2905 +		if(BIT_B(word2))
 18.2906 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2907 +		if(BIT_5(word2))
 18.2908 +			width = REG_D[width&7];
 18.2909 +
 18.2910 +		/* Offset is signed so we have to use ugly math =( */
 18.2911 +		ea += offset / 8;
 18.2912 +		offset %= 8;
 18.2913 +		if(offset < 0)
 18.2914 +		{
 18.2915 +			offset += 8;
 18.2916 +			ea--;
 18.2917 +		}
 18.2918 +		width = ((width-1) & 31) + 1;
 18.2919 +
 18.2920 +
 18.2921 +		mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2922 +		mask_long = mask_base >> offset;
 18.2923 +
 18.2924 +		data_long = m68ki_read_32(ea);
 18.2925 +		FLAG_N = NFLAG_32(data_long << offset);
 18.2926 +		FLAG_Z = data_long & mask_long;
 18.2927 +		FLAG_V = VFLAG_CLEAR;
 18.2928 +		FLAG_C = CFLAG_CLEAR;
 18.2929 +
 18.2930 +		m68ki_write_32(ea, data_long | mask_long);
 18.2931 +
 18.2932 +		if((width + offset) > 32)
 18.2933 +		{
 18.2934 +			mask_byte = MASK_OUT_ABOVE_8(mask_base);
 18.2935 +			data_byte = m68ki_read_8(ea+4);
 18.2936 +			FLAG_Z |= (data_byte & mask_byte);
 18.2937 +			m68ki_write_8(ea+4, data_byte | mask_byte);
 18.2938 +		}
 18.2939 +		return;
 18.2940 +	}
 18.2941 +	m68ki_exception_illegal();
 18.2942 +}
 18.2943 +
 18.2944 +
 18.2945 +M68KMAKE_OP(bftst, 32, ., d)
 18.2946 +{
 18.2947 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2948 +	{
 18.2949 +		uint word2 = OPER_I_16();
 18.2950 +		uint offset = (word2>>6)&31;
 18.2951 +		uint width = word2;
 18.2952 +		uint* data = &DY;
 18.2953 +		uint64 mask;
 18.2954 +
 18.2955 +
 18.2956 +		if(BIT_B(word2))
 18.2957 +			offset = REG_D[offset&7];
 18.2958 +		if(BIT_5(word2))
 18.2959 +			width = REG_D[width&7];
 18.2960 +
 18.2961 +
 18.2962 +		offset &= 31;
 18.2963 +		width = ((width-1) & 31) + 1;
 18.2964 +
 18.2965 +
 18.2966 +		mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.2967 +		mask = ROR_32(mask, offset);
 18.2968 +
 18.2969 +		FLAG_N = NFLAG_32(*data<<offset);
 18.2970 +		FLAG_Z = *data & mask;
 18.2971 +		FLAG_V = VFLAG_CLEAR;
 18.2972 +		FLAG_C = CFLAG_CLEAR;
 18.2973 +
 18.2974 +		return;
 18.2975 +	}
 18.2976 +	m68ki_exception_illegal();
 18.2977 +}
 18.2978 +
 18.2979 +
 18.2980 +M68KMAKE_OP(bftst, 32, ., .)
 18.2981 +{
 18.2982 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.2983 +	{
 18.2984 +		uint word2 = OPER_I_16();
 18.2985 +		sint offset = (word2>>6)&31;
 18.2986 +		uint width = word2;
 18.2987 +		uint mask_base;
 18.2988 +		uint data_long;
 18.2989 +		uint mask_long;
 18.2990 +		uint data_byte = 0;
 18.2991 +		uint mask_byte = 0;
 18.2992 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.2993 +
 18.2994 +		if(BIT_B(word2))
 18.2995 +			offset = MAKE_INT_32(REG_D[offset&7]);
 18.2996 +		if(BIT_5(word2))
 18.2997 +			width = REG_D[width&7];
 18.2998 +
 18.2999 +		/* Offset is signed so we have to use ugly math =( */
 18.3000 +		ea += offset / 8;
 18.3001 +		offset %= 8;
 18.3002 +		if(offset < 0)
 18.3003 +		{
 18.3004 +			offset += 8;
 18.3005 +			ea--;
 18.3006 +		}
 18.3007 +		width = ((width-1) & 31) + 1;
 18.3008 +
 18.3009 +
 18.3010 +		mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
 18.3011 +		mask_long = mask_base >> offset;
 18.3012 +
 18.3013 +		data_long = m68ki_read_32(ea);
 18.3014 +		FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;
 18.3015 +		FLAG_Z = data_long & mask_long;
 18.3016 +		FLAG_V = VFLAG_CLEAR;
 18.3017 +		FLAG_C = CFLAG_CLEAR;
 18.3018 +
 18.3019 +		if((width + offset) > 32)
 18.3020 +		{
 18.3021 +			mask_byte = MASK_OUT_ABOVE_8(mask_base);
 18.3022 +			data_byte = m68ki_read_8(ea+4);
 18.3023 +			FLAG_Z |= (data_byte & mask_byte);
 18.3024 +		}
 18.3025 +		return;
 18.3026 +	}
 18.3027 +	m68ki_exception_illegal();
 18.3028 +}
 18.3029 +
 18.3030 +
 18.3031 +M68KMAKE_OP(bkpt, 0, ., .)
 18.3032 +{
 18.3033 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.3034 +	{
 18.3035 +		m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0);	/* auto-disable (see m68kcpu.h) */
 18.3036 +	}
 18.3037 +	m68ki_exception_illegal();
 18.3038 +}
 18.3039 +
 18.3040 +
 18.3041 +M68KMAKE_OP(bra, 8, ., .)
 18.3042 +{
 18.3043 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.3044 +	m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
 18.3045 +	if(REG_PC == REG_PPC)
 18.3046 +		USE_ALL_CYCLES();
 18.3047 +}
 18.3048 +
 18.3049 +
 18.3050 +M68KMAKE_OP(bra, 16, ., .)
 18.3051 +{
 18.3052 +	uint offset = OPER_I_16();
 18.3053 +	REG_PC -= 2;
 18.3054 +	m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3055 +	m68ki_branch_16(offset);
 18.3056 +	if(REG_PC == REG_PPC)
 18.3057 +		USE_ALL_CYCLES();
 18.3058 +}
 18.3059 +
 18.3060 +
 18.3061 +M68KMAKE_OP(bra, 32, ., .)
 18.3062 +{
 18.3063 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3064 +	{
 18.3065 +		uint offset = OPER_I_32();
 18.3066 +		REG_PC -= 4;
 18.3067 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3068 +		m68ki_branch_32(offset);
 18.3069 +		if(REG_PC == REG_PPC)
 18.3070 +			USE_ALL_CYCLES();
 18.3071 +		return;
 18.3072 +	}
 18.3073 +	m68ki_exception_illegal();
 18.3074 +}
 18.3075 +
 18.3076 +
 18.3077 +M68KMAKE_OP(bset, 32, r, d)
 18.3078 +{
 18.3079 +	uint* r_dst = &DY;
 18.3080 +	uint mask = 1 << (DX & 0x1f);
 18.3081 +
 18.3082 +	FLAG_Z = *r_dst & mask;
 18.3083 +	*r_dst |= mask;
 18.3084 +}
 18.3085 +
 18.3086 +
 18.3087 +M68KMAKE_OP(bset, 8, r, .)
 18.3088 +{
 18.3089 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.3090 +	uint src = m68ki_read_8(ea);
 18.3091 +	uint mask = 1 << (DX & 7);
 18.3092 +
 18.3093 +	FLAG_Z = src & mask;
 18.3094 +	m68ki_write_8(ea, src | mask);
 18.3095 +}
 18.3096 +
 18.3097 +
 18.3098 +M68KMAKE_OP(bset, 32, s, d)
 18.3099 +{
 18.3100 +	uint* r_dst = &DY;
 18.3101 +	uint mask = 1 << (OPER_I_8() & 0x1f);
 18.3102 +
 18.3103 +	FLAG_Z = *r_dst & mask;
 18.3104 +	*r_dst |= mask;
 18.3105 +}
 18.3106 +
 18.3107 +
 18.3108 +M68KMAKE_OP(bset, 8, s, .)
 18.3109 +{
 18.3110 +	uint mask = 1 << (OPER_I_8() & 7);
 18.3111 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.3112 +	uint src = m68ki_read_8(ea);
 18.3113 +
 18.3114 +	FLAG_Z = src & mask;
 18.3115 +	m68ki_write_8(ea, src | mask);
 18.3116 +}
 18.3117 +
 18.3118 +
 18.3119 +M68KMAKE_OP(bsr, 8, ., .)
 18.3120 +{
 18.3121 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.3122 +	m68ki_push_32(REG_PC);
 18.3123 +	m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
 18.3124 +}
 18.3125 +
 18.3126 +
 18.3127 +M68KMAKE_OP(bsr, 16, ., .)
 18.3128 +{
 18.3129 +	uint offset = OPER_I_16();
 18.3130 +	m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3131 +	m68ki_push_32(REG_PC);
 18.3132 +	REG_PC -= 2;
 18.3133 +	m68ki_branch_16(offset);
 18.3134 +}
 18.3135 +
 18.3136 +
 18.3137 +M68KMAKE_OP(bsr, 32, ., .)
 18.3138 +{
 18.3139 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3140 +	{
 18.3141 +		uint offset = OPER_I_32();
 18.3142 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3143 +		m68ki_push_32(REG_PC);
 18.3144 +		REG_PC -= 4;
 18.3145 +		m68ki_branch_32(offset);
 18.3146 +		return;
 18.3147 +	}
 18.3148 +	m68ki_exception_illegal();
 18.3149 +}
 18.3150 +
 18.3151 +
 18.3152 +M68KMAKE_OP(btst, 32, r, d)
 18.3153 +{
 18.3154 +	FLAG_Z = DY & (1 << (DX & 0x1f));
 18.3155 +}
 18.3156 +
 18.3157 +
 18.3158 +M68KMAKE_OP(btst, 8, r, .)
 18.3159 +{
 18.3160 +	FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << (DX & 7));
 18.3161 +}
 18.3162 +
 18.3163 +
 18.3164 +M68KMAKE_OP(btst, 32, s, d)
 18.3165 +{
 18.3166 +	FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
 18.3167 +}
 18.3168 +
 18.3169 +
 18.3170 +M68KMAKE_OP(btst, 8, s, .)
 18.3171 +{
 18.3172 +	uint bit = OPER_I_8() & 7;
 18.3173 +
 18.3174 +	FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
 18.3175 +}
 18.3176 +
 18.3177 +
 18.3178 +M68KMAKE_OP(callm, 32, ., .)
 18.3179 +{
 18.3180 +	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.3181 +	{
 18.3182 +		uint ea = M68KMAKE_GET_EA_AY_32;
 18.3183 +
 18.3184 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3185 +		REG_PC += 2;
 18.3186 +(void)ea;	/* just to avoid an 'unused variable' warning */
 18.3187 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.3188 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.3189 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.3190 +		return;
 18.3191 +	}
 18.3192 +	m68ki_exception_illegal();
 18.3193 +}
 18.3194 +
 18.3195 +
 18.3196 +M68KMAKE_OP(cas, 8, ., .)
 18.3197 +{
 18.3198 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3199 +	{
 18.3200 +		uint word2 = OPER_I_16();
 18.3201 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.3202 +		uint dest = m68ki_read_8(ea);
 18.3203 +		uint* compare = &REG_D[word2 & 7];
 18.3204 +		uint res = dest - MASK_OUT_ABOVE_8(*compare);
 18.3205 +
 18.3206 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3207 +		FLAG_N = NFLAG_8(res);
 18.3208 +		FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3209 +		FLAG_V = VFLAG_SUB_8(*compare, dest, res);
 18.3210 +		FLAG_C = CFLAG_8(res);
 18.3211 +
 18.3212 +		if(COND_NE())
 18.3213 +			*compare = MASK_OUT_BELOW_8(*compare) | dest;
 18.3214 +		else
 18.3215 +		{
 18.3216 +			USE_CYCLES(3);
 18.3217 +			m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
 18.3218 +		}
 18.3219 +		return;
 18.3220 +	}
 18.3221 +	m68ki_exception_illegal();
 18.3222 +}
 18.3223 +
 18.3224 +
 18.3225 +M68KMAKE_OP(cas, 16, ., .)
 18.3226 +{
 18.3227 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3228 +	{
 18.3229 +		uint word2 = OPER_I_16();
 18.3230 +		uint ea = M68KMAKE_GET_EA_AY_16;
 18.3231 +		uint dest = m68ki_read_16(ea);
 18.3232 +		uint* compare = &REG_D[word2 & 7];
 18.3233 +		uint res = dest - MASK_OUT_ABOVE_16(*compare);
 18.3234 +
 18.3235 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3236 +		FLAG_N = NFLAG_16(res);
 18.3237 +		FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3238 +		FLAG_V = VFLAG_SUB_16(*compare, dest, res);
 18.3239 +		FLAG_C = CFLAG_16(res);
 18.3240 +
 18.3241 +		if(COND_NE())
 18.3242 +			*compare = MASK_OUT_BELOW_16(*compare) | dest;
 18.3243 +		else
 18.3244 +		{
 18.3245 +			USE_CYCLES(3);
 18.3246 +			m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
 18.3247 +		}
 18.3248 +		return;
 18.3249 +	}
 18.3250 +	m68ki_exception_illegal();
 18.3251 +}
 18.3252 +
 18.3253 +
 18.3254 +M68KMAKE_OP(cas, 32, ., .)
 18.3255 +{
 18.3256 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3257 +	{
 18.3258 +		uint word2 = OPER_I_16();
 18.3259 +		uint ea = M68KMAKE_GET_EA_AY_32;
 18.3260 +		uint dest = m68ki_read_32(ea);
 18.3261 +		uint* compare = &REG_D[word2 & 7];
 18.3262 +		uint res = dest - *compare;
 18.3263 +
 18.3264 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3265 +		FLAG_N = NFLAG_32(res);
 18.3266 +		FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3267 +		FLAG_V = VFLAG_SUB_32(*compare, dest, res);
 18.3268 +		FLAG_C = CFLAG_SUB_32(*compare, dest, res);
 18.3269 +
 18.3270 +		if(COND_NE())
 18.3271 +			*compare = dest;
 18.3272 +		else
 18.3273 +		{
 18.3274 +			USE_CYCLES(3);
 18.3275 +			m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
 18.3276 +		}
 18.3277 +		return;
 18.3278 +	}
 18.3279 +	m68ki_exception_illegal();
 18.3280 +}
 18.3281 +
 18.3282 +
 18.3283 +M68KMAKE_OP(cas2, 16, ., .)
 18.3284 +{
 18.3285 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3286 +	{
 18.3287 +		uint word2 = OPER_I_32();
 18.3288 +		uint* compare1 = &REG_D[(word2 >> 16) & 7];
 18.3289 +		uint ea1 = REG_DA[(word2 >> 28) & 15];
 18.3290 +		uint dest1 = m68ki_read_16(ea1);
 18.3291 +		uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
 18.3292 +		uint* compare2 = &REG_D[word2 & 7];
 18.3293 +		uint ea2 = REG_DA[(word2 >> 12) & 15];
 18.3294 +		uint dest2 = m68ki_read_16(ea2);
 18.3295 +		uint res2;
 18.3296 +
 18.3297 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3298 +		FLAG_N = NFLAG_16(res1);
 18.3299 +		FLAG_Z = MASK_OUT_ABOVE_16(res1);
 18.3300 +		FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);
 18.3301 +		FLAG_C = CFLAG_16(res1);
 18.3302 +
 18.3303 +		if(COND_EQ())
 18.3304 +		{
 18.3305 +			res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
 18.3306 +
 18.3307 +			FLAG_N = NFLAG_16(res2);
 18.3308 +			FLAG_Z = MASK_OUT_ABOVE_16(res2);
 18.3309 +			FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);
 18.3310 +			FLAG_C = CFLAG_16(res2);
 18.3311 +
 18.3312 +			if(COND_EQ())
 18.3313 +			{
 18.3314 +				USE_CYCLES(3);
 18.3315 +				m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);
 18.3316 +				m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);
 18.3317 +				return;
 18.3318 +			}
 18.3319 +		}
 18.3320 +		*compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;
 18.3321 +		*compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
 18.3322 +		return;
 18.3323 +	}
 18.3324 +	m68ki_exception_illegal();
 18.3325 +}
 18.3326 +
 18.3327 +
 18.3328 +M68KMAKE_OP(cas2, 32, ., .)
 18.3329 +{
 18.3330 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3331 +	{
 18.3332 +		uint word2 = OPER_I_32();
 18.3333 +		uint* compare1 = &REG_D[(word2 >> 16) & 7];
 18.3334 +		uint ea1 = REG_DA[(word2 >> 28) & 15];
 18.3335 +		uint dest1 = m68ki_read_32(ea1);
 18.3336 +		uint res1 = dest1 - *compare1;
 18.3337 +		uint* compare2 = &REG_D[word2 & 7];
 18.3338 +		uint ea2 = REG_DA[(word2 >> 12) & 15];
 18.3339 +		uint dest2 = m68ki_read_32(ea2);
 18.3340 +		uint res2;
 18.3341 +
 18.3342 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.3343 +		FLAG_N = NFLAG_32(res1);
 18.3344 +		FLAG_Z = MASK_OUT_ABOVE_32(res1);
 18.3345 +		FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);
 18.3346 +		FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);
 18.3347 +
 18.3348 +		if(COND_EQ())
 18.3349 +		{
 18.3350 +			res2 = dest2 - *compare2;
 18.3351 +
 18.3352 +			FLAG_N = NFLAG_32(res2);
 18.3353 +			FLAG_Z = MASK_OUT_ABOVE_32(res2);
 18.3354 +			FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);
 18.3355 +			FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);
 18.3356 +
 18.3357 +			if(COND_EQ())
 18.3358 +			{
 18.3359 +				USE_CYCLES(3);
 18.3360 +				m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);
 18.3361 +				m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);
 18.3362 +				return;
 18.3363 +			}
 18.3364 +		}
 18.3365 +		*compare1 = dest1;
 18.3366 +		*compare2 = dest2;
 18.3367 +		return;
 18.3368 +	}
 18.3369 +	m68ki_exception_illegal();
 18.3370 +}
 18.3371 +
 18.3372 +
 18.3373 +M68KMAKE_OP(chk, 16, ., d)
 18.3374 +{
 18.3375 +	sint src = MAKE_INT_16(DX);
 18.3376 +	sint bound = MAKE_INT_16(DY);
 18.3377 +
 18.3378 +	if(src >= 0 && src <= bound)
 18.3379 +	{
 18.3380 +		return;
 18.3381 +	}
 18.3382 +	FLAG_N = (src < 0)<<7;
 18.3383 +	m68ki_exception_trap(EXCEPTION_CHK);
 18.3384 +}
 18.3385 +
 18.3386 +
 18.3387 +M68KMAKE_OP(chk, 16, ., .)
 18.3388 +{
 18.3389 +	sint src = MAKE_INT_16(DX);
 18.3390 +	sint bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
 18.3391 +
 18.3392 +	if(src >= 0 && src <= bound)
 18.3393 +	{
 18.3394 +		return;
 18.3395 +	}
 18.3396 +	FLAG_N = (src < 0)<<7;
 18.3397 +	m68ki_exception_trap(EXCEPTION_CHK);
 18.3398 +}
 18.3399 +
 18.3400 +
 18.3401 +M68KMAKE_OP(chk, 32, ., d)
 18.3402 +{
 18.3403 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3404 +	{
 18.3405 +		sint src = MAKE_INT_32(DX);
 18.3406 +		sint bound = MAKE_INT_32(DY);
 18.3407 +
 18.3408 +		if(src >= 0 && src <= bound)
 18.3409 +		{
 18.3410 +			return;
 18.3411 +		}
 18.3412 +		FLAG_N = (src < 0)<<7;
 18.3413 +		m68ki_exception_trap(EXCEPTION_CHK);
 18.3414 +		return;
 18.3415 +	}
 18.3416 +	m68ki_exception_illegal();
 18.3417 +}
 18.3418 +
 18.3419 +
 18.3420 +M68KMAKE_OP(chk, 32, ., .)
 18.3421 +{
 18.3422 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3423 +	{
 18.3424 +		sint src = MAKE_INT_32(DX);
 18.3425 +		sint bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
 18.3426 +
 18.3427 +		if(src >= 0 && src <= bound)
 18.3428 +		{
 18.3429 +			return;
 18.3430 +		}
 18.3431 +		FLAG_N = (src < 0)<<7;
 18.3432 +		m68ki_exception_trap(EXCEPTION_CHK);
 18.3433 +		return;
 18.3434 +	}
 18.3435 +	m68ki_exception_illegal();
 18.3436 +}
 18.3437 +
 18.3438 +
 18.3439 +M68KMAKE_OP(chk2cmp2, 8, ., .)
 18.3440 +{
 18.3441 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3442 +	{
 18.3443 +		uint word2 = OPER_I_16();
 18.3444 +		uint compare = REG_DA[(word2 >> 12) & 15];
 18.3445 +		uint ea = M68KMAKE_GET_EA_AY_8;
 18.3446 +		uint lower_bound = m68ki_read_8(ea);
 18.3447 +		uint upper_bound = m68ki_read_8(ea + 1);
 18.3448 +
 18.3449 +		if(!BIT_F(word2))
 18.3450 +			compare = MAKE_INT_8(compare);
 18.3451 +
 18.3452 +		FLAG_C = compare - lower_bound;
 18.3453 +		FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C);
 18.3454 +		if(COND_CS())
 18.3455 +		{
 18.3456 +			if(BIT_B(word2))
 18.3457 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3458 +			return;
 18.3459 +		}
 18.3460 +
 18.3461 +		FLAG_C = upper_bound - compare;
 18.3462 +		FLAG_Z = MASK_OUT_ABOVE_8(FLAG_C);
 18.3463 +		if(COND_CS() && BIT_B(word2))
 18.3464 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3465 +
 18.3466 +		return;
 18.3467 +	}
 18.3468 +	m68ki_exception_illegal();
 18.3469 +}
 18.3470 +
 18.3471 +
 18.3472 +M68KMAKE_OP(chk2cmp2, 16, ., .)
 18.3473 +{
 18.3474 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3475 +	{
 18.3476 +		uint word2 = OPER_I_16();
 18.3477 +		uint compare = REG_DA[(word2 >> 12) & 15];
 18.3478 +		uint ea = M68KMAKE_GET_EA_AY_16;
 18.3479 +		uint lower_bound = m68ki_read_16(ea);
 18.3480 +		uint upper_bound = m68ki_read_16(ea + 1);
 18.3481 +
 18.3482 +		if(!BIT_F(word2))
 18.3483 +			compare = MAKE_INT_16(compare);
 18.3484 +
 18.3485 +		FLAG_C = compare - lower_bound;
 18.3486 +		FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C);
 18.3487 +		FLAG_C = CFLAG_16(FLAG_C);
 18.3488 +		if(COND_CS())
 18.3489 +		{
 18.3490 +			if(BIT_B(word2))
 18.3491 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3492 +			return;
 18.3493 +		}
 18.3494 +
 18.3495 +		FLAG_C = upper_bound - compare;
 18.3496 +		FLAG_Z = MASK_OUT_ABOVE_16(FLAG_C);
 18.3497 +		FLAG_C = CFLAG_16(FLAG_C);
 18.3498 +		if(COND_CS() && BIT_B(word2))
 18.3499 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3500 +
 18.3501 +		return;
 18.3502 +	}
 18.3503 +	m68ki_exception_illegal();
 18.3504 +}
 18.3505 +
 18.3506 +
 18.3507 +M68KMAKE_OP(chk2cmp2, 32, ., .)
 18.3508 +{
 18.3509 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3510 +	{
 18.3511 +		uint word2 = OPER_I_16();
 18.3512 +		uint compare = REG_DA[(word2 >> 12) & 15];
 18.3513 +		uint ea = M68KMAKE_GET_EA_AY_32;
 18.3514 +		uint lower_bound = m68ki_read_32(ea);
 18.3515 +		uint upper_bound = m68ki_read_32(ea + 1);
 18.3516 +
 18.3517 +		FLAG_C = compare - lower_bound;
 18.3518 +		FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C);
 18.3519 +		FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
 18.3520 +		if(COND_CS())
 18.3521 +		{
 18.3522 +			if(BIT_B(word2))
 18.3523 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3524 +			return;
 18.3525 +		}
 18.3526 +
 18.3527 +		FLAG_C = upper_bound - compare;
 18.3528 +		FLAG_Z = MASK_OUT_ABOVE_32(FLAG_C);
 18.3529 +		FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
 18.3530 +		if(COND_CS() && BIT_B(word2))
 18.3531 +				m68ki_exception_trap(EXCEPTION_CHK);
 18.3532 +
 18.3533 +		return;
 18.3534 +	}
 18.3535 +	m68ki_exception_illegal();
 18.3536 +}
 18.3537 +
 18.3538 +
 18.3539 +M68KMAKE_OP(clr, 8, ., d)
 18.3540 +{
 18.3541 +	DY &= 0xffffff00;
 18.3542 +
 18.3543 +	FLAG_N = NFLAG_CLEAR;
 18.3544 +	FLAG_V = VFLAG_CLEAR;
 18.3545 +	FLAG_C = CFLAG_CLEAR;
 18.3546 +	FLAG_Z = ZFLAG_SET;
 18.3547 +}
 18.3548 +
 18.3549 +
 18.3550 +M68KMAKE_OP(clr, 8, ., .)
 18.3551 +{
 18.3552 +	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
 18.3553 +
 18.3554 +	FLAG_N = NFLAG_CLEAR;
 18.3555 +	FLAG_V = VFLAG_CLEAR;
 18.3556 +	FLAG_C = CFLAG_CLEAR;
 18.3557 +	FLAG_Z = ZFLAG_SET;
 18.3558 +}
 18.3559 +
 18.3560 +
 18.3561 +M68KMAKE_OP(clr, 16, ., d)
 18.3562 +{
 18.3563 +	DY &= 0xffff0000;
 18.3564 +
 18.3565 +	FLAG_N = NFLAG_CLEAR;
 18.3566 +	FLAG_V = VFLAG_CLEAR;
 18.3567 +	FLAG_C = CFLAG_CLEAR;
 18.3568 +	FLAG_Z = ZFLAG_SET;
 18.3569 +}
 18.3570 +
 18.3571 +
 18.3572 +M68KMAKE_OP(clr, 16, ., .)
 18.3573 +{
 18.3574 +	m68ki_write_16(M68KMAKE_GET_EA_AY_16, 0);
 18.3575 +
 18.3576 +	FLAG_N = NFLAG_CLEAR;
 18.3577 +	FLAG_V = VFLAG_CLEAR;
 18.3578 +	FLAG_C = CFLAG_CLEAR;
 18.3579 +	FLAG_Z = ZFLAG_SET;
 18.3580 +}
 18.3581 +
 18.3582 +
 18.3583 +M68KMAKE_OP(clr, 32, ., d)
 18.3584 +{
 18.3585 +	DY = 0;
 18.3586 +
 18.3587 +	FLAG_N = NFLAG_CLEAR;
 18.3588 +	FLAG_V = VFLAG_CLEAR;
 18.3589 +	FLAG_C = CFLAG_CLEAR;
 18.3590 +	FLAG_Z = ZFLAG_SET;
 18.3591 +}
 18.3592 +
 18.3593 +
 18.3594 +M68KMAKE_OP(clr, 32, ., .)
 18.3595 +{
 18.3596 +	m68ki_write_32(M68KMAKE_GET_EA_AY_32, 0);
 18.3597 +
 18.3598 +	FLAG_N = NFLAG_CLEAR;
 18.3599 +	FLAG_V = VFLAG_CLEAR;
 18.3600 +	FLAG_C = CFLAG_CLEAR;
 18.3601 +	FLAG_Z = ZFLAG_SET;
 18.3602 +}
 18.3603 +
 18.3604 +
 18.3605 +M68KMAKE_OP(cmp, 8, ., d)
 18.3606 +{
 18.3607 +	uint src = MASK_OUT_ABOVE_8(DY);
 18.3608 +	uint dst = MASK_OUT_ABOVE_8(DX);
 18.3609 +	uint res = dst - src;
 18.3610 +
 18.3611 +	FLAG_N = NFLAG_8(res);
 18.3612 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3613 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3614 +	FLAG_C = CFLAG_8(res);
 18.3615 +}
 18.3616 +
 18.3617 +
 18.3618 +M68KMAKE_OP(cmp, 8, ., .)
 18.3619 +{
 18.3620 +	uint src = M68KMAKE_GET_OPER_AY_8;
 18.3621 +	uint dst = MASK_OUT_ABOVE_8(DX);
 18.3622 +	uint res = dst - src;
 18.3623 +
 18.3624 +	FLAG_N = NFLAG_8(res);
 18.3625 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3626 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3627 +	FLAG_C = CFLAG_8(res);
 18.3628 +}
 18.3629 +
 18.3630 +
 18.3631 +M68KMAKE_OP(cmp, 16, ., d)
 18.3632 +{
 18.3633 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.3634 +	uint dst = MASK_OUT_ABOVE_16(DX);
 18.3635 +	uint res = dst - src;
 18.3636 +
 18.3637 +	FLAG_N = NFLAG_16(res);
 18.3638 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3639 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3640 +	FLAG_C = CFLAG_16(res);
 18.3641 +}
 18.3642 +
 18.3643 +
 18.3644 +M68KMAKE_OP(cmp, 16, ., a)
 18.3645 +{
 18.3646 +	uint src = MASK_OUT_ABOVE_16(AY);
 18.3647 +	uint dst = MASK_OUT_ABOVE_16(DX);
 18.3648 +	uint res = dst - src;
 18.3649 +
 18.3650 +	FLAG_N = NFLAG_16(res);
 18.3651 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3652 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3653 +	FLAG_C = CFLAG_16(res);
 18.3654 +}
 18.3655 +
 18.3656 +
 18.3657 +M68KMAKE_OP(cmp, 16, ., .)
 18.3658 +{
 18.3659 +	uint src = M68KMAKE_GET_OPER_AY_16;
 18.3660 +	uint dst = MASK_OUT_ABOVE_16(DX);
 18.3661 +	uint res = dst - src;
 18.3662 +
 18.3663 +	FLAG_N = NFLAG_16(res);
 18.3664 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3665 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3666 +	FLAG_C = CFLAG_16(res);
 18.3667 +}
 18.3668 +
 18.3669 +
 18.3670 +M68KMAKE_OP(cmp, 32, ., d)
 18.3671 +{
 18.3672 +	uint src = DY;
 18.3673 +	uint dst = DX;
 18.3674 +	uint res = dst - src;
 18.3675 +
 18.3676 +	FLAG_N = NFLAG_32(res);
 18.3677 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3678 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3679 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3680 +}
 18.3681 +
 18.3682 +
 18.3683 +M68KMAKE_OP(cmp, 32, ., a)
 18.3684 +{
 18.3685 +	uint src = AY;
 18.3686 +	uint dst = DX;
 18.3687 +	uint res = dst - src;
 18.3688 +
 18.3689 +	FLAG_N = NFLAG_32(res);
 18.3690 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3691 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3692 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3693 +}
 18.3694 +
 18.3695 +
 18.3696 +M68KMAKE_OP(cmp, 32, ., .)
 18.3697 +{
 18.3698 +	uint src = M68KMAKE_GET_OPER_AY_32;
 18.3699 +	uint dst = DX;
 18.3700 +	uint res = dst - src;
 18.3701 +
 18.3702 +	FLAG_N = NFLAG_32(res);
 18.3703 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3704 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3705 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3706 +}
 18.3707 +
 18.3708 +
 18.3709 +M68KMAKE_OP(cmpa, 16, ., d)
 18.3710 +{
 18.3711 +	uint src = MAKE_INT_16(DY);
 18.3712 +	uint dst = AX;
 18.3713 +	uint res = dst - src;
 18.3714 +
 18.3715 +	FLAG_N = NFLAG_32(res);
 18.3716 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3717 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3718 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3719 +}
 18.3720 +
 18.3721 +
 18.3722 +M68KMAKE_OP(cmpa, 16, ., a)
 18.3723 +{
 18.3724 +	uint src = MAKE_INT_16(AY);
 18.3725 +	uint dst = AX;
 18.3726 +	uint res = dst - src;
 18.3727 +
 18.3728 +	FLAG_N = NFLAG_32(res);
 18.3729 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3730 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3731 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3732 +}
 18.3733 +
 18.3734 +
 18.3735 +M68KMAKE_OP(cmpa, 16, ., .)
 18.3736 +{
 18.3737 +	uint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
 18.3738 +	uint dst = AX;
 18.3739 +	uint res = dst - src;
 18.3740 +
 18.3741 +	FLAG_N = NFLAG_32(res);
 18.3742 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3743 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3744 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3745 +}
 18.3746 +
 18.3747 +
 18.3748 +M68KMAKE_OP(cmpa, 32, ., d)
 18.3749 +{
 18.3750 +	uint src = DY;
 18.3751 +	uint dst = AX;
 18.3752 +	uint res = dst - src;
 18.3753 +
 18.3754 +	FLAG_N = NFLAG_32(res);
 18.3755 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3756 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3757 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3758 +}
 18.3759 +
 18.3760 +
 18.3761 +M68KMAKE_OP(cmpa, 32, ., a)
 18.3762 +{
 18.3763 +	uint src = AY;
 18.3764 +	uint dst = AX;
 18.3765 +	uint res = dst - src;
 18.3766 +
 18.3767 +	FLAG_N = NFLAG_32(res);
 18.3768 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3769 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3770 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3771 +}
 18.3772 +
 18.3773 +
 18.3774 +M68KMAKE_OP(cmpa, 32, ., .)
 18.3775 +{
 18.3776 +	uint src = M68KMAKE_GET_OPER_AY_32;
 18.3777 +	uint dst = AX;
 18.3778 +	uint res = dst - src;
 18.3779 +
 18.3780 +	FLAG_N = NFLAG_32(res);
 18.3781 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3782 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3783 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3784 +}
 18.3785 +
 18.3786 +
 18.3787 +M68KMAKE_OP(cmpi, 8, ., d)
 18.3788 +{
 18.3789 +	uint src = OPER_I_8();
 18.3790 +	uint dst = MASK_OUT_ABOVE_8(DY);
 18.3791 +	uint res = dst - src;
 18.3792 +
 18.3793 +	FLAG_N = NFLAG_8(res);
 18.3794 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3795 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3796 +	FLAG_C = CFLAG_8(res);
 18.3797 +}
 18.3798 +
 18.3799 +
 18.3800 +M68KMAKE_OP(cmpi, 8, ., .)
 18.3801 +{
 18.3802 +	uint src = OPER_I_8();
 18.3803 +	uint dst = M68KMAKE_GET_OPER_AY_8;
 18.3804 +	uint res = dst - src;
 18.3805 +
 18.3806 +	FLAG_N = NFLAG_8(res);
 18.3807 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3808 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3809 +	FLAG_C = CFLAG_8(res);
 18.3810 +}
 18.3811 +
 18.3812 +
 18.3813 +M68KMAKE_OP(cmpi, 8, ., pcdi)
 18.3814 +{
 18.3815 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3816 +	{
 18.3817 +		uint src = OPER_I_8();
 18.3818 +		uint dst = OPER_PCDI_8();
 18.3819 +		uint res = dst - src;
 18.3820 +
 18.3821 +		FLAG_N = NFLAG_8(res);
 18.3822 +		FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3823 +		FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3824 +		FLAG_C = CFLAG_8(res);
 18.3825 +		return;
 18.3826 +	}
 18.3827 +	m68ki_exception_illegal();
 18.3828 +}
 18.3829 +
 18.3830 +
 18.3831 +M68KMAKE_OP(cmpi, 8, ., pcix)
 18.3832 +{
 18.3833 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3834 +	{
 18.3835 +		uint src = OPER_I_8();
 18.3836 +		uint dst = OPER_PCIX_8();
 18.3837 +		uint res = dst - src;
 18.3838 +
 18.3839 +		FLAG_N = NFLAG_8(res);
 18.3840 +		FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3841 +		FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3842 +		FLAG_C = CFLAG_8(res);
 18.3843 +		return;
 18.3844 +	}
 18.3845 +	m68ki_exception_illegal();
 18.3846 +}
 18.3847 +
 18.3848 +
 18.3849 +M68KMAKE_OP(cmpi, 16, ., d)
 18.3850 +{
 18.3851 +	uint src = OPER_I_16();
 18.3852 +	uint dst = MASK_OUT_ABOVE_16(DY);
 18.3853 +	uint res = dst - src;
 18.3854 +
 18.3855 +	FLAG_N = NFLAG_16(res);
 18.3856 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3857 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3858 +	FLAG_C = CFLAG_16(res);
 18.3859 +}
 18.3860 +
 18.3861 +
 18.3862 +M68KMAKE_OP(cmpi, 16, ., .)
 18.3863 +{
 18.3864 +	uint src = OPER_I_16();
 18.3865 +	uint dst = M68KMAKE_GET_OPER_AY_16;
 18.3866 +	uint res = dst - src;
 18.3867 +
 18.3868 +	FLAG_N = NFLAG_16(res);
 18.3869 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3870 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3871 +	FLAG_C = CFLAG_16(res);
 18.3872 +}
 18.3873 +
 18.3874 +
 18.3875 +M68KMAKE_OP(cmpi, 16, ., pcdi)
 18.3876 +{
 18.3877 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3878 +	{
 18.3879 +		uint src = OPER_I_16();
 18.3880 +		uint dst = OPER_PCDI_16();
 18.3881 +		uint res = dst - src;
 18.3882 +
 18.3883 +		FLAG_N = NFLAG_16(res);
 18.3884 +		FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3885 +		FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3886 +		FLAG_C = CFLAG_16(res);
 18.3887 +		return;
 18.3888 +	}
 18.3889 +	m68ki_exception_illegal();
 18.3890 +}
 18.3891 +
 18.3892 +
 18.3893 +M68KMAKE_OP(cmpi, 16, ., pcix)
 18.3894 +{
 18.3895 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3896 +	{
 18.3897 +		uint src = OPER_I_16();
 18.3898 +		uint dst = OPER_PCIX_16();
 18.3899 +		uint res = dst - src;
 18.3900 +
 18.3901 +		FLAG_N = NFLAG_16(res);
 18.3902 +		FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.3903 +		FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.3904 +		FLAG_C = CFLAG_16(res);
 18.3905 +		return;
 18.3906 +	}
 18.3907 +	m68ki_exception_illegal();
 18.3908 +}
 18.3909 +
 18.3910 +
 18.3911 +M68KMAKE_OP(cmpi, 32, ., d)
 18.3912 +{
 18.3913 +	uint src = OPER_I_32();
 18.3914 +	uint dst = DY;
 18.3915 +	uint res = dst - src;
 18.3916 +
 18.3917 +	FLAG_N = NFLAG_32(res);
 18.3918 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3919 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3920 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3921 +}
 18.3922 +
 18.3923 +
 18.3924 +M68KMAKE_OP(cmpi, 32, ., .)
 18.3925 +{
 18.3926 +	uint src = OPER_I_32();
 18.3927 +	uint dst = M68KMAKE_GET_OPER_AY_32;
 18.3928 +	uint res = dst - src;
 18.3929 +
 18.3930 +	FLAG_N = NFLAG_32(res);
 18.3931 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3932 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3933 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3934 +}
 18.3935 +
 18.3936 +
 18.3937 +M68KMAKE_OP(cmpi, 32, ., pcdi)
 18.3938 +{
 18.3939 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3940 +	{
 18.3941 +		uint src = OPER_I_32();
 18.3942 +		uint dst = OPER_PCDI_32();
 18.3943 +		uint res = dst - src;
 18.3944 +
 18.3945 +		FLAG_N = NFLAG_32(res);
 18.3946 +		FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3947 +		FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3948 +		FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3949 +		return;
 18.3950 +	}
 18.3951 +	m68ki_exception_illegal();
 18.3952 +}
 18.3953 +
 18.3954 +
 18.3955 +M68KMAKE_OP(cmpi, 32, ., pcix)
 18.3956 +{
 18.3957 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.3958 +	{
 18.3959 +		uint src = OPER_I_32();
 18.3960 +		uint dst = OPER_PCIX_32();
 18.3961 +		uint res = dst - src;
 18.3962 +
 18.3963 +		FLAG_N = NFLAG_32(res);
 18.3964 +		FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.3965 +		FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.3966 +		FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.3967 +		return;
 18.3968 +	}
 18.3969 +	m68ki_exception_illegal();
 18.3970 +}
 18.3971 +
 18.3972 +
 18.3973 +M68KMAKE_OP(cmpm, 8, ., ax7)
 18.3974 +{
 18.3975 +	uint src = OPER_AY_PI_8();
 18.3976 +	uint dst = OPER_A7_PI_8();
 18.3977 +	uint res = dst - src;
 18.3978 +
 18.3979 +	FLAG_N = NFLAG_8(res);
 18.3980 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3981 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3982 +	FLAG_C = CFLAG_8(res);
 18.3983 +}
 18.3984 +
 18.3985 +
 18.3986 +M68KMAKE_OP(cmpm, 8, ., ay7)
 18.3987 +{
 18.3988 +	uint src = OPER_A7_PI_8();
 18.3989 +	uint dst = OPER_AX_PI_8();
 18.3990 +	uint res = dst - src;
 18.3991 +
 18.3992 +	FLAG_N = NFLAG_8(res);
 18.3993 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.3994 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.3995 +	FLAG_C = CFLAG_8(res);
 18.3996 +}
 18.3997 +
 18.3998 +
 18.3999 +M68KMAKE_OP(cmpm, 8, ., axy7)
 18.4000 +{
 18.4001 +	uint src = OPER_A7_PI_8();
 18.4002 +	uint dst = OPER_A7_PI_8();
 18.4003 +	uint res = dst - src;
 18.4004 +
 18.4005 +	FLAG_N = NFLAG_8(res);
 18.4006 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.4007 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.4008 +	FLAG_C = CFLAG_8(res);
 18.4009 +}
 18.4010 +
 18.4011 +
 18.4012 +M68KMAKE_OP(cmpm, 8, ., .)
 18.4013 +{
 18.4014 +	uint src = OPER_AY_PI_8();
 18.4015 +	uint dst = OPER_AX_PI_8();
 18.4016 +	uint res = dst - src;
 18.4017 +
 18.4018 +	FLAG_N = NFLAG_8(res);
 18.4019 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.4020 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.4021 +	FLAG_C = CFLAG_8(res);
 18.4022 +}
 18.4023 +
 18.4024 +
 18.4025 +M68KMAKE_OP(cmpm, 16, ., .)
 18.4026 +{
 18.4027 +	uint src = OPER_AY_PI_16();
 18.4028 +	uint dst = OPER_AX_PI_16();
 18.4029 +	uint res = dst - src;
 18.4030 +
 18.4031 +	FLAG_N = NFLAG_16(res);
 18.4032 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.4033 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.4034 +	FLAG_C = CFLAG_16(res);
 18.4035 +}
 18.4036 +
 18.4037 +
 18.4038 +M68KMAKE_OP(cmpm, 32, ., .)
 18.4039 +{
 18.4040 +	uint src = OPER_AY_PI_32();
 18.4041 +	uint dst = OPER_AX_PI_32();
 18.4042 +	uint res = dst - src;
 18.4043 +
 18.4044 +	FLAG_N = NFLAG_32(res);
 18.4045 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.4046 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.4047 +	FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.4048 +}
 18.4049 +
 18.4050 +
 18.4051 +M68KMAKE_OP(cpbcc, 32, ., .)
 18.4052 +{
 18.4053 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4054 +	{
 18.4055 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.4056 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.4057 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.4058 +		return;
 18.4059 +	}
 18.4060 +	m68ki_exception_1111();
 18.4061 +}
 18.4062 +
 18.4063 +
 18.4064 +M68KMAKE_OP(cpdbcc, 32, ., .)
 18.4065 +{
 18.4066 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4067 +	{
 18.4068 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.4069 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.4070 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.4071 +		return;
 18.4072 +	}
 18.4073 +	m68ki_exception_1111();
 18.4074 +}
 18.4075 +
 18.4076 +
 18.4077 +M68KMAKE_OP(cpgen, 32, ., .)
 18.4078 +{
 18.4079 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4080 +	{
 18.4081 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.4082 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.4083 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.4084 +		return;
 18.4085 +	}
 18.4086 +	m68ki_exception_1111();
 18.4087 +}
 18.4088 +
 18.4089 +
 18.4090 +M68KMAKE_OP(cpscc, 32, ., .)
 18.4091 +{
 18.4092 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4093 +	{
 18.4094 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.4095 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.4096 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.4097 +		return;
 18.4098 +	}
 18.4099 +	m68ki_exception_1111();
 18.4100 +}
 18.4101 +
 18.4102 +
 18.4103 +M68KMAKE_OP(cptrapcc, 32, ., .)
 18.4104 +{
 18.4105 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4106 +	{
 18.4107 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.4108 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.4109 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.4110 +		return;
 18.4111 +	}
 18.4112 +	m68ki_exception_1111();
 18.4113 +}
 18.4114 +
 18.4115 +
 18.4116 +M68KMAKE_OP(dbt, 16, ., .)
 18.4117 +{
 18.4118 +	REG_PC += 2;
 18.4119 +}
 18.4120 +
 18.4121 +
 18.4122 +M68KMAKE_OP(dbf, 16, ., .)
 18.4123 +{
 18.4124 +	uint* r_dst = &DY;
 18.4125 +	uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
 18.4126 +
 18.4127 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.4128 +	if(res != 0xffff)
 18.4129 +	{
 18.4130 +		uint offset = OPER_I_16();
 18.4131 +		REG_PC -= 2;
 18.4132 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.4133 +		m68ki_branch_16(offset);
 18.4134 +		return;
 18.4135 +	}
 18.4136 +	REG_PC += 2;
 18.4137 +}
 18.4138 +
 18.4139 +
 18.4140 +M68KMAKE_OP(dbcc, 16, ., .)
 18.4141 +{
 18.4142 +	if(M68KMAKE_NOT_CC)
 18.4143 +	{
 18.4144 +		uint* r_dst = &DY;
 18.4145 +		uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
 18.4146 +
 18.4147 +		*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.4148 +		if(res != 0xffff)
 18.4149 +		{
 18.4150 +			uint offset = OPER_I_16();
 18.4151 +			REG_PC -= 2;
 18.4152 +			m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.4153 +			m68ki_branch_16(offset);
 18.4154 +			USE_CYCLES(CYC_DBCC_F_NOEXP);
 18.4155 +			return;
 18.4156 +		}
 18.4157 +		REG_PC += 2;
 18.4158 +		USE_CYCLES(CYC_DBCC_F_EXP);
 18.4159 +		return;
 18.4160 +	}
 18.4161 +	REG_PC += 2;
 18.4162 +}
 18.4163 +
 18.4164 +
 18.4165 +M68KMAKE_OP(divs, 16, ., d)
 18.4166 +{
 18.4167 +	uint* r_dst = &DX;
 18.4168 +	sint src = MAKE_INT_16(DY);
 18.4169 +	sint quotient;
 18.4170 +	sint remainder;
 18.4171 +
 18.4172 +	if(src != 0)
 18.4173 +	{
 18.4174 +		if((uint32)*r_dst == 0x80000000 && src == -1)
 18.4175 +		{
 18.4176 +			FLAG_Z = 0;
 18.4177 +			FLAG_N = NFLAG_CLEAR;
 18.4178 +			FLAG_V = VFLAG_CLEAR;
 18.4179 +			FLAG_C = CFLAG_CLEAR;
 18.4180 +			*r_dst = 0;
 18.4181 +			return;
 18.4182 +		}
 18.4183 +
 18.4184 +		quotient = MAKE_INT_32(*r_dst) / src;
 18.4185 +		remainder = MAKE_INT_32(*r_dst) % src;
 18.4186 +
 18.4187 +		if(quotient == MAKE_INT_16(quotient))
 18.4188 +		{
 18.4189 +			FLAG_Z = quotient;
 18.4190 +			FLAG_N = NFLAG_16(quotient);
 18.4191 +			FLAG_V = VFLAG_CLEAR;
 18.4192 +			FLAG_C = CFLAG_CLEAR;
 18.4193 +			*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
 18.4194 +			return;
 18.4195 +		}
 18.4196 +		FLAG_V = VFLAG_SET;
 18.4197 +		return;
 18.4198 +	}
 18.4199 +	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4200 +}
 18.4201 +
 18.4202 +
 18.4203 +M68KMAKE_OP(divs, 16, ., .)
 18.4204 +{
 18.4205 +	uint* r_dst = &DX;
 18.4206 +	sint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
 18.4207 +	sint quotient;
 18.4208 +	sint remainder;
 18.4209 +
 18.4210 +	if(src != 0)
 18.4211 +	{
 18.4212 +		if((uint32)*r_dst == 0x80000000 && src == -1)
 18.4213 +		{
 18.4214 +			FLAG_Z = 0;
 18.4215 +			FLAG_N = NFLAG_CLEAR;
 18.4216 +			FLAG_V = VFLAG_CLEAR;
 18.4217 +			FLAG_C = CFLAG_CLEAR;
 18.4218 +			*r_dst = 0;
 18.4219 +			return;
 18.4220 +		}
 18.4221 +
 18.4222 +		quotient = MAKE_INT_32(*r_dst) / src;
 18.4223 +		remainder = MAKE_INT_32(*r_dst) % src;
 18.4224 +
 18.4225 +		if(quotient == MAKE_INT_16(quotient))
 18.4226 +		{
 18.4227 +			FLAG_Z = quotient;
 18.4228 +			FLAG_N = NFLAG_16(quotient);
 18.4229 +			FLAG_V = VFLAG_CLEAR;
 18.4230 +			FLAG_C = CFLAG_CLEAR;
 18.4231 +			*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
 18.4232 +			return;
 18.4233 +		}
 18.4234 +		FLAG_V = VFLAG_SET;
 18.4235 +		return;
 18.4236 +	}
 18.4237 +	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4238 +}
 18.4239 +
 18.4240 +
 18.4241 +M68KMAKE_OP(divu, 16, ., d)
 18.4242 +{
 18.4243 +	uint* r_dst = &DX;
 18.4244 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.4245 +
 18.4246 +	if(src != 0)
 18.4247 +	{
 18.4248 +		uint quotient = *r_dst / src;
 18.4249 +		uint remainder = *r_dst % src;
 18.4250 +
 18.4251 +		if(quotient < 0x10000)
 18.4252 +		{
 18.4253 +			FLAG_Z = quotient;
 18.4254 +			FLAG_N = NFLAG_16(quotient);
 18.4255 +			FLAG_V = VFLAG_CLEAR;
 18.4256 +			FLAG_C = CFLAG_CLEAR;
 18.4257 +			*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
 18.4258 +			return;
 18.4259 +		}
 18.4260 +		FLAG_V = VFLAG_SET;
 18.4261 +		return;
 18.4262 +	}
 18.4263 +	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4264 +}
 18.4265 +
 18.4266 +
 18.4267 +M68KMAKE_OP(divu, 16, ., .)
 18.4268 +{
 18.4269 +	uint* r_dst = &DX;
 18.4270 +	uint src = M68KMAKE_GET_OPER_AY_16;
 18.4271 +
 18.4272 +	if(src != 0)
 18.4273 +	{
 18.4274 +		uint quotient = *r_dst / src;
 18.4275 +		uint remainder = *r_dst % src;
 18.4276 +
 18.4277 +		if(quotient < 0x10000)
 18.4278 +		{
 18.4279 +			FLAG_Z = quotient;
 18.4280 +			FLAG_N = NFLAG_16(quotient);
 18.4281 +			FLAG_V = VFLAG_CLEAR;
 18.4282 +			FLAG_C = CFLAG_CLEAR;
 18.4283 +			*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
 18.4284 +			return;
 18.4285 +		}
 18.4286 +		FLAG_V = VFLAG_SET;
 18.4287 +		return;
 18.4288 +	}
 18.4289 +	m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4290 +}
 18.4291 +
 18.4292 +
 18.4293 +M68KMAKE_OP(divl, 32, ., d)
 18.4294 +{
 18.4295 +#if M68K_USE_64_BIT
 18.4296 +
 18.4297 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4298 +	{
 18.4299 +		uint word2 = OPER_I_16();
 18.4300 +		uint64 divisor   = DY;
 18.4301 +		uint64 dividend  = 0;
 18.4302 +		uint64 quotient  = 0;
 18.4303 +		uint64 remainder = 0;
 18.4304 +
 18.4305 +		if(divisor != 0)
 18.4306 +		{
 18.4307 +			if(BIT_A(word2))	/* 64 bit */
 18.4308 +			{
 18.4309 +				dividend = REG_D[word2 & 7];
 18.4310 +				dividend <<= 32;
 18.4311 +				dividend |= REG_D[(word2 >> 12) & 7];
 18.4312 +
 18.4313 +				if(BIT_B(word2))	   /* signed */
 18.4314 +				{
 18.4315 +					quotient  = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
 18.4316 +					remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
 18.4317 +					if((sint64)quotient != (sint64)((sint32)quotient))
 18.4318 +					{
 18.4319 +						FLAG_V = VFLAG_SET;
 18.4320 +						return;
 18.4321 +					}
 18.4322 +				}
 18.4323 +				else					/* unsigned */
 18.4324 +				{
 18.4325 +					quotient = dividend / divisor;
 18.4326 +					if(quotient > 0xffffffff)
 18.4327 +					{
 18.4328 +						FLAG_V = VFLAG_SET;
 18.4329 +						return;
 18.4330 +					}
 18.4331 +					remainder = dividend % divisor;
 18.4332 +				}
 18.4333 +			}
 18.4334 +			else	/* 32 bit */
 18.4335 +			{
 18.4336 +				dividend = REG_D[(word2 >> 12) & 7];
 18.4337 +				if(BIT_B(word2))	   /* signed */
 18.4338 +				{
 18.4339 +					quotient  = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
 18.4340 +					remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
 18.4341 +				}
 18.4342 +				else					/* unsigned */
 18.4343 +				{
 18.4344 +					quotient = dividend / divisor;
 18.4345 +					remainder = dividend % divisor;
 18.4346 +				}
 18.4347 +			}
 18.4348 +
 18.4349 +			REG_D[word2 & 7] = remainder;
 18.4350 +			REG_D[(word2 >> 12) & 7] = quotient;
 18.4351 +
 18.4352 +			FLAG_N = NFLAG_32(quotient);
 18.4353 +			FLAG_Z = quotient;
 18.4354 +			FLAG_V = VFLAG_CLEAR;
 18.4355 +			FLAG_C = CFLAG_CLEAR;
 18.4356 +			return;
 18.4357 +		}
 18.4358 +		m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4359 +		return;
 18.4360 +	}
 18.4361 +	m68ki_exception_illegal();
 18.4362 +
 18.4363 +#else
 18.4364 +
 18.4365 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4366 +	{
 18.4367 +		uint word2 = OPER_I_16();
 18.4368 +		uint divisor = DY;
 18.4369 +		uint dividend_hi = REG_D[word2 & 7];
 18.4370 +		uint dividend_lo = REG_D[(word2 >> 12) & 7];
 18.4371 +		uint quotient = 0;
 18.4372 +		uint remainder = 0;
 18.4373 +		uint dividend_neg = 0;
 18.4374 +		uint divisor_neg = 0;
 18.4375 +		sint i;
 18.4376 +		uint overflow;
 18.4377 +
 18.4378 +		if(divisor != 0)
 18.4379 +		{
 18.4380 +			/* quad / long : long quotient, long remainder */
 18.4381 +			if(BIT_A(word2))
 18.4382 +			{
 18.4383 +				if(BIT_B(word2))	   /* signed */
 18.4384 +				{
 18.4385 +					/* special case in signed divide */
 18.4386 +					if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
 18.4387 +					{
 18.4388 +						REG_D[word2 & 7] = 0;
 18.4389 +						REG_D[(word2 >> 12) & 7] = 0x80000000;
 18.4390 +
 18.4391 +						FLAG_N = NFLAG_SET;
 18.4392 +						FLAG_Z = ZFLAG_CLEAR;
 18.4393 +						FLAG_V = VFLAG_CLEAR;
 18.4394 +						FLAG_C = CFLAG_CLEAR;
 18.4395 +						return;
 18.4396 +					}
 18.4397 +					if(GET_MSB_32(dividend_hi))
 18.4398 +					{
 18.4399 +						dividend_neg = 1;
 18.4400 +						dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
 18.4401 +						dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
 18.4402 +					}
 18.4403 +					if(GET_MSB_32(divisor))
 18.4404 +					{
 18.4405 +						divisor_neg = 1;
 18.4406 +						divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
 18.4407 +
 18.4408 +					}
 18.4409 +				}
 18.4410 +
 18.4411 +				/* if the upper long is greater than the divisor, we're overflowing. */
 18.4412 +				if(dividend_hi >= divisor)
 18.4413 +				{
 18.4414 +					FLAG_V = VFLAG_SET;
 18.4415 +					return;
 18.4416 +				}
 18.4417 +
 18.4418 +				for(i = 31; i >= 0; i--)
 18.4419 +				{
 18.4420 +					quotient <<= 1;
 18.4421 +					remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
 18.4422 +					if(remainder >= divisor)
 18.4423 +					{
 18.4424 +						remainder -= divisor;
 18.4425 +						quotient++;
 18.4426 +					}
 18.4427 +				}
 18.4428 +				for(i = 31; i >= 0; i--)
 18.4429 +				{
 18.4430 +					quotient <<= 1;
 18.4431 +					overflow = GET_MSB_32(remainder);
 18.4432 +					remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
 18.4433 +					if(remainder >= divisor || overflow)
 18.4434 +					{
 18.4435 +						remainder -= divisor;
 18.4436 +						quotient++;
 18.4437 +					}
 18.4438 +				}
 18.4439 +
 18.4440 +				if(BIT_B(word2))	   /* signed */
 18.4441 +				{
 18.4442 +					if(quotient > 0x7fffffff)
 18.4443 +					{
 18.4444 +						FLAG_V = VFLAG_SET;
 18.4445 +						return;
 18.4446 +					}
 18.4447 +					if(dividend_neg)
 18.4448 +					{
 18.4449 +						remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
 18.4450 +						quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
 18.4451 +					}
 18.4452 +					if(divisor_neg)
 18.4453 +						quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
 18.4454 +				}
 18.4455 +
 18.4456 +				REG_D[word2 & 7] = remainder;
 18.4457 +				REG_D[(word2 >> 12) & 7] = quotient;
 18.4458 +
 18.4459 +				FLAG_N = NFLAG_32(quotient);
 18.4460 +				FLAG_Z = quotient;
 18.4461 +				FLAG_V = VFLAG_CLEAR;
 18.4462 +				FLAG_C = CFLAG_CLEAR;
 18.4463 +				return;
 18.4464 +			}
 18.4465 +
 18.4466 +			/* long / long: long quotient, maybe long remainder */
 18.4467 +			if(BIT_B(word2))	   /* signed */
 18.4468 +			{
 18.4469 +				/* Special case in divide */
 18.4470 +				if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
 18.4471 +				{
 18.4472 +					FLAG_N = NFLAG_SET;
 18.4473 +					FLAG_Z = ZFLAG_CLEAR;
 18.4474 +					FLAG_V = VFLAG_CLEAR;
 18.4475 +					FLAG_C = CFLAG_CLEAR;
 18.4476 +					REG_D[(word2 >> 12) & 7] = 0x80000000;
 18.4477 +					REG_D[word2 & 7] = 0;
 18.4478 +					return;
 18.4479 +				}
 18.4480 +				REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
 18.4481 +				quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
 18.4482 +			}
 18.4483 +			else
 18.4484 +			{
 18.4485 +				REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
 18.4486 +				quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
 18.4487 +			}
 18.4488 +
 18.4489 +			FLAG_N = NFLAG_32(quotient);
 18.4490 +			FLAG_Z = quotient;
 18.4491 +			FLAG_V = VFLAG_CLEAR;
 18.4492 +			FLAG_C = CFLAG_CLEAR;
 18.4493 +			return;
 18.4494 +		}
 18.4495 +		m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4496 +		return;
 18.4497 +	}
 18.4498 +	m68ki_exception_illegal();
 18.4499 +
 18.4500 +#endif
 18.4501 +}
 18.4502 +
 18.4503 +
 18.4504 +M68KMAKE_OP(divl, 32, ., .)
 18.4505 +{
 18.4506 +#if M68K_USE_64_BIT
 18.4507 +
 18.4508 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4509 +	{
 18.4510 +		uint word2 = OPER_I_16();
 18.4511 +		uint64 divisor = M68KMAKE_GET_OPER_AY_32;
 18.4512 +		uint64 dividend  = 0;
 18.4513 +		uint64 quotient  = 0;
 18.4514 +		uint64 remainder = 0;
 18.4515 +
 18.4516 +		if(divisor != 0)
 18.4517 +		{
 18.4518 +			if(BIT_A(word2))	/* 64 bit */
 18.4519 +			{
 18.4520 +				dividend = REG_D[word2 & 7];
 18.4521 +				dividend <<= 32;
 18.4522 +				dividend |= REG_D[(word2 >> 12) & 7];
 18.4523 +
 18.4524 +				if(BIT_B(word2))	   /* signed */
 18.4525 +				{
 18.4526 +					quotient  = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
 18.4527 +					remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
 18.4528 +					if((sint64)quotient != (sint64)((sint32)quotient))
 18.4529 +					{
 18.4530 +						FLAG_V = VFLAG_SET;
 18.4531 +						return;
 18.4532 +					}
 18.4533 +				}
 18.4534 +				else					/* unsigned */
 18.4535 +				{
 18.4536 +					quotient = dividend / divisor;
 18.4537 +					if(quotient > 0xffffffff)
 18.4538 +					{
 18.4539 +						FLAG_V = VFLAG_SET;
 18.4540 +						return;
 18.4541 +					}
 18.4542 +					remainder = dividend % divisor;
 18.4543 +				}
 18.4544 +			}
 18.4545 +			else	/* 32 bit */
 18.4546 +			{
 18.4547 +				dividend = REG_D[(word2 >> 12) & 7];
 18.4548 +				if(BIT_B(word2))	   /* signed */
 18.4549 +				{
 18.4550 +					quotient  = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
 18.4551 +					remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
 18.4552 +				}
 18.4553 +				else					/* unsigned */
 18.4554 +				{
 18.4555 +					quotient = dividend / divisor;
 18.4556 +					remainder = dividend % divisor;
 18.4557 +				}
 18.4558 +			}
 18.4559 +
 18.4560 +			REG_D[word2 & 7] = remainder;
 18.4561 +			REG_D[(word2 >> 12) & 7] = quotient;
 18.4562 +
 18.4563 +			FLAG_N = NFLAG_32(quotient);
 18.4564 +			FLAG_Z = quotient;
 18.4565 +			FLAG_V = VFLAG_CLEAR;
 18.4566 +			FLAG_C = CFLAG_CLEAR;
 18.4567 +			return;
 18.4568 +		}
 18.4569 +		m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4570 +		return;
 18.4571 +	}
 18.4572 +	m68ki_exception_illegal();
 18.4573 +
 18.4574 +#else
 18.4575 +
 18.4576 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4577 +	{
 18.4578 +		uint word2 = OPER_I_16();
 18.4579 +		uint divisor = M68KMAKE_GET_OPER_AY_32;
 18.4580 +		uint dividend_hi = REG_D[word2 & 7];
 18.4581 +		uint dividend_lo = REG_D[(word2 >> 12) & 7];
 18.4582 +		uint quotient = 0;
 18.4583 +		uint remainder = 0;
 18.4584 +		uint dividend_neg = 0;
 18.4585 +		uint divisor_neg = 0;
 18.4586 +		sint i;
 18.4587 +		uint overflow;
 18.4588 +
 18.4589 +		if(divisor != 0)
 18.4590 +		{
 18.4591 +			/* quad / long : long quotient, long remainder */
 18.4592 +			if(BIT_A(word2))
 18.4593 +			{
 18.4594 +				if(BIT_B(word2))	   /* signed */
 18.4595 +				{
 18.4596 +					/* special case in signed divide */
 18.4597 +					if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
 18.4598 +					{
 18.4599 +						REG_D[word2 & 7] = 0;
 18.4600 +						REG_D[(word2 >> 12) & 7] = 0x80000000;
 18.4601 +
 18.4602 +						FLAG_N = NFLAG_SET;
 18.4603 +						FLAG_Z = ZFLAG_CLEAR;
 18.4604 +						FLAG_V = VFLAG_CLEAR;
 18.4605 +						FLAG_C = CFLAG_CLEAR;
 18.4606 +						return;
 18.4607 +					}
 18.4608 +					if(GET_MSB_32(dividend_hi))
 18.4609 +					{
 18.4610 +						dividend_neg = 1;
 18.4611 +						dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
 18.4612 +						dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
 18.4613 +					}
 18.4614 +					if(GET_MSB_32(divisor))
 18.4615 +					{
 18.4616 +						divisor_neg = 1;
 18.4617 +						divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
 18.4618 +
 18.4619 +					}
 18.4620 +				}
 18.4621 +
 18.4622 +				/* if the upper long is greater than the divisor, we're overflowing. */
 18.4623 +				if(dividend_hi >= divisor)
 18.4624 +				{
 18.4625 +					FLAG_V = VFLAG_SET;
 18.4626 +					return;
 18.4627 +				}
 18.4628 +
 18.4629 +				for(i = 31; i >= 0; i--)
 18.4630 +				{
 18.4631 +					quotient <<= 1;
 18.4632 +					remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
 18.4633 +					if(remainder >= divisor)
 18.4634 +					{
 18.4635 +						remainder -= divisor;
 18.4636 +						quotient++;
 18.4637 +					}
 18.4638 +				}
 18.4639 +				for(i = 31; i >= 0; i--)
 18.4640 +				{
 18.4641 +					quotient <<= 1;
 18.4642 +					overflow = GET_MSB_32(remainder);
 18.4643 +					remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
 18.4644 +					if(remainder >= divisor || overflow)
 18.4645 +					{
 18.4646 +						remainder -= divisor;
 18.4647 +						quotient++;
 18.4648 +					}
 18.4649 +				}
 18.4650 +
 18.4651 +				if(BIT_B(word2))	   /* signed */
 18.4652 +				{
 18.4653 +					if(quotient > 0x7fffffff)
 18.4654 +					{
 18.4655 +						FLAG_V = VFLAG_SET;
 18.4656 +						return;
 18.4657 +					}
 18.4658 +					if(dividend_neg)
 18.4659 +					{
 18.4660 +						remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
 18.4661 +						quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
 18.4662 +					}
 18.4663 +					if(divisor_neg)
 18.4664 +						quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
 18.4665 +				}
 18.4666 +
 18.4667 +				REG_D[word2 & 7] = remainder;
 18.4668 +				REG_D[(word2 >> 12) & 7] = quotient;
 18.4669 +
 18.4670 +				FLAG_N = NFLAG_32(quotient);
 18.4671 +				FLAG_Z = quotient;
 18.4672 +				FLAG_V = VFLAG_CLEAR;
 18.4673 +				FLAG_C = CFLAG_CLEAR;
 18.4674 +				return;
 18.4675 +			}
 18.4676 +
 18.4677 +			/* long / long: long quotient, maybe long remainder */
 18.4678 +			if(BIT_B(word2))	   /* signed */
 18.4679 +			{
 18.4680 +				/* Special case in divide */
 18.4681 +				if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
 18.4682 +				{
 18.4683 +					FLAG_N = NFLAG_SET;
 18.4684 +					FLAG_Z = ZFLAG_CLEAR;
 18.4685 +					FLAG_V = VFLAG_CLEAR;
 18.4686 +					FLAG_C = CFLAG_CLEAR;
 18.4687 +					REG_D[(word2 >> 12) & 7] = 0x80000000;
 18.4688 +					REG_D[word2 & 7] = 0;
 18.4689 +					return;
 18.4690 +				}
 18.4691 +				REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
 18.4692 +				quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
 18.4693 +			}
 18.4694 +			else
 18.4695 +			{
 18.4696 +				REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
 18.4697 +				quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
 18.4698 +			}
 18.4699 +
 18.4700 +			FLAG_N = NFLAG_32(quotient);
 18.4701 +			FLAG_Z = quotient;
 18.4702 +			FLAG_V = VFLAG_CLEAR;
 18.4703 +			FLAG_C = CFLAG_CLEAR;
 18.4704 +			return;
 18.4705 +		}
 18.4706 +		m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
 18.4707 +		return;
 18.4708 +	}
 18.4709 +	m68ki_exception_illegal();
 18.4710 +
 18.4711 +#endif
 18.4712 +}
 18.4713 +
 18.4714 +
 18.4715 +M68KMAKE_OP(eor, 8, ., d)
 18.4716 +{
 18.4717 +	uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));
 18.4718 +
 18.4719 +	FLAG_N = NFLAG_8(res);
 18.4720 +	FLAG_Z = res;
 18.4721 +	FLAG_C = CFLAG_CLEAR;
 18.4722 +	FLAG_V = VFLAG_CLEAR;
 18.4723 +}
 18.4724 +
 18.4725 +
 18.4726 +M68KMAKE_OP(eor, 8, ., .)
 18.4727 +{
 18.4728 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.4729 +	uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
 18.4730 +
 18.4731 +	m68ki_write_8(ea, res);
 18.4732 +
 18.4733 +	FLAG_N = NFLAG_8(res);
 18.4734 +	FLAG_Z = res;
 18.4735 +	FLAG_C = CFLAG_CLEAR;
 18.4736 +	FLAG_V = VFLAG_CLEAR;
 18.4737 +}
 18.4738 +
 18.4739 +
 18.4740 +M68KMAKE_OP(eor, 16, ., d)
 18.4741 +{
 18.4742 +	uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));
 18.4743 +
 18.4744 +	FLAG_N = NFLAG_16(res);
 18.4745 +	FLAG_Z = res;
 18.4746 +	FLAG_C = CFLAG_CLEAR;
 18.4747 +	FLAG_V = VFLAG_CLEAR;
 18.4748 +}
 18.4749 +
 18.4750 +
 18.4751 +M68KMAKE_OP(eor, 16, ., .)
 18.4752 +{
 18.4753 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.4754 +	uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
 18.4755 +
 18.4756 +	m68ki_write_16(ea, res);
 18.4757 +
 18.4758 +	FLAG_N = NFLAG_16(res);
 18.4759 +	FLAG_Z = res;
 18.4760 +	FLAG_C = CFLAG_CLEAR;
 18.4761 +	FLAG_V = VFLAG_CLEAR;
 18.4762 +}
 18.4763 +
 18.4764 +
 18.4765 +M68KMAKE_OP(eor, 32, ., d)
 18.4766 +{
 18.4767 +	uint res = DY ^= DX;
 18.4768 +
 18.4769 +	FLAG_N = NFLAG_32(res);
 18.4770 +	FLAG_Z = res;
 18.4771 +	FLAG_C = CFLAG_CLEAR;
 18.4772 +	FLAG_V = VFLAG_CLEAR;
 18.4773 +}
 18.4774 +
 18.4775 +
 18.4776 +M68KMAKE_OP(eor, 32, ., .)
 18.4777 +{
 18.4778 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.4779 +	uint res = DX ^ m68ki_read_32(ea);
 18.4780 +
 18.4781 +	m68ki_write_32(ea, res);
 18.4782 +
 18.4783 +	FLAG_N = NFLAG_32(res);
 18.4784 +	FLAG_Z = res;
 18.4785 +	FLAG_C = CFLAG_CLEAR;
 18.4786 +	FLAG_V = VFLAG_CLEAR;
 18.4787 +}
 18.4788 +
 18.4789 +
 18.4790 +M68KMAKE_OP(eori, 8, ., d)
 18.4791 +{
 18.4792 +	uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
 18.4793 +
 18.4794 +	FLAG_N = NFLAG_8(res);
 18.4795 +	FLAG_Z = res;
 18.4796 +	FLAG_C = CFLAG_CLEAR;
 18.4797 +	FLAG_V = VFLAG_CLEAR;
 18.4798 +}
 18.4799 +
 18.4800 +
 18.4801 +M68KMAKE_OP(eori, 8, ., .)
 18.4802 +{
 18.4803 +	uint src = OPER_I_8();
 18.4804 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.4805 +	uint res = src ^ m68ki_read_8(ea);
 18.4806 +
 18.4807 +	m68ki_write_8(ea, res);
 18.4808 +
 18.4809 +	FLAG_N = NFLAG_8(res);
 18.4810 +	FLAG_Z = res;
 18.4811 +	FLAG_C = CFLAG_CLEAR;
 18.4812 +	FLAG_V = VFLAG_CLEAR;
 18.4813 +}
 18.4814 +
 18.4815 +
 18.4816 +M68KMAKE_OP(eori, 16, ., d)
 18.4817 +{
 18.4818 +	uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
 18.4819 +
 18.4820 +	FLAG_N = NFLAG_16(res);
 18.4821 +	FLAG_Z = res;
 18.4822 +	FLAG_C = CFLAG_CLEAR;
 18.4823 +	FLAG_V = VFLAG_CLEAR;
 18.4824 +}
 18.4825 +
 18.4826 +
 18.4827 +M68KMAKE_OP(eori, 16, ., .)
 18.4828 +{
 18.4829 +	uint src = OPER_I_16();
 18.4830 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.4831 +	uint res = src ^ m68ki_read_16(ea);
 18.4832 +
 18.4833 +	m68ki_write_16(ea, res);
 18.4834 +
 18.4835 +	FLAG_N = NFLAG_16(res);
 18.4836 +	FLAG_Z = res;
 18.4837 +	FLAG_C = CFLAG_CLEAR;
 18.4838 +	FLAG_V = VFLAG_CLEAR;
 18.4839 +}
 18.4840 +
 18.4841 +
 18.4842 +M68KMAKE_OP(eori, 32, ., d)
 18.4843 +{
 18.4844 +	uint res = DY ^= OPER_I_32();
 18.4845 +
 18.4846 +	FLAG_N = NFLAG_32(res);
 18.4847 +	FLAG_Z = res;
 18.4848 +	FLAG_C = CFLAG_CLEAR;
 18.4849 +	FLAG_V = VFLAG_CLEAR;
 18.4850 +}
 18.4851 +
 18.4852 +
 18.4853 +M68KMAKE_OP(eori, 32, ., .)
 18.4854 +{
 18.4855 +	uint src = OPER_I_32();
 18.4856 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.4857 +	uint res = src ^ m68ki_read_32(ea);
 18.4858 +
 18.4859 +	m68ki_write_32(ea, res);
 18.4860 +
 18.4861 +	FLAG_N = NFLAG_32(res);
 18.4862 +	FLAG_Z = res;
 18.4863 +	FLAG_C = CFLAG_CLEAR;
 18.4864 +	FLAG_V = VFLAG_CLEAR;
 18.4865 +}
 18.4866 +
 18.4867 +
 18.4868 +M68KMAKE_OP(eori, 16, toc, .)
 18.4869 +{
 18.4870 +	m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
 18.4871 +}
 18.4872 +
 18.4873 +
 18.4874 +M68KMAKE_OP(eori, 16, tos, .)
 18.4875 +{
 18.4876 +	if(FLAG_S)
 18.4877 +	{
 18.4878 +		uint src = OPER_I_16();
 18.4879 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.4880 +		m68ki_set_sr(m68ki_get_sr() ^ src);
 18.4881 +		return;
 18.4882 +	}
 18.4883 +	m68ki_exception_privilege_violation();
 18.4884 +}
 18.4885 +
 18.4886 +
 18.4887 +M68KMAKE_OP(exg, 32, dd, .)
 18.4888 +{
 18.4889 +	uint* reg_a = &DX;
 18.4890 +	uint* reg_b = &DY;
 18.4891 +	uint tmp = *reg_a;
 18.4892 +	*reg_a = *reg_b;
 18.4893 +	*reg_b = tmp;
 18.4894 +}
 18.4895 +
 18.4896 +
 18.4897 +M68KMAKE_OP(exg, 32, aa, .)
 18.4898 +{
 18.4899 +	uint* reg_a = &AX;
 18.4900 +	uint* reg_b = &AY;
 18.4901 +	uint tmp = *reg_a;
 18.4902 +	*reg_a = *reg_b;
 18.4903 +	*reg_b = tmp;
 18.4904 +}
 18.4905 +
 18.4906 +
 18.4907 +M68KMAKE_OP(exg, 32, da, .)
 18.4908 +{
 18.4909 +	uint* reg_a = &DX;
 18.4910 +	uint* reg_b = &AY;
 18.4911 +	uint tmp = *reg_a;
 18.4912 +	*reg_a = *reg_b;
 18.4913 +	*reg_b = tmp;
 18.4914 +}
 18.4915 +
 18.4916 +
 18.4917 +M68KMAKE_OP(ext, 16, ., .)
 18.4918 +{
 18.4919 +	uint* r_dst = &DY;
 18.4920 +
 18.4921 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
 18.4922 +
 18.4923 +	FLAG_N = NFLAG_16(*r_dst);
 18.4924 +	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
 18.4925 +	FLAG_V = VFLAG_CLEAR;
 18.4926 +	FLAG_C = CFLAG_CLEAR;
 18.4927 +}
 18.4928 +
 18.4929 +
 18.4930 +M68KMAKE_OP(ext, 32, ., .)
 18.4931 +{
 18.4932 +	uint* r_dst = &DY;
 18.4933 +
 18.4934 +	*r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
 18.4935 +
 18.4936 +	FLAG_N = NFLAG_32(*r_dst);
 18.4937 +	FLAG_Z = *r_dst;
 18.4938 +	FLAG_V = VFLAG_CLEAR;
 18.4939 +	FLAG_C = CFLAG_CLEAR;
 18.4940 +}
 18.4941 +
 18.4942 +
 18.4943 +M68KMAKE_OP(extb, 32, ., .)
 18.4944 +{
 18.4945 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.4946 +	{
 18.4947 +		uint* r_dst = &DY;
 18.4948 +
 18.4949 +		*r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
 18.4950 +
 18.4951 +		FLAG_N = NFLAG_32(*r_dst);
 18.4952 +		FLAG_Z = *r_dst;
 18.4953 +		FLAG_V = VFLAG_CLEAR;
 18.4954 +		FLAG_C = CFLAG_CLEAR;
 18.4955 +		return;
 18.4956 +	}
 18.4957 +	m68ki_exception_illegal();
 18.4958 +}
 18.4959 +
 18.4960 +
 18.4961 +M68KMAKE_OP(illegal, 0, ., .)
 18.4962 +{
 18.4963 +	m68ki_exception_illegal();
 18.4964 +}
 18.4965 +
 18.4966 +M68KMAKE_OP(jmp, 32, ., .)
 18.4967 +{
 18.4968 +	m68ki_jump(M68KMAKE_GET_EA_AY_32);
 18.4969 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.4970 +	if(REG_PC == REG_PPC)
 18.4971 +		USE_ALL_CYCLES();
 18.4972 +}
 18.4973 +
 18.4974 +
 18.4975 +M68KMAKE_OP(jsr, 32, ., .)
 18.4976 +{
 18.4977 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.4978 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.4979 +	m68ki_push_32(REG_PC);
 18.4980 +	m68ki_jump(ea);
 18.4981 +}
 18.4982 +
 18.4983 +
 18.4984 +M68KMAKE_OP(lea, 32, ., .)
 18.4985 +{
 18.4986 +	AX = M68KMAKE_GET_EA_AY_32;
 18.4987 +}
 18.4988 +
 18.4989 +
 18.4990 +M68KMAKE_OP(link, 16, ., a7)
 18.4991 +{
 18.4992 +	REG_A[7] -= 4;
 18.4993 +	m68ki_write_32(REG_A[7], REG_A[7]);
 18.4994 +	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
 18.4995 +}
 18.4996 +
 18.4997 +
 18.4998 +M68KMAKE_OP(link, 16, ., .)
 18.4999 +{
 18.5000 +	uint* r_dst = &AY;
 18.5001 +
 18.5002 +	m68ki_push_32(*r_dst);
 18.5003 +	*r_dst = REG_A[7];
 18.5004 +	REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
 18.5005 +}
 18.5006 +
 18.5007 +
 18.5008 +M68KMAKE_OP(link, 32, ., a7)
 18.5009 +{
 18.5010 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.5011 +	{
 18.5012 +		REG_A[7] -= 4;
 18.5013 +		m68ki_write_32(REG_A[7], REG_A[7]);
 18.5014 +		REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
 18.5015 +		return;
 18.5016 +	}
 18.5017 +	m68ki_exception_illegal();
 18.5018 +}
 18.5019 +
 18.5020 +
 18.5021 +M68KMAKE_OP(link, 32, ., .)
 18.5022 +{
 18.5023 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.5024 +	{
 18.5025 +		uint* r_dst = &AY;
 18.5026 +
 18.5027 +		m68ki_push_32(*r_dst);
 18.5028 +		*r_dst = REG_A[7];
 18.5029 +		REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
 18.5030 +		return;
 18.5031 +	}
 18.5032 +	m68ki_exception_illegal();
 18.5033 +}
 18.5034 +
 18.5035 +
 18.5036 +M68KMAKE_OP(lsr, 8, s, .)
 18.5037 +{
 18.5038 +	uint* r_dst = &DY;
 18.5039 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5040 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.5041 +	uint res = src >> shift;
 18.5042 +
 18.5043 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5044 +
 18.5045 +	FLAG_N = NFLAG_CLEAR;
 18.5046 +	FLAG_Z = res;
 18.5047 +	FLAG_X = FLAG_C = src << (9-shift);
 18.5048 +	FLAG_V = VFLAG_CLEAR;
 18.5049 +}
 18.5050 +
 18.5051 +
 18.5052 +M68KMAKE_OP(lsr, 16, s, .)
 18.5053 +{
 18.5054 +	uint* r_dst = &DY;
 18.5055 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5056 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.5057 +	uint res = src >> shift;
 18.5058 +
 18.5059 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5060 +
 18.5061 +	FLAG_N = NFLAG_CLEAR;
 18.5062 +	FLAG_Z = res;
 18.5063 +	FLAG_X = FLAG_C = src << (9-shift);
 18.5064 +	FLAG_V = VFLAG_CLEAR;
 18.5065 +}
 18.5066 +
 18.5067 +
 18.5068 +M68KMAKE_OP(lsr, 32, s, .)
 18.5069 +{
 18.5070 +	uint* r_dst = &DY;
 18.5071 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5072 +	uint src = *r_dst;
 18.5073 +	uint res = src >> shift;
 18.5074 +
 18.5075 +	*r_dst = res;
 18.5076 +
 18.5077 +	FLAG_N = NFLAG_CLEAR;
 18.5078 +	FLAG_Z = res;
 18.5079 +	FLAG_X = FLAG_C = src << (9-shift);
 18.5080 +	FLAG_V = VFLAG_CLEAR;
 18.5081 +}
 18.5082 +
 18.5083 +
 18.5084 +M68KMAKE_OP(lsr, 8, r, .)
 18.5085 +{
 18.5086 +	uint* r_dst = &DY;
 18.5087 +	uint shift = DX & 0x3f;
 18.5088 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.5089 +	uint res = src >> shift;
 18.5090 +
 18.5091 +	if(shift != 0)
 18.5092 +	{
 18.5093 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5094 +
 18.5095 +		if(shift <= 8)
 18.5096 +		{
 18.5097 +			*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5098 +			FLAG_X = FLAG_C = src << (9-shift);
 18.5099 +			FLAG_N = NFLAG_CLEAR;
 18.5100 +			FLAG_Z = res;
 18.5101 +			FLAG_V = VFLAG_CLEAR;
 18.5102 +			return;
 18.5103 +		}
 18.5104 +
 18.5105 +		*r_dst &= 0xffffff00;
 18.5106 +		FLAG_X = XFLAG_CLEAR;
 18.5107 +		FLAG_C = CFLAG_CLEAR;
 18.5108 +		FLAG_N = NFLAG_CLEAR;
 18.5109 +		FLAG_Z = ZFLAG_SET;
 18.5110 +		FLAG_V = VFLAG_CLEAR;
 18.5111 +		return;
 18.5112 +	}
 18.5113 +
 18.5114 +	FLAG_C = CFLAG_CLEAR;
 18.5115 +	FLAG_N = NFLAG_8(src);
 18.5116 +	FLAG_Z = src;
 18.5117 +	FLAG_V = VFLAG_CLEAR;
 18.5118 +}
 18.5119 +
 18.5120 +
 18.5121 +M68KMAKE_OP(lsr, 16, r, .)
 18.5122 +{
 18.5123 +	uint* r_dst = &DY;
 18.5124 +	uint shift = DX & 0x3f;
 18.5125 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.5126 +	uint res = src >> shift;
 18.5127 +
 18.5128 +	if(shift != 0)
 18.5129 +	{
 18.5130 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5131 +
 18.5132 +		if(shift <= 16)
 18.5133 +		{
 18.5134 +			*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5135 +			FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
 18.5136 +			FLAG_N = NFLAG_CLEAR;
 18.5137 +			FLAG_Z = res;
 18.5138 +			FLAG_V = VFLAG_CLEAR;
 18.5139 +			return;
 18.5140 +		}
 18.5141 +
 18.5142 +		*r_dst &= 0xffff0000;
 18.5143 +		FLAG_X = XFLAG_CLEAR;
 18.5144 +		FLAG_C = CFLAG_CLEAR;
 18.5145 +		FLAG_N = NFLAG_CLEAR;
 18.5146 +		FLAG_Z = ZFLAG_SET;
 18.5147 +		FLAG_V = VFLAG_CLEAR;
 18.5148 +		return;
 18.5149 +	}
 18.5150 +
 18.5151 +	FLAG_C = CFLAG_CLEAR;
 18.5152 +	FLAG_N = NFLAG_16(src);
 18.5153 +	FLAG_Z = src;
 18.5154 +	FLAG_V = VFLAG_CLEAR;
 18.5155 +}
 18.5156 +
 18.5157 +
 18.5158 +M68KMAKE_OP(lsr, 32, r, .)
 18.5159 +{
 18.5160 +	uint* r_dst = &DY;
 18.5161 +	uint shift = DX & 0x3f;
 18.5162 +	uint src = *r_dst;
 18.5163 +	uint res = src >> shift;
 18.5164 +
 18.5165 +	if(shift != 0)
 18.5166 +	{
 18.5167 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5168 +
 18.5169 +		if(shift < 32)
 18.5170 +		{
 18.5171 +			*r_dst = res;
 18.5172 +			FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
 18.5173 +			FLAG_N = NFLAG_CLEAR;
 18.5174 +			FLAG_Z = res;
 18.5175 +			FLAG_V = VFLAG_CLEAR;
 18.5176 +			return;
 18.5177 +		}
 18.5178 +
 18.5179 +		*r_dst = 0;
 18.5180 +		FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
 18.5181 +		FLAG_N = NFLAG_CLEAR;
 18.5182 +		FLAG_Z = ZFLAG_SET;
 18.5183 +		FLAG_V = VFLAG_CLEAR;
 18.5184 +		return;
 18.5185 +	}
 18.5186 +
 18.5187 +	FLAG_C = CFLAG_CLEAR;
 18.5188 +	FLAG_N = NFLAG_32(src);
 18.5189 +	FLAG_Z = src;
 18.5190 +	FLAG_V = VFLAG_CLEAR;
 18.5191 +}
 18.5192 +
 18.5193 +
 18.5194 +M68KMAKE_OP(lsr, 16, ., .)
 18.5195 +{
 18.5196 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.5197 +	uint src = m68ki_read_16(ea);
 18.5198 +	uint res = src >> 1;
 18.5199 +
 18.5200 +	m68ki_write_16(ea, res);
 18.5201 +
 18.5202 +	FLAG_N = NFLAG_CLEAR;
 18.5203 +	FLAG_Z = res;
 18.5204 +	FLAG_C = FLAG_X = src << 8;
 18.5205 +	FLAG_V = VFLAG_CLEAR;
 18.5206 +}
 18.5207 +
 18.5208 +
 18.5209 +M68KMAKE_OP(lsl, 8, s, .)
 18.5210 +{
 18.5211 +	uint* r_dst = &DY;
 18.5212 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5213 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.5214 +	uint res = MASK_OUT_ABOVE_8(src << shift);
 18.5215 +
 18.5216 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5217 +
 18.5218 +	FLAG_N = NFLAG_8(res);
 18.5219 +	FLAG_Z = res;
 18.5220 +	FLAG_X = FLAG_C = src << shift;
 18.5221 +	FLAG_V = VFLAG_CLEAR;
 18.5222 +}
 18.5223 +
 18.5224 +
 18.5225 +M68KMAKE_OP(lsl, 16, s, .)
 18.5226 +{
 18.5227 +	uint* r_dst = &DY;
 18.5228 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5229 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.5230 +	uint res = MASK_OUT_ABOVE_16(src << shift);
 18.5231 +
 18.5232 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5233 +
 18.5234 +	FLAG_N = NFLAG_16(res);
 18.5235 +	FLAG_Z = res;
 18.5236 +	FLAG_X = FLAG_C = src >> (8-shift);
 18.5237 +	FLAG_V = VFLAG_CLEAR;
 18.5238 +}
 18.5239 +
 18.5240 +
 18.5241 +M68KMAKE_OP(lsl, 32, s, .)
 18.5242 +{
 18.5243 +	uint* r_dst = &DY;
 18.5244 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.5245 +	uint src = *r_dst;
 18.5246 +	uint res = MASK_OUT_ABOVE_32(src << shift);
 18.5247 +
 18.5248 +	*r_dst = res;
 18.5249 +
 18.5250 +	FLAG_N = NFLAG_32(res);
 18.5251 +	FLAG_Z = res;
 18.5252 +	FLAG_X = FLAG_C = src >> (24-shift);
 18.5253 +	FLAG_V = VFLAG_CLEAR;
 18.5254 +}
 18.5255 +
 18.5256 +
 18.5257 +M68KMAKE_OP(lsl, 8, r, .)
 18.5258 +{
 18.5259 +	uint* r_dst = &DY;
 18.5260 +	uint shift = DX & 0x3f;
 18.5261 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.5262 +	uint res = MASK_OUT_ABOVE_8(src << shift);
 18.5263 +
 18.5264 +	if(shift != 0)
 18.5265 +	{
 18.5266 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5267 +
 18.5268 +		if(shift <= 8)
 18.5269 +		{
 18.5270 +			*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5271 +			FLAG_X = FLAG_C = src << shift;
 18.5272 +			FLAG_N = NFLAG_8(res);
 18.5273 +			FLAG_Z = res;
 18.5274 +			FLAG_V = VFLAG_CLEAR;
 18.5275 +			return;
 18.5276 +		}
 18.5277 +
 18.5278 +		*r_dst &= 0xffffff00;
 18.5279 +		FLAG_X = XFLAG_CLEAR;
 18.5280 +		FLAG_C = CFLAG_CLEAR;
 18.5281 +		FLAG_N = NFLAG_CLEAR;
 18.5282 +		FLAG_Z = ZFLAG_SET;
 18.5283 +		FLAG_V = VFLAG_CLEAR;
 18.5284 +		return;
 18.5285 +	}
 18.5286 +
 18.5287 +	FLAG_C = CFLAG_CLEAR;
 18.5288 +	FLAG_N = NFLAG_8(src);
 18.5289 +	FLAG_Z = src;
 18.5290 +	FLAG_V = VFLAG_CLEAR;
 18.5291 +}
 18.5292 +
 18.5293 +
 18.5294 +M68KMAKE_OP(lsl, 16, r, .)
 18.5295 +{
 18.5296 +	uint* r_dst = &DY;
 18.5297 +	uint shift = DX & 0x3f;
 18.5298 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.5299 +	uint res = MASK_OUT_ABOVE_16(src << shift);
 18.5300 +
 18.5301 +	if(shift != 0)
 18.5302 +	{
 18.5303 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5304 +
 18.5305 +		if(shift <= 16)
 18.5306 +		{
 18.5307 +			*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5308 +			FLAG_X = FLAG_C = (src << shift) >> 8;
 18.5309 +			FLAG_N = NFLAG_16(res);
 18.5310 +			FLAG_Z = res;
 18.5311 +			FLAG_V = VFLAG_CLEAR;
 18.5312 +			return;
 18.5313 +		}
 18.5314 +
 18.5315 +		*r_dst &= 0xffff0000;
 18.5316 +		FLAG_X = XFLAG_CLEAR;
 18.5317 +		FLAG_C = CFLAG_CLEAR;
 18.5318 +		FLAG_N = NFLAG_CLEAR;
 18.5319 +		FLAG_Z = ZFLAG_SET;
 18.5320 +		FLAG_V = VFLAG_CLEAR;
 18.5321 +		return;
 18.5322 +	}
 18.5323 +
 18.5324 +	FLAG_C = CFLAG_CLEAR;
 18.5325 +	FLAG_N = NFLAG_16(src);
 18.5326 +	FLAG_Z = src;
 18.5327 +	FLAG_V = VFLAG_CLEAR;
 18.5328 +}
 18.5329 +
 18.5330 +
 18.5331 +M68KMAKE_OP(lsl, 32, r, .)
 18.5332 +{
 18.5333 +	uint* r_dst = &DY;
 18.5334 +	uint shift = DX & 0x3f;
 18.5335 +	uint src = *r_dst;
 18.5336 +	uint res = MASK_OUT_ABOVE_32(src << shift);
 18.5337 +
 18.5338 +	if(shift != 0)
 18.5339 +	{
 18.5340 +		USE_CYCLES(shift<<CYC_SHIFT);
 18.5341 +
 18.5342 +		if(shift < 32)
 18.5343 +		{
 18.5344 +			*r_dst = res;
 18.5345 +			FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
 18.5346 +			FLAG_N = NFLAG_32(res);
 18.5347 +			FLAG_Z = res;
 18.5348 +			FLAG_V = VFLAG_CLEAR;
 18.5349 +			return;
 18.5350 +		}
 18.5351 +
 18.5352 +		*r_dst = 0;
 18.5353 +		FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
 18.5354 +		FLAG_N = NFLAG_CLEAR;
 18.5355 +		FLAG_Z = ZFLAG_SET;
 18.5356 +		FLAG_V = VFLAG_CLEAR;
 18.5357 +		return;
 18.5358 +	}
 18.5359 +
 18.5360 +	FLAG_C = CFLAG_CLEAR;
 18.5361 +	FLAG_N = NFLAG_32(src);
 18.5362 +	FLAG_Z = src;
 18.5363 +	FLAG_V = VFLAG_CLEAR;
 18.5364 +}
 18.5365 +
 18.5366 +
 18.5367 +M68KMAKE_OP(lsl, 16, ., .)
 18.5368 +{
 18.5369 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.5370 +	uint src = m68ki_read_16(ea);
 18.5371 +	uint res = MASK_OUT_ABOVE_16(src << 1);
 18.5372 +
 18.5373 +	m68ki_write_16(ea, res);
 18.5374 +
 18.5375 +	FLAG_N = NFLAG_16(res);
 18.5376 +	FLAG_Z = res;
 18.5377 +	FLAG_X = FLAG_C = src >> 7;
 18.5378 +	FLAG_V = VFLAG_CLEAR;
 18.5379 +}
 18.5380 +
 18.5381 +
 18.5382 +M68KMAKE_OP(move, 8, d, d)
 18.5383 +{
 18.5384 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5385 +	uint* r_dst = &DX;
 18.5386 +
 18.5387 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5388 +
 18.5389 +	FLAG_N = NFLAG_8(res);
 18.5390 +	FLAG_Z = res;
 18.5391 +	FLAG_V = VFLAG_CLEAR;
 18.5392 +	FLAG_C = CFLAG_CLEAR;
 18.5393 +}
 18.5394 +
 18.5395 +
 18.5396 +M68KMAKE_OP(move, 8, d, .)
 18.5397 +{
 18.5398 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5399 +	uint* r_dst = &DX;
 18.5400 +
 18.5401 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.5402 +
 18.5403 +	FLAG_N = NFLAG_8(res);
 18.5404 +	FLAG_Z = res;
 18.5405 +	FLAG_V = VFLAG_CLEAR;
 18.5406 +	FLAG_C = CFLAG_CLEAR;
 18.5407 +}
 18.5408 +
 18.5409 +
 18.5410 +M68KMAKE_OP(move, 8, ai, d)
 18.5411 +{
 18.5412 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5413 +	uint ea = EA_AX_AI_8();
 18.5414 +
 18.5415 +	m68ki_write_8(ea, res);
 18.5416 +
 18.5417 +	FLAG_N = NFLAG_8(res);
 18.5418 +	FLAG_Z = res;
 18.5419 +	FLAG_V = VFLAG_CLEAR;
 18.5420 +	FLAG_C = CFLAG_CLEAR;
 18.5421 +}
 18.5422 +
 18.5423 +
 18.5424 +M68KMAKE_OP(move, 8, ai, .)
 18.5425 +{
 18.5426 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5427 +	uint ea = EA_AX_AI_8();
 18.5428 +
 18.5429 +	m68ki_write_8(ea, res);
 18.5430 +
 18.5431 +	FLAG_N = NFLAG_8(res);
 18.5432 +	FLAG_Z = res;
 18.5433 +	FLAG_V = VFLAG_CLEAR;
 18.5434 +	FLAG_C = CFLAG_CLEAR;
 18.5435 +}
 18.5436 +
 18.5437 +
 18.5438 +M68KMAKE_OP(move, 8, pi7, d)
 18.5439 +{
 18.5440 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5441 +	uint ea = EA_A7_PI_8();
 18.5442 +
 18.5443 +	m68ki_write_8(ea, res);
 18.5444 +
 18.5445 +	FLAG_N = NFLAG_8(res);
 18.5446 +	FLAG_Z = res;
 18.5447 +	FLAG_V = VFLAG_CLEAR;
 18.5448 +	FLAG_C = CFLAG_CLEAR;
 18.5449 +}
 18.5450 +
 18.5451 +
 18.5452 +M68KMAKE_OP(move, 8, pi, d)
 18.5453 +{
 18.5454 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5455 +	uint ea = EA_AX_PI_8();
 18.5456 +
 18.5457 +	m68ki_write_8(ea, res);
 18.5458 +
 18.5459 +	FLAG_N = NFLAG_8(res);
 18.5460 +	FLAG_Z = res;
 18.5461 +	FLAG_V = VFLAG_CLEAR;
 18.5462 +	FLAG_C = CFLAG_CLEAR;
 18.5463 +}
 18.5464 +
 18.5465 +
 18.5466 +M68KMAKE_OP(move, 8, pi7, .)
 18.5467 +{
 18.5468 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5469 +	uint ea = EA_A7_PI_8();
 18.5470 +
 18.5471 +	m68ki_write_8(ea, res);
 18.5472 +
 18.5473 +	FLAG_N = NFLAG_8(res);
 18.5474 +	FLAG_Z = res;
 18.5475 +	FLAG_V = VFLAG_CLEAR;
 18.5476 +	FLAG_C = CFLAG_CLEAR;
 18.5477 +}
 18.5478 +
 18.5479 +
 18.5480 +M68KMAKE_OP(move, 8, pi, .)
 18.5481 +{
 18.5482 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5483 +	uint ea = EA_AX_PI_8();
 18.5484 +
 18.5485 +	m68ki_write_8(ea, res);
 18.5486 +
 18.5487 +	FLAG_N = NFLAG_8(res);
 18.5488 +	FLAG_Z = res;
 18.5489 +	FLAG_V = VFLAG_CLEAR;
 18.5490 +	FLAG_C = CFLAG_CLEAR;
 18.5491 +}
 18.5492 +
 18.5493 +
 18.5494 +M68KMAKE_OP(move, 8, pd7, d)
 18.5495 +{
 18.5496 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5497 +	uint ea = EA_A7_PD_8();
 18.5498 +
 18.5499 +	m68ki_write_8(ea, res);
 18.5500 +
 18.5501 +	FLAG_N = NFLAG_8(res);
 18.5502 +	FLAG_Z = res;
 18.5503 +	FLAG_V = VFLAG_CLEAR;
 18.5504 +	FLAG_C = CFLAG_CLEAR;
 18.5505 +}
 18.5506 +
 18.5507 +
 18.5508 +M68KMAKE_OP(move, 8, pd, d)
 18.5509 +{
 18.5510 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5511 +	uint ea = EA_AX_PD_8();
 18.5512 +
 18.5513 +	m68ki_write_8(ea, res);
 18.5514 +
 18.5515 +	FLAG_N = NFLAG_8(res);
 18.5516 +	FLAG_Z = res;
 18.5517 +	FLAG_V = VFLAG_CLEAR;
 18.5518 +	FLAG_C = CFLAG_CLEAR;
 18.5519 +}
 18.5520 +
 18.5521 +
 18.5522 +M68KMAKE_OP(move, 8, pd7, .)
 18.5523 +{
 18.5524 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5525 +	uint ea = EA_A7_PD_8();
 18.5526 +
 18.5527 +	m68ki_write_8(ea, res);
 18.5528 +
 18.5529 +	FLAG_N = NFLAG_8(res);
 18.5530 +	FLAG_Z = res;
 18.5531 +	FLAG_V = VFLAG_CLEAR;
 18.5532 +	FLAG_C = CFLAG_CLEAR;
 18.5533 +}
 18.5534 +
 18.5535 +
 18.5536 +M68KMAKE_OP(move, 8, pd, .)
 18.5537 +{
 18.5538 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5539 +	uint ea = EA_AX_PD_8();
 18.5540 +
 18.5541 +	m68ki_write_8(ea, res);
 18.5542 +
 18.5543 +	FLAG_N = NFLAG_8(res);
 18.5544 +	FLAG_Z = res;
 18.5545 +	FLAG_V = VFLAG_CLEAR;
 18.5546 +	FLAG_C = CFLAG_CLEAR;
 18.5547 +}
 18.5548 +
 18.5549 +
 18.5550 +M68KMAKE_OP(move, 8, di, d)
 18.5551 +{
 18.5552 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5553 +	uint ea = EA_AX_DI_8();
 18.5554 +
 18.5555 +	m68ki_write_8(ea, res);
 18.5556 +
 18.5557 +	FLAG_N = NFLAG_8(res);
 18.5558 +	FLAG_Z = res;
 18.5559 +	FLAG_V = VFLAG_CLEAR;
 18.5560 +	FLAG_C = CFLAG_CLEAR;
 18.5561 +}
 18.5562 +
 18.5563 +
 18.5564 +M68KMAKE_OP(move, 8, di, .)
 18.5565 +{
 18.5566 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5567 +	uint ea = EA_AX_DI_8();
 18.5568 +
 18.5569 +	m68ki_write_8(ea, res);
 18.5570 +
 18.5571 +	FLAG_N = NFLAG_8(res);
 18.5572 +	FLAG_Z = res;
 18.5573 +	FLAG_V = VFLAG_CLEAR;
 18.5574 +	FLAG_C = CFLAG_CLEAR;
 18.5575 +}
 18.5576 +
 18.5577 +
 18.5578 +M68KMAKE_OP(move, 8, ix, d)
 18.5579 +{
 18.5580 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5581 +	uint ea = EA_AX_IX_8();
 18.5582 +
 18.5583 +	m68ki_write_8(ea, res);
 18.5584 +
 18.5585 +	FLAG_N = NFLAG_8(res);
 18.5586 +	FLAG_Z = res;
 18.5587 +	FLAG_V = VFLAG_CLEAR;
 18.5588 +	FLAG_C = CFLAG_CLEAR;
 18.5589 +}
 18.5590 +
 18.5591 +
 18.5592 +M68KMAKE_OP(move, 8, ix, .)
 18.5593 +{
 18.5594 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5595 +	uint ea = EA_AX_IX_8();
 18.5596 +
 18.5597 +	m68ki_write_8(ea, res);
 18.5598 +
 18.5599 +	FLAG_N = NFLAG_8(res);
 18.5600 +	FLAG_Z = res;
 18.5601 +	FLAG_V = VFLAG_CLEAR;
 18.5602 +	FLAG_C = CFLAG_CLEAR;
 18.5603 +}
 18.5604 +
 18.5605 +
 18.5606 +M68KMAKE_OP(move, 8, aw, d)
 18.5607 +{
 18.5608 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5609 +	uint ea = EA_AW_8();
 18.5610 +
 18.5611 +	m68ki_write_8(ea, res);
 18.5612 +
 18.5613 +	FLAG_N = NFLAG_8(res);
 18.5614 +	FLAG_Z = res;
 18.5615 +	FLAG_V = VFLAG_CLEAR;
 18.5616 +	FLAG_C = CFLAG_CLEAR;
 18.5617 +}
 18.5618 +
 18.5619 +
 18.5620 +M68KMAKE_OP(move, 8, aw, .)
 18.5621 +{
 18.5622 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5623 +	uint ea = EA_AW_8();
 18.5624 +
 18.5625 +	m68ki_write_8(ea, res);
 18.5626 +
 18.5627 +	FLAG_N = NFLAG_8(res);
 18.5628 +	FLAG_Z = res;
 18.5629 +	FLAG_V = VFLAG_CLEAR;
 18.5630 +	FLAG_C = CFLAG_CLEAR;
 18.5631 +}
 18.5632 +
 18.5633 +
 18.5634 +M68KMAKE_OP(move, 8, al, d)
 18.5635 +{
 18.5636 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.5637 +	uint ea = EA_AL_8();
 18.5638 +
 18.5639 +	m68ki_write_8(ea, res);
 18.5640 +
 18.5641 +	FLAG_N = NFLAG_8(res);
 18.5642 +	FLAG_Z = res;
 18.5643 +	FLAG_V = VFLAG_CLEAR;
 18.5644 +	FLAG_C = CFLAG_CLEAR;
 18.5645 +}
 18.5646 +
 18.5647 +
 18.5648 +M68KMAKE_OP(move, 8, al, .)
 18.5649 +{
 18.5650 +	uint res = M68KMAKE_GET_OPER_AY_8;
 18.5651 +	uint ea = EA_AL_8();
 18.5652 +
 18.5653 +	m68ki_write_8(ea, res);
 18.5654 +
 18.5655 +	FLAG_N = NFLAG_8(res);
 18.5656 +	FLAG_Z = res;
 18.5657 +	FLAG_V = VFLAG_CLEAR;
 18.5658 +	FLAG_C = CFLAG_CLEAR;
 18.5659 +}
 18.5660 +
 18.5661 +
 18.5662 +M68KMAKE_OP(move, 16, d, d)
 18.5663 +{
 18.5664 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5665 +	uint* r_dst = &DX;
 18.5666 +
 18.5667 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5668 +
 18.5669 +	FLAG_N = NFLAG_16(res);
 18.5670 +	FLAG_Z = res;
 18.5671 +	FLAG_V = VFLAG_CLEAR;
 18.5672 +	FLAG_C = CFLAG_CLEAR;
 18.5673 +}
 18.5674 +
 18.5675 +
 18.5676 +M68KMAKE_OP(move, 16, d, a)
 18.5677 +{
 18.5678 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5679 +	uint* r_dst = &DX;
 18.5680 +
 18.5681 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5682 +
 18.5683 +	FLAG_N = NFLAG_16(res);
 18.5684 +	FLAG_Z = res;
 18.5685 +	FLAG_V = VFLAG_CLEAR;
 18.5686 +	FLAG_C = CFLAG_CLEAR;
 18.5687 +}
 18.5688 +
 18.5689 +
 18.5690 +M68KMAKE_OP(move, 16, d, .)
 18.5691 +{
 18.5692 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5693 +	uint* r_dst = &DX;
 18.5694 +
 18.5695 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.5696 +
 18.5697 +	FLAG_N = NFLAG_16(res);
 18.5698 +	FLAG_Z = res;
 18.5699 +	FLAG_V = VFLAG_CLEAR;
 18.5700 +	FLAG_C = CFLAG_CLEAR;
 18.5701 +}
 18.5702 +
 18.5703 +
 18.5704 +M68KMAKE_OP(move, 16, ai, d)
 18.5705 +{
 18.5706 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5707 +	uint ea = EA_AX_AI_16();
 18.5708 +
 18.5709 +	m68ki_write_16(ea, res);
 18.5710 +
 18.5711 +	FLAG_N = NFLAG_16(res);
 18.5712 +	FLAG_Z = res;
 18.5713 +	FLAG_V = VFLAG_CLEAR;
 18.5714 +	FLAG_C = CFLAG_CLEAR;
 18.5715 +}
 18.5716 +
 18.5717 +
 18.5718 +M68KMAKE_OP(move, 16, ai, a)
 18.5719 +{
 18.5720 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5721 +	uint ea = EA_AX_AI_16();
 18.5722 +
 18.5723 +	m68ki_write_16(ea, res);
 18.5724 +
 18.5725 +	FLAG_N = NFLAG_16(res);
 18.5726 +	FLAG_Z = res;
 18.5727 +	FLAG_V = VFLAG_CLEAR;
 18.5728 +	FLAG_C = CFLAG_CLEAR;
 18.5729 +}
 18.5730 +
 18.5731 +
 18.5732 +M68KMAKE_OP(move, 16, ai, .)
 18.5733 +{
 18.5734 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5735 +	uint ea = EA_AX_AI_16();
 18.5736 +
 18.5737 +	m68ki_write_16(ea, res);
 18.5738 +
 18.5739 +	FLAG_N = NFLAG_16(res);
 18.5740 +	FLAG_Z = res;
 18.5741 +	FLAG_V = VFLAG_CLEAR;
 18.5742 +	FLAG_C = CFLAG_CLEAR;
 18.5743 +}
 18.5744 +
 18.5745 +
 18.5746 +M68KMAKE_OP(move, 16, pi, d)
 18.5747 +{
 18.5748 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5749 +	uint ea = EA_AX_PI_16();
 18.5750 +
 18.5751 +	m68ki_write_16(ea, res);
 18.5752 +
 18.5753 +	FLAG_N = NFLAG_16(res);
 18.5754 +	FLAG_Z = res;
 18.5755 +	FLAG_V = VFLAG_CLEAR;
 18.5756 +	FLAG_C = CFLAG_CLEAR;
 18.5757 +}
 18.5758 +
 18.5759 +
 18.5760 +M68KMAKE_OP(move, 16, pi, a)
 18.5761 +{
 18.5762 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5763 +	uint ea = EA_AX_PI_16();
 18.5764 +
 18.5765 +	m68ki_write_16(ea, res);
 18.5766 +
 18.5767 +	FLAG_N = NFLAG_16(res);
 18.5768 +	FLAG_Z = res;
 18.5769 +	FLAG_V = VFLAG_CLEAR;
 18.5770 +	FLAG_C = CFLAG_CLEAR;
 18.5771 +}
 18.5772 +
 18.5773 +
 18.5774 +M68KMAKE_OP(move, 16, pi, .)
 18.5775 +{
 18.5776 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5777 +	uint ea = EA_AX_PI_16();
 18.5778 +
 18.5779 +	m68ki_write_16(ea, res);
 18.5780 +
 18.5781 +	FLAG_N = NFLAG_16(res);
 18.5782 +	FLAG_Z = res;
 18.5783 +	FLAG_V = VFLAG_CLEAR;
 18.5784 +	FLAG_C = CFLAG_CLEAR;
 18.5785 +}
 18.5786 +
 18.5787 +
 18.5788 +M68KMAKE_OP(move, 16, pd, d)
 18.5789 +{
 18.5790 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5791 +	uint ea = EA_AX_PD_16();
 18.5792 +
 18.5793 +	m68ki_write_16(ea, res);
 18.5794 +
 18.5795 +	FLAG_N = NFLAG_16(res);
 18.5796 +	FLAG_Z = res;
 18.5797 +	FLAG_V = VFLAG_CLEAR;
 18.5798 +	FLAG_C = CFLAG_CLEAR;
 18.5799 +}
 18.5800 +
 18.5801 +
 18.5802 +M68KMAKE_OP(move, 16, pd, a)
 18.5803 +{
 18.5804 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5805 +	uint ea = EA_AX_PD_16();
 18.5806 +
 18.5807 +	m68ki_write_16(ea, res);
 18.5808 +
 18.5809 +	FLAG_N = NFLAG_16(res);
 18.5810 +	FLAG_Z = res;
 18.5811 +	FLAG_V = VFLAG_CLEAR;
 18.5812 +	FLAG_C = CFLAG_CLEAR;
 18.5813 +}
 18.5814 +
 18.5815 +
 18.5816 +M68KMAKE_OP(move, 16, pd, .)
 18.5817 +{
 18.5818 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5819 +	uint ea = EA_AX_PD_16();
 18.5820 +
 18.5821 +	m68ki_write_16(ea, res);
 18.5822 +
 18.5823 +	FLAG_N = NFLAG_16(res);
 18.5824 +	FLAG_Z = res;
 18.5825 +	FLAG_V = VFLAG_CLEAR;
 18.5826 +	FLAG_C = CFLAG_CLEAR;
 18.5827 +}
 18.5828 +
 18.5829 +
 18.5830 +M68KMAKE_OP(move, 16, di, d)
 18.5831 +{
 18.5832 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5833 +	uint ea = EA_AX_DI_16();
 18.5834 +
 18.5835 +	m68ki_write_16(ea, res);
 18.5836 +
 18.5837 +	FLAG_N = NFLAG_16(res);
 18.5838 +	FLAG_Z = res;
 18.5839 +	FLAG_V = VFLAG_CLEAR;
 18.5840 +	FLAG_C = CFLAG_CLEAR;
 18.5841 +}
 18.5842 +
 18.5843 +
 18.5844 +M68KMAKE_OP(move, 16, di, a)
 18.5845 +{
 18.5846 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5847 +	uint ea = EA_AX_DI_16();
 18.5848 +
 18.5849 +	m68ki_write_16(ea, res);
 18.5850 +
 18.5851 +	FLAG_N = NFLAG_16(res);
 18.5852 +	FLAG_Z = res;
 18.5853 +	FLAG_V = VFLAG_CLEAR;
 18.5854 +	FLAG_C = CFLAG_CLEAR;
 18.5855 +}
 18.5856 +
 18.5857 +
 18.5858 +M68KMAKE_OP(move, 16, di, .)
 18.5859 +{
 18.5860 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5861 +	uint ea = EA_AX_DI_16();
 18.5862 +
 18.5863 +	m68ki_write_16(ea, res);
 18.5864 +
 18.5865 +	FLAG_N = NFLAG_16(res);
 18.5866 +	FLAG_Z = res;
 18.5867 +	FLAG_V = VFLAG_CLEAR;
 18.5868 +	FLAG_C = CFLAG_CLEAR;
 18.5869 +}
 18.5870 +
 18.5871 +
 18.5872 +M68KMAKE_OP(move, 16, ix, d)
 18.5873 +{
 18.5874 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5875 +	uint ea = EA_AX_IX_16();
 18.5876 +
 18.5877 +	m68ki_write_16(ea, res);
 18.5878 +
 18.5879 +	FLAG_N = NFLAG_16(res);
 18.5880 +	FLAG_Z = res;
 18.5881 +	FLAG_V = VFLAG_CLEAR;
 18.5882 +	FLAG_C = CFLAG_CLEAR;
 18.5883 +}
 18.5884 +
 18.5885 +
 18.5886 +M68KMAKE_OP(move, 16, ix, a)
 18.5887 +{
 18.5888 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5889 +	uint ea = EA_AX_IX_16();
 18.5890 +
 18.5891 +	m68ki_write_16(ea, res);
 18.5892 +
 18.5893 +	FLAG_N = NFLAG_16(res);
 18.5894 +	FLAG_Z = res;
 18.5895 +	FLAG_V = VFLAG_CLEAR;
 18.5896 +	FLAG_C = CFLAG_CLEAR;
 18.5897 +}
 18.5898 +
 18.5899 +
 18.5900 +M68KMAKE_OP(move, 16, ix, .)
 18.5901 +{
 18.5902 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5903 +	uint ea = EA_AX_IX_16();
 18.5904 +
 18.5905 +	m68ki_write_16(ea, res);
 18.5906 +
 18.5907 +	FLAG_N = NFLAG_16(res);
 18.5908 +	FLAG_Z = res;
 18.5909 +	FLAG_V = VFLAG_CLEAR;
 18.5910 +	FLAG_C = CFLAG_CLEAR;
 18.5911 +}
 18.5912 +
 18.5913 +
 18.5914 +M68KMAKE_OP(move, 16, aw, d)
 18.5915 +{
 18.5916 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5917 +	uint ea = EA_AW_16();
 18.5918 +
 18.5919 +	m68ki_write_16(ea, res);
 18.5920 +
 18.5921 +	FLAG_N = NFLAG_16(res);
 18.5922 +	FLAG_Z = res;
 18.5923 +	FLAG_V = VFLAG_CLEAR;
 18.5924 +	FLAG_C = CFLAG_CLEAR;
 18.5925 +}
 18.5926 +
 18.5927 +
 18.5928 +M68KMAKE_OP(move, 16, aw, a)
 18.5929 +{
 18.5930 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5931 +	uint ea = EA_AW_16();
 18.5932 +
 18.5933 +	m68ki_write_16(ea, res);
 18.5934 +
 18.5935 +	FLAG_N = NFLAG_16(res);
 18.5936 +	FLAG_Z = res;
 18.5937 +	FLAG_V = VFLAG_CLEAR;
 18.5938 +	FLAG_C = CFLAG_CLEAR;
 18.5939 +}
 18.5940 +
 18.5941 +
 18.5942 +M68KMAKE_OP(move, 16, aw, .)
 18.5943 +{
 18.5944 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5945 +	uint ea = EA_AW_16();
 18.5946 +
 18.5947 +	m68ki_write_16(ea, res);
 18.5948 +
 18.5949 +	FLAG_N = NFLAG_16(res);
 18.5950 +	FLAG_Z = res;
 18.5951 +	FLAG_V = VFLAG_CLEAR;
 18.5952 +	FLAG_C = CFLAG_CLEAR;
 18.5953 +}
 18.5954 +
 18.5955 +
 18.5956 +M68KMAKE_OP(move, 16, al, d)
 18.5957 +{
 18.5958 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.5959 +	uint ea = EA_AL_16();
 18.5960 +
 18.5961 +	m68ki_write_16(ea, res);
 18.5962 +
 18.5963 +	FLAG_N = NFLAG_16(res);
 18.5964 +	FLAG_Z = res;
 18.5965 +	FLAG_V = VFLAG_CLEAR;
 18.5966 +	FLAG_C = CFLAG_CLEAR;
 18.5967 +}
 18.5968 +
 18.5969 +
 18.5970 +M68KMAKE_OP(move, 16, al, a)
 18.5971 +{
 18.5972 +	uint res = MASK_OUT_ABOVE_16(AY);
 18.5973 +	uint ea = EA_AL_16();
 18.5974 +
 18.5975 +	m68ki_write_16(ea, res);
 18.5976 +
 18.5977 +	FLAG_N = NFLAG_16(res);
 18.5978 +	FLAG_Z = res;
 18.5979 +	FLAG_V = VFLAG_CLEAR;
 18.5980 +	FLAG_C = CFLAG_CLEAR;
 18.5981 +}
 18.5982 +
 18.5983 +
 18.5984 +M68KMAKE_OP(move, 16, al, .)
 18.5985 +{
 18.5986 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.5987 +	uint ea = EA_AL_16();
 18.5988 +
 18.5989 +	m68ki_write_16(ea, res);
 18.5990 +
 18.5991 +	FLAG_N = NFLAG_16(res);
 18.5992 +	FLAG_Z = res;
 18.5993 +	FLAG_V = VFLAG_CLEAR;
 18.5994 +	FLAG_C = CFLAG_CLEAR;
 18.5995 +}
 18.5996 +
 18.5997 +
 18.5998 +M68KMAKE_OP(move, 32, d, d)
 18.5999 +{
 18.6000 +	uint res = DY;
 18.6001 +	uint* r_dst = &DX;
 18.6002 +
 18.6003 +	*r_dst = res;
 18.6004 +
 18.6005 +	FLAG_N = NFLAG_32(res);
 18.6006 +	FLAG_Z = res;
 18.6007 +	FLAG_V = VFLAG_CLEAR;
 18.6008 +	FLAG_C = CFLAG_CLEAR;
 18.6009 +}
 18.6010 +
 18.6011 +
 18.6012 +M68KMAKE_OP(move, 32, d, a)
 18.6013 +{
 18.6014 +	uint res = AY;
 18.6015 +	uint* r_dst = &DX;
 18.6016 +
 18.6017 +	*r_dst = res;
 18.6018 +
 18.6019 +	FLAG_N = NFLAG_32(res);
 18.6020 +	FLAG_Z = res;
 18.6021 +	FLAG_V = VFLAG_CLEAR;
 18.6022 +	FLAG_C = CFLAG_CLEAR;
 18.6023 +}
 18.6024 +
 18.6025 +
 18.6026 +M68KMAKE_OP(move, 32, d, .)
 18.6027 +{
 18.6028 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6029 +	uint* r_dst = &DX;
 18.6030 +
 18.6031 +	*r_dst = res;
 18.6032 +
 18.6033 +	FLAG_N = NFLAG_32(res);
 18.6034 +	FLAG_Z = res;
 18.6035 +	FLAG_V = VFLAG_CLEAR;
 18.6036 +	FLAG_C = CFLAG_CLEAR;
 18.6037 +}
 18.6038 +
 18.6039 +
 18.6040 +M68KMAKE_OP(move, 32, ai, d)
 18.6041 +{
 18.6042 +	uint res = DY;
 18.6043 +	uint ea = EA_AX_AI_32();
 18.6044 +
 18.6045 +	m68ki_write_32(ea, res);
 18.6046 +
 18.6047 +	FLAG_N = NFLAG_32(res);
 18.6048 +	FLAG_Z = res;
 18.6049 +	FLAG_V = VFLAG_CLEAR;
 18.6050 +	FLAG_C = CFLAG_CLEAR;
 18.6051 +}
 18.6052 +
 18.6053 +
 18.6054 +M68KMAKE_OP(move, 32, ai, a)
 18.6055 +{
 18.6056 +	uint res = AY;
 18.6057 +	uint ea = EA_AX_AI_32();
 18.6058 +
 18.6059 +	m68ki_write_32(ea, res);
 18.6060 +
 18.6061 +	FLAG_N = NFLAG_32(res);
 18.6062 +	FLAG_Z = res;
 18.6063 +	FLAG_V = VFLAG_CLEAR;
 18.6064 +	FLAG_C = CFLAG_CLEAR;
 18.6065 +}
 18.6066 +
 18.6067 +
 18.6068 +M68KMAKE_OP(move, 32, ai, .)
 18.6069 +{
 18.6070 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6071 +	uint ea = EA_AX_AI_32();
 18.6072 +
 18.6073 +	m68ki_write_32(ea, res);
 18.6074 +
 18.6075 +	FLAG_N = NFLAG_32(res);
 18.6076 +	FLAG_Z = res;
 18.6077 +	FLAG_V = VFLAG_CLEAR;
 18.6078 +	FLAG_C = CFLAG_CLEAR;
 18.6079 +}
 18.6080 +
 18.6081 +
 18.6082 +M68KMAKE_OP(move, 32, pi, d)
 18.6083 +{
 18.6084 +	uint res = DY;
 18.6085 +	uint ea = EA_AX_PI_32();
 18.6086 +
 18.6087 +	m68ki_write_32(ea, res);
 18.6088 +
 18.6089 +	FLAG_N = NFLAG_32(res);
 18.6090 +	FLAG_Z = res;
 18.6091 +	FLAG_V = VFLAG_CLEAR;
 18.6092 +	FLAG_C = CFLAG_CLEAR;
 18.6093 +}
 18.6094 +
 18.6095 +
 18.6096 +M68KMAKE_OP(move, 32, pi, a)
 18.6097 +{
 18.6098 +	uint res = AY;
 18.6099 +	uint ea = EA_AX_PI_32();
 18.6100 +
 18.6101 +	m68ki_write_32(ea, res);
 18.6102 +
 18.6103 +	FLAG_N = NFLAG_32(res);
 18.6104 +	FLAG_Z = res;
 18.6105 +	FLAG_V = VFLAG_CLEAR;
 18.6106 +	FLAG_C = CFLAG_CLEAR;
 18.6107 +}
 18.6108 +
 18.6109 +
 18.6110 +M68KMAKE_OP(move, 32, pi, .)
 18.6111 +{
 18.6112 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6113 +	uint ea = EA_AX_PI_32();
 18.6114 +
 18.6115 +	m68ki_write_32(ea, res);
 18.6116 +
 18.6117 +	FLAG_N = NFLAG_32(res);
 18.6118 +	FLAG_Z = res;
 18.6119 +	FLAG_V = VFLAG_CLEAR;
 18.6120 +	FLAG_C = CFLAG_CLEAR;
 18.6121 +}
 18.6122 +
 18.6123 +
 18.6124 +M68KMAKE_OP(move, 32, pd, d)
 18.6125 +{
 18.6126 +	uint res = DY;
 18.6127 +	uint ea = EA_AX_PD_32();
 18.6128 +
 18.6129 +	m68ki_write_32(ea, res);
 18.6130 +
 18.6131 +	FLAG_N = NFLAG_32(res);
 18.6132 +	FLAG_Z = res;
 18.6133 +	FLAG_V = VFLAG_CLEAR;
 18.6134 +	FLAG_C = CFLAG_CLEAR;
 18.6135 +}
 18.6136 +
 18.6137 +
 18.6138 +M68KMAKE_OP(move, 32, pd, a)
 18.6139 +{
 18.6140 +	uint res = AY;
 18.6141 +	uint ea = EA_AX_PD_32();
 18.6142 +
 18.6143 +	m68ki_write_32(ea, res);
 18.6144 +
 18.6145 +	FLAG_N = NFLAG_32(res);
 18.6146 +	FLAG_Z = res;
 18.6147 +	FLAG_V = VFLAG_CLEAR;
 18.6148 +	FLAG_C = CFLAG_CLEAR;
 18.6149 +}
 18.6150 +
 18.6151 +
 18.6152 +M68KMAKE_OP(move, 32, pd, .)
 18.6153 +{
 18.6154 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6155 +	uint ea = EA_AX_PD_32();
 18.6156 +
 18.6157 +	m68ki_write_32(ea, res);
 18.6158 +
 18.6159 +	FLAG_N = NFLAG_32(res);
 18.6160 +	FLAG_Z = res;
 18.6161 +	FLAG_V = VFLAG_CLEAR;
 18.6162 +	FLAG_C = CFLAG_CLEAR;
 18.6163 +}
 18.6164 +
 18.6165 +
 18.6166 +M68KMAKE_OP(move, 32, di, d)
 18.6167 +{
 18.6168 +	uint res = DY;
 18.6169 +	uint ea = EA_AX_DI_32();
 18.6170 +
 18.6171 +	m68ki_write_32(ea, res);
 18.6172 +
 18.6173 +	FLAG_N = NFLAG_32(res);
 18.6174 +	FLAG_Z = res;
 18.6175 +	FLAG_V = VFLAG_CLEAR;
 18.6176 +	FLAG_C = CFLAG_CLEAR;
 18.6177 +}
 18.6178 +
 18.6179 +
 18.6180 +M68KMAKE_OP(move, 32, di, a)
 18.6181 +{
 18.6182 +	uint res = AY;
 18.6183 +	uint ea = EA_AX_DI_32();
 18.6184 +
 18.6185 +	m68ki_write_32(ea, res);
 18.6186 +
 18.6187 +	FLAG_N = NFLAG_32(res);
 18.6188 +	FLAG_Z = res;
 18.6189 +	FLAG_V = VFLAG_CLEAR;
 18.6190 +	FLAG_C = CFLAG_CLEAR;
 18.6191 +}
 18.6192 +
 18.6193 +
 18.6194 +M68KMAKE_OP(move, 32, di, .)
 18.6195 +{
 18.6196 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6197 +	uint ea = EA_AX_DI_32();
 18.6198 +
 18.6199 +	m68ki_write_32(ea, res);
 18.6200 +
 18.6201 +	FLAG_N = NFLAG_32(res);
 18.6202 +	FLAG_Z = res;
 18.6203 +	FLAG_V = VFLAG_CLEAR;
 18.6204 +	FLAG_C = CFLAG_CLEAR;
 18.6205 +}
 18.6206 +
 18.6207 +
 18.6208 +M68KMAKE_OP(move, 32, ix, d)
 18.6209 +{
 18.6210 +	uint res = DY;
 18.6211 +	uint ea = EA_AX_IX_32();
 18.6212 +
 18.6213 +	m68ki_write_32(ea, res);
 18.6214 +
 18.6215 +	FLAG_N = NFLAG_32(res);
 18.6216 +	FLAG_Z = res;
 18.6217 +	FLAG_V = VFLAG_CLEAR;
 18.6218 +	FLAG_C = CFLAG_CLEAR;
 18.6219 +}
 18.6220 +
 18.6221 +
 18.6222 +M68KMAKE_OP(move, 32, ix, a)
 18.6223 +{
 18.6224 +	uint res = AY;
 18.6225 +	uint ea = EA_AX_IX_32();
 18.6226 +
 18.6227 +	m68ki_write_32(ea, res);
 18.6228 +
 18.6229 +	FLAG_N = NFLAG_32(res);
 18.6230 +	FLAG_Z = res;
 18.6231 +	FLAG_V = VFLAG_CLEAR;
 18.6232 +	FLAG_C = CFLAG_CLEAR;
 18.6233 +}
 18.6234 +
 18.6235 +
 18.6236 +M68KMAKE_OP(move, 32, ix, .)
 18.6237 +{
 18.6238 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6239 +	uint ea = EA_AX_IX_32();
 18.6240 +
 18.6241 +	m68ki_write_32(ea, res);
 18.6242 +
 18.6243 +	FLAG_N = NFLAG_32(res);
 18.6244 +	FLAG_Z = res;
 18.6245 +	FLAG_V = VFLAG_CLEAR;
 18.6246 +	FLAG_C = CFLAG_CLEAR;
 18.6247 +}
 18.6248 +
 18.6249 +
 18.6250 +M68KMAKE_OP(move, 32, aw, d)
 18.6251 +{
 18.6252 +	uint res = DY;
 18.6253 +	uint ea = EA_AW_32();
 18.6254 +
 18.6255 +	m68ki_write_32(ea, res);
 18.6256 +
 18.6257 +	FLAG_N = NFLAG_32(res);
 18.6258 +	FLAG_Z = res;
 18.6259 +	FLAG_V = VFLAG_CLEAR;
 18.6260 +	FLAG_C = CFLAG_CLEAR;
 18.6261 +}
 18.6262 +
 18.6263 +
 18.6264 +M68KMAKE_OP(move, 32, aw, a)
 18.6265 +{
 18.6266 +	uint res = AY;
 18.6267 +	uint ea = EA_AW_32();
 18.6268 +
 18.6269 +	m68ki_write_32(ea, res);
 18.6270 +
 18.6271 +	FLAG_N = NFLAG_32(res);
 18.6272 +	FLAG_Z = res;
 18.6273 +	FLAG_V = VFLAG_CLEAR;
 18.6274 +	FLAG_C = CFLAG_CLEAR;
 18.6275 +}
 18.6276 +
 18.6277 +
 18.6278 +M68KMAKE_OP(move, 32, aw, .)
 18.6279 +{
 18.6280 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6281 +	uint ea = EA_AW_32();
 18.6282 +
 18.6283 +	m68ki_write_32(ea, res);
 18.6284 +
 18.6285 +	FLAG_N = NFLAG_32(res);
 18.6286 +	FLAG_Z = res;
 18.6287 +	FLAG_V = VFLAG_CLEAR;
 18.6288 +	FLAG_C = CFLAG_CLEAR;
 18.6289 +}
 18.6290 +
 18.6291 +
 18.6292 +M68KMAKE_OP(move, 32, al, d)
 18.6293 +{
 18.6294 +	uint res = DY;
 18.6295 +	uint ea = EA_AL_32();
 18.6296 +
 18.6297 +	m68ki_write_32(ea, res);
 18.6298 +
 18.6299 +	FLAG_N = NFLAG_32(res);
 18.6300 +	FLAG_Z = res;
 18.6301 +	FLAG_V = VFLAG_CLEAR;
 18.6302 +	FLAG_C = CFLAG_CLEAR;
 18.6303 +}
 18.6304 +
 18.6305 +
 18.6306 +M68KMAKE_OP(move, 32, al, a)
 18.6307 +{
 18.6308 +	uint res = AY;
 18.6309 +	uint ea = EA_AL_32();
 18.6310 +
 18.6311 +	m68ki_write_32(ea, res);
 18.6312 +
 18.6313 +	FLAG_N = NFLAG_32(res);
 18.6314 +	FLAG_Z = res;
 18.6315 +	FLAG_V = VFLAG_CLEAR;
 18.6316 +	FLAG_C = CFLAG_CLEAR;
 18.6317 +}
 18.6318 +
 18.6319 +
 18.6320 +M68KMAKE_OP(move, 32, al, .)
 18.6321 +{
 18.6322 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.6323 +	uint ea = EA_AL_32();
 18.6324 +
 18.6325 +	m68ki_write_32(ea, res);
 18.6326 +
 18.6327 +	FLAG_N = NFLAG_32(res);
 18.6328 +	FLAG_Z = res;
 18.6329 +	FLAG_V = VFLAG_CLEAR;
 18.6330 +	FLAG_C = CFLAG_CLEAR;
 18.6331 +}
 18.6332 +
 18.6333 +
 18.6334 +M68KMAKE_OP(movea, 16, ., d)
 18.6335 +{
 18.6336 +	AX = MAKE_INT_16(DY);
 18.6337 +}
 18.6338 +
 18.6339 +
 18.6340 +M68KMAKE_OP(movea, 16, ., a)
 18.6341 +{
 18.6342 +	AX = MAKE_INT_16(AY);
 18.6343 +}
 18.6344 +
 18.6345 +
 18.6346 +M68KMAKE_OP(movea, 16, ., .)
 18.6347 +{
 18.6348 +	AX = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
 18.6349 +}
 18.6350 +
 18.6351 +
 18.6352 +M68KMAKE_OP(movea, 32, ., d)
 18.6353 +{
 18.6354 +	AX = DY;
 18.6355 +}
 18.6356 +
 18.6357 +
 18.6358 +M68KMAKE_OP(movea, 32, ., a)
 18.6359 +{
 18.6360 +	AX = AY;
 18.6361 +}
 18.6362 +
 18.6363 +
 18.6364 +M68KMAKE_OP(movea, 32, ., .)
 18.6365 +{
 18.6366 +	AX = M68KMAKE_GET_OPER_AY_32;
 18.6367 +}
 18.6368 +
 18.6369 +
 18.6370 +M68KMAKE_OP(move, 16, frc, d)
 18.6371 +{
 18.6372 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6373 +	{
 18.6374 +		DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();
 18.6375 +		return;
 18.6376 +	}
 18.6377 +	m68ki_exception_illegal();
 18.6378 +}
 18.6379 +
 18.6380 +
 18.6381 +M68KMAKE_OP(move, 16, frc, .)
 18.6382 +{
 18.6383 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6384 +	{
 18.6385 +		m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr());
 18.6386 +		return;
 18.6387 +	}
 18.6388 +	m68ki_exception_illegal();
 18.6389 +}
 18.6390 +
 18.6391 +
 18.6392 +M68KMAKE_OP(move, 16, toc, d)
 18.6393 +{
 18.6394 +	m68ki_set_ccr(DY);
 18.6395 +}
 18.6396 +
 18.6397 +
 18.6398 +M68KMAKE_OP(move, 16, toc, .)
 18.6399 +{
 18.6400 +	m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16);
 18.6401 +}
 18.6402 +
 18.6403 +
 18.6404 +M68KMAKE_OP(move, 16, frs, d)
 18.6405 +{
 18.6406 +	if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S)	/* NS990408 */
 18.6407 +	{
 18.6408 +		DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();
 18.6409 +		return;
 18.6410 +	}
 18.6411 +	m68ki_exception_privilege_violation();
 18.6412 +}
 18.6413 +
 18.6414 +
 18.6415 +M68KMAKE_OP(move, 16, frs, .)
 18.6416 +{
 18.6417 +	if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S)	/* NS990408 */
 18.6418 +	{
 18.6419 +		uint ea = M68KMAKE_GET_EA_AY_16;
 18.6420 +		m68ki_write_16(ea, m68ki_get_sr());
 18.6421 +		return;
 18.6422 +	}
 18.6423 +	m68ki_exception_privilege_violation();
 18.6424 +}
 18.6425 +
 18.6426 +
 18.6427 +M68KMAKE_OP(move, 16, tos, d)
 18.6428 +{
 18.6429 +	if(FLAG_S)
 18.6430 +	{
 18.6431 +		m68ki_set_sr(DY);
 18.6432 +		return;
 18.6433 +	}
 18.6434 +	m68ki_exception_privilege_violation();
 18.6435 +}
 18.6436 +
 18.6437 +
 18.6438 +M68KMAKE_OP(move, 16, tos, .)
 18.6439 +{
 18.6440 +	if(FLAG_S)
 18.6441 +	{
 18.6442 +		uint new_sr = M68KMAKE_GET_OPER_AY_16;
 18.6443 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.6444 +		m68ki_set_sr(new_sr);
 18.6445 +		return;
 18.6446 +	}
 18.6447 +	m68ki_exception_privilege_violation();
 18.6448 +}
 18.6449 +
 18.6450 +
 18.6451 +M68KMAKE_OP(move, 32, fru, .)
 18.6452 +{
 18.6453 +	if(FLAG_S)
 18.6454 +	{
 18.6455 +		AY = REG_USP;
 18.6456 +		return;
 18.6457 +	}
 18.6458 +	m68ki_exception_privilege_violation();
 18.6459 +}
 18.6460 +
 18.6461 +
 18.6462 +M68KMAKE_OP(move, 32, tou, .)
 18.6463 +{
 18.6464 +	if(FLAG_S)
 18.6465 +	{
 18.6466 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.6467 +		REG_USP = AY;
 18.6468 +		return;
 18.6469 +	}
 18.6470 +	m68ki_exception_privilege_violation();
 18.6471 +}
 18.6472 +
 18.6473 +
 18.6474 +M68KMAKE_OP(movec, 32, cr, .)
 18.6475 +{
 18.6476 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6477 +	{
 18.6478 +		if(FLAG_S)
 18.6479 +		{
 18.6480 +			uint word2 = OPER_I_16();
 18.6481 +
 18.6482 +			m68ki_trace_t0();		   /* auto-disable (see m68kcpu.h) */
 18.6483 +			switch (word2 & 0xfff)
 18.6484 +			{
 18.6485 +			case 0x000:			   /* SFC */
 18.6486 +				REG_DA[(word2 >> 12) & 15] = REG_SFC;
 18.6487 +				return;
 18.6488 +			case 0x001:			   /* DFC */
 18.6489 +				REG_DA[(word2 >> 12) & 15] = REG_DFC;
 18.6490 +				return;
 18.6491 +			case 0x002:			   /* CACR */
 18.6492 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6493 +				{
 18.6494 +					REG_DA[(word2 >> 12) & 15] = REG_CACR;
 18.6495 +					return;
 18.6496 +				}
 18.6497 +				return;
 18.6498 +			case 0x800:			   /* USP */
 18.6499 +				REG_DA[(word2 >> 12) & 15] = REG_USP;
 18.6500 +				return;
 18.6501 +			case 0x801:			   /* VBR */
 18.6502 +				REG_DA[(word2 >> 12) & 15] = REG_VBR;
 18.6503 +				return;
 18.6504 +			case 0x802:			   /* CAAR */
 18.6505 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6506 +				{
 18.6507 +					REG_DA[(word2 >> 12) & 15] = REG_CAAR;
 18.6508 +					return;
 18.6509 +				}
 18.6510 +				m68ki_exception_illegal();
 18.6511 +				break;
 18.6512 +			case 0x803:			   /* MSP */
 18.6513 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6514 +				{
 18.6515 +					REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;
 18.6516 +					return;
 18.6517 +				}
 18.6518 +				m68ki_exception_illegal();
 18.6519 +				return;
 18.6520 +			case 0x804:			   /* ISP */
 18.6521 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6522 +				{
 18.6523 +					REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;
 18.6524 +					return;
 18.6525 +				}
 18.6526 +				m68ki_exception_illegal();
 18.6527 +				return;
 18.6528 +			default:
 18.6529 +				m68ki_exception_illegal();
 18.6530 +				return;
 18.6531 +			}
 18.6532 +		}
 18.6533 +		m68ki_exception_privilege_violation();
 18.6534 +		return;
 18.6535 +	}
 18.6536 +	m68ki_exception_illegal();
 18.6537 +}
 18.6538 +
 18.6539 +
 18.6540 +M68KMAKE_OP(movec, 32, rc, .)
 18.6541 +{
 18.6542 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6543 +	{
 18.6544 +		if(FLAG_S)
 18.6545 +		{
 18.6546 +			uint word2 = OPER_I_16();
 18.6547 +
 18.6548 +			m68ki_trace_t0();		   /* auto-disable (see m68kcpu.h) */
 18.6549 +			switch (word2 & 0xfff)
 18.6550 +			{
 18.6551 +			case 0x000:			   /* SFC */
 18.6552 +				REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;
 18.6553 +				return;
 18.6554 +			case 0x001:			   /* DFC */
 18.6555 +				REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;
 18.6556 +				return;
 18.6557 +			case 0x002:			   /* CACR */
 18.6558 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6559 +				{
 18.6560 +					REG_CACR = REG_DA[(word2 >> 12) & 15];
 18.6561 +					return;
 18.6562 +				}
 18.6563 +				m68ki_exception_illegal();
 18.6564 +				return;
 18.6565 +			case 0x800:			   /* USP */
 18.6566 +				REG_USP = REG_DA[(word2 >> 12) & 15];
 18.6567 +				return;
 18.6568 +			case 0x801:			   /* VBR */
 18.6569 +				REG_VBR = REG_DA[(word2 >> 12) & 15];
 18.6570 +				return;
 18.6571 +			case 0x802:			   /* CAAR */
 18.6572 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6573 +				{
 18.6574 +					REG_CAAR = REG_DA[(word2 >> 12) & 15];
 18.6575 +					return;
 18.6576 +				}
 18.6577 +				m68ki_exception_illegal();
 18.6578 +				return;
 18.6579 +			case 0x803:			   /* MSP */
 18.6580 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6581 +				{
 18.6582 +					/* we are in supervisor mode so just check for M flag */
 18.6583 +					if(!FLAG_M)
 18.6584 +					{
 18.6585 +						REG_MSP = REG_DA[(word2 >> 12) & 15];
 18.6586 +						return;
 18.6587 +					}
 18.6588 +					REG_SP = REG_DA[(word2 >> 12) & 15];
 18.6589 +					return;
 18.6590 +				}
 18.6591 +				m68ki_exception_illegal();
 18.6592 +				return;
 18.6593 +			case 0x804:			   /* ISP */
 18.6594 +				if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6595 +				{
 18.6596 +					if(!FLAG_M)
 18.6597 +					{
 18.6598 +						REG_SP = REG_DA[(word2 >> 12) & 15];
 18.6599 +						return;
 18.6600 +					}
 18.6601 +					REG_ISP = REG_DA[(word2 >> 12) & 15];
 18.6602 +					return;
 18.6603 +				}
 18.6604 +				m68ki_exception_illegal();
 18.6605 +				return;
 18.6606 +			default:
 18.6607 +				m68ki_exception_illegal();
 18.6608 +				return;
 18.6609 +			}
 18.6610 +		}
 18.6611 +		m68ki_exception_privilege_violation();
 18.6612 +		return;
 18.6613 +	}
 18.6614 +	m68ki_exception_illegal();
 18.6615 +}
 18.6616 +
 18.6617 +
 18.6618 +M68KMAKE_OP(movem, 16, re, pd)
 18.6619 +{
 18.6620 +	uint i = 0;
 18.6621 +	uint register_list = OPER_I_16();
 18.6622 +	uint ea = AY;
 18.6623 +	uint count = 0;
 18.6624 +
 18.6625 +	for(; i < 16; i++)
 18.6626 +		if(register_list & (1 << i))
 18.6627 +		{
 18.6628 +			ea -= 2;
 18.6629 +			m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));
 18.6630 +			count++;
 18.6631 +		}
 18.6632 +	AY = ea;
 18.6633 +
 18.6634 +	USE_CYCLES(count<<CYC_MOVEM_W);
 18.6635 +}
 18.6636 +
 18.6637 +
 18.6638 +M68KMAKE_OP(movem, 16, re, .)
 18.6639 +{
 18.6640 +	uint i = 0;
 18.6641 +	uint register_list = OPER_I_16();
 18.6642 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.6643 +	uint count = 0;
 18.6644 +
 18.6645 +	for(; i < 16; i++)
 18.6646 +		if(register_list & (1 << i))
 18.6647 +		{
 18.6648 +			m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));
 18.6649 +			ea += 2;
 18.6650 +			count++;
 18.6651 +		}
 18.6652 +
 18.6653 +	USE_CYCLES(count<<CYC_MOVEM_W);
 18.6654 +}
 18.6655 +
 18.6656 +
 18.6657 +M68KMAKE_OP(movem, 32, re, pd)
 18.6658 +{
 18.6659 +	uint i = 0;
 18.6660 +	uint register_list = OPER_I_16();
 18.6661 +	uint ea = AY;
 18.6662 +	uint count = 0;
 18.6663 +
 18.6664 +	for(; i < 16; i++)
 18.6665 +		if(register_list & (1 << i))
 18.6666 +		{
 18.6667 +			ea -= 4;
 18.6668 +			m68ki_write_32(ea, REG_DA[15-i]);
 18.6669 +			count++;
 18.6670 +		}
 18.6671 +	AY = ea;
 18.6672 +
 18.6673 +	USE_CYCLES(count<<CYC_MOVEM_L);
 18.6674 +}
 18.6675 +
 18.6676 +
 18.6677 +M68KMAKE_OP(movem, 32, re, .)
 18.6678 +{
 18.6679 +	uint i = 0;
 18.6680 +	uint register_list = OPER_I_16();
 18.6681 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.6682 +	uint count = 0;
 18.6683 +
 18.6684 +	for(; i < 16; i++)
 18.6685 +		if(register_list & (1 << i))
 18.6686 +		{
 18.6687 +			m68ki_write_32(ea, REG_DA[i]);
 18.6688 +			ea += 4;
 18.6689 +			count++;
 18.6690 +		}
 18.6691 +
 18.6692 +	USE_CYCLES(count<<CYC_MOVEM_L);
 18.6693 +}
 18.6694 +
 18.6695 +
 18.6696 +M68KMAKE_OP(movem, 16, er, pi)
 18.6697 +{
 18.6698 +	uint i = 0;
 18.6699 +	uint register_list = OPER_I_16();
 18.6700 +	uint ea = AY;
 18.6701 +	uint count = 0;
 18.6702 +
 18.6703 +	for(; i < 16; i++)
 18.6704 +		if(register_list & (1 << i))
 18.6705 +		{
 18.6706 +			REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
 18.6707 +			ea += 2;
 18.6708 +			count++;
 18.6709 +		}
 18.6710 +	AY = ea;
 18.6711 +
 18.6712 +	USE_CYCLES(count<<CYC_MOVEM_W);
 18.6713 +}
 18.6714 +
 18.6715 +
 18.6716 +M68KMAKE_OP(movem, 16, er, .)
 18.6717 +{
 18.6718 +	uint i = 0;
 18.6719 +	uint register_list = OPER_I_16();
 18.6720 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.6721 +	uint count = 0;
 18.6722 +
 18.6723 +	for(; i < 16; i++)
 18.6724 +		if(register_list & (1 << i))
 18.6725 +		{
 18.6726 +			REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
 18.6727 +			ea += 2;
 18.6728 +			count++;
 18.6729 +		}
 18.6730 +
 18.6731 +	USE_CYCLES(count<<CYC_MOVEM_W);
 18.6732 +}
 18.6733 +
 18.6734 +
 18.6735 +M68KMAKE_OP(movem, 32, er, pi)
 18.6736 +{
 18.6737 +	uint i = 0;
 18.6738 +	uint register_list = OPER_I_16();
 18.6739 +	uint ea = AY;
 18.6740 +	uint count = 0;
 18.6741 +
 18.6742 +	for(; i < 16; i++)
 18.6743 +		if(register_list & (1 << i))
 18.6744 +		{
 18.6745 +			REG_DA[i] = m68ki_read_32(ea);
 18.6746 +			ea += 4;
 18.6747 +			count++;
 18.6748 +		}
 18.6749 +	AY = ea;
 18.6750 +
 18.6751 +	USE_CYCLES(count<<CYC_MOVEM_L);
 18.6752 +}
 18.6753 +
 18.6754 +
 18.6755 +M68KMAKE_OP(movem, 32, er, .)
 18.6756 +{
 18.6757 +	uint i = 0;
 18.6758 +	uint register_list = OPER_I_16();
 18.6759 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.6760 +	uint count = 0;
 18.6761 +
 18.6762 +	for(; i < 16; i++)
 18.6763 +		if(register_list & (1 << i))
 18.6764 +		{
 18.6765 +			REG_DA[i] = m68ki_read_32(ea);
 18.6766 +			ea += 4;
 18.6767 +			count++;
 18.6768 +		}
 18.6769 +
 18.6770 +	USE_CYCLES(count<<CYC_MOVEM_L);
 18.6771 +}
 18.6772 +
 18.6773 +
 18.6774 +M68KMAKE_OP(movep, 16, re, .)
 18.6775 +{
 18.6776 +	uint ea = EA_AY_DI_16();
 18.6777 +	uint src = DX;
 18.6778 +
 18.6779 +	m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8));
 18.6780 +	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
 18.6781 +}
 18.6782 +
 18.6783 +
 18.6784 +M68KMAKE_OP(movep, 32, re, .)
 18.6785 +{
 18.6786 +	uint ea = EA_AY_DI_32();
 18.6787 +	uint src = DX;
 18.6788 +
 18.6789 +	m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));
 18.6790 +	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));
 18.6791 +	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));
 18.6792 +	m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
 18.6793 +}
 18.6794 +
 18.6795 +
 18.6796 +M68KMAKE_OP(movep, 16, er, .)
 18.6797 +{
 18.6798 +	uint ea = EA_AY_DI_16();
 18.6799 +	uint* r_dst = &DX;
 18.6800 +
 18.6801 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));
 18.6802 +}
 18.6803 +
 18.6804 +
 18.6805 +M68KMAKE_OP(movep, 32, er, .)
 18.6806 +{
 18.6807 +	uint ea = EA_AY_DI_32();
 18.6808 +
 18.6809 +	DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)
 18.6810 +		+ (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);
 18.6811 +}
 18.6812 +
 18.6813 +
 18.6814 +M68KMAKE_OP(moves, 8, ., .)
 18.6815 +{
 18.6816 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6817 +	{
 18.6818 +		if(FLAG_S)
 18.6819 +		{
 18.6820 +			uint word2 = OPER_I_16();
 18.6821 +			uint ea = M68KMAKE_GET_EA_AY_8;
 18.6822 +
 18.6823 +			m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.6824 +			if(BIT_B(word2))		   /* Register to memory */
 18.6825 +			{
 18.6826 +				m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
 18.6827 +				return;
 18.6828 +			}
 18.6829 +			if(BIT_F(word2))		   /* Memory to address register */
 18.6830 +			{
 18.6831 +				REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
 18.6832 +				if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6833 +					USE_CYCLES(2);
 18.6834 +				return;
 18.6835 +			}
 18.6836 +			/* Memory to data register */
 18.6837 +			REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
 18.6838 +			if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6839 +				USE_CYCLES(2);
 18.6840 +			return;
 18.6841 +		}
 18.6842 +		m68ki_exception_privilege_violation();
 18.6843 +		return;
 18.6844 +	}
 18.6845 +	m68ki_exception_illegal();
 18.6846 +}
 18.6847 +
 18.6848 +
 18.6849 +M68KMAKE_OP(moves, 16, ., .)
 18.6850 +{
 18.6851 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6852 +	{
 18.6853 +		if(FLAG_S)
 18.6854 +		{
 18.6855 +			uint word2 = OPER_I_16();
 18.6856 +			uint ea = M68KMAKE_GET_EA_AY_16;
 18.6857 +
 18.6858 +			m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.6859 +			if(BIT_B(word2))		   /* Register to memory */
 18.6860 +			{
 18.6861 +				m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
 18.6862 +				return;
 18.6863 +			}
 18.6864 +			if(BIT_F(word2))		   /* Memory to address register */
 18.6865 +			{
 18.6866 +				REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
 18.6867 +				if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6868 +					USE_CYCLES(2);
 18.6869 +				return;
 18.6870 +			}
 18.6871 +			/* Memory to data register */
 18.6872 +			REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
 18.6873 +			if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6874 +				USE_CYCLES(2);
 18.6875 +			return;
 18.6876 +		}
 18.6877 +		m68ki_exception_privilege_violation();
 18.6878 +		return;
 18.6879 +	}
 18.6880 +	m68ki_exception_illegal();
 18.6881 +}
 18.6882 +
 18.6883 +
 18.6884 +M68KMAKE_OP(moves, 32, ., .)
 18.6885 +{
 18.6886 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.6887 +	{
 18.6888 +		if(FLAG_S)
 18.6889 +		{
 18.6890 +			uint word2 = OPER_I_16();
 18.6891 +			uint ea = M68KMAKE_GET_EA_AY_32;
 18.6892 +
 18.6893 +			m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.6894 +			if(BIT_B(word2))		   /* Register to memory */
 18.6895 +			{
 18.6896 +				m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
 18.6897 +				if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6898 +					USE_CYCLES(2);
 18.6899 +				return;
 18.6900 +			}
 18.6901 +			/* Memory to register */
 18.6902 +			REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
 18.6903 +			if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.6904 +				USE_CYCLES(2);
 18.6905 +			return;
 18.6906 +		}
 18.6907 +		m68ki_exception_privilege_violation();
 18.6908 +		return;
 18.6909 +	}
 18.6910 +	m68ki_exception_illegal();
 18.6911 +}
 18.6912 +
 18.6913 +
 18.6914 +M68KMAKE_OP(moveq, 32, ., .)
 18.6915 +{
 18.6916 +	uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));
 18.6917 +
 18.6918 +	FLAG_N = NFLAG_32(res);
 18.6919 +	FLAG_Z = res;
 18.6920 +	FLAG_V = VFLAG_CLEAR;
 18.6921 +	FLAG_C = CFLAG_CLEAR;
 18.6922 +}
 18.6923 +
 18.6924 +
 18.6925 +M68KMAKE_OP(muls, 16, ., d)
 18.6926 +{
 18.6927 +	uint* r_dst = &DX;
 18.6928 +	uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
 18.6929 +
 18.6930 +	*r_dst = res;
 18.6931 +
 18.6932 +	FLAG_Z = res;
 18.6933 +	FLAG_N = NFLAG_32(res);
 18.6934 +	FLAG_V = VFLAG_CLEAR;
 18.6935 +	FLAG_C = CFLAG_CLEAR;
 18.6936 +}
 18.6937 +
 18.6938 +
 18.6939 +M68KMAKE_OP(muls, 16, ., .)
 18.6940 +{
 18.6941 +	uint* r_dst = &DX;
 18.6942 +	uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
 18.6943 +
 18.6944 +	*r_dst = res;
 18.6945 +
 18.6946 +	FLAG_Z = res;
 18.6947 +	FLAG_N = NFLAG_32(res);
 18.6948 +	FLAG_V = VFLAG_CLEAR;
 18.6949 +	FLAG_C = CFLAG_CLEAR;
 18.6950 +}
 18.6951 +
 18.6952 +
 18.6953 +M68KMAKE_OP(mulu, 16, ., d)
 18.6954 +{
 18.6955 +	uint* r_dst = &DX;
 18.6956 +	uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);
 18.6957 +
 18.6958 +	*r_dst = res;
 18.6959 +
 18.6960 +	FLAG_Z = res;
 18.6961 +	FLAG_N = NFLAG_32(res);
 18.6962 +	FLAG_V = VFLAG_CLEAR;
 18.6963 +	FLAG_C = CFLAG_CLEAR;
 18.6964 +}
 18.6965 +
 18.6966 +
 18.6967 +M68KMAKE_OP(mulu, 16, ., .)
 18.6968 +{
 18.6969 +	uint* r_dst = &DX;
 18.6970 +	uint res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
 18.6971 +
 18.6972 +	*r_dst = res;
 18.6973 +
 18.6974 +	FLAG_Z = res;
 18.6975 +	FLAG_N = NFLAG_32(res);
 18.6976 +	FLAG_V = VFLAG_CLEAR;
 18.6977 +	FLAG_C = CFLAG_CLEAR;
 18.6978 +}
 18.6979 +
 18.6980 +
 18.6981 +M68KMAKE_OP(mull, 32, ., d)
 18.6982 +{
 18.6983 +#if M68K_USE_64_BIT
 18.6984 +
 18.6985 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.6986 +	{
 18.6987 +		uint word2 = OPER_I_16();
 18.6988 +		uint64 src = DY;
 18.6989 +		uint64 dst = REG_D[(word2 >> 12) & 7];
 18.6990 +		uint64 res;
 18.6991 +
 18.6992 +		FLAG_C = CFLAG_CLEAR;
 18.6993 +
 18.6994 +		if(BIT_B(word2))			   /* signed */
 18.6995 +		{
 18.6996 +			res = (sint64)((sint32)src) * (sint64)((sint32)dst);
 18.6997 +			if(!BIT_A(word2))
 18.6998 +			{
 18.6999 +				FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7000 +				FLAG_N = NFLAG_32(res);
 18.7001 +				FLAG_V = ((sint64)res != (sint32)res)<<7;
 18.7002 +				REG_D[(word2 >> 12) & 7] = FLAG_Z;
 18.7003 +				return;
 18.7004 +			}
 18.7005 +			FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
 18.7006 +			FLAG_N = NFLAG_64(res);
 18.7007 +			FLAG_V = VFLAG_CLEAR;
 18.7008 +			REG_D[word2 & 7] = (res >> 32);
 18.7009 +			REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
 18.7010 +			return;
 18.7011 +		}
 18.7012 +
 18.7013 +		res = src * dst;
 18.7014 +		if(!BIT_A(word2))
 18.7015 +		{
 18.7016 +			FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7017 +			FLAG_N = NFLAG_32(res);
 18.7018 +			FLAG_V = (res > 0xffffffff)<<7;
 18.7019 +			REG_D[(word2 >> 12) & 7] = FLAG_Z;
 18.7020 +			return;
 18.7021 +		}
 18.7022 +		FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
 18.7023 +		FLAG_N = NFLAG_64(res);
 18.7024 +		FLAG_V = VFLAG_CLEAR;
 18.7025 +		REG_D[word2 & 7] = (res >> 32);
 18.7026 +		REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
 18.7027 +		return;
 18.7028 +	}
 18.7029 +	m68ki_exception_illegal();
 18.7030 +
 18.7031 +#else
 18.7032 +
 18.7033 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7034 +	{
 18.7035 +		uint word2 = OPER_I_16();
 18.7036 +		uint src = DY;
 18.7037 +		uint dst = REG_D[(word2 >> 12) & 7];
 18.7038 +		uint neg = GET_MSB_32(src ^ dst);
 18.7039 +		uint src1;
 18.7040 +		uint src2;
 18.7041 +		uint dst1;
 18.7042 +		uint dst2;
 18.7043 +		uint r1;
 18.7044 +		uint r2;
 18.7045 +		uint r3;
 18.7046 +		uint r4;
 18.7047 +		uint lo;
 18.7048 +		uint hi;
 18.7049 +
 18.7050 +		FLAG_C = CFLAG_CLEAR;
 18.7051 +
 18.7052 +		if(BIT_B(word2))			   /* signed */
 18.7053 +		{
 18.7054 +			if(GET_MSB_32(src))
 18.7055 +				src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
 18.7056 +			if(GET_MSB_32(dst))
 18.7057 +				dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
 18.7058 +		}
 18.7059 +
 18.7060 +		src1 = MASK_OUT_ABOVE_16(src);
 18.7061 +		src2 = src>>16;
 18.7062 +		dst1 = MASK_OUT_ABOVE_16(dst);
 18.7063 +		dst2 = dst>>16;
 18.7064 +
 18.7065 +
 18.7066 +		r1 = src1 * dst1;
 18.7067 +		r2 = src1 * dst2;
 18.7068 +		r3 = src2 * dst1;
 18.7069 +		r4 = src2 * dst2;
 18.7070 +
 18.7071 +		lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
 18.7072 +		hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
 18.7073 +
 18.7074 +		if(BIT_B(word2) && neg)
 18.7075 +		{
 18.7076 +			hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
 18.7077 +			lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
 18.7078 +		}
 18.7079 +
 18.7080 +		if(BIT_A(word2))
 18.7081 +		{
 18.7082 +			REG_D[word2 & 7] = hi;
 18.7083 +			REG_D[(word2 >> 12) & 7] = lo;
 18.7084 +			FLAG_N = NFLAG_32(hi);
 18.7085 +			FLAG_Z = hi | lo;
 18.7086 +			FLAG_V = VFLAG_CLEAR;
 18.7087 +			return;
 18.7088 +		}
 18.7089 +
 18.7090 +		REG_D[(word2 >> 12) & 7] = lo;
 18.7091 +		FLAG_N = NFLAG_32(lo);
 18.7092 +		FLAG_Z = lo;
 18.7093 +		if(BIT_B(word2))
 18.7094 +			FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
 18.7095 +		else
 18.7096 +			FLAG_V = (hi != 0) << 7;
 18.7097 +		return;
 18.7098 +	}
 18.7099 +	m68ki_exception_illegal();
 18.7100 +
 18.7101 +#endif
 18.7102 +}
 18.7103 +
 18.7104 +
 18.7105 +M68KMAKE_OP(mull, 32, ., .)
 18.7106 +{
 18.7107 +#if M68K_USE_64_BIT
 18.7108 +
 18.7109 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7110 +	{
 18.7111 +		uint word2 = OPER_I_16();
 18.7112 +		uint64 src = M68KMAKE_GET_OPER_AY_32;
 18.7113 +		uint64 dst = REG_D[(word2 >> 12) & 7];
 18.7114 +		uint64 res;
 18.7115 +
 18.7116 +		FLAG_C = CFLAG_CLEAR;
 18.7117 +
 18.7118 +		if(BIT_B(word2))			   /* signed */
 18.7119 +		{
 18.7120 +			res = (sint64)((sint32)src) * (sint64)((sint32)dst);
 18.7121 +			if(!BIT_A(word2))
 18.7122 +			{
 18.7123 +				FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7124 +				FLAG_N = NFLAG_32(res);
 18.7125 +				FLAG_V = ((sint64)res != (sint32)res)<<7;
 18.7126 +				REG_D[(word2 >> 12) & 7] = FLAG_Z;
 18.7127 +				return;
 18.7128 +			}
 18.7129 +			FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
 18.7130 +			FLAG_N = NFLAG_64(res);
 18.7131 +			FLAG_V = VFLAG_CLEAR;
 18.7132 +			REG_D[word2 & 7] = (res >> 32);
 18.7133 +			REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
 18.7134 +			return;
 18.7135 +		}
 18.7136 +
 18.7137 +		res = src * dst;
 18.7138 +		if(!BIT_A(word2))
 18.7139 +		{
 18.7140 +			FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7141 +			FLAG_N = NFLAG_32(res);
 18.7142 +			FLAG_V = (res > 0xffffffff)<<7;
 18.7143 +			REG_D[(word2 >> 12) & 7] = FLAG_Z;
 18.7144 +			return;
 18.7145 +		}
 18.7146 +		FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
 18.7147 +		FLAG_N = NFLAG_64(res);
 18.7148 +		FLAG_V = VFLAG_CLEAR;
 18.7149 +		REG_D[word2 & 7] = (res >> 32);
 18.7150 +		REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
 18.7151 +		return;
 18.7152 +	}
 18.7153 +	m68ki_exception_illegal();
 18.7154 +
 18.7155 +#else
 18.7156 +
 18.7157 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7158 +	{
 18.7159 +		uint word2 = OPER_I_16();
 18.7160 +		uint src = M68KMAKE_GET_OPER_AY_32;
 18.7161 +		uint dst = REG_D[(word2 >> 12) & 7];
 18.7162 +		uint neg = GET_MSB_32(src ^ dst);
 18.7163 +		uint src1;
 18.7164 +		uint src2;
 18.7165 +		uint dst1;
 18.7166 +		uint dst2;
 18.7167 +		uint r1;
 18.7168 +		uint r2;
 18.7169 +		uint r3;
 18.7170 +		uint r4;
 18.7171 +		uint lo;
 18.7172 +		uint hi;
 18.7173 +
 18.7174 +		FLAG_C = CFLAG_CLEAR;
 18.7175 +
 18.7176 +		if(BIT_B(word2))			   /* signed */
 18.7177 +		{
 18.7178 +			if(GET_MSB_32(src))
 18.7179 +				src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
 18.7180 +			if(GET_MSB_32(dst))
 18.7181 +				dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
 18.7182 +		}
 18.7183 +
 18.7184 +		src1 = MASK_OUT_ABOVE_16(src);
 18.7185 +		src2 = src>>16;
 18.7186 +		dst1 = MASK_OUT_ABOVE_16(dst);
 18.7187 +		dst2 = dst>>16;
 18.7188 +
 18.7189 +
 18.7190 +		r1 = src1 * dst1;
 18.7191 +		r2 = src1 * dst2;
 18.7192 +		r3 = src2 * dst1;
 18.7193 +		r4 = src2 * dst2;
 18.7194 +
 18.7195 +		lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
 18.7196 +		hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
 18.7197 +
 18.7198 +		if(BIT_B(word2) && neg)
 18.7199 +		{
 18.7200 +			hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
 18.7201 +			lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
 18.7202 +		}
 18.7203 +
 18.7204 +		if(BIT_A(word2))
 18.7205 +		{
 18.7206 +			REG_D[word2 & 7] = hi;
 18.7207 +			REG_D[(word2 >> 12) & 7] = lo;
 18.7208 +			FLAG_N = NFLAG_32(hi);
 18.7209 +			FLAG_Z = hi | lo;
 18.7210 +			FLAG_V = VFLAG_CLEAR;
 18.7211 +			return;
 18.7212 +		}
 18.7213 +
 18.7214 +		REG_D[(word2 >> 12) & 7] = lo;
 18.7215 +		FLAG_N = NFLAG_32(lo);
 18.7216 +		FLAG_Z = lo;
 18.7217 +		if(BIT_B(word2))
 18.7218 +			FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
 18.7219 +		else
 18.7220 +			FLAG_V = (hi != 0) << 7;
 18.7221 +		return;
 18.7222 +	}
 18.7223 +	m68ki_exception_illegal();
 18.7224 +
 18.7225 +#endif
 18.7226 +}
 18.7227 +
 18.7228 +
 18.7229 +M68KMAKE_OP(nbcd, 8, ., d)
 18.7230 +{
 18.7231 +	uint* r_dst = &DY;
 18.7232 +	uint dst = *r_dst;
 18.7233 +	uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
 18.7234 +
 18.7235 +	if(res != 0x9a)
 18.7236 +	{
 18.7237 +		if((res & 0x0f) == 0xa)
 18.7238 +			res = (res & 0xf0) + 0x10;
 18.7239 +
 18.7240 +		res = MASK_OUT_ABOVE_8(res);
 18.7241 +
 18.7242 +		*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.7243 +
 18.7244 +		FLAG_Z |= res;
 18.7245 +		FLAG_C = CFLAG_SET;
 18.7246 +		FLAG_X = XFLAG_SET;
 18.7247 +	}
 18.7248 +	else
 18.7249 +	{
 18.7250 +		FLAG_C = CFLAG_CLEAR;
 18.7251 +		FLAG_X = XFLAG_CLEAR;
 18.7252 +	}
 18.7253 +	FLAG_N = NFLAG_8(res);	/* officially undefined */
 18.7254 +}
 18.7255 +
 18.7256 +
 18.7257 +M68KMAKE_OP(nbcd, 8, ., .)
 18.7258 +{
 18.7259 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7260 +	uint dst = m68ki_read_8(ea);
 18.7261 +	uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
 18.7262 +
 18.7263 +	if(res != 0x9a)
 18.7264 +	{
 18.7265 +		if((res & 0x0f) == 0xa)
 18.7266 +			res = (res & 0xf0) + 0x10;
 18.7267 +
 18.7268 +		res = MASK_OUT_ABOVE_8(res);
 18.7269 +
 18.7270 +		m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
 18.7271 +
 18.7272 +		FLAG_Z |= res;
 18.7273 +		FLAG_C = CFLAG_SET;
 18.7274 +		FLAG_X = XFLAG_SET;
 18.7275 +	}
 18.7276 +	else
 18.7277 +	{
 18.7278 +		FLAG_C = CFLAG_CLEAR;
 18.7279 +		FLAG_X = XFLAG_CLEAR;
 18.7280 +	}
 18.7281 +	FLAG_N = NFLAG_8(res);	/* officially undefined */
 18.7282 +}
 18.7283 +
 18.7284 +
 18.7285 +M68KMAKE_OP(neg, 8, ., d)
 18.7286 +{
 18.7287 +	uint* r_dst = &DY;
 18.7288 +	uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);
 18.7289 +
 18.7290 +	FLAG_N = NFLAG_8(res);
 18.7291 +	FLAG_C = FLAG_X = CFLAG_8(res);
 18.7292 +	FLAG_V = *r_dst & res;
 18.7293 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.7294 +
 18.7295 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.7296 +}
 18.7297 +
 18.7298 +
 18.7299 +M68KMAKE_OP(neg, 8, ., .)
 18.7300 +{
 18.7301 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7302 +	uint src = m68ki_read_8(ea);
 18.7303 +	uint res = 0 - src;
 18.7304 +
 18.7305 +	FLAG_N = NFLAG_8(res);
 18.7306 +	FLAG_C = FLAG_X = CFLAG_8(res);
 18.7307 +	FLAG_V = src & res;
 18.7308 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.7309 +
 18.7310 +	m68ki_write_8(ea, FLAG_Z);
 18.7311 +}
 18.7312 +
 18.7313 +
 18.7314 +M68KMAKE_OP(neg, 16, ., d)
 18.7315 +{
 18.7316 +	uint* r_dst = &DY;
 18.7317 +	uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);
 18.7318 +
 18.7319 +	FLAG_N = NFLAG_16(res);
 18.7320 +	FLAG_C = FLAG_X = CFLAG_16(res);
 18.7321 +	FLAG_V = (*r_dst & res)>>8;
 18.7322 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.7323 +
 18.7324 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.7325 +}
 18.7326 +
 18.7327 +
 18.7328 +M68KMAKE_OP(neg, 16, ., .)
 18.7329 +{
 18.7330 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.7331 +	uint src = m68ki_read_16(ea);
 18.7332 +	uint res = 0 - src;
 18.7333 +
 18.7334 +	FLAG_N = NFLAG_16(res);
 18.7335 +	FLAG_C = FLAG_X = CFLAG_16(res);
 18.7336 +	FLAG_V = (src & res)>>8;
 18.7337 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.7338 +
 18.7339 +	m68ki_write_16(ea, FLAG_Z);
 18.7340 +}
 18.7341 +
 18.7342 +
 18.7343 +M68KMAKE_OP(neg, 32, ., d)
 18.7344 +{
 18.7345 +	uint* r_dst = &DY;
 18.7346 +	uint res = 0 - *r_dst;
 18.7347 +
 18.7348 +	FLAG_N = NFLAG_32(res);
 18.7349 +	FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);
 18.7350 +	FLAG_V = (*r_dst & res)>>24;
 18.7351 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7352 +
 18.7353 +	*r_dst = FLAG_Z;
 18.7354 +}
 18.7355 +
 18.7356 +
 18.7357 +M68KMAKE_OP(neg, 32, ., .)
 18.7358 +{
 18.7359 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.7360 +	uint src = m68ki_read_32(ea);
 18.7361 +	uint res = 0 - src;
 18.7362 +
 18.7363 +	FLAG_N = NFLAG_32(res);
 18.7364 +	FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
 18.7365 +	FLAG_V = (src & res)>>24;
 18.7366 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.7367 +
 18.7368 +	m68ki_write_32(ea, FLAG_Z);
 18.7369 +}
 18.7370 +
 18.7371 +
 18.7372 +M68KMAKE_OP(negx, 8, ., d)
 18.7373 +{
 18.7374 +	uint* r_dst = &DY;
 18.7375 +	uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();
 18.7376 +
 18.7377 +	FLAG_N = NFLAG_8(res);
 18.7378 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.7379 +	FLAG_V = *r_dst & res;
 18.7380 +
 18.7381 +	res = MASK_OUT_ABOVE_8(res);
 18.7382 +	FLAG_Z |= res;
 18.7383 +
 18.7384 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.7385 +}
 18.7386 +
 18.7387 +
 18.7388 +M68KMAKE_OP(negx, 8, ., .)
 18.7389 +{
 18.7390 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7391 +	uint src = m68ki_read_8(ea);
 18.7392 +	uint res = 0 - src - XFLAG_AS_1();
 18.7393 +
 18.7394 +	FLAG_N = NFLAG_8(res);
 18.7395 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.7396 +	FLAG_V = src & res;
 18.7397 +
 18.7398 +	res = MASK_OUT_ABOVE_8(res);
 18.7399 +	FLAG_Z |= res;
 18.7400 +
 18.7401 +	m68ki_write_8(ea, res);
 18.7402 +}
 18.7403 +
 18.7404 +
 18.7405 +M68KMAKE_OP(negx, 16, ., d)
 18.7406 +{
 18.7407 +	uint* r_dst = &DY;
 18.7408 +	uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();
 18.7409 +
 18.7410 +	FLAG_N = NFLAG_16(res);
 18.7411 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.7412 +	FLAG_V = (*r_dst & res)>>8;
 18.7413 +
 18.7414 +	res = MASK_OUT_ABOVE_16(res);
 18.7415 +	FLAG_Z |= res;
 18.7416 +
 18.7417 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.7418 +}
 18.7419 +
 18.7420 +
 18.7421 +M68KMAKE_OP(negx, 16, ., .)
 18.7422 +{
 18.7423 +	uint ea  = M68KMAKE_GET_EA_AY_16;
 18.7424 +	uint src = m68ki_read_16(ea);
 18.7425 +	uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
 18.7426 +
 18.7427 +	FLAG_N = NFLAG_16(res);
 18.7428 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.7429 +	FLAG_V = (src & res)>>8;
 18.7430 +
 18.7431 +	res = MASK_OUT_ABOVE_16(res);
 18.7432 +	FLAG_Z |= res;
 18.7433 +
 18.7434 +	m68ki_write_16(ea, res);
 18.7435 +}
 18.7436 +
 18.7437 +
 18.7438 +M68KMAKE_OP(negx, 32, ., d)
 18.7439 +{
 18.7440 +	uint* r_dst = &DY;
 18.7441 +	uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();
 18.7442 +
 18.7443 +	FLAG_N = NFLAG_32(res);
 18.7444 +	FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);
 18.7445 +	FLAG_V = (*r_dst & res)>>24;
 18.7446 +
 18.7447 +	res = MASK_OUT_ABOVE_32(res);
 18.7448 +	FLAG_Z |= res;
 18.7449 +
 18.7450 +	*r_dst = res;
 18.7451 +}
 18.7452 +
 18.7453 +
 18.7454 +M68KMAKE_OP(negx, 32, ., .)
 18.7455 +{
 18.7456 +	uint ea  = M68KMAKE_GET_EA_AY_32;
 18.7457 +	uint src = m68ki_read_32(ea);
 18.7458 +	uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
 18.7459 +
 18.7460 +	FLAG_N = NFLAG_32(res);
 18.7461 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
 18.7462 +	FLAG_V = (src & res)>>24;
 18.7463 +
 18.7464 +	res = MASK_OUT_ABOVE_32(res);
 18.7465 +	FLAG_Z |= res;
 18.7466 +
 18.7467 +	m68ki_write_32(ea, res);
 18.7468 +}
 18.7469 +
 18.7470 +
 18.7471 +M68KMAKE_OP(nop, 0, ., .)
 18.7472 +{
 18.7473 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.7474 +}
 18.7475 +
 18.7476 +
 18.7477 +M68KMAKE_OP(not, 8, ., d)
 18.7478 +{
 18.7479 +	uint* r_dst = &DY;
 18.7480 +	uint res = MASK_OUT_ABOVE_8(~*r_dst);
 18.7481 +
 18.7482 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.7483 +
 18.7484 +	FLAG_N = NFLAG_8(res);
 18.7485 +	FLAG_Z = res;
 18.7486 +	FLAG_C = CFLAG_CLEAR;
 18.7487 +	FLAG_V = VFLAG_CLEAR;
 18.7488 +}
 18.7489 +
 18.7490 +
 18.7491 +M68KMAKE_OP(not, 8, ., .)
 18.7492 +{
 18.7493 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7494 +	uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
 18.7495 +
 18.7496 +	m68ki_write_8(ea, res);
 18.7497 +
 18.7498 +	FLAG_N = NFLAG_8(res);
 18.7499 +	FLAG_Z = res;
 18.7500 +	FLAG_C = CFLAG_CLEAR;
 18.7501 +	FLAG_V = VFLAG_CLEAR;
 18.7502 +}
 18.7503 +
 18.7504 +
 18.7505 +M68KMAKE_OP(not, 16, ., d)
 18.7506 +{
 18.7507 +	uint* r_dst = &DY;
 18.7508 +	uint res = MASK_OUT_ABOVE_16(~*r_dst);
 18.7509 +
 18.7510 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.7511 +
 18.7512 +	FLAG_N = NFLAG_16(res);
 18.7513 +	FLAG_Z = res;
 18.7514 +	FLAG_C = CFLAG_CLEAR;
 18.7515 +	FLAG_V = VFLAG_CLEAR;
 18.7516 +}
 18.7517 +
 18.7518 +
 18.7519 +M68KMAKE_OP(not, 16, ., .)
 18.7520 +{
 18.7521 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.7522 +	uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
 18.7523 +
 18.7524 +	m68ki_write_16(ea, res);
 18.7525 +
 18.7526 +	FLAG_N = NFLAG_16(res);
 18.7527 +	FLAG_Z = res;
 18.7528 +	FLAG_C = CFLAG_CLEAR;
 18.7529 +	FLAG_V = VFLAG_CLEAR;
 18.7530 +}
 18.7531 +
 18.7532 +
 18.7533 +M68KMAKE_OP(not, 32, ., d)
 18.7534 +{
 18.7535 +	uint* r_dst = &DY;
 18.7536 +	uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
 18.7537 +
 18.7538 +	FLAG_N = NFLAG_32(res);
 18.7539 +	FLAG_Z = res;
 18.7540 +	FLAG_C = CFLAG_CLEAR;
 18.7541 +	FLAG_V = VFLAG_CLEAR;
 18.7542 +}
 18.7543 +
 18.7544 +
 18.7545 +M68KMAKE_OP(not, 32, ., .)
 18.7546 +{
 18.7547 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.7548 +	uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
 18.7549 +
 18.7550 +	m68ki_write_32(ea, res);
 18.7551 +
 18.7552 +	FLAG_N = NFLAG_32(res);
 18.7553 +	FLAG_Z = res;
 18.7554 +	FLAG_C = CFLAG_CLEAR;
 18.7555 +	FLAG_V = VFLAG_CLEAR;
 18.7556 +}
 18.7557 +
 18.7558 +
 18.7559 +M68KMAKE_OP(or, 8, er, d)
 18.7560 +{
 18.7561 +	uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));
 18.7562 +
 18.7563 +	FLAG_N = NFLAG_8(res);
 18.7564 +	FLAG_Z = res;
 18.7565 +	FLAG_C = CFLAG_CLEAR;
 18.7566 +	FLAG_V = VFLAG_CLEAR;
 18.7567 +}
 18.7568 +
 18.7569 +
 18.7570 +M68KMAKE_OP(or, 8, er, .)
 18.7571 +{
 18.7572 +	uint res = MASK_OUT_ABOVE_8((DX |= M68KMAKE_GET_OPER_AY_8));
 18.7573 +
 18.7574 +	FLAG_N = NFLAG_8(res);
 18.7575 +	FLAG_Z = res;
 18.7576 +	FLAG_C = CFLAG_CLEAR;
 18.7577 +	FLAG_V = VFLAG_CLEAR;
 18.7578 +}
 18.7579 +
 18.7580 +
 18.7581 +M68KMAKE_OP(or, 16, er, d)
 18.7582 +{
 18.7583 +	uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));
 18.7584 +
 18.7585 +	FLAG_N = NFLAG_16(res);
 18.7586 +	FLAG_Z = res;
 18.7587 +	FLAG_C = CFLAG_CLEAR;
 18.7588 +	FLAG_V = VFLAG_CLEAR;
 18.7589 +}
 18.7590 +
 18.7591 +
 18.7592 +M68KMAKE_OP(or, 16, er, .)
 18.7593 +{
 18.7594 +	uint res = MASK_OUT_ABOVE_16((DX |= M68KMAKE_GET_OPER_AY_16));
 18.7595 +
 18.7596 +	FLAG_N = NFLAG_16(res);
 18.7597 +	FLAG_Z = res;
 18.7598 +	FLAG_C = CFLAG_CLEAR;
 18.7599 +	FLAG_V = VFLAG_CLEAR;
 18.7600 +}
 18.7601 +
 18.7602 +
 18.7603 +M68KMAKE_OP(or, 32, er, d)
 18.7604 +{
 18.7605 +	uint res = DX |= DY;
 18.7606 +
 18.7607 +	FLAG_N = NFLAG_32(res);
 18.7608 +	FLAG_Z = res;
 18.7609 +	FLAG_C = CFLAG_CLEAR;
 18.7610 +	FLAG_V = VFLAG_CLEAR;
 18.7611 +}
 18.7612 +
 18.7613 +
 18.7614 +M68KMAKE_OP(or, 32, er, .)
 18.7615 +{
 18.7616 +	uint res = DX |= M68KMAKE_GET_OPER_AY_32;
 18.7617 +
 18.7618 +	FLAG_N = NFLAG_32(res);
 18.7619 +	FLAG_Z = res;
 18.7620 +	FLAG_C = CFLAG_CLEAR;
 18.7621 +	FLAG_V = VFLAG_CLEAR;
 18.7622 +}
 18.7623 +
 18.7624 +
 18.7625 +M68KMAKE_OP(or, 8, re, .)
 18.7626 +{
 18.7627 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7628 +	uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
 18.7629 +
 18.7630 +	m68ki_write_8(ea, res);
 18.7631 +
 18.7632 +	FLAG_N = NFLAG_8(res);
 18.7633 +	FLAG_Z = res;
 18.7634 +	FLAG_C = CFLAG_CLEAR;
 18.7635 +	FLAG_V = VFLAG_CLEAR;
 18.7636 +}
 18.7637 +
 18.7638 +
 18.7639 +M68KMAKE_OP(or, 16, re, .)
 18.7640 +{
 18.7641 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.7642 +	uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
 18.7643 +
 18.7644 +	m68ki_write_16(ea, res);
 18.7645 +
 18.7646 +	FLAG_N = NFLAG_16(res);
 18.7647 +	FLAG_Z = res;
 18.7648 +	FLAG_C = CFLAG_CLEAR;
 18.7649 +	FLAG_V = VFLAG_CLEAR;
 18.7650 +}
 18.7651 +
 18.7652 +
 18.7653 +M68KMAKE_OP(or, 32, re, .)
 18.7654 +{
 18.7655 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.7656 +	uint res = DX | m68ki_read_32(ea);
 18.7657 +
 18.7658 +	m68ki_write_32(ea, res);
 18.7659 +
 18.7660 +	FLAG_N = NFLAG_32(res);
 18.7661 +	FLAG_Z = res;
 18.7662 +	FLAG_C = CFLAG_CLEAR;
 18.7663 +	FLAG_V = VFLAG_CLEAR;
 18.7664 +}
 18.7665 +
 18.7666 +
 18.7667 +M68KMAKE_OP(ori, 8, ., d)
 18.7668 +{
 18.7669 +	uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
 18.7670 +
 18.7671 +	FLAG_N = NFLAG_8(res);
 18.7672 +	FLAG_Z = res;
 18.7673 +	FLAG_C = CFLAG_CLEAR;
 18.7674 +	FLAG_V = VFLAG_CLEAR;
 18.7675 +}
 18.7676 +
 18.7677 +
 18.7678 +M68KMAKE_OP(ori, 8, ., .)
 18.7679 +{
 18.7680 +	uint src = OPER_I_8();
 18.7681 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.7682 +	uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
 18.7683 +
 18.7684 +	m68ki_write_8(ea, res);
 18.7685 +
 18.7686 +	FLAG_N = NFLAG_8(res);
 18.7687 +	FLAG_Z = res;
 18.7688 +	FLAG_C = CFLAG_CLEAR;
 18.7689 +	FLAG_V = VFLAG_CLEAR;
 18.7690 +}
 18.7691 +
 18.7692 +
 18.7693 +M68KMAKE_OP(ori, 16, ., d)
 18.7694 +{
 18.7695 +	uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
 18.7696 +
 18.7697 +	FLAG_N = NFLAG_16(res);
 18.7698 +	FLAG_Z = res;
 18.7699 +	FLAG_C = CFLAG_CLEAR;
 18.7700 +	FLAG_V = VFLAG_CLEAR;
 18.7701 +}
 18.7702 +
 18.7703 +
 18.7704 +M68KMAKE_OP(ori, 16, ., .)
 18.7705 +{
 18.7706 +	uint src = OPER_I_16();
 18.7707 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.7708 +	uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
 18.7709 +
 18.7710 +	m68ki_write_16(ea, res);
 18.7711 +
 18.7712 +	FLAG_N = NFLAG_16(res);
 18.7713 +	FLAG_Z = res;
 18.7714 +	FLAG_C = CFLAG_CLEAR;
 18.7715 +	FLAG_V = VFLAG_CLEAR;
 18.7716 +}
 18.7717 +
 18.7718 +
 18.7719 +M68KMAKE_OP(ori, 32, ., d)
 18.7720 +{
 18.7721 +	uint res = DY |= OPER_I_32();
 18.7722 +
 18.7723 +	FLAG_N = NFLAG_32(res);
 18.7724 +	FLAG_Z = res;
 18.7725 +	FLAG_C = CFLAG_CLEAR;
 18.7726 +	FLAG_V = VFLAG_CLEAR;
 18.7727 +}
 18.7728 +
 18.7729 +
 18.7730 +M68KMAKE_OP(ori, 32, ., .)
 18.7731 +{
 18.7732 +	uint src = OPER_I_32();
 18.7733 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.7734 +	uint res = src | m68ki_read_32(ea);
 18.7735 +
 18.7736 +	m68ki_write_32(ea, res);
 18.7737 +
 18.7738 +	FLAG_N = NFLAG_32(res);
 18.7739 +	FLAG_Z = res;
 18.7740 +	FLAG_C = CFLAG_CLEAR;
 18.7741 +	FLAG_V = VFLAG_CLEAR;
 18.7742 +}
 18.7743 +
 18.7744 +
 18.7745 +M68KMAKE_OP(ori, 16, toc, .)
 18.7746 +{
 18.7747 +	m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());
 18.7748 +}
 18.7749 +
 18.7750 +
 18.7751 +M68KMAKE_OP(ori, 16, tos, .)
 18.7752 +{
 18.7753 +	if(FLAG_S)
 18.7754 +	{
 18.7755 +		uint src = OPER_I_16();
 18.7756 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.7757 +		m68ki_set_sr(m68ki_get_sr() | src);
 18.7758 +		return;
 18.7759 +	}
 18.7760 +	m68ki_exception_privilege_violation();
 18.7761 +}
 18.7762 +
 18.7763 +
 18.7764 +M68KMAKE_OP(pack, 16, rr, .)
 18.7765 +{
 18.7766 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7767 +	{
 18.7768 +		/* Note: DX and DY are reversed in Motorola's docs */
 18.7769 +		uint src = DY + OPER_I_16();
 18.7770 +		uint* r_dst = &DX;
 18.7771 +
 18.7772 +		*r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
 18.7773 +		return;
 18.7774 +	}
 18.7775 +	m68ki_exception_illegal();
 18.7776 +}
 18.7777 +
 18.7778 +
 18.7779 +M68KMAKE_OP(pack, 16, mm, ax7)
 18.7780 +{
 18.7781 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7782 +	{
 18.7783 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.7784 +		uint ea_src = EA_AY_PD_8();
 18.7785 +		uint src = m68ki_read_8(ea_src);
 18.7786 +		ea_src = EA_AY_PD_8();
 18.7787 +		src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
 18.7788 +
 18.7789 +		m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
 18.7790 +		return;
 18.7791 +	}
 18.7792 +	m68ki_exception_illegal();
 18.7793 +}
 18.7794 +
 18.7795 +
 18.7796 +M68KMAKE_OP(pack, 16, mm, ay7)
 18.7797 +{
 18.7798 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7799 +	{
 18.7800 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.7801 +		uint ea_src = EA_A7_PD_8();
 18.7802 +		uint src = m68ki_read_8(ea_src);
 18.7803 +		ea_src = EA_A7_PD_8();
 18.7804 +		src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
 18.7805 +
 18.7806 +		m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
 18.7807 +		return;
 18.7808 +	}
 18.7809 +	m68ki_exception_illegal();
 18.7810 +}
 18.7811 +
 18.7812 +
 18.7813 +M68KMAKE_OP(pack, 16, mm, axy7)
 18.7814 +{
 18.7815 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7816 +	{
 18.7817 +		uint ea_src = EA_A7_PD_8();
 18.7818 +		uint src = m68ki_read_8(ea_src);
 18.7819 +		ea_src = EA_A7_PD_8();
 18.7820 +		src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
 18.7821 +
 18.7822 +		m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
 18.7823 +		return;
 18.7824 +	}
 18.7825 +	m68ki_exception_illegal();
 18.7826 +}
 18.7827 +
 18.7828 +
 18.7829 +M68KMAKE_OP(pack, 16, mm, .)
 18.7830 +{
 18.7831 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.7832 +	{
 18.7833 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.7834 +		uint ea_src = EA_AY_PD_8();
 18.7835 +		uint src = m68ki_read_8(ea_src);
 18.7836 +		ea_src = EA_AY_PD_8();
 18.7837 +		src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
 18.7838 +
 18.7839 +		m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
 18.7840 +		return;
 18.7841 +	}
 18.7842 +	m68ki_exception_illegal();
 18.7843 +}
 18.7844 +
 18.7845 +
 18.7846 +M68KMAKE_OP(pea, 32, ., .)
 18.7847 +{
 18.7848 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.7849 +
 18.7850 +	m68ki_push_32(ea);
 18.7851 +}
 18.7852 +
 18.7853 +
 18.7854 +M68KMAKE_OP(reset, 0, ., .)
 18.7855 +{
 18.7856 +	if(FLAG_S)
 18.7857 +	{
 18.7858 +		m68ki_output_reset();		   /* auto-disable (see m68kcpu.h) */
 18.7859 +		USE_CYCLES(CYC_RESET);
 18.7860 +		return;
 18.7861 +	}
 18.7862 +	m68ki_exception_privilege_violation();
 18.7863 +}
 18.7864 +
 18.7865 +
 18.7866 +M68KMAKE_OP(ror, 8, s, .)
 18.7867 +{
 18.7868 +	uint* r_dst = &DY;
 18.7869 +	uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.7870 +	uint shift = orig_shift & 7;
 18.7871 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.7872 +	uint res = ROR_8(src, shift);
 18.7873 +
 18.7874 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.7875 +
 18.7876 +	FLAG_N = NFLAG_8(res);
 18.7877 +	FLAG_Z = res;
 18.7878 +	FLAG_C = src << (9-orig_shift);
 18.7879 +	FLAG_V = VFLAG_CLEAR;
 18.7880 +}
 18.7881 +
 18.7882 +
 18.7883 +M68KMAKE_OP(ror, 16, s, .)
 18.7884 +{
 18.7885 +	uint* r_dst = &DY;
 18.7886 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.7887 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.7888 +	uint res = ROR_16(src, shift);
 18.7889 +
 18.7890 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.7891 +
 18.7892 +	FLAG_N = NFLAG_16(res);
 18.7893 +	FLAG_Z = res;
 18.7894 +	FLAG_C = src << (9-shift);
 18.7895 +	FLAG_V = VFLAG_CLEAR;
 18.7896 +}
 18.7897 +
 18.7898 +
 18.7899 +M68KMAKE_OP(ror, 32, s, .)
 18.7900 +{
 18.7901 +	uint* r_dst = &DY;
 18.7902 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.7903 +	uint64 src = *r_dst;
 18.7904 +	uint res = ROR_32(src, shift);
 18.7905 +
 18.7906 +	*r_dst = res;
 18.7907 +
 18.7908 +	FLAG_N = NFLAG_32(res);
 18.7909 +	FLAG_Z = res;
 18.7910 +	FLAG_C = src << (9-shift);
 18.7911 +	FLAG_V = VFLAG_CLEAR;
 18.7912 +}
 18.7913 +
 18.7914 +
 18.7915 +M68KMAKE_OP(ror, 8, r, .)
 18.7916 +{
 18.7917 +	uint* r_dst = &DY;
 18.7918 +	uint orig_shift = DX & 0x3f;
 18.7919 +	uint shift = orig_shift & 7;
 18.7920 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.7921 +	uint res = ROR_8(src, shift);
 18.7922 +
 18.7923 +	if(orig_shift != 0)
 18.7924 +	{
 18.7925 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.7926 +
 18.7927 +		*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.7928 +		FLAG_C = src << (8-((shift-1)&7));
 18.7929 +		FLAG_N = NFLAG_8(res);
 18.7930 +		FLAG_Z = res;
 18.7931 +		FLAG_V = VFLAG_CLEAR;
 18.7932 +		return;
 18.7933 +	}
 18.7934 +
 18.7935 +	FLAG_C = CFLAG_CLEAR;
 18.7936 +	FLAG_N = NFLAG_8(src);
 18.7937 +	FLAG_Z = src;
 18.7938 +	FLAG_V = VFLAG_CLEAR;
 18.7939 +}
 18.7940 +
 18.7941 +
 18.7942 +M68KMAKE_OP(ror, 16, r, .)
 18.7943 +{
 18.7944 +	uint* r_dst = &DY;
 18.7945 +	uint orig_shift = DX & 0x3f;
 18.7946 +	uint shift = orig_shift & 15;
 18.7947 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.7948 +	uint res = ROR_16(src, shift);
 18.7949 +
 18.7950 +	if(orig_shift != 0)
 18.7951 +	{
 18.7952 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.7953 +
 18.7954 +		*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.7955 +		FLAG_C = (src >> ((shift - 1) & 15)) << 8;
 18.7956 +		FLAG_N = NFLAG_16(res);
 18.7957 +		FLAG_Z = res;
 18.7958 +		FLAG_V = VFLAG_CLEAR;
 18.7959 +		return;
 18.7960 +	}
 18.7961 +
 18.7962 +	FLAG_C = CFLAG_CLEAR;
 18.7963 +	FLAG_N = NFLAG_16(src);
 18.7964 +	FLAG_Z = src;
 18.7965 +	FLAG_V = VFLAG_CLEAR;
 18.7966 +}
 18.7967 +
 18.7968 +
 18.7969 +M68KMAKE_OP(ror, 32, r, .)
 18.7970 +{
 18.7971 +	uint* r_dst = &DY;
 18.7972 +	uint orig_shift = DX & 0x3f;
 18.7973 +	uint shift = orig_shift & 31;
 18.7974 +	uint64 src = *r_dst;
 18.7975 +	uint res = ROR_32(src, shift);
 18.7976 +
 18.7977 +	if(orig_shift != 0)
 18.7978 +	{
 18.7979 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.7980 +
 18.7981 +		*r_dst = res;
 18.7982 +		FLAG_C = (src >> ((shift - 1) & 31)) << 8;
 18.7983 +		FLAG_N = NFLAG_32(res);
 18.7984 +		FLAG_Z = res;
 18.7985 +		FLAG_V = VFLAG_CLEAR;
 18.7986 +		return;
 18.7987 +	}
 18.7988 +
 18.7989 +	FLAG_C = CFLAG_CLEAR;
 18.7990 +	FLAG_N = NFLAG_32(src);
 18.7991 +	FLAG_Z = src;
 18.7992 +	FLAG_V = VFLAG_CLEAR;
 18.7993 +}
 18.7994 +
 18.7995 +
 18.7996 +M68KMAKE_OP(ror, 16, ., .)
 18.7997 +{
 18.7998 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.7999 +	uint src = m68ki_read_16(ea);
 18.8000 +	uint res = ROR_16(src, 1);
 18.8001 +
 18.8002 +	m68ki_write_16(ea, res);
 18.8003 +
 18.8004 +	FLAG_N = NFLAG_16(res);
 18.8005 +	FLAG_Z = res;
 18.8006 +	FLAG_C = src << 8;
 18.8007 +	FLAG_V = VFLAG_CLEAR;
 18.8008 +}
 18.8009 +
 18.8010 +
 18.8011 +M68KMAKE_OP(rol, 8, s, .)
 18.8012 +{
 18.8013 +	uint* r_dst = &DY;
 18.8014 +	uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8015 +	uint shift = orig_shift & 7;
 18.8016 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.8017 +	uint res = ROL_8(src, shift);
 18.8018 +
 18.8019 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8020 +
 18.8021 +	FLAG_N = NFLAG_8(res);
 18.8022 +	FLAG_Z = res;
 18.8023 +	FLAG_C = src << orig_shift;
 18.8024 +	FLAG_V = VFLAG_CLEAR;
 18.8025 +}
 18.8026 +
 18.8027 +
 18.8028 +M68KMAKE_OP(rol, 16, s, .)
 18.8029 +{
 18.8030 +	uint* r_dst = &DY;
 18.8031 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8032 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.8033 +	uint res = ROL_16(src, shift);
 18.8034 +
 18.8035 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8036 +
 18.8037 +	FLAG_N = NFLAG_16(res);
 18.8038 +	FLAG_Z = res;
 18.8039 +	FLAG_C = src >> (8-shift);
 18.8040 +	FLAG_V = VFLAG_CLEAR;
 18.8041 +}
 18.8042 +
 18.8043 +
 18.8044 +M68KMAKE_OP(rol, 32, s, .)
 18.8045 +{
 18.8046 +	uint* r_dst = &DY;
 18.8047 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8048 +	uint64 src = *r_dst;
 18.8049 +	uint res = ROL_32(src, shift);
 18.8050 +
 18.8051 +	*r_dst = res;
 18.8052 +
 18.8053 +	FLAG_N = NFLAG_32(res);
 18.8054 +	FLAG_Z = res;
 18.8055 +	FLAG_C = src >> (24-shift);
 18.8056 +	FLAG_V = VFLAG_CLEAR;
 18.8057 +}
 18.8058 +
 18.8059 +
 18.8060 +M68KMAKE_OP(rol, 8, r, .)
 18.8061 +{
 18.8062 +	uint* r_dst = &DY;
 18.8063 +	uint orig_shift = DX & 0x3f;
 18.8064 +	uint shift = orig_shift & 7;
 18.8065 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.8066 +	uint res = ROL_8(src, shift);
 18.8067 +
 18.8068 +	if(orig_shift != 0)
 18.8069 +	{
 18.8070 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8071 +
 18.8072 +		if(shift != 0)
 18.8073 +		{
 18.8074 +			*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8075 +			FLAG_C = src << shift;
 18.8076 +			FLAG_N = NFLAG_8(res);
 18.8077 +			FLAG_Z = res;
 18.8078 +			FLAG_V = VFLAG_CLEAR;
 18.8079 +			return;
 18.8080 +		}
 18.8081 +		FLAG_C = (src & 1)<<8;
 18.8082 +		FLAG_N = NFLAG_8(src);
 18.8083 +		FLAG_Z = src;
 18.8084 +		FLAG_V = VFLAG_CLEAR;
 18.8085 +		return;
 18.8086 +	}
 18.8087 +
 18.8088 +	FLAG_C = CFLAG_CLEAR;
 18.8089 +	FLAG_N = NFLAG_8(src);
 18.8090 +	FLAG_Z = src;
 18.8091 +	FLAG_V = VFLAG_CLEAR;
 18.8092 +}
 18.8093 +
 18.8094 +
 18.8095 +M68KMAKE_OP(rol, 16, r, .)
 18.8096 +{
 18.8097 +	uint* r_dst = &DY;
 18.8098 +	uint orig_shift = DX & 0x3f;
 18.8099 +	uint shift = orig_shift & 15;
 18.8100 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.8101 +	uint res = MASK_OUT_ABOVE_16(ROL_16(src, shift));
 18.8102 +
 18.8103 +	if(orig_shift != 0)
 18.8104 +	{
 18.8105 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8106 +
 18.8107 +		if(shift != 0)
 18.8108 +		{
 18.8109 +			*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8110 +			FLAG_C = (src << shift) >> 8;
 18.8111 +			FLAG_N = NFLAG_16(res);
 18.8112 +			FLAG_Z = res;
 18.8113 +			FLAG_V = VFLAG_CLEAR;
 18.8114 +			return;
 18.8115 +		}
 18.8116 +		FLAG_C = (src & 1)<<8;
 18.8117 +		FLAG_N = NFLAG_16(src);
 18.8118 +		FLAG_Z = src;
 18.8119 +		FLAG_V = VFLAG_CLEAR;
 18.8120 +		return;
 18.8121 +	}
 18.8122 +
 18.8123 +	FLAG_C = CFLAG_CLEAR;
 18.8124 +	FLAG_N = NFLAG_16(src);
 18.8125 +	FLAG_Z = src;
 18.8126 +	FLAG_V = VFLAG_CLEAR;
 18.8127 +}
 18.8128 +
 18.8129 +
 18.8130 +M68KMAKE_OP(rol, 32, r, .)
 18.8131 +{
 18.8132 +	uint* r_dst = &DY;
 18.8133 +	uint orig_shift = DX & 0x3f;
 18.8134 +	uint shift = orig_shift & 31;
 18.8135 +	uint64 src = *r_dst;
 18.8136 +	uint res = ROL_32(src, shift);
 18.8137 +
 18.8138 +	if(orig_shift != 0)
 18.8139 +	{
 18.8140 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8141 +
 18.8142 +		*r_dst = res;
 18.8143 +
 18.8144 +		FLAG_C = (src >> (32 - shift)) << 8;
 18.8145 +		FLAG_N = NFLAG_32(res);
 18.8146 +		FLAG_Z = res;
 18.8147 +		FLAG_V = VFLAG_CLEAR;
 18.8148 +		return;
 18.8149 +	}
 18.8150 +
 18.8151 +	FLAG_C = CFLAG_CLEAR;
 18.8152 +	FLAG_N = NFLAG_32(src);
 18.8153 +	FLAG_Z = src;
 18.8154 +	FLAG_V = VFLAG_CLEAR;
 18.8155 +}
 18.8156 +
 18.8157 +
 18.8158 +M68KMAKE_OP(rol, 16, ., .)
 18.8159 +{
 18.8160 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.8161 +	uint src = m68ki_read_16(ea);
 18.8162 +	uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
 18.8163 +
 18.8164 +	m68ki_write_16(ea, res);
 18.8165 +
 18.8166 +	FLAG_N = NFLAG_16(res);
 18.8167 +	FLAG_Z = res;
 18.8168 +	FLAG_C = src >> 7;
 18.8169 +	FLAG_V = VFLAG_CLEAR;
 18.8170 +}
 18.8171 +
 18.8172 +
 18.8173 +M68KMAKE_OP(roxr, 8, s, .)
 18.8174 +{
 18.8175 +	uint* r_dst = &DY;
 18.8176 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8177 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.8178 +	uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
 18.8179 +
 18.8180 +	FLAG_C = FLAG_X = res;
 18.8181 +	res = MASK_OUT_ABOVE_8(res);
 18.8182 +
 18.8183 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8184 +
 18.8185 +	FLAG_N = NFLAG_8(res);
 18.8186 +	FLAG_Z = res;
 18.8187 +	FLAG_V = VFLAG_CLEAR;
 18.8188 +}
 18.8189 +
 18.8190 +
 18.8191 +M68KMAKE_OP(roxr, 16, s, .)
 18.8192 +{
 18.8193 +	uint* r_dst = &DY;
 18.8194 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8195 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.8196 +	uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
 18.8197 +
 18.8198 +	FLAG_C = FLAG_X = res >> 8;
 18.8199 +	res = MASK_OUT_ABOVE_16(res);
 18.8200 +
 18.8201 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8202 +
 18.8203 +	FLAG_N = NFLAG_16(res);
 18.8204 +	FLAG_Z = res;
 18.8205 +	FLAG_V = VFLAG_CLEAR;
 18.8206 +}
 18.8207 +
 18.8208 +
 18.8209 +M68KMAKE_OP(roxr, 32, s, .)
 18.8210 +{
 18.8211 +#if M68K_USE_64_BIT
 18.8212 +
 18.8213 +	uint*  r_dst = &DY;
 18.8214 +	uint   shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8215 +	uint64 src   = *r_dst;
 18.8216 +	uint64 res   = src | (((uint64)XFLAG_AS_1()) << 32);
 18.8217 +
 18.8218 +	res = ROR_33_64(res, shift);
 18.8219 +
 18.8220 +	FLAG_C = FLAG_X = res >> 24;
 18.8221 +	res = MASK_OUT_ABOVE_32(res);
 18.8222 +
 18.8223 +	*r_dst =  res;
 18.8224 +
 18.8225 +	FLAG_N = NFLAG_32(res);
 18.8226 +	FLAG_Z = res;
 18.8227 +	FLAG_V = VFLAG_CLEAR;
 18.8228 +
 18.8229 +#else
 18.8230 +
 18.8231 +	uint* r_dst = &DY;
 18.8232 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8233 +	uint src = *r_dst;
 18.8234 +	uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
 18.8235 +	uint new_x_flag = src & (1 << (shift - 1));
 18.8236 +
 18.8237 +	*r_dst = res;
 18.8238 +
 18.8239 +	FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
 18.8240 +	FLAG_N = NFLAG_32(res);
 18.8241 +	FLAG_Z = res;
 18.8242 +	FLAG_V = VFLAG_CLEAR;
 18.8243 +
 18.8244 +#endif
 18.8245 +}
 18.8246 +
 18.8247 +
 18.8248 +M68KMAKE_OP(roxr, 8, r, .)
 18.8249 +{
 18.8250 +	uint* r_dst = &DY;
 18.8251 +	uint orig_shift = DX & 0x3f;
 18.8252 +
 18.8253 +	if(orig_shift != 0)
 18.8254 +	{
 18.8255 +		uint shift = orig_shift % 9;
 18.8256 +		uint src   = MASK_OUT_ABOVE_8(*r_dst);
 18.8257 +		uint res   = ROR_9(src | (XFLAG_AS_1() << 8), shift);
 18.8258 +
 18.8259 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8260 +
 18.8261 +		FLAG_C = FLAG_X = res;
 18.8262 +		res = MASK_OUT_ABOVE_8(res);
 18.8263 +
 18.8264 +		*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8265 +		FLAG_N = NFLAG_8(res);
 18.8266 +		FLAG_Z = res;
 18.8267 +		FLAG_V = VFLAG_CLEAR;
 18.8268 +		return;
 18.8269 +	}
 18.8270 +
 18.8271 +	FLAG_C = FLAG_X;
 18.8272 +	FLAG_N = NFLAG_8(*r_dst);
 18.8273 +	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
 18.8274 +	FLAG_V = VFLAG_CLEAR;
 18.8275 +}
 18.8276 +
 18.8277 +
 18.8278 +M68KMAKE_OP(roxr, 16, r, .)
 18.8279 +{
 18.8280 +	uint* r_dst = &DY;
 18.8281 +	uint orig_shift = DX & 0x3f;
 18.8282 +
 18.8283 +	if(orig_shift != 0)
 18.8284 +	{
 18.8285 +		uint shift = orig_shift % 17;
 18.8286 +		uint src   = MASK_OUT_ABOVE_16(*r_dst);
 18.8287 +		uint res   = ROR_17(src | (XFLAG_AS_1() << 16), shift);
 18.8288 +
 18.8289 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8290 +
 18.8291 +		FLAG_C = FLAG_X = res >> 8;
 18.8292 +		res = MASK_OUT_ABOVE_16(res);
 18.8293 +
 18.8294 +		*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8295 +		FLAG_N = NFLAG_16(res);
 18.8296 +		FLAG_Z = res;
 18.8297 +		FLAG_V = VFLAG_CLEAR;
 18.8298 +		return;
 18.8299 +	}
 18.8300 +
 18.8301 +	FLAG_C = FLAG_X;
 18.8302 +	FLAG_N = NFLAG_16(*r_dst);
 18.8303 +	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
 18.8304 +	FLAG_V = VFLAG_CLEAR;
 18.8305 +}
 18.8306 +
 18.8307 +
 18.8308 +M68KMAKE_OP(roxr, 32, r, .)
 18.8309 +{
 18.8310 +#if M68K_USE_64_BIT
 18.8311 +
 18.8312 +	uint*  r_dst = &DY;
 18.8313 +	uint   orig_shift = DX & 0x3f;
 18.8314 +
 18.8315 +	if(orig_shift != 0)
 18.8316 +	{
 18.8317 +		uint   shift = orig_shift % 33;
 18.8318 +		uint64 src   = *r_dst;
 18.8319 +		uint64 res   = src | (((uint64)XFLAG_AS_1()) << 32);
 18.8320 +
 18.8321 +		res = ROR_33_64(res, shift);
 18.8322 +
 18.8323 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8324 +
 18.8325 +		FLAG_C = FLAG_X = res >> 24;
 18.8326 +		res = MASK_OUT_ABOVE_32(res);
 18.8327 +
 18.8328 +		*r_dst = res;
 18.8329 +		FLAG_N = NFLAG_32(res);
 18.8330 +		FLAG_Z = res;
 18.8331 +		FLAG_V = VFLAG_CLEAR;
 18.8332 +		return;
 18.8333 +	}
 18.8334 +
 18.8335 +	FLAG_C = FLAG_X;
 18.8336 +	FLAG_N = NFLAG_32(*r_dst);
 18.8337 +	FLAG_Z = *r_dst;
 18.8338 +	FLAG_V = VFLAG_CLEAR;
 18.8339 +
 18.8340 +#else
 18.8341 +
 18.8342 +	uint* r_dst = &DY;
 18.8343 +	uint orig_shift = DX & 0x3f;
 18.8344 +	uint shift = orig_shift % 33;
 18.8345 +	uint src = *r_dst;
 18.8346 +	uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
 18.8347 +	uint new_x_flag = src & (1 << (shift - 1));
 18.8348 +
 18.8349 +	if(orig_shift != 0)
 18.8350 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8351 +
 18.8352 +	if(shift != 0)
 18.8353 +	{
 18.8354 +		*r_dst = res;
 18.8355 +		FLAG_X = (new_x_flag != 0)<<8;
 18.8356 +	}
 18.8357 +	else
 18.8358 +		res = src;
 18.8359 +	FLAG_C = FLAG_X;
 18.8360 +	FLAG_N = NFLAG_32(res);
 18.8361 +	FLAG_Z = res;
 18.8362 +	FLAG_V = VFLAG_CLEAR;
 18.8363 +
 18.8364 +#endif
 18.8365 +}
 18.8366 +
 18.8367 +
 18.8368 +M68KMAKE_OP(roxr, 16, ., .)
 18.8369 +{
 18.8370 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.8371 +	uint src = m68ki_read_16(ea);
 18.8372 +	uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
 18.8373 +
 18.8374 +	FLAG_C = FLAG_X = res >> 8;
 18.8375 +	res = MASK_OUT_ABOVE_16(res);
 18.8376 +
 18.8377 +	m68ki_write_16(ea, res);
 18.8378 +
 18.8379 +	FLAG_N = NFLAG_16(res);
 18.8380 +	FLAG_Z = res;
 18.8381 +	FLAG_V = VFLAG_CLEAR;
 18.8382 +}
 18.8383 +
 18.8384 +
 18.8385 +M68KMAKE_OP(roxl, 8, s, .)
 18.8386 +{
 18.8387 +	uint* r_dst = &DY;
 18.8388 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8389 +	uint src = MASK_OUT_ABOVE_8(*r_dst);
 18.8390 +	uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
 18.8391 +
 18.8392 +	FLAG_C = FLAG_X = res;
 18.8393 +	res = MASK_OUT_ABOVE_8(res);
 18.8394 +
 18.8395 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8396 +
 18.8397 +	FLAG_N = NFLAG_8(res);
 18.8398 +	FLAG_Z = res;
 18.8399 +	FLAG_V = VFLAG_CLEAR;
 18.8400 +}
 18.8401 +
 18.8402 +
 18.8403 +M68KMAKE_OP(roxl, 16, s, .)
 18.8404 +{
 18.8405 +	uint* r_dst = &DY;
 18.8406 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8407 +	uint src = MASK_OUT_ABOVE_16(*r_dst);
 18.8408 +	uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
 18.8409 +
 18.8410 +	FLAG_C = FLAG_X = res >> 8;
 18.8411 +	res = MASK_OUT_ABOVE_16(res);
 18.8412 +
 18.8413 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8414 +
 18.8415 +	FLAG_N = NFLAG_16(res);
 18.8416 +	FLAG_Z = res;
 18.8417 +	FLAG_V = VFLAG_CLEAR;
 18.8418 +}
 18.8419 +
 18.8420 +
 18.8421 +M68KMAKE_OP(roxl, 32, s, .)
 18.8422 +{
 18.8423 +#if M68K_USE_64_BIT
 18.8424 +
 18.8425 +	uint*  r_dst = &DY;
 18.8426 +	uint   shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8427 +	uint64 src   = *r_dst;
 18.8428 +	uint64 res   = src | (((uint64)XFLAG_AS_1()) << 32);
 18.8429 +
 18.8430 +	res = ROL_33_64(res, shift);
 18.8431 +
 18.8432 +	FLAG_C = FLAG_X = res >> 24;
 18.8433 +	res = MASK_OUT_ABOVE_32(res);
 18.8434 +
 18.8435 +	*r_dst = res;
 18.8436 +
 18.8437 +	FLAG_N = NFLAG_32(res);
 18.8438 +	FLAG_Z = res;
 18.8439 +	FLAG_V = VFLAG_CLEAR;
 18.8440 +
 18.8441 +#else
 18.8442 +
 18.8443 +	uint* r_dst = &DY;
 18.8444 +	uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
 18.8445 +	uint src = *r_dst;
 18.8446 +	uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
 18.8447 +	uint new_x_flag = src & (1 << (32 - shift));
 18.8448 +
 18.8449 +	*r_dst = res;
 18.8450 +
 18.8451 +	FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
 18.8452 +	FLAG_N = NFLAG_32(res);
 18.8453 +	FLAG_Z = res;
 18.8454 +	FLAG_V = VFLAG_CLEAR;
 18.8455 +
 18.8456 +#endif
 18.8457 +}
 18.8458 +
 18.8459 +
 18.8460 +M68KMAKE_OP(roxl, 8, r, .)
 18.8461 +{
 18.8462 +	uint* r_dst = &DY;
 18.8463 +	uint orig_shift = DX & 0x3f;
 18.8464 +
 18.8465 +
 18.8466 +	if(orig_shift != 0)
 18.8467 +	{
 18.8468 +		uint shift = orig_shift % 9;
 18.8469 +		uint src   = MASK_OUT_ABOVE_8(*r_dst);
 18.8470 +		uint res   = ROL_9(src | (XFLAG_AS_1() << 8), shift);
 18.8471 +
 18.8472 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8473 +
 18.8474 +		FLAG_C = FLAG_X = res;
 18.8475 +		res = MASK_OUT_ABOVE_8(res);
 18.8476 +
 18.8477 +		*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8478 +		FLAG_N = NFLAG_8(res);
 18.8479 +		FLAG_Z = res;
 18.8480 +		FLAG_V = VFLAG_CLEAR;
 18.8481 +		return;
 18.8482 +	}
 18.8483 +
 18.8484 +	FLAG_C = FLAG_X;
 18.8485 +	FLAG_N = NFLAG_8(*r_dst);
 18.8486 +	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
 18.8487 +	FLAG_V = VFLAG_CLEAR;
 18.8488 +}
 18.8489 +
 18.8490 +
 18.8491 +M68KMAKE_OP(roxl, 16, r, .)
 18.8492 +{
 18.8493 +	uint* r_dst = &DY;
 18.8494 +	uint orig_shift = DX & 0x3f;
 18.8495 +
 18.8496 +	if(orig_shift != 0)
 18.8497 +	{
 18.8498 +		uint shift = orig_shift % 17;
 18.8499 +		uint src   = MASK_OUT_ABOVE_16(*r_dst);
 18.8500 +		uint res   = ROL_17(src | (XFLAG_AS_1() << 16), shift);
 18.8501 +
 18.8502 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8503 +
 18.8504 +		FLAG_C = FLAG_X = res >> 8;
 18.8505 +		res = MASK_OUT_ABOVE_16(res);
 18.8506 +
 18.8507 +		*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.8508 +		FLAG_N = NFLAG_16(res);
 18.8509 +		FLAG_Z = res;
 18.8510 +		FLAG_V = VFLAG_CLEAR;
 18.8511 +		return;
 18.8512 +	}
 18.8513 +
 18.8514 +	FLAG_C = FLAG_X;
 18.8515 +	FLAG_N = NFLAG_16(*r_dst);
 18.8516 +	FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
 18.8517 +	FLAG_V = VFLAG_CLEAR;
 18.8518 +}
 18.8519 +
 18.8520 +
 18.8521 +M68KMAKE_OP(roxl, 32, r, .)
 18.8522 +{
 18.8523 +#if M68K_USE_64_BIT
 18.8524 +
 18.8525 +	uint*  r_dst = &DY;
 18.8526 +	uint   orig_shift = DX & 0x3f;
 18.8527 +
 18.8528 +	if(orig_shift != 0)
 18.8529 +	{
 18.8530 +		uint   shift = orig_shift % 33;
 18.8531 +		uint64 src   = *r_dst;
 18.8532 +		uint64 res   = src | (((uint64)XFLAG_AS_1()) << 32);
 18.8533 +
 18.8534 +		res = ROL_33_64(res, shift);
 18.8535 +
 18.8536 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8537 +
 18.8538 +		FLAG_C = FLAG_X = res >> 24;
 18.8539 +		res = MASK_OUT_ABOVE_32(res);
 18.8540 +
 18.8541 +		*r_dst = res;
 18.8542 +		FLAG_N = NFLAG_32(res);
 18.8543 +		FLAG_Z = res;
 18.8544 +		FLAG_V = VFLAG_CLEAR;
 18.8545 +		return;
 18.8546 +	}
 18.8547 +
 18.8548 +	FLAG_C = FLAG_X;
 18.8549 +	FLAG_N = NFLAG_32(*r_dst);
 18.8550 +	FLAG_Z = *r_dst;
 18.8551 +	FLAG_V = VFLAG_CLEAR;
 18.8552 +
 18.8553 +#else
 18.8554 +
 18.8555 +	uint* r_dst = &DY;
 18.8556 +	uint orig_shift = DX & 0x3f;
 18.8557 +	uint shift = orig_shift % 33;
 18.8558 +	uint src = *r_dst;
 18.8559 +	uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
 18.8560 +	uint new_x_flag = src & (1 << (32 - shift));
 18.8561 +
 18.8562 +	if(orig_shift != 0)
 18.8563 +		USE_CYCLES(orig_shift<<CYC_SHIFT);
 18.8564 +
 18.8565 +	if(shift != 0)
 18.8566 +	{
 18.8567 +		*r_dst = res;
 18.8568 +		FLAG_X = (new_x_flag != 0)<<8;
 18.8569 +	}
 18.8570 +	else
 18.8571 +		res = src;
 18.8572 +	FLAG_C = FLAG_X;
 18.8573 +	FLAG_N = NFLAG_32(res);
 18.8574 +	FLAG_Z = res;
 18.8575 +	FLAG_V = VFLAG_CLEAR;
 18.8576 +
 18.8577 +#endif
 18.8578 +}
 18.8579 +
 18.8580 +
 18.8581 +M68KMAKE_OP(roxl, 16, ., .)
 18.8582 +{
 18.8583 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.8584 +	uint src = m68ki_read_16(ea);
 18.8585 +	uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
 18.8586 +
 18.8587 +	FLAG_C = FLAG_X = res >> 8;
 18.8588 +	res = MASK_OUT_ABOVE_16(res);
 18.8589 +
 18.8590 +	m68ki_write_16(ea, res);
 18.8591 +
 18.8592 +	FLAG_N = NFLAG_16(res);
 18.8593 +	FLAG_Z = res;
 18.8594 +	FLAG_V = VFLAG_CLEAR;
 18.8595 +}
 18.8596 +
 18.8597 +
 18.8598 +M68KMAKE_OP(rtd, 32, ., .)
 18.8599 +{
 18.8600 +	if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
 18.8601 +	{
 18.8602 +		uint new_pc = m68ki_pull_32();
 18.8603 +
 18.8604 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.8605 +		REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
 18.8606 +		m68ki_jump(new_pc);
 18.8607 +		return;
 18.8608 +	}
 18.8609 +	m68ki_exception_illegal();
 18.8610 +}
 18.8611 +
 18.8612 +
 18.8613 +M68KMAKE_OP(rte, 32, ., .)
 18.8614 +{
 18.8615 +	if(FLAG_S)
 18.8616 +	{
 18.8617 +		uint new_sr;
 18.8618 +		uint new_pc;
 18.8619 +		uint format_word;
 18.8620 +
 18.8621 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.8622 +
 18.8623 +		if(CPU_TYPE_IS_000(CPU_TYPE))
 18.8624 +		{
 18.8625 +			new_sr = m68ki_pull_16();
 18.8626 +			new_pc = m68ki_pull_32();
 18.8627 +			m68ki_jump(new_pc);
 18.8628 +			m68ki_set_sr(new_sr);
 18.8629 +			return;
 18.8630 +		}
 18.8631 +
 18.8632 +		if(CPU_TYPE_IS_010(CPU_TYPE))
 18.8633 +		{
 18.8634 +			format_word = m68ki_read_16(REG_A[7]+6) >> 12;
 18.8635 +			if(format_word == 0)
 18.8636 +			{
 18.8637 +				new_sr = m68ki_pull_16();
 18.8638 +				new_pc = m68ki_pull_32();
 18.8639 +				m68ki_fake_pull_16();	/* format word */
 18.8640 +				m68ki_jump(new_pc);
 18.8641 +				m68ki_set_sr(new_sr);
 18.8642 +				return;
 18.8643 +			}
 18.8644 +			/* Not handling bus fault (9) */
 18.8645 +			m68ki_exception_format_error();
 18.8646 +			return;
 18.8647 +		}
 18.8648 +
 18.8649 +		/* Otherwise it's 020 */
 18.8650 +rte_loop:
 18.8651 +		format_word = m68ki_read_16(REG_A[7]+6) >> 12;
 18.8652 +		switch(format_word)
 18.8653 +		{
 18.8654 +			case 0: /* Normal */
 18.8655 +				new_sr = m68ki_pull_16();
 18.8656 +				new_pc = m68ki_pull_32();
 18.8657 +				m68ki_fake_pull_16();	/* format word */
 18.8658 +				m68ki_jump(new_pc);
 18.8659 +				m68ki_set_sr(new_sr);
 18.8660 +				return;
 18.8661 +			case 1: /* Throwaway */
 18.8662 +				new_sr = m68ki_pull_16();
 18.8663 +				m68ki_fake_pull_32();	/* program counter */
 18.8664 +				m68ki_fake_pull_16();	/* format word */
 18.8665 +				m68ki_set_sr_noint(new_sr);
 18.8666 +				goto rte_loop;
 18.8667 +			case 2: /* Trap */
 18.8668 +				new_sr = m68ki_pull_16();
 18.8669 +				new_pc = m68ki_pull_32();
 18.8670 +				m68ki_fake_pull_16();	/* format word */
 18.8671 +				m68ki_fake_pull_32();	/* address */
 18.8672 +				m68ki_jump(new_pc);
 18.8673 +				m68ki_set_sr(new_sr);
 18.8674 +				return;
 18.8675 +		}
 18.8676 +		/* Not handling long or short bus fault */
 18.8677 +		m68ki_exception_format_error();
 18.8678 +		return;
 18.8679 +	}
 18.8680 +	m68ki_exception_privilege_violation();
 18.8681 +}
 18.8682 +
 18.8683 +
 18.8684 +M68KMAKE_OP(rtm, 32, ., .)
 18.8685 +{
 18.8686 +	if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
 18.8687 +	{
 18.8688 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.8689 +		M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
 18.8690 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
 18.8691 +					 m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
 18.8692 +		return;
 18.8693 +	}
 18.8694 +	m68ki_exception_illegal();
 18.8695 +}
 18.8696 +
 18.8697 +
 18.8698 +M68KMAKE_OP(rtr, 32, ., .)
 18.8699 +{
 18.8700 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.8701 +	m68ki_set_ccr(m68ki_pull_16());
 18.8702 +	m68ki_jump(m68ki_pull_32());
 18.8703 +}
 18.8704 +
 18.8705 +
 18.8706 +M68KMAKE_OP(rts, 32, ., .)
 18.8707 +{
 18.8708 +	m68ki_trace_t0();				   /* auto-disable (see m68kcpu.h) */
 18.8709 +	m68ki_jump(m68ki_pull_32());
 18.8710 +}
 18.8711 +
 18.8712 +
 18.8713 +M68KMAKE_OP(sbcd, 8, rr, .)
 18.8714 +{
 18.8715 +	uint* r_dst = &DX;
 18.8716 +	uint src = DY;
 18.8717 +	uint dst = *r_dst;
 18.8718 +	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
 18.8719 +
 18.8720 +	if(res > 9)
 18.8721 +		res -= 6;
 18.8722 +	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
 18.8723 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
 18.8724 +	if(FLAG_C)
 18.8725 +		res += 0xa0;
 18.8726 +
 18.8727 +	res = MASK_OUT_ABOVE_8(res);
 18.8728 +
 18.8729 +	FLAG_N = NFLAG_8(res); /* officially undefined */
 18.8730 +	FLAG_Z |= res;
 18.8731 +
 18.8732 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.8733 +}
 18.8734 +
 18.8735 +
 18.8736 +M68KMAKE_OP(sbcd, 8, mm, ax7)
 18.8737 +{
 18.8738 +	uint src = OPER_AY_PD_8();
 18.8739 +	uint ea  = EA_A7_PD_8();
 18.8740 +	uint dst = m68ki_read_8(ea);
 18.8741 +	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
 18.8742 +
 18.8743 +	if(res > 9)
 18.8744 +		res -= 6;
 18.8745 +	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
 18.8746 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
 18.8747 +	if(FLAG_C)
 18.8748 +		res += 0xa0;
 18.8749 +
 18.8750 +	res = MASK_OUT_ABOVE_8(res);
 18.8751 +
 18.8752 +	FLAG_N = NFLAG_8(res); /* officially undefined */
 18.8753 +	FLAG_Z |= res;
 18.8754 +
 18.8755 +	m68ki_write_8(ea, res);
 18.8756 +}
 18.8757 +
 18.8758 +
 18.8759 +M68KMAKE_OP(sbcd, 8, mm, ay7)
 18.8760 +{
 18.8761 +	uint src = OPER_A7_PD_8();
 18.8762 +	uint ea  = EA_AX_PD_8();
 18.8763 +	uint dst = m68ki_read_8(ea);
 18.8764 +	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
 18.8765 +
 18.8766 +	if(res > 9)
 18.8767 +		res -= 6;
 18.8768 +	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
 18.8769 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
 18.8770 +	if(FLAG_C)
 18.8771 +		res += 0xa0;
 18.8772 +
 18.8773 +	res = MASK_OUT_ABOVE_8(res);
 18.8774 +
 18.8775 +	FLAG_N = NFLAG_8(res); /* officially undefined */
 18.8776 +	FLAG_Z |= res;
 18.8777 +
 18.8778 +	m68ki_write_8(ea, res);
 18.8779 +}
 18.8780 +
 18.8781 +
 18.8782 +M68KMAKE_OP(sbcd, 8, mm, axy7)
 18.8783 +{
 18.8784 +	uint src = OPER_A7_PD_8();
 18.8785 +	uint ea  = EA_A7_PD_8();
 18.8786 +	uint dst = m68ki_read_8(ea);
 18.8787 +	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
 18.8788 +
 18.8789 +	if(res > 9)
 18.8790 +		res -= 6;
 18.8791 +	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
 18.8792 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
 18.8793 +	if(FLAG_C)
 18.8794 +		res += 0xa0;
 18.8795 +
 18.8796 +	res = MASK_OUT_ABOVE_8(res);
 18.8797 +
 18.8798 +	FLAG_N = NFLAG_8(res); /* officially undefined */
 18.8799 +	FLAG_Z |= res;
 18.8800 +
 18.8801 +	m68ki_write_8(ea, res);
 18.8802 +}
 18.8803 +
 18.8804 +
 18.8805 +M68KMAKE_OP(sbcd, 8, mm, .)
 18.8806 +{
 18.8807 +	uint src = OPER_AY_PD_8();
 18.8808 +	uint ea  = EA_AX_PD_8();
 18.8809 +	uint dst = m68ki_read_8(ea);
 18.8810 +	uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
 18.8811 +
 18.8812 +	if(res > 9)
 18.8813 +		res -= 6;
 18.8814 +	res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
 18.8815 +	FLAG_X = FLAG_C = (res > 0x99) << 8;
 18.8816 +	if(FLAG_C)
 18.8817 +		res += 0xa0;
 18.8818 +
 18.8819 +	res = MASK_OUT_ABOVE_8(res);
 18.8820 +
 18.8821 +	FLAG_N = NFLAG_8(res); /* officially undefined */
 18.8822 +	FLAG_Z |= res;
 18.8823 +
 18.8824 +	m68ki_write_8(ea, res);
 18.8825 +}
 18.8826 +
 18.8827 +
 18.8828 +M68KMAKE_OP(st, 8, ., d)
 18.8829 +{
 18.8830 +	DY |= 0xff;
 18.8831 +}
 18.8832 +
 18.8833 +
 18.8834 +M68KMAKE_OP(st, 8, ., .)
 18.8835 +{
 18.8836 +	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff);
 18.8837 +}
 18.8838 +
 18.8839 +
 18.8840 +M68KMAKE_OP(sf, 8, ., d)
 18.8841 +{
 18.8842 +	DY &= 0xffffff00;
 18.8843 +}
 18.8844 +
 18.8845 +
 18.8846 +M68KMAKE_OP(sf, 8, ., .)
 18.8847 +{
 18.8848 +	m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
 18.8849 +}
 18.8850 +
 18.8851 +
 18.8852 +M68KMAKE_OP(scc, 8, ., d)
 18.8853 +{
 18.8854 +	if(M68KMAKE_CC)
 18.8855 +	{
 18.8856 +		DY |= 0xff;
 18.8857 +		return;
 18.8858 +	}
 18.8859 +	DY &= 0xffffff00;
 18.8860 +}
 18.8861 +
 18.8862 +
 18.8863 +M68KMAKE_OP(scc, 8, ., .)
 18.8864 +{
 18.8865 +	m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0);
 18.8866 +}
 18.8867 +
 18.8868 +
 18.8869 +M68KMAKE_OP(stop, 0, ., .)
 18.8870 +{
 18.8871 +	if(FLAG_S)
 18.8872 +	{
 18.8873 +		uint new_sr = OPER_I_16();
 18.8874 +		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */
 18.8875 +		CPU_STOPPED |= STOP_LEVEL_STOP;
 18.8876 +		m68ki_set_sr(new_sr);
 18.8877 +		m68ki_remaining_cycles = 0;
 18.8878 +		return;
 18.8879 +	}
 18.8880 +	m68ki_exception_privilege_violation();
 18.8881 +}
 18.8882 +
 18.8883 +
 18.8884 +M68KMAKE_OP(sub, 8, er, d)
 18.8885 +{
 18.8886 +	uint* r_dst = &DX;
 18.8887 +	uint src = MASK_OUT_ABOVE_8(DY);
 18.8888 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.8889 +	uint res = dst - src;
 18.8890 +
 18.8891 +	FLAG_N = NFLAG_8(res);
 18.8892 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.8893 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.8894 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.8895 +
 18.8896 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.8897 +}
 18.8898 +
 18.8899 +
 18.8900 +M68KMAKE_OP(sub, 8, er, .)
 18.8901 +{
 18.8902 +	uint* r_dst = &DX;
 18.8903 +	uint src = M68KMAKE_GET_OPER_AY_8;
 18.8904 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.8905 +	uint res = dst - src;
 18.8906 +
 18.8907 +	FLAG_N = NFLAG_8(res);
 18.8908 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.8909 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.8910 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.8911 +
 18.8912 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.8913 +}
 18.8914 +
 18.8915 +
 18.8916 +M68KMAKE_OP(sub, 16, er, d)
 18.8917 +{
 18.8918 +	uint* r_dst = &DX;
 18.8919 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.8920 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.8921 +	uint res = dst - src;
 18.8922 +
 18.8923 +	FLAG_N = NFLAG_16(res);
 18.8924 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.8925 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.8926 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.8927 +
 18.8928 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.8929 +}
 18.8930 +
 18.8931 +
 18.8932 +M68KMAKE_OP(sub, 16, er, a)
 18.8933 +{
 18.8934 +	uint* r_dst = &DX;
 18.8935 +	uint src = MASK_OUT_ABOVE_16(AY);
 18.8936 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.8937 +	uint res = dst - src;
 18.8938 +
 18.8939 +	FLAG_N = NFLAG_16(res);
 18.8940 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.8941 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.8942 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.8943 +
 18.8944 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.8945 +}
 18.8946 +
 18.8947 +
 18.8948 +M68KMAKE_OP(sub, 16, er, .)
 18.8949 +{
 18.8950 +	uint* r_dst = &DX;
 18.8951 +	uint src = M68KMAKE_GET_OPER_AY_16;
 18.8952 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.8953 +	uint res = dst - src;
 18.8954 +
 18.8955 +	FLAG_N = NFLAG_16(res);
 18.8956 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.8957 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.8958 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.8959 +
 18.8960 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.8961 +}
 18.8962 +
 18.8963 +
 18.8964 +M68KMAKE_OP(sub, 32, er, d)
 18.8965 +{
 18.8966 +	uint* r_dst = &DX;
 18.8967 +	uint src = DY;
 18.8968 +	uint dst = *r_dst;
 18.8969 +	uint res = dst - src;
 18.8970 +
 18.8971 +	FLAG_N = NFLAG_32(res);
 18.8972 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.8973 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.8974 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.8975 +
 18.8976 +	*r_dst = FLAG_Z;
 18.8977 +}
 18.8978 +
 18.8979 +
 18.8980 +M68KMAKE_OP(sub, 32, er, a)
 18.8981 +{
 18.8982 +	uint* r_dst = &DX;
 18.8983 +	uint src = AY;
 18.8984 +	uint dst = *r_dst;
 18.8985 +	uint res = dst - src;
 18.8986 +
 18.8987 +	FLAG_N = NFLAG_32(res);
 18.8988 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.8989 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.8990 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.8991 +
 18.8992 +	*r_dst = FLAG_Z;
 18.8993 +}
 18.8994 +
 18.8995 +
 18.8996 +M68KMAKE_OP(sub, 32, er, .)
 18.8997 +{
 18.8998 +	uint* r_dst = &DX;
 18.8999 +	uint src = M68KMAKE_GET_OPER_AY_32;
 18.9000 +	uint dst = *r_dst;
 18.9001 +	uint res = dst - src;
 18.9002 +
 18.9003 +	FLAG_N = NFLAG_32(res);
 18.9004 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9005 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9006 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9007 +
 18.9008 +	*r_dst = FLAG_Z;
 18.9009 +}
 18.9010 +
 18.9011 +
 18.9012 +M68KMAKE_OP(sub, 8, re, .)
 18.9013 +{
 18.9014 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.9015 +	uint src = MASK_OUT_ABOVE_8(DX);
 18.9016 +	uint dst = m68ki_read_8(ea);
 18.9017 +	uint res = dst - src;
 18.9018 +
 18.9019 +	FLAG_N = NFLAG_8(res);
 18.9020 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.9021 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9022 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9023 +
 18.9024 +	m68ki_write_8(ea, FLAG_Z);
 18.9025 +}
 18.9026 +
 18.9027 +
 18.9028 +M68KMAKE_OP(sub, 16, re, .)
 18.9029 +{
 18.9030 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.9031 +	uint src = MASK_OUT_ABOVE_16(DX);
 18.9032 +	uint dst = m68ki_read_16(ea);
 18.9033 +	uint res = dst - src;
 18.9034 +
 18.9035 +	FLAG_N = NFLAG_16(res);
 18.9036 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.9037 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9038 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9039 +
 18.9040 +	m68ki_write_16(ea, FLAG_Z);
 18.9041 +}
 18.9042 +
 18.9043 +
 18.9044 +M68KMAKE_OP(sub, 32, re, .)
 18.9045 +{
 18.9046 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.9047 +	uint src = DX;
 18.9048 +	uint dst = m68ki_read_32(ea);
 18.9049 +	uint res = dst - src;
 18.9050 +
 18.9051 +	FLAG_N = NFLAG_32(res);
 18.9052 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9053 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9054 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9055 +
 18.9056 +	m68ki_write_32(ea, FLAG_Z);
 18.9057 +}
 18.9058 +
 18.9059 +
 18.9060 +M68KMAKE_OP(suba, 16, ., d)
 18.9061 +{
 18.9062 +	uint* r_dst = &AX;
 18.9063 +
 18.9064 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));
 18.9065 +}
 18.9066 +
 18.9067 +
 18.9068 +M68KMAKE_OP(suba, 16, ., a)
 18.9069 +{
 18.9070 +	uint* r_dst = &AX;
 18.9071 +
 18.9072 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));
 18.9073 +}
 18.9074 +
 18.9075 +
 18.9076 +M68KMAKE_OP(suba, 16, ., .)
 18.9077 +{
 18.9078 +	uint* r_dst = &AX;
 18.9079 +
 18.9080 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(M68KMAKE_GET_OPER_AY_16));
 18.9081 +}
 18.9082 +
 18.9083 +
 18.9084 +M68KMAKE_OP(suba, 32, ., d)
 18.9085 +{
 18.9086 +	uint* r_dst = &AX;
 18.9087 +
 18.9088 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);
 18.9089 +}
 18.9090 +
 18.9091 +
 18.9092 +M68KMAKE_OP(suba, 32, ., a)
 18.9093 +{
 18.9094 +	uint* r_dst = &AX;
 18.9095 +
 18.9096 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);
 18.9097 +}
 18.9098 +
 18.9099 +
 18.9100 +M68KMAKE_OP(suba, 32, ., .)
 18.9101 +{
 18.9102 +	uint* r_dst = &AX;
 18.9103 +
 18.9104 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - M68KMAKE_GET_OPER_AY_32);
 18.9105 +}
 18.9106 +
 18.9107 +
 18.9108 +M68KMAKE_OP(subi, 8, ., d)
 18.9109 +{
 18.9110 +	uint* r_dst = &DY;
 18.9111 +	uint src = OPER_I_8();
 18.9112 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.9113 +	uint res = dst - src;
 18.9114 +
 18.9115 +	FLAG_N = NFLAG_8(res);
 18.9116 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.9117 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9118 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9119 +
 18.9120 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.9121 +}
 18.9122 +
 18.9123 +
 18.9124 +M68KMAKE_OP(subi, 8, ., .)
 18.9125 +{
 18.9126 +	uint src = OPER_I_8();
 18.9127 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.9128 +	uint dst = m68ki_read_8(ea);
 18.9129 +	uint res = dst - src;
 18.9130 +
 18.9131 +	FLAG_N = NFLAG_8(res);
 18.9132 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.9133 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9134 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9135 +
 18.9136 +	m68ki_write_8(ea, FLAG_Z);
 18.9137 +}
 18.9138 +
 18.9139 +
 18.9140 +M68KMAKE_OP(subi, 16, ., d)
 18.9141 +{
 18.9142 +	uint* r_dst = &DY;
 18.9143 +	uint src = OPER_I_16();
 18.9144 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.9145 +	uint res = dst - src;
 18.9146 +
 18.9147 +	FLAG_N = NFLAG_16(res);
 18.9148 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.9149 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9150 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9151 +
 18.9152 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.9153 +}
 18.9154 +
 18.9155 +
 18.9156 +M68KMAKE_OP(subi, 16, ., .)
 18.9157 +{
 18.9158 +	uint src = OPER_I_16();
 18.9159 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.9160 +	uint dst = m68ki_read_16(ea);
 18.9161 +	uint res = dst - src;
 18.9162 +
 18.9163 +	FLAG_N = NFLAG_16(res);
 18.9164 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.9165 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9166 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9167 +
 18.9168 +	m68ki_write_16(ea, FLAG_Z);
 18.9169 +}
 18.9170 +
 18.9171 +
 18.9172 +M68KMAKE_OP(subi, 32, ., d)
 18.9173 +{
 18.9174 +	uint* r_dst = &DY;
 18.9175 +	uint src = OPER_I_32();
 18.9176 +	uint dst = *r_dst;
 18.9177 +	uint res = dst - src;
 18.9178 +
 18.9179 +	FLAG_N = NFLAG_32(res);
 18.9180 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9181 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9182 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9183 +
 18.9184 +	*r_dst = FLAG_Z;
 18.9185 +}
 18.9186 +
 18.9187 +
 18.9188 +M68KMAKE_OP(subi, 32, ., .)
 18.9189 +{
 18.9190 +	uint src = OPER_I_32();
 18.9191 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.9192 +	uint dst = m68ki_read_32(ea);
 18.9193 +	uint res = dst - src;
 18.9194 +
 18.9195 +	FLAG_N = NFLAG_32(res);
 18.9196 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9197 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9198 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9199 +
 18.9200 +	m68ki_write_32(ea, FLAG_Z);
 18.9201 +}
 18.9202 +
 18.9203 +
 18.9204 +M68KMAKE_OP(subq, 8, ., d)
 18.9205 +{
 18.9206 +	uint* r_dst = &DY;
 18.9207 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9208 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.9209 +	uint res = dst - src;
 18.9210 +
 18.9211 +	FLAG_N = NFLAG_8(res);
 18.9212 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.9213 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9214 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9215 +
 18.9216 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
 18.9217 +}
 18.9218 +
 18.9219 +
 18.9220 +M68KMAKE_OP(subq, 8, ., .)
 18.9221 +{
 18.9222 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9223 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.9224 +	uint dst = m68ki_read_8(ea);
 18.9225 +	uint res = dst - src;
 18.9226 +
 18.9227 +	FLAG_N = NFLAG_8(res);
 18.9228 +	FLAG_Z = MASK_OUT_ABOVE_8(res);
 18.9229 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9230 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9231 +
 18.9232 +	m68ki_write_8(ea, FLAG_Z);
 18.9233 +}
 18.9234 +
 18.9235 +
 18.9236 +M68KMAKE_OP(subq, 16, ., d)
 18.9237 +{
 18.9238 +	uint* r_dst = &DY;
 18.9239 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9240 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.9241 +	uint res = dst - src;
 18.9242 +
 18.9243 +	FLAG_N = NFLAG_16(res);
 18.9244 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.9245 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9246 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9247 +
 18.9248 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
 18.9249 +}
 18.9250 +
 18.9251 +
 18.9252 +M68KMAKE_OP(subq, 16, ., a)
 18.9253 +{
 18.9254 +	uint* r_dst = &AY;
 18.9255 +
 18.9256 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
 18.9257 +}
 18.9258 +
 18.9259 +
 18.9260 +M68KMAKE_OP(subq, 16, ., .)
 18.9261 +{
 18.9262 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9263 +	uint ea = M68KMAKE_GET_EA_AY_16;
 18.9264 +	uint dst = m68ki_read_16(ea);
 18.9265 +	uint res = dst - src;
 18.9266 +
 18.9267 +	FLAG_N = NFLAG_16(res);
 18.9268 +	FLAG_Z = MASK_OUT_ABOVE_16(res);
 18.9269 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9270 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9271 +
 18.9272 +	m68ki_write_16(ea, FLAG_Z);
 18.9273 +}
 18.9274 +
 18.9275 +
 18.9276 +M68KMAKE_OP(subq, 32, ., d)
 18.9277 +{
 18.9278 +	uint* r_dst = &DY;
 18.9279 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9280 +	uint dst = *r_dst;
 18.9281 +	uint res = dst - src;
 18.9282 +
 18.9283 +	FLAG_N = NFLAG_32(res);
 18.9284 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9285 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9286 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9287 +
 18.9288 +	*r_dst = FLAG_Z;
 18.9289 +}
 18.9290 +
 18.9291 +
 18.9292 +M68KMAKE_OP(subq, 32, ., a)
 18.9293 +{
 18.9294 +	uint* r_dst = &AY;
 18.9295 +
 18.9296 +	*r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
 18.9297 +}
 18.9298 +
 18.9299 +
 18.9300 +M68KMAKE_OP(subq, 32, ., .)
 18.9301 +{
 18.9302 +	uint src = (((REG_IR >> 9) - 1) & 7) + 1;
 18.9303 +	uint ea = M68KMAKE_GET_EA_AY_32;
 18.9304 +	uint dst = m68ki_read_32(ea);
 18.9305 +	uint res = dst - src;
 18.9306 +
 18.9307 +	FLAG_N = NFLAG_32(res);
 18.9308 +	FLAG_Z = MASK_OUT_ABOVE_32(res);
 18.9309 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9310 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9311 +
 18.9312 +	m68ki_write_32(ea, FLAG_Z);
 18.9313 +}
 18.9314 +
 18.9315 +
 18.9316 +M68KMAKE_OP(subx, 8, rr, .)
 18.9317 +{
 18.9318 +	uint* r_dst = &DX;
 18.9319 +	uint src = MASK_OUT_ABOVE_8(DY);
 18.9320 +	uint dst = MASK_OUT_ABOVE_8(*r_dst);
 18.9321 +	uint res = dst - src - XFLAG_AS_1();
 18.9322 +
 18.9323 +	FLAG_N = NFLAG_8(res);
 18.9324 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9325 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9326 +
 18.9327 +	res = MASK_OUT_ABOVE_8(res);
 18.9328 +	FLAG_Z |= res;
 18.9329 +
 18.9330 +	*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
 18.9331 +}
 18.9332 +
 18.9333 +
 18.9334 +M68KMAKE_OP(subx, 16, rr, .)
 18.9335 +{
 18.9336 +	uint* r_dst = &DX;
 18.9337 +	uint src = MASK_OUT_ABOVE_16(DY);
 18.9338 +	uint dst = MASK_OUT_ABOVE_16(*r_dst);
 18.9339 +	uint res = dst - src - XFLAG_AS_1();
 18.9340 +
 18.9341 +	FLAG_N = NFLAG_16(res);
 18.9342 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9343 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9344 +
 18.9345 +	res = MASK_OUT_ABOVE_16(res);
 18.9346 +	FLAG_Z |= res;
 18.9347 +
 18.9348 +	*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
 18.9349 +}
 18.9350 +
 18.9351 +
 18.9352 +M68KMAKE_OP(subx, 32, rr, .)
 18.9353 +{
 18.9354 +	uint* r_dst = &DX;
 18.9355 +	uint src = DY;
 18.9356 +	uint dst = *r_dst;
 18.9357 +	uint res = dst - src - XFLAG_AS_1();
 18.9358 +
 18.9359 +	FLAG_N = NFLAG_32(res);
 18.9360 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9361 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9362 +
 18.9363 +	res = MASK_OUT_ABOVE_32(res);
 18.9364 +	FLAG_Z |= res;
 18.9365 +
 18.9366 +	*r_dst = res;
 18.9367 +}
 18.9368 +
 18.9369 +
 18.9370 +M68KMAKE_OP(subx, 8, mm, ax7)
 18.9371 +{
 18.9372 +	uint src = OPER_AY_PD_8();
 18.9373 +	uint ea  = EA_A7_PD_8();
 18.9374 +	uint dst = m68ki_read_8(ea);
 18.9375 +	uint res = dst - src - XFLAG_AS_1();
 18.9376 +
 18.9377 +	FLAG_N = NFLAG_8(res);
 18.9378 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9379 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9380 +
 18.9381 +	res = MASK_OUT_ABOVE_8(res);
 18.9382 +	FLAG_Z |= res;
 18.9383 +
 18.9384 +	m68ki_write_8(ea, res);
 18.9385 +}
 18.9386 +
 18.9387 +
 18.9388 +M68KMAKE_OP(subx, 8, mm, ay7)
 18.9389 +{
 18.9390 +	uint src = OPER_A7_PD_8();
 18.9391 +	uint ea  = EA_AX_PD_8();
 18.9392 +	uint dst = m68ki_read_8(ea);
 18.9393 +	uint res = dst - src - XFLAG_AS_1();
 18.9394 +
 18.9395 +	FLAG_N = NFLAG_8(res);
 18.9396 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9397 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9398 +
 18.9399 +	res = MASK_OUT_ABOVE_8(res);
 18.9400 +	FLAG_Z |= res;
 18.9401 +
 18.9402 +	m68ki_write_8(ea, res);
 18.9403 +}
 18.9404 +
 18.9405 +
 18.9406 +M68KMAKE_OP(subx, 8, mm, axy7)
 18.9407 +{
 18.9408 +	uint src = OPER_A7_PD_8();
 18.9409 +	uint ea  = EA_A7_PD_8();
 18.9410 +	uint dst = m68ki_read_8(ea);
 18.9411 +	uint res = dst - src - XFLAG_AS_1();
 18.9412 +
 18.9413 +	FLAG_N = NFLAG_8(res);
 18.9414 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9415 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9416 +
 18.9417 +	res = MASK_OUT_ABOVE_8(res);
 18.9418 +	FLAG_Z |= res;
 18.9419 +
 18.9420 +	m68ki_write_8(ea, res);
 18.9421 +}
 18.9422 +
 18.9423 +
 18.9424 +M68KMAKE_OP(subx, 8, mm, .)
 18.9425 +{
 18.9426 +	uint src = OPER_AY_PD_8();
 18.9427 +	uint ea  = EA_AX_PD_8();
 18.9428 +	uint dst = m68ki_read_8(ea);
 18.9429 +	uint res = dst - src - XFLAG_AS_1();
 18.9430 +
 18.9431 +	FLAG_N = NFLAG_8(res);
 18.9432 +	FLAG_X = FLAG_C = CFLAG_8(res);
 18.9433 +	FLAG_V = VFLAG_SUB_8(src, dst, res);
 18.9434 +
 18.9435 +	res = MASK_OUT_ABOVE_8(res);
 18.9436 +	FLAG_Z |= res;
 18.9437 +
 18.9438 +	m68ki_write_8(ea, res);
 18.9439 +}
 18.9440 +
 18.9441 +
 18.9442 +M68KMAKE_OP(subx, 16, mm, .)
 18.9443 +{
 18.9444 +	uint src = OPER_AY_PD_16();
 18.9445 +	uint ea  = EA_AX_PD_16();
 18.9446 +	uint dst = m68ki_read_16(ea);
 18.9447 +	uint res = dst - src - XFLAG_AS_1();
 18.9448 +
 18.9449 +	FLAG_N = NFLAG_16(res);
 18.9450 +	FLAG_X = FLAG_C = CFLAG_16(res);
 18.9451 +	FLAG_V = VFLAG_SUB_16(src, dst, res);
 18.9452 +
 18.9453 +	res = MASK_OUT_ABOVE_16(res);
 18.9454 +	FLAG_Z |= res;
 18.9455 +
 18.9456 +	m68ki_write_16(ea, res);
 18.9457 +}
 18.9458 +
 18.9459 +
 18.9460 +M68KMAKE_OP(subx, 32, mm, .)
 18.9461 +{
 18.9462 +	uint src = OPER_AY_PD_32();
 18.9463 +	uint ea  = EA_AX_PD_32();
 18.9464 +	uint dst = m68ki_read_32(ea);
 18.9465 +	uint res = dst - src - XFLAG_AS_1();
 18.9466 +
 18.9467 +	FLAG_N = NFLAG_32(res);
 18.9468 +	FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
 18.9469 +	FLAG_V = VFLAG_SUB_32(src, dst, res);
 18.9470 +
 18.9471 +	res = MASK_OUT_ABOVE_32(res);
 18.9472 +	FLAG_Z |= res;
 18.9473 +
 18.9474 +	m68ki_write_32(ea, res);
 18.9475 +}
 18.9476 +
 18.9477 +
 18.9478 +M68KMAKE_OP(swap, 32, ., .)
 18.9479 +{
 18.9480 +	uint* r_dst = &DY;
 18.9481 +
 18.9482 +	FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);
 18.9483 +	*r_dst = (*r_dst>>16) | FLAG_Z;
 18.9484 +
 18.9485 +	FLAG_Z = *r_dst;
 18.9486 +	FLAG_N = NFLAG_32(*r_dst);
 18.9487 +	FLAG_C = CFLAG_CLEAR;
 18.9488 +	FLAG_V = VFLAG_CLEAR;
 18.9489 +}
 18.9490 +
 18.9491 +
 18.9492 +M68KMAKE_OP(tas, 8, ., d)
 18.9493 +{
 18.9494 +	uint* r_dst = &DY;
 18.9495 +
 18.9496 +	FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
 18.9497 +	FLAG_N = NFLAG_8(*r_dst);
 18.9498 +	FLAG_V = VFLAG_CLEAR;
 18.9499 +	FLAG_C = CFLAG_CLEAR;
 18.9500 +	*r_dst |= 0x80;
 18.9501 +}
 18.9502 +
 18.9503 +
 18.9504 +M68KMAKE_OP(tas, 8, ., .)
 18.9505 +{
 18.9506 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.9507 +	uint dst = m68ki_read_8(ea);
 18.9508 +
 18.9509 +	FLAG_Z = dst;
 18.9510 +	FLAG_N = NFLAG_8(dst);
 18.9511 +	FLAG_V = VFLAG_CLEAR;
 18.9512 +	FLAG_C = CFLAG_CLEAR;
 18.9513 +	m68ki_write_8(ea, dst | 0x80);
 18.9514 +}
 18.9515 +
 18.9516 +
 18.9517 +M68KMAKE_OP(trap, 0, ., .)
 18.9518 +{
 18.9519 +	/* Trap#n stacks exception frame type 0 */
 18.9520 +	m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf));	/* HJB 990403 */
 18.9521 +}
 18.9522 +
 18.9523 +
 18.9524 +M68KMAKE_OP(trapt, 0, ., .)
 18.9525 +{
 18.9526 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9527 +	{
 18.9528 +		m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9529 +		return;
 18.9530 +	}
 18.9531 +	m68ki_exception_illegal();
 18.9532 +}
 18.9533 +
 18.9534 +
 18.9535 +M68KMAKE_OP(trapt, 16, ., .)
 18.9536 +{
 18.9537 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9538 +	{
 18.9539 +		m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9540 +		return;
 18.9541 +	}
 18.9542 +	m68ki_exception_illegal();
 18.9543 +}
 18.9544 +
 18.9545 +
 18.9546 +M68KMAKE_OP(trapt, 32, ., .)
 18.9547 +{
 18.9548 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9549 +	{
 18.9550 +		m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9551 +		return;
 18.9552 +	}
 18.9553 +	m68ki_exception_illegal();
 18.9554 +}
 18.9555 +
 18.9556 +
 18.9557 +M68KMAKE_OP(trapf, 0, ., .)
 18.9558 +{
 18.9559 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9560 +	{
 18.9561 +		return;
 18.9562 +	}
 18.9563 +	m68ki_exception_illegal();
 18.9564 +}
 18.9565 +
 18.9566 +
 18.9567 +M68KMAKE_OP(trapf, 16, ., .)
 18.9568 +{
 18.9569 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9570 +	{
 18.9571 +		REG_PC += 2;
 18.9572 +		return;
 18.9573 +	}
 18.9574 +	m68ki_exception_illegal();
 18.9575 +}
 18.9576 +
 18.9577 +
 18.9578 +M68KMAKE_OP(trapf, 32, ., .)
 18.9579 +{
 18.9580 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9581 +	{
 18.9582 +		REG_PC += 4;
 18.9583 +		return;
 18.9584 +	}
 18.9585 +	m68ki_exception_illegal();
 18.9586 +}
 18.9587 +
 18.9588 +
 18.9589 +M68KMAKE_OP(trapcc, 0, ., .)
 18.9590 +{
 18.9591 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9592 +	{
 18.9593 +		if(M68KMAKE_CC)
 18.9594 +			m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9595 +		return;
 18.9596 +	}
 18.9597 +	m68ki_exception_illegal();
 18.9598 +}
 18.9599 +
 18.9600 +
 18.9601 +M68KMAKE_OP(trapcc, 16, ., .)
 18.9602 +{
 18.9603 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9604 +	{
 18.9605 +		if(M68KMAKE_CC)
 18.9606 +		{
 18.9607 +			m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9608 +			return;
 18.9609 +		}
 18.9610 +		REG_PC += 2;
 18.9611 +		return;
 18.9612 +	}
 18.9613 +	m68ki_exception_illegal();
 18.9614 +}
 18.9615 +
 18.9616 +
 18.9617 +M68KMAKE_OP(trapcc, 32, ., .)
 18.9618 +{
 18.9619 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9620 +	{
 18.9621 +		if(M68KMAKE_CC)
 18.9622 +		{
 18.9623 +			m68ki_exception_trap(EXCEPTION_TRAPV);	/* HJB 990403 */
 18.9624 +			return;
 18.9625 +		}
 18.9626 +		REG_PC += 4;
 18.9627 +		return;
 18.9628 +	}
 18.9629 +	m68ki_exception_illegal();
 18.9630 +}
 18.9631 +
 18.9632 +
 18.9633 +M68KMAKE_OP(trapv, 0, ., .)
 18.9634 +{
 18.9635 +	if(COND_VC())
 18.9636 +	{
 18.9637 +		return;
 18.9638 +	}
 18.9639 +	m68ki_exception_trap(EXCEPTION_TRAPV);  /* HJB 990403 */
 18.9640 +}
 18.9641 +
 18.9642 +
 18.9643 +M68KMAKE_OP(tst, 8, ., d)
 18.9644 +{
 18.9645 +	uint res = MASK_OUT_ABOVE_8(DY);
 18.9646 +
 18.9647 +	FLAG_N = NFLAG_8(res);
 18.9648 +	FLAG_Z = res;
 18.9649 +	FLAG_V = VFLAG_CLEAR;
 18.9650 +	FLAG_C = CFLAG_CLEAR;
 18.9651 +}
 18.9652 +
 18.9653 +
 18.9654 +M68KMAKE_OP(tst, 8, ., .)
 18.9655 +{
 18.9656 +	uint ea = M68KMAKE_GET_EA_AY_8;
 18.9657 +	uint res = m68ki_read_8(ea);
 18.9658 +
 18.9659 +	FLAG_N = NFLAG_8(res);
 18.9660 +	FLAG_Z = res;
 18.9661 +	FLAG_V = VFLAG_CLEAR;
 18.9662 +	FLAG_C = CFLAG_CLEAR;
 18.9663 +}
 18.9664 +
 18.9665 +
 18.9666 +M68KMAKE_OP(tst, 8, ., pcdi)
 18.9667 +{
 18.9668 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9669 +	{
 18.9670 +		uint res = OPER_PCDI_8();
 18.9671 +
 18.9672 +		FLAG_N = NFLAG_8(res);
 18.9673 +		FLAG_Z = res;
 18.9674 +		FLAG_V = VFLAG_CLEAR;
 18.9675 +		FLAG_C = CFLAG_CLEAR;
 18.9676 +		return;
 18.9677 +	}
 18.9678 +	m68ki_exception_illegal();
 18.9679 +}
 18.9680 +
 18.9681 +
 18.9682 +M68KMAKE_OP(tst, 8, ., pcix)
 18.9683 +{
 18.9684 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9685 +	{
 18.9686 +		uint res = OPER_PCIX_8();
 18.9687 +
 18.9688 +		FLAG_N = NFLAG_8(res);
 18.9689 +		FLAG_Z = res;
 18.9690 +		FLAG_V = VFLAG_CLEAR;
 18.9691 +		FLAG_C = CFLAG_CLEAR;
 18.9692 +		return;
 18.9693 +	}
 18.9694 +	m68ki_exception_illegal();
 18.9695 +}
 18.9696 +
 18.9697 +
 18.9698 +M68KMAKE_OP(tst, 8, ., i)
 18.9699 +{
 18.9700 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9701 +	{
 18.9702 +		uint res = OPER_I_8();
 18.9703 +
 18.9704 +		FLAG_N = NFLAG_8(res);
 18.9705 +		FLAG_Z = res;
 18.9706 +		FLAG_V = VFLAG_CLEAR;
 18.9707 +		FLAG_C = CFLAG_CLEAR;
 18.9708 +		return;
 18.9709 +	}
 18.9710 +	m68ki_exception_illegal();
 18.9711 +}
 18.9712 +
 18.9713 +
 18.9714 +M68KMAKE_OP(tst, 16, ., d)
 18.9715 +{
 18.9716 +	uint res = MASK_OUT_ABOVE_16(DY);
 18.9717 +
 18.9718 +	FLAG_N = NFLAG_16(res);
 18.9719 +	FLAG_Z = res;
 18.9720 +	FLAG_V = VFLAG_CLEAR;
 18.9721 +	FLAG_C = CFLAG_CLEAR;
 18.9722 +}
 18.9723 +
 18.9724 +
 18.9725 +M68KMAKE_OP(tst, 16, ., a)
 18.9726 +{
 18.9727 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9728 +	{
 18.9729 +		uint res = MAKE_INT_16(AY);
 18.9730 +
 18.9731 +		FLAG_N = NFLAG_16(res);
 18.9732 +		FLAG_Z = res;
 18.9733 +		FLAG_V = VFLAG_CLEAR;
 18.9734 +		FLAG_C = CFLAG_CLEAR;
 18.9735 +		return;
 18.9736 +	}
 18.9737 +	m68ki_exception_illegal();
 18.9738 +}
 18.9739 +
 18.9740 +
 18.9741 +M68KMAKE_OP(tst, 16, ., .)
 18.9742 +{
 18.9743 +	uint res = M68KMAKE_GET_OPER_AY_16;
 18.9744 +
 18.9745 +	FLAG_N = NFLAG_16(res);
 18.9746 +	FLAG_Z = res;
 18.9747 +	FLAG_V = VFLAG_CLEAR;
 18.9748 +	FLAG_C = CFLAG_CLEAR;
 18.9749 +}
 18.9750 +
 18.9751 +
 18.9752 +M68KMAKE_OP(tst, 16, ., pcdi)
 18.9753 +{
 18.9754 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9755 +	{
 18.9756 +		uint res = OPER_PCDI_16();
 18.9757 +
 18.9758 +		FLAG_N = NFLAG_16(res);
 18.9759 +		FLAG_Z = res;
 18.9760 +		FLAG_V = VFLAG_CLEAR;
 18.9761 +		FLAG_C = CFLAG_CLEAR;
 18.9762 +		return;
 18.9763 +	}
 18.9764 +	m68ki_exception_illegal();
 18.9765 +}
 18.9766 +
 18.9767 +
 18.9768 +M68KMAKE_OP(tst, 16, ., pcix)
 18.9769 +{
 18.9770 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9771 +	{
 18.9772 +		uint res = OPER_PCIX_16();
 18.9773 +
 18.9774 +		FLAG_N = NFLAG_16(res);
 18.9775 +		FLAG_Z = res;
 18.9776 +		FLAG_V = VFLAG_CLEAR;
 18.9777 +		FLAG_C = CFLAG_CLEAR;
 18.9778 +		return;
 18.9779 +	}
 18.9780 +	m68ki_exception_illegal();
 18.9781 +}
 18.9782 +
 18.9783 +
 18.9784 +M68KMAKE_OP(tst, 16, ., i)
 18.9785 +{
 18.9786 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9787 +	{
 18.9788 +		uint res = OPER_I_16();
 18.9789 +
 18.9790 +		FLAG_N = NFLAG_16(res);
 18.9791 +		FLAG_Z = res;
 18.9792 +		FLAG_V = VFLAG_CLEAR;
 18.9793 +		FLAG_C = CFLAG_CLEAR;
 18.9794 +		return;
 18.9795 +	}
 18.9796 +	m68ki_exception_illegal();
 18.9797 +}
 18.9798 +
 18.9799 +
 18.9800 +M68KMAKE_OP(tst, 32, ., d)
 18.9801 +{
 18.9802 +	uint res = DY;
 18.9803 +
 18.9804 +	FLAG_N = NFLAG_32(res);
 18.9805 +	FLAG_Z = res;
 18.9806 +	FLAG_V = VFLAG_CLEAR;
 18.9807 +	FLAG_C = CFLAG_CLEAR;
 18.9808 +}
 18.9809 +
 18.9810 +
 18.9811 +M68KMAKE_OP(tst, 32, ., a)
 18.9812 +{
 18.9813 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9814 +	{
 18.9815 +		uint res = AY;
 18.9816 +
 18.9817 +		FLAG_N = NFLAG_32(res);
 18.9818 +		FLAG_Z = res;
 18.9819 +		FLAG_V = VFLAG_CLEAR;
 18.9820 +		FLAG_C = CFLAG_CLEAR;
 18.9821 +		return;
 18.9822 +	}
 18.9823 +	m68ki_exception_illegal();
 18.9824 +}
 18.9825 +
 18.9826 +
 18.9827 +M68KMAKE_OP(tst, 32, ., .)
 18.9828 +{
 18.9829 +	uint res = M68KMAKE_GET_OPER_AY_32;
 18.9830 +
 18.9831 +	FLAG_N = NFLAG_32(res);
 18.9832 +	FLAG_Z = res;
 18.9833 +	FLAG_V = VFLAG_CLEAR;
 18.9834 +	FLAG_C = CFLAG_CLEAR;
 18.9835 +}
 18.9836 +
 18.9837 +
 18.9838 +M68KMAKE_OP(tst, 32, ., pcdi)
 18.9839 +{
 18.9840 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9841 +	{
 18.9842 +		uint res = OPER_PCDI_32();
 18.9843 +
 18.9844 +		FLAG_N = NFLAG_32(res);
 18.9845 +		FLAG_Z = res;
 18.9846 +		FLAG_V = VFLAG_CLEAR;
 18.9847 +		FLAG_C = CFLAG_CLEAR;
 18.9848 +		return;
 18.9849 +	}
 18.9850 +	m68ki_exception_illegal();
 18.9851 +}
 18.9852 +
 18.9853 +
 18.9854 +M68KMAKE_OP(tst, 32, ., pcix)
 18.9855 +{
 18.9856 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9857 +	{
 18.9858 +		uint res = OPER_PCIX_32();
 18.9859 +
 18.9860 +		FLAG_N = NFLAG_32(res);
 18.9861 +		FLAG_Z = res;
 18.9862 +		FLAG_V = VFLAG_CLEAR;
 18.9863 +		FLAG_C = CFLAG_CLEAR;
 18.9864 +		return;
 18.9865 +	}
 18.9866 +	m68ki_exception_illegal();
 18.9867 +}
 18.9868 +
 18.9869 +
 18.9870 +M68KMAKE_OP(tst, 32, ., i)
 18.9871 +{
 18.9872 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9873 +	{
 18.9874 +		uint res = OPER_I_32();
 18.9875 +
 18.9876 +		FLAG_N = NFLAG_32(res);
 18.9877 +		FLAG_Z = res;
 18.9878 +		FLAG_V = VFLAG_CLEAR;
 18.9879 +		FLAG_C = CFLAG_CLEAR;
 18.9880 +		return;
 18.9881 +	}
 18.9882 +	m68ki_exception_illegal();
 18.9883 +}
 18.9884 +
 18.9885 +
 18.9886 +M68KMAKE_OP(unlk, 32, ., a7)
 18.9887 +{
 18.9888 +	REG_A[7] = m68ki_read_32(REG_A[7]);
 18.9889 +}
 18.9890 +
 18.9891 +
 18.9892 +M68KMAKE_OP(unlk, 32, ., .)
 18.9893 +{
 18.9894 +	uint* r_dst = &AY;
 18.9895 +
 18.9896 +	REG_A[7] = *r_dst;
 18.9897 +	*r_dst = m68ki_pull_32();
 18.9898 +}
 18.9899 +
 18.9900 +
 18.9901 +M68KMAKE_OP(unpk, 16, rr, .)
 18.9902 +{
 18.9903 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9904 +	{
 18.9905 +		/* Note: DX and DY are reversed in Motorola's docs */
 18.9906 +		uint src = DY;
 18.9907 +		uint* r_dst = &DX;
 18.9908 +
 18.9909 +		*r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
 18.9910 +		return;
 18.9911 +	}
 18.9912 +	m68ki_exception_illegal();
 18.9913 +}
 18.9914 +
 18.9915 +
 18.9916 +M68KMAKE_OP(unpk, 16, mm, ax7)
 18.9917 +{
 18.9918 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9919 +	{
 18.9920 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.9921 +		uint src = OPER_AY_PD_8();
 18.9922 +		uint ea_dst;
 18.9923 +
 18.9924 +		src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
 18.9925 +		ea_dst = EA_A7_PD_8();
 18.9926 +		m68ki_write_8(ea_dst, (src >> 8) & 0xff);
 18.9927 +		ea_dst = EA_A7_PD_8();
 18.9928 +		m68ki_write_8(ea_dst, src & 0xff);
 18.9929 +		return;
 18.9930 +	}
 18.9931 +	m68ki_exception_illegal();
 18.9932 +}
 18.9933 +
 18.9934 +
 18.9935 +M68KMAKE_OP(unpk, 16, mm, ay7)
 18.9936 +{
 18.9937 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9938 +	{
 18.9939 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.9940 +		uint src = OPER_A7_PD_8();
 18.9941 +		uint ea_dst;
 18.9942 +
 18.9943 +		src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
 18.9944 +		ea_dst = EA_AX_PD_8();
 18.9945 +		m68ki_write_8(ea_dst, (src >> 8) & 0xff);
 18.9946 +		ea_dst = EA_AX_PD_8();
 18.9947 +		m68ki_write_8(ea_dst, src & 0xff);
 18.9948 +		return;
 18.9949 +	}
 18.9950 +	m68ki_exception_illegal();
 18.9951 +}
 18.9952 +
 18.9953 +
 18.9954 +M68KMAKE_OP(unpk, 16, mm, axy7)
 18.9955 +{
 18.9956 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9957 +	{
 18.9958 +		uint src = OPER_A7_PD_8();
 18.9959 +		uint ea_dst;
 18.9960 +
 18.9961 +		src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
 18.9962 +		ea_dst = EA_A7_PD_8();
 18.9963 +		m68ki_write_8(ea_dst, (src >> 8) & 0xff);
 18.9964 +		ea_dst = EA_A7_PD_8();
 18.9965 +		m68ki_write_8(ea_dst, src & 0xff);
 18.9966 +		return;
 18.9967 +	}
 18.9968 +	m68ki_exception_illegal();
 18.9969 +}
 18.9970 +
 18.9971 +
 18.9972 +M68KMAKE_OP(unpk, 16, mm, .)
 18.9973 +{
 18.9974 +	if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 18.9975 +	{
 18.9976 +		/* Note: AX and AY are reversed in Motorola's docs */
 18.9977 +		uint src = OPER_AY_PD_8();
 18.9978 +		uint ea_dst;
 18.9979 +
 18.9980 +		src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
 18.9981 +		ea_dst = EA_AX_PD_8();
 18.9982 +		m68ki_write_8(ea_dst, (src >> 8) & 0xff);
 18.9983 +		ea_dst = EA_AX_PD_8();
 18.9984 +		m68ki_write_8(ea_dst, src & 0xff);
 18.9985 +		return;
 18.9986 +	}
 18.9987 +	m68ki_exception_illegal();
 18.9988 +}
 18.9989 +
 18.9990 +
 18.9991 +
 18.9992 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 18.9993 +M68KMAKE_END

    19.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68kconf.h
    19.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    19.3 +++ b/src/musashi/m68kconf.h	Sat Nov 27 01:13:12 2010 +0000
    19.4 @@ -0,0 +1,183 @@
    19.5 +/* ======================================================================== */
    19.6 +/* ========================= LICENSING & COPYRIGHT ======================== */
    19.7 +/* ======================================================================== */
    19.8 +/*
    19.9 + *                                  MUSASHI
   19.10 + *                                Version 3.3
   19.11 + *
   19.12 + * A portable Motorola M680x0 processor emulation engine.
   19.13 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   19.14 + *
   19.15 + * This code may be freely used for non-commercial purposes as long as this
   19.16 + * copyright notice remains unaltered in the source code and any binary files
   19.17 + * containing this code in compiled form.
   19.18 + *
   19.19 + * All other lisencing terms must be negotiated with the author
   19.20 + * (Karl Stenerud).
   19.21 + *
   19.22 + * The latest version of this code can be obtained at:
   19.23 + * http://kstenerud.cjb.net
   19.24 + */
   19.25 +
   19.26 +
   19.27 +
   19.28 +#ifndef M68KCONF__HEADER
   19.29 +#define M68KCONF__HEADER
   19.30 +
   19.31 +
   19.32 +/* Configuration switches.
   19.33 + * Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks.
   19.34 + * OPT_SPECIFY_HANDLER causes the core to link directly to the function
   19.35 + * or macro you specify, rather than using callback functions whose pointer
   19.36 + * must be passed in using m68k_set_xxx_callback().
   19.37 + */
   19.38 +#define OPT_OFF             0
   19.39 +#define OPT_ON              1
   19.40 +#define OPT_SPECIFY_HANDLER 2
   19.41 +
   19.42 +
   19.43 +/* ======================================================================== */
   19.44 +/* ============================== MAME STUFF ============================== */
   19.45 +/* ======================================================================== */
   19.46 +
   19.47 +/* If you're compiling this for MAME, only change M68K_COMPILE_FOR_MAME
   19.48 + * to OPT_ON and use m68kmame.h to configure the 68k core.
   19.49 + */
   19.50 +#ifndef M68K_COMPILE_FOR_MAME
   19.51 +#define M68K_COMPILE_FOR_MAME      OPT_OFF
   19.52 +#endif /* M68K_COMPILE_FOR_MAME */
   19.53 +
   19.54 +#if M68K_COMPILE_FOR_MAME == OPT_ON
   19.55 +#include "m68kmame.h"
   19.56 +#else
   19.57 +
   19.58 +
   19.59 +
   19.60 +/* ======================================================================== */
   19.61 +/* ============================= CONFIGURATION ============================ */
   19.62 +/* ======================================================================== */
   19.63 +
   19.64 +/* Turn on if you want to use the following M68K variants */
   19.65 +#define M68K_EMULATE_010            OPT_ON
   19.66 +#define M68K_EMULATE_EC020          OPT_ON
   19.67 +#define M68K_EMULATE_020            OPT_ON
   19.68 +
   19.69 +
   19.70 +/* If on, the CPU will call m68k_read_immediate_xx() for immediate addressing
   19.71 + * and m68k_read_pcrelative_xx() for PC-relative addressing.
   19.72 + * If off, all read requests from the CPU will be redirected to m68k_read_xx()
   19.73 + */
   19.74 +#define M68K_SEPARATE_READS         OPT_OFF
   19.75 +
   19.76 +
   19.77 +/* If on, CPU will call the interrupt acknowledge callback when it services an
   19.78 + * interrupt.
   19.79 + * If off, all interrupts will be autovectored and all interrupt requests will
   19.80 + * auto-clear when the interrupt is serviced.
   19.81 + */
   19.82 +#define M68K_EMULATE_INT_ACK        OPT_OFF
   19.83 +#define M68K_INT_ACK_CALLBACK(A)    your_int_ack_handler_function(A)
   19.84 +
   19.85 +
   19.86 +/* If on, CPU will call the breakpoint acknowledge callback when it encounters
   19.87 + * a breakpoint instruction and it is running a 68010+.
   19.88 + */
   19.89 +#define M68K_EMULATE_BKPT_ACK       OPT_OFF
   19.90 +#define M68K_BKPT_ACK_CALLBACK()    your_bkpt_ack_handler_function()
   19.91 +
   19.92 +
   19.93 +/* If on, the CPU will monitor the trace flags and take trace exceptions
   19.94 + */
   19.95 +#define M68K_EMULATE_TRACE          OPT_OFF
   19.96 +
   19.97 +
   19.98 +/* If on, CPU will call the output reset callback when it encounters a reset
   19.99 + * instruction.
  19.100 + */
  19.101 +#define M68K_EMULATE_RESET          OPT_OFF
  19.102 +#define M68K_RESET_CALLBACK()       your_reset_handler_function()
  19.103 +
  19.104 +
  19.105 +/* If on, CPU will call the set fc callback on every memory access to
  19.106 + * differentiate between user/supervisor, program/data access like a real
  19.107 + * 68000 would.  This should be enabled and the callback should be set if you
  19.108 + * want to properly emulate the m68010 or higher. (moves uses function codes
  19.109 + * to read/write data from different address spaces)
  19.110 + */
  19.111 +#define M68K_EMULATE_FC             OPT_OFF
  19.112 +#define M68K_SET_FC_CALLBACK(A)     your_set_fc_handler_function(A)
  19.113 +
  19.114 +
  19.115 +/* If on, CPU will call the pc changed callback when it changes the PC by a
  19.116 + * large value.  This allows host programs to be nicer when it comes to
  19.117 + * fetching immediate data and instructions on a banked memory system.
  19.118 + */
  19.119 +#define M68K_MONITOR_PC             OPT_OFF
  19.120 +#define M68K_SET_PC_CALLBACK(A)     your_pc_changed_handler_function(A)
  19.121 +
  19.122 +
  19.123 +/* If on, CPU will call the instruction hook callback before every
  19.124 + * instruction.
  19.125 + */
  19.126 +#define M68K_INSTRUCTION_HOOK       OPT_OFF
  19.127 +#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function()
  19.128 +
  19.129 +
  19.130 +/* If on, the CPU will emulate the 4-byte prefetch queue of a real 68000 */
  19.131 +#define M68K_EMULATE_PREFETCH       OPT_OFF
  19.132 +
  19.133 +
  19.134 +/* If on, the CPU will generate address error exceptions if it tries to
  19.135 + * access a word or longword at an odd address.
  19.136 + * NOTE: Do not enable this!  It is not working!
  19.137 + */
  19.138 +#define M68K_EMULATE_ADDRESS_ERROR  OPT_OFF
  19.139 +
  19.140 +
  19.141 +/* Turn on to enable logging of illegal instruction calls.
  19.142 + * M68K_LOG_FILEHANDLE must be #defined to a stdio file stream.
  19.143 + * Turn on M68K_LOG_1010_1111 to log all 1010 and 1111 calls.
  19.144 + */
  19.145 +#define M68K_LOG_ENABLE             OPT_OFF
  19.146 +#define M68K_LOG_1010_1111          OPT_OFF
  19.147 +#define M68K_LOG_FILEHANDLE         some_file_handle
  19.148 +
  19.149 +
  19.150 +/* ----------------------------- COMPATIBILITY ---------------------------- */
  19.151 +
  19.152 +/* The following options set optimizations that violate the current ANSI
  19.153 + * standard, but will be compliant under the forthcoming C9X standard.
  19.154 + */
  19.155 +
  19.156 +
  19.157 +/* If on, the enulation core will use 64-bit integers to speed up some
  19.158 + * operations.
  19.159 +*/
  19.160 +#define M68K_USE_64_BIT  OPT_OFF
  19.161 +
  19.162 +
  19.163 +/* Set to your compiler's static inline keyword to enable it, or
  19.164 + * set it to blank to disable it.
  19.165 + * If you define INLINE in the makefile, it will override this value.
  19.166 + * NOTE: not enabling inline functions will SEVERELY slow down emulation.
  19.167 + */
  19.168 +#ifndef INLINE
  19.169 +#define INLINE static __inline__
  19.170 +#endif /* INLINE */
  19.171 +
  19.172 +
  19.173 +/* If your environment requires special prefixes for system callback functions
  19.174 + * such as the argument to qsort(), then set them here or in the makefile.
  19.175 + */
  19.176 +#ifndef DECL_SPEC
  19.177 +#define DECL_SPEC
  19.178 +#endif
  19.179 +
  19.180 +#endif /* M68K_COMPILE_FOR_MAME */
  19.181 +
  19.182 +
  19.183 +/* ======================================================================== */
  19.184 +/* ============================== END OF FILE ============================= */
  19.185 +/* ======================================================================== */
  19.186 +
  19.187 +#endif /* M68KCONF__HEADER */

    20.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68kcpu.c
    20.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    20.3 +++ b/src/musashi/m68kcpu.c	Sat Nov 27 01:13:12 2010 +0000
    20.4 @@ -0,0 +1,894 @@
    20.5 +/* ======================================================================== */
    20.6 +/* ========================= LICENSING & COPYRIGHT ======================== */
    20.7 +/* ======================================================================== */
    20.8 +
    20.9 +#if 0
   20.10 +static const char* copyright_notice =
   20.11 +"MUSASHI\n"
   20.12 +"Version 3.3 (2001-01-29)\n"
   20.13 +"A portable Motorola M680x0 processor emulation engine.\n"
   20.14 +"Copyright 1998-2001 Karl Stenerud.  All rights reserved.\n"
   20.15 +"\n"
   20.16 +"This code may be freely used for non-commercial purpooses as long as this\n"
   20.17 +"copyright notice remains unaltered in the source code and any binary files\n"
   20.18 +"containing this code in compiled form.\n"
   20.19 +"\n"
   20.20 +"All other lisencing terms must be negotiated with the author\n"
   20.21 +"(Karl Stenerud).\n"
   20.22 +"\n"
   20.23 +"The latest version of this code can be obtained at:\n"
   20.24 +"http://kstenerud.cjb.net\n"
   20.25 +;
   20.26 +#endif
   20.27 +
   20.28 +
   20.29 +/* ======================================================================== */
   20.30 +/* ================================= NOTES ================================ */
   20.31 +/* ======================================================================== */
   20.32 +
   20.33 +
   20.34 +
   20.35 +/* ======================================================================== */
   20.36 +/* ================================ INCLUDES ============================== */
   20.37 +/* ======================================================================== */
   20.38 +
   20.39 +#include "m68kops.h"
   20.40 +#include "m68kcpu.h"
   20.41 +
   20.42 +/* ======================================================================== */
   20.43 +/* ================================= DATA ================================= */
   20.44 +/* ======================================================================== */
   20.45 +
   20.46 +int  m68ki_initial_cycles;
   20.47 +int  m68ki_remaining_cycles = 0;                     /* Number of clocks remaining */
   20.48 +uint m68ki_tracing = 0;
   20.49 +uint m68ki_address_space;
   20.50 +
   20.51 +#ifdef M68K_LOG_ENABLE
   20.52 +char* m68ki_cpu_names[9] =
   20.53 +{
   20.54 +	"Invalid CPU",
   20.55 +	"M68000",
   20.56 +	"M68010",
   20.57 +	"Invalid CPU",
   20.58 +	"M68EC020"
   20.59 +	"Invalid CPU",
   20.60 +	"Invalid CPU",
   20.61 +	"Invalid CPU",
   20.62 +	"M68020"
   20.63 +};
   20.64 +#endif /* M68K_LOG_ENABLE */
   20.65 +
   20.66 +/* The CPU core */
   20.67 +m68ki_cpu_core m68ki_cpu = {0};
   20.68 +
   20.69 +#if M68K_EMULATE_ADDRESS_ERROR
   20.70 +jmp_buf m68ki_address_error_trap;
   20.71 +#endif /* M68K_EMULATE_ADDRESS_ERROR */
   20.72 +
   20.73 +/* Used by shift & rotate instructions */
   20.74 +uint8 m68ki_shift_8_table[65] =
   20.75 +{
   20.76 +	0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
   20.77 +	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
   20.78 +	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
   20.79 +	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
   20.80 +	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
   20.81 +	0xff, 0xff, 0xff, 0xff, 0xff
   20.82 +};
   20.83 +uint16 m68ki_shift_16_table[65] =
   20.84 +{
   20.85 +	0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
   20.86 +	0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
   20.87 +	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
   20.88 +	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
   20.89 +	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
   20.90 +	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
   20.91 +	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
   20.92 +	0xffff, 0xffff
   20.93 +};
   20.94 +uint m68ki_shift_32_table[65] =
   20.95 +{
   20.96 +	0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
   20.97 +	0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
   20.98 +	0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000,
   20.99 +	0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00,
  20.100 +	0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
  20.101 +	0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
  20.102 +	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
  20.103 +	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
  20.104 +	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
  20.105 +	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
  20.106 +	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
  20.107 +};
  20.108 +
  20.109 +
  20.110 +/* Number of clock cycles to use for exception processing.
  20.111 + * I used 4 for any vectors that are undocumented for processing times.
  20.112 + */
  20.113 +uint8 m68ki_exception_cycle_table[3][256] =
  20.114 +{
  20.115 +	{ /* 000 */
  20.116 +		  4, /*  0: Reset - Initial Stack Pointer                      */
  20.117 +		  4, /*  1: Reset - Initial Program Counter                    */
  20.118 +		 50, /*  2: Bus Error                             (unemulated) */
  20.119 +		 50, /*  3: Address Error                         (unemulated) */
  20.120 +		 34, /*  4: Illegal Instruction                                */
  20.121 +		 38, /*  5: Divide by Zero -- ASG: changed from 42             */
  20.122 +		 40, /*  6: CHK -- ASG: chanaged from 44                       */
  20.123 +		 34, /*  7: TRAPV                                              */
  20.124 +		 34, /*  8: Privilege Violation                                */
  20.125 +		 34, /*  9: Trace                                              */
  20.126 +		  4, /* 10: 1010                                               */
  20.127 +		  4, /* 11: 1111                                               */
  20.128 +		  4, /* 12: RESERVED                                           */
  20.129 +		  4, /* 13: Coprocessor Protocol Violation        (unemulated) */
  20.130 +		  4, /* 14: Format Error                                       */
  20.131 +		 44, /* 15: Uninitialized Interrupt                            */
  20.132 +		  4, /* 16: RESERVED                                           */
  20.133 +		  4, /* 17: RESERVED                                           */
  20.134 +		  4, /* 18: RESERVED                                           */
  20.135 +		  4, /* 19: RESERVED                                           */
  20.136 +		  4, /* 20: RESERVED                                           */
  20.137 +		  4, /* 21: RESERVED                                           */
  20.138 +		  4, /* 22: RESERVED                                           */
  20.139 +		  4, /* 23: RESERVED                                           */
  20.140 +		 44, /* 24: Spurious Interrupt                                 */
  20.141 +		 44, /* 25: Level 1 Interrupt Autovector                       */
  20.142 +		 44, /* 26: Level 2 Interrupt Autovector                       */
  20.143 +		 44, /* 27: Level 3 Interrupt Autovector                       */
  20.144 +		 44, /* 28: Level 4 Interrupt Autovector                       */
  20.145 +		 44, /* 29: Level 5 Interrupt Autovector                       */
  20.146 +		 44, /* 30: Level 6 Interrupt Autovector                       */
  20.147 +		 44, /* 31: Level 7 Interrupt Autovector                       */
  20.148 +		 34, /* 32: TRAP #0 -- ASG: chanaged from 38                   */
  20.149 +		 34, /* 33: TRAP #1                                            */
  20.150 +		 34, /* 34: TRAP #2                                            */
  20.151 +		 34, /* 35: TRAP #3                                            */
  20.152 +		 34, /* 36: TRAP #4                                            */
  20.153 +		 34, /* 37: TRAP #5                                            */
  20.154 +		 34, /* 38: TRAP #6                                            */
  20.155 +		 34, /* 39: TRAP #7                                            */
  20.156 +		 34, /* 40: TRAP #8                                            */
  20.157 +		 34, /* 41: TRAP #9                                            */
  20.158 +		 34, /* 42: TRAP #10                                           */
  20.159 +		 34, /* 43: TRAP #11                                           */
  20.160 +		 34, /* 44: TRAP #12                                           */
  20.161 +		 34, /* 45: TRAP #13                                           */
  20.162 +		 34, /* 46: TRAP #14                                           */
  20.163 +		 34, /* 47: TRAP #15                                           */
  20.164 +		  4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
  20.165 +		  4, /* 49: FP Inexact Result                     (unemulated) */
  20.166 +		  4, /* 50: FP Divide by Zero                     (unemulated) */
  20.167 +		  4, /* 51: FP Underflow                          (unemulated) */
  20.168 +		  4, /* 52: FP Operand Error                      (unemulated) */
  20.169 +		  4, /* 53: FP Overflow                           (unemulated) */
  20.170 +		  4, /* 54: FP Signaling NAN                      (unemulated) */
  20.171 +		  4, /* 55: FP Unimplemented Data Type            (unemulated) */
  20.172 +		  4, /* 56: MMU Configuration Error               (unemulated) */
  20.173 +		  4, /* 57: MMU Illegal Operation Error           (unemulated) */
  20.174 +		  4, /* 58: MMU Access Level Violation Error      (unemulated) */
  20.175 +		  4, /* 59: RESERVED                                           */
  20.176 +		  4, /* 60: RESERVED                                           */
  20.177 +		  4, /* 61: RESERVED                                           */
  20.178 +		  4, /* 62: RESERVED                                           */
  20.179 +		  4, /* 63: RESERVED                                           */
  20.180 +		     /* 64-255: User Defined                                   */
  20.181 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.182 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.183 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.184 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.185 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.186 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
  20.187 +	},
  20.188 +	{ /* 010 */
  20.189 +		  4, /*  0: Reset - Initial Stack Pointer                      */
  20.190 +		  4, /*  1: Reset - Initial Program Counter                    */
  20.191 +		126, /*  2: Bus Error                             (unemulated) */
  20.192 +		126, /*  3: Address Error                         (unemulated) */
  20.193 +		 38, /*  4: Illegal Instruction                                */
  20.194 +		 44, /*  5: Divide by Zero                                     */
  20.195 +		 44, /*  6: CHK                                                */
  20.196 +		 34, /*  7: TRAPV                                              */
  20.197 +		 38, /*  8: Privilege Violation                                */
  20.198 +		 38, /*  9: Trace                                              */
  20.199 +		  4, /* 10: 1010                                               */
  20.200 +		  4, /* 11: 1111                                               */
  20.201 +		  4, /* 12: RESERVED                                           */
  20.202 +		  4, /* 13: Coprocessor Protocol Violation        (unemulated) */
  20.203 +		  4, /* 14: Format Error                                       */
  20.204 +		 44, /* 15: Uninitialized Interrupt                            */
  20.205 +		  4, /* 16: RESERVED                                           */
  20.206 +		  4, /* 17: RESERVED                                           */
  20.207 +		  4, /* 18: RESERVED                                           */
  20.208 +		  4, /* 19: RESERVED                                           */
  20.209 +		  4, /* 20: RESERVED                                           */
  20.210 +		  4, /* 21: RESERVED                                           */
  20.211 +		  4, /* 22: RESERVED                                           */
  20.212 +		  4, /* 23: RESERVED                                           */
  20.213 +		 46, /* 24: Spurious Interrupt                                 */
  20.214 +		 46, /* 25: Level 1 Interrupt Autovector                       */
  20.215 +		 46, /* 26: Level 2 Interrupt Autovector                       */
  20.216 +		 46, /* 27: Level 3 Interrupt Autovector                       */
  20.217 +		 46, /* 28: Level 4 Interrupt Autovector                       */
  20.218 +		 46, /* 29: Level 5 Interrupt Autovector                       */
  20.219 +		 46, /* 30: Level 6 Interrupt Autovector                       */
  20.220 +		 46, /* 31: Level 7 Interrupt Autovector                       */
  20.221 +		 38, /* 32: TRAP #0                                            */
  20.222 +		 38, /* 33: TRAP #1                                            */
  20.223 +		 38, /* 34: TRAP #2                                            */
  20.224 +		 38, /* 35: TRAP #3                                            */
  20.225 +		 38, /* 36: TRAP #4                                            */
  20.226 +		 38, /* 37: TRAP #5                                            */
  20.227 +		 38, /* 38: TRAP #6                                            */
  20.228 +		 38, /* 39: TRAP #7                                            */
  20.229 +		 38, /* 40: TRAP #8                                            */
  20.230 +		 38, /* 41: TRAP #9                                            */
  20.231 +		 38, /* 42: TRAP #10                                           */
  20.232 +		 38, /* 43: TRAP #11                                           */
  20.233 +		 38, /* 44: TRAP #12                                           */
  20.234 +		 38, /* 45: TRAP #13                                           */
  20.235 +		 38, /* 46: TRAP #14                                           */
  20.236 +		 38, /* 47: TRAP #15                                           */
  20.237 +		  4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
  20.238 +		  4, /* 49: FP Inexact Result                     (unemulated) */
  20.239 +		  4, /* 50: FP Divide by Zero                     (unemulated) */
  20.240 +		  4, /* 51: FP Underflow                          (unemulated) */
  20.241 +		  4, /* 52: FP Operand Error                      (unemulated) */
  20.242 +		  4, /* 53: FP Overflow                           (unemulated) */
  20.243 +		  4, /* 54: FP Signaling NAN                      (unemulated) */
  20.244 +		  4, /* 55: FP Unimplemented Data Type            (unemulated) */
  20.245 +		  4, /* 56: MMU Configuration Error               (unemulated) */
  20.246 +		  4, /* 57: MMU Illegal Operation Error           (unemulated) */
  20.247 +		  4, /* 58: MMU Access Level Violation Error      (unemulated) */
  20.248 +		  4, /* 59: RESERVED                                           */
  20.249 +		  4, /* 60: RESERVED                                           */
  20.250 +		  4, /* 61: RESERVED                                           */
  20.251 +		  4, /* 62: RESERVED                                           */
  20.252 +		  4, /* 63: RESERVED                                           */
  20.253 +		     /* 64-255: User Defined                                   */
  20.254 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.255 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.256 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.257 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.258 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.259 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
  20.260 +	},
  20.261 +	{ /* 020 */
  20.262 +		  4, /*  0: Reset - Initial Stack Pointer                      */
  20.263 +		  4, /*  1: Reset - Initial Program Counter                    */
  20.264 +		 50, /*  2: Bus Error                             (unemulated) */
  20.265 +		 50, /*  3: Address Error                         (unemulated) */
  20.266 +		 20, /*  4: Illegal Instruction                                */
  20.267 +		 38, /*  5: Divide by Zero                                     */
  20.268 +		 40, /*  6: CHK                                                */
  20.269 +		 20, /*  7: TRAPV                                              */
  20.270 +		 34, /*  8: Privilege Violation                                */
  20.271 +		 25, /*  9: Trace                                              */
  20.272 +		 20, /* 10: 1010                                               */
  20.273 +		 20, /* 11: 1111                                               */
  20.274 +		  4, /* 12: RESERVED                                           */
  20.275 +		  4, /* 13: Coprocessor Protocol Violation        (unemulated) */
  20.276 +		  4, /* 14: Format Error                                       */
  20.277 +		 30, /* 15: Uninitialized Interrupt                            */
  20.278 +		  4, /* 16: RESERVED                                           */
  20.279 +		  4, /* 17: RESERVED                                           */
  20.280 +		  4, /* 18: RESERVED                                           */
  20.281 +		  4, /* 19: RESERVED                                           */
  20.282 +		  4, /* 20: RESERVED                                           */
  20.283 +		  4, /* 21: RESERVED                                           */
  20.284 +		  4, /* 22: RESERVED                                           */
  20.285 +		  4, /* 23: RESERVED                                           */
  20.286 +		 30, /* 24: Spurious Interrupt                                 */
  20.287 +		 30, /* 25: Level 1 Interrupt Autovector                       */
  20.288 +		 30, /* 26: Level 2 Interrupt Autovector                       */
  20.289 +		 30, /* 27: Level 3 Interrupt Autovector                       */
  20.290 +		 30, /* 28: Level 4 Interrupt Autovector                       */
  20.291 +		 30, /* 29: Level 5 Interrupt Autovector                       */
  20.292 +		 30, /* 30: Level 6 Interrupt Autovector                       */
  20.293 +		 30, /* 31: Level 7 Interrupt Autovector                       */
  20.294 +		 20, /* 32: TRAP #0                                            */
  20.295 +		 20, /* 33: TRAP #1                                            */
  20.296 +		 20, /* 34: TRAP #2                                            */
  20.297 +		 20, /* 35: TRAP #3                                            */
  20.298 +		 20, /* 36: TRAP #4                                            */
  20.299 +		 20, /* 37: TRAP #5                                            */
  20.300 +		 20, /* 38: TRAP #6                                            */
  20.301 +		 20, /* 39: TRAP #7                                            */
  20.302 +		 20, /* 40: TRAP #8                                            */
  20.303 +		 20, /* 41: TRAP #9                                            */
  20.304 +		 20, /* 42: TRAP #10                                           */
  20.305 +		 20, /* 43: TRAP #11                                           */
  20.306 +		 20, /* 44: TRAP #12                                           */
  20.307 +		 20, /* 45: TRAP #13                                           */
  20.308 +		 20, /* 46: TRAP #14                                           */
  20.309 +		 20, /* 47: TRAP #15                                           */
  20.310 +		  4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
  20.311 +		  4, /* 49: FP Inexact Result                     (unemulated) */
  20.312 +		  4, /* 50: FP Divide by Zero                     (unemulated) */
  20.313 +		  4, /* 51: FP Underflow                          (unemulated) */
  20.314 +		  4, /* 52: FP Operand Error                      (unemulated) */
  20.315 +		  4, /* 53: FP Overflow                           (unemulated) */
  20.316 +		  4, /* 54: FP Signaling NAN                      (unemulated) */
  20.317 +		  4, /* 55: FP Unimplemented Data Type            (unemulated) */
  20.318 +		  4, /* 56: MMU Configuration Error               (unemulated) */
  20.319 +		  4, /* 57: MMU Illegal Operation Error           (unemulated) */
  20.320 +		  4, /* 58: MMU Access Level Violation Error      (unemulated) */
  20.321 +		  4, /* 59: RESERVED                                           */
  20.322 +		  4, /* 60: RESERVED                                           */
  20.323 +		  4, /* 61: RESERVED                                           */
  20.324 +		  4, /* 62: RESERVED                                           */
  20.325 +		  4, /* 63: RESERVED                                           */
  20.326 +		     /* 64-255: User Defined                                   */
  20.327 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.328 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.329 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.330 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.331 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  20.332 +		  4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
  20.333 +	}
  20.334 +};
  20.335 +
  20.336 +uint8 m68ki_ea_idx_cycle_table[64] =
  20.337 +{
  20.338 +	 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,
  20.339 +	 0, /* ..01.000 no memory indirect, base NULL             */
  20.340 +	 5, /* ..01..01 memory indirect,    base NULL, outer NULL */
  20.341 +	 7, /* ..01..10 memory indirect,    base NULL, outer 16   */
  20.342 +	 7, /* ..01..11 memory indirect,    base NULL, outer 32   */
  20.343 +	 0,  5,  7,  7,  0,  5,  7,  7,  0,  5,  7,  7,
  20.344 +	 2, /* ..10.000 no memory indirect, base 16               */
  20.345 +	 7, /* ..10..01 memory indirect,    base 16,   outer NULL */
  20.346 +	 9, /* ..10..10 memory indirect,    base 16,   outer 16   */
  20.347 +	 9, /* ..10..11 memory indirect,    base 16,   outer 32   */
  20.348 +	 0,  7,  9,  9,  0,  7,  9,  9,  0,  7,  9,  9,
  20.349 +	 6, /* ..11.000 no memory indirect, base 32               */
  20.350 +	11, /* ..11..01 memory indirect,    base 32,   outer NULL */
  20.351 +	13, /* ..11..10 memory indirect,    base 32,   outer 16   */
  20.352 +	13, /* ..11..11 memory indirect,    base 32,   outer 32   */
  20.353 +	 0, 11, 13, 13,  0, 11, 13, 13,  0, 11, 13, 13
  20.354 +};
  20.355 +
  20.356 +
  20.357 +
  20.358 +/* ======================================================================== */
  20.359 +/* =============================== CALLBACKS ============================== */
  20.360 +/* ======================================================================== */
  20.361 +
  20.362 +/* Default callbacks used if the callback hasn't been set yet, or if the
  20.363 + * callback is set to NULL
  20.364 + */
  20.365 +
  20.366 +/* Interrupt acknowledge */
  20.367 +static int default_int_ack_callback_data;
  20.368 +static int default_int_ack_callback(int int_level)
  20.369 +{
  20.370 +	default_int_ack_callback_data = int_level;
  20.371 +	CPU_INT_LEVEL = 0;
  20.372 +	return M68K_INT_ACK_AUTOVECTOR;
  20.373 +}
  20.374 +
  20.375 +/* Breakpoint acknowledge */
  20.376 +static unsigned int default_bkpt_ack_callback_data;
  20.377 +static void default_bkpt_ack_callback(unsigned int data)
  20.378 +{
  20.379 +	default_bkpt_ack_callback_data = data;
  20.380 +}
  20.381 +
  20.382 +/* Called when a reset instruction is executed */
  20.383 +static void default_reset_instr_callback(void)
  20.384 +{
  20.385 +}
  20.386 +
  20.387 +/* Called when the program counter changed by a large value */
  20.388 +static unsigned int default_pc_changed_callback_data;
  20.389 +static void default_pc_changed_callback(unsigned int new_pc)
  20.390 +{
  20.391 +	default_pc_changed_callback_data = new_pc;
  20.392 +}
  20.393 +
  20.394 +/* Called every time there's bus activity (read/write to/from memory */
  20.395 +static unsigned int default_set_fc_callback_data;
  20.396 +static void default_set_fc_callback(unsigned int new_fc)
  20.397 +{
  20.398 +	default_set_fc_callback_data = new_fc;
  20.399 +}
  20.400 +
  20.401 +/* Called every instruction cycle prior to execution */
  20.402 +static void default_instr_hook_callback(void)
  20.403 +{
  20.404 +}
  20.405 +
  20.406 +
  20.407 +
  20.408 +/* ======================================================================== */
  20.409 +/* ================================= API ================================== */
  20.410 +/* ======================================================================== */
  20.411 +
  20.412 +/* Access the internals of the CPU */
  20.413 +unsigned int m68k_get_reg(void* context, m68k_register_t regnum)
  20.414 +{
  20.415 +	m68ki_cpu_core* cpu = context != NULL ?(m68ki_cpu_core*)context : &m68ki_cpu;
  20.416 +
  20.417 +	switch(regnum)
  20.418 +	{
  20.419 +		case M68K_REG_D0:	return cpu->dar[0];
  20.420 +		case M68K_REG_D1:	return cpu->dar[1];
  20.421 +		case M68K_REG_D2:	return cpu->dar[2];
  20.422 +		case M68K_REG_D3:	return cpu->dar[3];
  20.423 +		case M68K_REG_D4:	return cpu->dar[4];
  20.424 +		case M68K_REG_D5:	return cpu->dar[5];
  20.425 +		case M68K_REG_D6:	return cpu->dar[6];
  20.426 +		case M68K_REG_D7:	return cpu->dar[7];
  20.427 +		case M68K_REG_A0:	return cpu->dar[8];
  20.428 +		case M68K_REG_A1:	return cpu->dar[9];
  20.429 +		case M68K_REG_A2:	return cpu->dar[10];
  20.430 +		case M68K_REG_A3:	return cpu->dar[11];
  20.431 +		case M68K_REG_A4:	return cpu->dar[12];
  20.432 +		case M68K_REG_A5:	return cpu->dar[13];
  20.433 +		case M68K_REG_A6:	return cpu->dar[14];
  20.434 +		case M68K_REG_A7:	return cpu->dar[15];
  20.435 +		case M68K_REG_PC:	return MASK_OUT_ABOVE_32(cpu->pc);
  20.436 +		case M68K_REG_SR:	return	cpu->t1_flag						|
  20.437 +									cpu->t0_flag						|
  20.438 +									(cpu->s_flag << 11)					|
  20.439 +									(cpu->m_flag << 11)					|
  20.440 +									cpu->int_mask						|
  20.441 +									((cpu->x_flag & XFLAG_SET) >> 4)	|
  20.442 +									((cpu->n_flag & NFLAG_SET) >> 4)	|
  20.443 +									((!cpu->not_z_flag) << 2)			|
  20.444 +									((cpu->v_flag & VFLAG_SET) >> 6)	|
  20.445 +									((cpu->c_flag & CFLAG_SET) >> 8);
  20.446 +		case M68K_REG_SP:	return cpu->dar[15];
  20.447 +		case M68K_REG_USP:	return cpu->s_flag ? cpu->sp[0] : cpu->dar[15];
  20.448 +		case M68K_REG_ISP:	return cpu->s_flag && !cpu->m_flag ? cpu->dar[15] : cpu->sp[4];
  20.449 +		case M68K_REG_MSP:	return cpu->s_flag && cpu->m_flag ? cpu->dar[15] : cpu->sp[6];
  20.450 +		case M68K_REG_SFC:	return cpu->sfc;
  20.451 +		case M68K_REG_DFC:	return cpu->dfc;
  20.452 +		case M68K_REG_VBR:	return cpu->vbr;
  20.453 +		case M68K_REG_CACR:	return cpu->cacr;
  20.454 +		case M68K_REG_CAAR:	return cpu->caar;
  20.455 +		case M68K_REG_PREF_ADDR:	return cpu->pref_addr;
  20.456 +		case M68K_REG_PREF_DATA:	return cpu->pref_data;
  20.457 +		case M68K_REG_PPC:	return MASK_OUT_ABOVE_32(cpu->ppc);
  20.458 +		case M68K_REG_IR:	return cpu->ir;
  20.459 +		case M68K_REG_CPU_TYPE:
  20.460 +			switch(cpu->cpu_type)
  20.461 +			{
  20.462 +				case CPU_TYPE_000:		return (unsigned int)M68K_CPU_TYPE_68000;
  20.463 +				case CPU_TYPE_010:		return (unsigned int)M68K_CPU_TYPE_68010;
  20.464 +				case CPU_TYPE_EC020:	return (unsigned int)M68K_CPU_TYPE_68EC020;
  20.465 +				case CPU_TYPE_020:		return (unsigned int)M68K_CPU_TYPE_68020;
  20.466 +			}
  20.467 +			return M68K_CPU_TYPE_INVALID;
  20.468 +		default:			return 0;
  20.469 +	}
  20.470 +	return 0;
  20.471 +}
  20.472 +
  20.473 +void m68k_set_reg(m68k_register_t regnum, unsigned int value)
  20.474 +{
  20.475 +	switch(regnum)
  20.476 +	{
  20.477 +		case M68K_REG_D0:	REG_D[0] = MASK_OUT_ABOVE_32(value); return;
  20.478 +		case M68K_REG_D1:	REG_D[1] = MASK_OUT_ABOVE_32(value); return;
  20.479 +		case M68K_REG_D2:	REG_D[2] = MASK_OUT_ABOVE_32(value); return;
  20.480 +		case M68K_REG_D3:	REG_D[3] = MASK_OUT_ABOVE_32(value); return;
  20.481 +		case M68K_REG_D4:	REG_D[4] = MASK_OUT_ABOVE_32(value); return;
  20.482 +		case M68K_REG_D5:	REG_D[5] = MASK_OUT_ABOVE_32(value); return;
  20.483 +		case M68K_REG_D6:	REG_D[6] = MASK_OUT_ABOVE_32(value); return;
  20.484 +		case M68K_REG_D7:	REG_D[7] = MASK_OUT_ABOVE_32(value); return;
  20.485 +		case M68K_REG_A0:	REG_A[0] = MASK_OUT_ABOVE_32(value); return;
  20.486 +		case M68K_REG_A1:	REG_A[1] = MASK_OUT_ABOVE_32(value); return;
  20.487 +		case M68K_REG_A2:	REG_A[2] = MASK_OUT_ABOVE_32(value); return;
  20.488 +		case M68K_REG_A3:	REG_A[3] = MASK_OUT_ABOVE_32(value); return;
  20.489 +		case M68K_REG_A4:	REG_A[4] = MASK_OUT_ABOVE_32(value); return;
  20.490 +		case M68K_REG_A5:	REG_A[5] = MASK_OUT_ABOVE_32(value); return;
  20.491 +		case M68K_REG_A6:	REG_A[6] = MASK_OUT_ABOVE_32(value); return;
  20.492 +		case M68K_REG_A7:	REG_A[7] = MASK_OUT_ABOVE_32(value); return;
  20.493 +		case M68K_REG_PC:	m68ki_jump(MASK_OUT_ABOVE_32(value)); return;
  20.494 +		case M68K_REG_SR:	m68ki_set_sr(value); return;
  20.495 +		case M68K_REG_SP:	REG_SP = MASK_OUT_ABOVE_32(value); return;
  20.496 +		case M68K_REG_USP:	if(FLAG_S)
  20.497 +								REG_USP = MASK_OUT_ABOVE_32(value);
  20.498 +							else
  20.499 +								REG_SP = MASK_OUT_ABOVE_32(value);
  20.500 +							return;
  20.501 +		case M68K_REG_ISP:	if(FLAG_S && !FLAG_M)
  20.502 +								REG_SP = MASK_OUT_ABOVE_32(value);
  20.503 +							else
  20.504 +								REG_ISP = MASK_OUT_ABOVE_32(value);
  20.505 +							return;
  20.506 +		case M68K_REG_MSP:	if(FLAG_S && FLAG_M)
  20.507 +								REG_SP = MASK_OUT_ABOVE_32(value);
  20.508 +							else
  20.509 +								REG_MSP = MASK_OUT_ABOVE_32(value);
  20.510 +							return;
  20.511 +		case M68K_REG_VBR:	REG_VBR = MASK_OUT_ABOVE_32(value); return;
  20.512 +		case M68K_REG_SFC:	REG_SFC = value & 7; return;
  20.513 +		case M68K_REG_DFC:	REG_DFC = value & 7; return;
  20.514 +		case M68K_REG_CACR:	REG_CACR = MASK_OUT_ABOVE_32(value); return;
  20.515 +		case M68K_REG_CAAR:	REG_CAAR = MASK_OUT_ABOVE_32(value); return;
  20.516 +		case M68K_REG_PPC:	REG_PPC = MASK_OUT_ABOVE_32(value); return;
  20.517 +		case M68K_REG_IR:	REG_IR = MASK_OUT_ABOVE_16(value); return;
  20.518 +		case M68K_REG_CPU_TYPE: m68k_set_cpu_type(value); return;
  20.519 +		default:			return;
  20.520 +	}
  20.521 +}
  20.522 +
  20.523 +/* Set the callbacks */
  20.524 +void m68k_set_int_ack_callback(int  (*callback)(int int_level))
  20.525 +{
  20.526 +	CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback;
  20.527 +}
  20.528 +
  20.529 +void m68k_set_bkpt_ack_callback(void  (*callback)(unsigned int data))
  20.530 +{
  20.531 +	CALLBACK_BKPT_ACK = callback ? callback : default_bkpt_ack_callback;
  20.532 +}
  20.533 +
  20.534 +void m68k_set_reset_instr_callback(void  (*callback)(void))
  20.535 +{
  20.536 +	CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback;
  20.537 +}
  20.538 +
  20.539 +void m68k_set_pc_changed_callback(void  (*callback)(unsigned int new_pc))
  20.540 +{
  20.541 +	CALLBACK_PC_CHANGED = callback ? callback : default_pc_changed_callback;
  20.542 +}
  20.543 +
  20.544 +void m68k_set_fc_callback(void  (*callback)(unsigned int new_fc))
  20.545 +{
  20.546 +	CALLBACK_SET_FC = callback ? callback : default_set_fc_callback;
  20.547 +}
  20.548 +
  20.549 +void m68k_set_instr_hook_callback(void  (*callback)(void))
  20.550 +{
  20.551 +	CALLBACK_INSTR_HOOK = callback ? callback : default_instr_hook_callback;
  20.552 +}
  20.553 +
  20.554 +#include <stdio.h>
  20.555 +/* Set the CPU type. */
  20.556 +void m68k_set_cpu_type(unsigned int cpu_type)
  20.557 +{
  20.558 +	switch(cpu_type)
  20.559 +	{
  20.560 +		case M68K_CPU_TYPE_68000:
  20.561 +			CPU_TYPE         = CPU_TYPE_000;
  20.562 +			CPU_ADDRESS_MASK = 0x00ffffff;
  20.563 +			CPU_SR_MASK      = 0xa71f; /* T1 -- S  -- -- I2 I1 I0 -- -- -- X  N  Z  V  C  */
  20.564 +			CYC_INSTRUCTION  = m68ki_cycles[0];
  20.565 +			CYC_EXCEPTION    = m68ki_exception_cycle_table[0];
  20.566 +			CYC_BCC_NOTAKE_B = -2;
  20.567 +			CYC_BCC_NOTAKE_W = 2;
  20.568 +			CYC_DBCC_F_NOEXP = -2;
  20.569 +			CYC_DBCC_F_EXP   = 2;
  20.570 +			CYC_SCC_R_FALSE  = 2;
  20.571 +			CYC_MOVEM_W      = 2;
  20.572 +			CYC_MOVEM_L      = 3;
  20.573 +			CYC_SHIFT        = 1;
  20.574 +			CYC_RESET        = 132;
  20.575 +			return;
  20.576 +		case M68K_CPU_TYPE_68010:
  20.577 +			CPU_TYPE         = CPU_TYPE_010;
  20.578 +			CPU_ADDRESS_MASK = 0x00ffffff;
  20.579 +			CPU_SR_MASK      = 0xa71f; /* T1 -- S  -- -- I2 I1 I0 -- -- -- X  N  Z  V  C  */
  20.580 +			CYC_INSTRUCTION  = m68ki_cycles[1];
  20.581 +			CYC_EXCEPTION    = m68ki_exception_cycle_table[1];
  20.582 +			CYC_BCC_NOTAKE_B = -4;
  20.583 +			CYC_BCC_NOTAKE_W = 0;
  20.584 +			CYC_DBCC_F_NOEXP = 0;
  20.585 +			CYC_DBCC_F_EXP   = 6;
  20.586 +			CYC_SCC_R_FALSE  = 0;
  20.587 +			CYC_MOVEM_W      = 2;
  20.588 +			CYC_MOVEM_L      = 3;
  20.589 +			CYC_SHIFT        = 1;
  20.590 +			CYC_RESET        = 130;
  20.591 +			return;
  20.592 +		case M68K_CPU_TYPE_68EC020:
  20.593 +			CPU_TYPE         = CPU_TYPE_EC020;
  20.594 +			CPU_ADDRESS_MASK = 0x00ffffff;
  20.595 +			CPU_SR_MASK      = 0xf71f; /* T1 T0 S  M  -- I2 I1 I0 -- -- -- X  N  Z  V  C  */
  20.596 +			CYC_INSTRUCTION  = m68ki_cycles[2];
  20.597 +			CYC_EXCEPTION    = m68ki_exception_cycle_table[2];
  20.598 +			CYC_BCC_NOTAKE_B = -2;
  20.599 +			CYC_BCC_NOTAKE_W = 0;
  20.600 +			CYC_DBCC_F_NOEXP = 0;
  20.601 +			CYC_DBCC_F_EXP   = 4;
  20.602 +			CYC_SCC_R_FALSE  = 0;
  20.603 +			CYC_MOVEM_W      = 2;
  20.604 +			CYC_MOVEM_L      = 2; 
  20.605 +			CYC_SHIFT        = 0;
  20.606 +			CYC_RESET        = 518;
  20.607 +			return;
  20.608 +		case M68K_CPU_TYPE_68020:
  20.609 +			CPU_TYPE         = CPU_TYPE_020;
  20.610 +			CPU_ADDRESS_MASK = 0xffffffff;
  20.611 +			CPU_SR_MASK      = 0xf71f; /* T1 T0 S  M  -- I2 I1 I0 -- -- -- X  N  Z  V  C  */
  20.612 +			CYC_INSTRUCTION  = m68ki_cycles[2];
  20.613 +			CYC_EXCEPTION    = m68ki_exception_cycle_table[2];
  20.614 +			CYC_BCC_NOTAKE_B = -2;
  20.615 +			CYC_BCC_NOTAKE_W = 0;
  20.616 +			CYC_DBCC_F_NOEXP = 0;
  20.617 +			CYC_DBCC_F_EXP   = 4;
  20.618 +			CYC_SCC_R_FALSE  = 0;
  20.619 +			CYC_MOVEM_W      = 2;
  20.620 +			CYC_MOVEM_L      = 2;
  20.621 +			CYC_SHIFT        = 0;
  20.622 +			CYC_RESET        = 518;
  20.623 +			return;
  20.624 +	}
  20.625 +}
  20.626 +
  20.627 +/* Execute some instructions until we use up num_cycles clock cycles */
  20.628 +/* ASG: removed per-instruction interrupt checks */
  20.629 +int m68k_execute(int num_cycles)
  20.630 +{
  20.631 +	/* Make sure we're not stopped */
  20.632 +	if(!CPU_STOPPED)
  20.633 +	{
  20.634 +		/* Set our pool of clock cycles available */
  20.635 +		SET_CYCLES(num_cycles);
  20.636 +		m68ki_initial_cycles = num_cycles;
  20.637 +
  20.638 +		/* ASG: update cycles */
  20.639 +		USE_CYCLES(CPU_INT_CYCLES);
  20.640 +		CPU_INT_CYCLES = 0;
  20.641 +
  20.642 +		/* Return point if we had an address error */
  20.643 +		m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */
  20.644 +
  20.645 +		/* Main loop.  Keep going until we run out of clock cycles */
  20.646 +		do
  20.647 +		{
  20.648 +			/* Set tracing accodring to T1. (T0 is done inside instruction) */
  20.649 +			m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
  20.650 +
  20.651 +			/* Set the address space for reads */
  20.652 +			m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */
  20.653 +
  20.654 +			/* Call external hook to peek at CPU */
  20.655 +			m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */
  20.656 +
  20.657 +			/* Record previous program counter */
  20.658 +			REG_PPC = REG_PC;
  20.659 +
  20.660 +			/* Read an instruction and call its handler */
  20.661 +			REG_IR = m68ki_read_imm_16();
  20.662 +			m68ki_instruction_jump_table[REG_IR]();
  20.663 +			USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
  20.664 +
  20.665 +			/* Trace m68k_exception, if necessary */
  20.666 +			m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
  20.667 +		} while(GET_CYCLES() > 0);
  20.668 +
  20.669 +		/* set previous PC to current PC for the next entry into the loop */
  20.670 +		REG_PPC = REG_PC;
  20.671 +
  20.672 +		/* ASG: update cycles */
  20.673 +		USE_CYCLES(CPU_INT_CYCLES);
  20.674 +		CPU_INT_CYCLES = 0;
  20.675 +
  20.676 +		/* return how many clocks we used */
  20.677 +		return m68ki_initial_cycles - GET_CYCLES();
  20.678 +	}
  20.679 +
  20.680 +	/* We get here if the CPU is stopped or halted */
  20.681 +	SET_CYCLES(0);
  20.682 +	CPU_INT_CYCLES = 0;
  20.683 +
  20.684 +	return num_cycles;
  20.685 +}
  20.686 +
  20.687 +
  20.688 +int m68k_cycles_run(void)
  20.689 +{
  20.690 +	return m68ki_initial_cycles - GET_CYCLES();
  20.691 +}
  20.692 +
  20.693 +int m68k_cycles_remaining(void)
  20.694 +{
  20.695 +	return GET_CYCLES();
  20.696 +}
  20.697 +
  20.698 +/* Change the timeslice */
  20.699 +void m68k_modify_timeslice(int cycles)
  20.700 +{
  20.701 +	m68ki_initial_cycles += cycles;
  20.702 +	ADD_CYCLES(cycles);
  20.703 +}
  20.704 +
  20.705 +
  20.706 +void m68k_end_timeslice(void)
  20.707 +{
  20.708 +	m68ki_initial_cycles = GET_CYCLES();
  20.709 +	SET_CYCLES(0);
  20.710 +}
  20.711 +
  20.712 +
  20.713 +/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
  20.714 +/* KS: Modified so that IPL* bits match with mask positions in the SR
  20.715 + *     and cleaned out remenants of the interrupt controller.
  20.716 + */
  20.717 +void m68k_set_irq(unsigned int int_level)
  20.718 +{
  20.719 +	uint old_level = CPU_INT_LEVEL;
  20.720 +	CPU_INT_LEVEL = int_level << 8;
  20.721 +
  20.722 +	/* A transition from < 7 to 7 always interrupts (NMI) */
  20.723 +	/* Note: Level 7 can also level trigger like a normal IRQ */
  20.724 +	if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700)
  20.725 +		m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */
  20.726 +	else
  20.727 +		m68ki_check_interrupts(); /* Level triggered (IRQ) */
  20.728 +}
  20.729 +
  20.730 +
  20.731 +/* Pulse the RESET line on the CPU */
  20.732 +void m68k_pulse_reset(void)
  20.733 +{
  20.734 +	static uint emulation_initialized = 0;
  20.735 +
  20.736 +	/* The first call to this function initializes the opcode handler jump table */
  20.737 +	if(!emulation_initialized)
  20.738 +	{
  20.739 +		m68ki_build_opcode_table();
  20.740 +		m68k_set_int_ack_callback(NULL);
  20.741 +		m68k_set_bkpt_ack_callback(NULL);
  20.742 +		m68k_set_reset_instr_callback(NULL);
  20.743 +		m68k_set_pc_changed_callback(NULL);
  20.744 +		m68k_set_fc_callback(NULL);
  20.745 +		m68k_set_instr_hook_callback(NULL);
  20.746 +
  20.747 +		emulation_initialized = 1;
  20.748 +	}
  20.749 +
  20.750 +
  20.751 +	if(CPU_TYPE == 0)	/* KW 990319 */
  20.752 +		m68k_set_cpu_type(M68K_CPU_TYPE_68000);
  20.753 +
  20.754 +	/* Clear all stop levels and eat up all remaining cycles */
  20.755 +	CPU_STOPPED = 0;
  20.756 +	SET_CYCLES(0);
  20.757 +
  20.758 +	/* Turn off tracing */
  20.759 +	FLAG_T1 = FLAG_T0 = 0;
  20.760 +	m68ki_clear_trace();
  20.761 +	/* Interrupt mask to level 7 */
  20.762 +	FLAG_INT_MASK = 0x0700;
  20.763 +	/* Reset VBR */
  20.764 +	REG_VBR = 0;
  20.765 +	/* Go to supervisor mode */
  20.766 +	m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
  20.767 +
  20.768 +	/* Invalidate the prefetch queue */
  20.769 +#if M68K_EMULATE_PREFETCH
  20.770 +	/* Set to arbitrary number since our first fetch is from 0 */
  20.771 +	CPU_PREF_ADDR = 0x1000;
  20.772 +#endif /* M68K_EMULATE_PREFETCH */
  20.773 +
  20.774 +	/* Read the initial stack pointer and program counter */
  20.775 +	m68ki_jump(0);
  20.776 +	REG_SP = m68ki_read_imm_32();
  20.777 +	REG_PC = m68ki_read_imm_32();
  20.778 +	m68ki_jump(REG_PC);
  20.779 +}
  20.780 +
  20.781 +/* Pulse the HALT line on the CPU */
  20.782 +void m68k_pulse_halt(void)
  20.783 +{
  20.784 +	CPU_STOPPED |= STOP_LEVEL_HALT;
  20.785 +}
  20.786 +
  20.787 +
  20.788 +/* Get and set the current CPU context */
  20.789 +/* This is to allow for multiple CPUs */
  20.790 +unsigned int m68k_context_size()
  20.791 +{
  20.792 +	return sizeof(m68ki_cpu_core);
  20.793 +}
  20.794 +
  20.795 +unsigned int m68k_get_context(void* dst)
  20.796 +{
  20.797 +	if(dst) *(m68ki_cpu_core*)dst = m68ki_cpu;
  20.798 +	return sizeof(m68ki_cpu_core);
  20.799 +}
  20.800 +
  20.801 +void m68k_set_context(void* src)
  20.802 +{
  20.803 +	if(src) m68ki_cpu = *(m68ki_cpu_core*)src;
  20.804 +}
  20.805 +
  20.806 +void m68k_save_context(	void (*save_value)(char*, unsigned int))
  20.807 +{
  20.808 +	if(!save_value)
  20.809 +		return;
  20.810 +
  20.811 +	save_value("CPU_TYPE"  , m68k_get_reg(NULL, M68K_REG_CPU_TYPE));
  20.812 +	save_value("D0"        , REG_D[0]);
  20.813 +	save_value("D1"        , REG_D[1]);
  20.814 +	save_value("D2"        , REG_D[2]);
  20.815 +	save_value("D3"        , REG_D[3]);
  20.816 +	save_value("D4"        , REG_D[4]);
  20.817 +	save_value("D5"        , REG_D[5]);
  20.818 +	save_value("D6"        , REG_D[6]);
  20.819 +	save_value("D7"        , REG_D[7]);
  20.820 +	save_value("A0"        , REG_A[0]);
  20.821 +	save_value("A1"        , REG_A[1]);
  20.822 +	save_value("A2"        , REG_A[2]);
  20.823 +	save_value("A3"        , REG_A[3]);
  20.824 +	save_value("A4"        , REG_A[4]);
  20.825 +	save_value("A5"        , REG_A[5]);
  20.826 +	save_value("A6"        , REG_A[6]);
  20.827 +	save_value("A7"        , REG_A[7]);
  20.828 +	save_value("PPC"       , REG_PPC);
  20.829 +	save_value("PC"        , REG_PC);
  20.830 +	save_value("USP"       , REG_USP);
  20.831 +	save_value("ISP"       , REG_ISP);
  20.832 +	save_value("MSP"       , REG_MSP);
  20.833 +	save_value("VBR"       , REG_VBR);
  20.834 +	save_value("SFC"       , REG_SFC);
  20.835 +	save_value("DFC"       , REG_DFC);
  20.836 +	save_value("CACR"      , REG_CACR);
  20.837 +	save_value("CAAR"      , REG_CAAR);
  20.838 +	save_value("SR"        , m68ki_get_sr());
  20.839 +	save_value("INT_LEVEL" , CPU_INT_LEVEL);
  20.840 +	save_value("INT_CYCLES", CPU_INT_CYCLES);
  20.841 +	save_value("STOPPED"   , (CPU_STOPPED & STOP_LEVEL_STOP) != 0);
  20.842 +	save_value("HALTED"    , (CPU_STOPPED & STOP_LEVEL_HALT) != 0);
  20.843 +	save_value("PREF_ADDR" , CPU_PREF_ADDR);
  20.844 +	save_value("PREF_DATA" , CPU_PREF_DATA);
  20.845 +}
  20.846 +
  20.847 +void m68k_load_context(unsigned int (*load_value)(char*))
  20.848 +{
  20.849 +	unsigned int temp;
  20.850 +
  20.851 +	m68k_set_cpu_type(load_value("CPU_TYPE"));
  20.852 +	REG_PPC = load_value("PPC");
  20.853 +	REG_PC = load_value("PC");
  20.854 +	m68ki_jump(REG_PC);
  20.855 +	CPU_INT_LEVEL = 0;
  20.856 +	m68ki_set_sr_noint(load_value("SR"));
  20.857 +	REG_D[0]       = load_value("D0");
  20.858 +	REG_D[1]       = load_value("D1");
  20.859 +	REG_D[2]       = load_value("D2");
  20.860 +	REG_D[3]       = load_value("D3");
  20.861 +	REG_D[4]       = load_value("D4");
  20.862 +	REG_D[5]       = load_value("D5");
  20.863 +	REG_D[6]       = load_value("D6");
  20.864 +	REG_D[7]       = load_value("D7");
  20.865 +	REG_A[0]       = load_value("A0");
  20.866 +	REG_A[1]       = load_value("A1");
  20.867 +	REG_A[2]       = load_value("A2");
  20.868 +	REG_A[3]       = load_value("A3");
  20.869 +	REG_A[4]       = load_value("A4");
  20.870 +	REG_A[5]       = load_value("A5");
  20.871 +	REG_A[6]       = load_value("A6");
  20.872 +	REG_A[7]       = load_value("A7");
  20.873 +	REG_USP        = load_value("USP");
  20.874 +	REG_ISP        = load_value("ISP");
  20.875 +	REG_MSP        = load_value("MSP");
  20.876 +	REG_VBR        = load_value("VBR");
  20.877 +	REG_SFC        = load_value("SFC");
  20.878 +	REG_DFC        = load_value("DFC");
  20.879 +	REG_CACR       = load_value("CACR");
  20.880 +	REG_CAAR       = load_value("CAAR");
  20.881 +	CPU_INT_LEVEL  = load_value("INT_LEVEL");
  20.882 +	CPU_INT_CYCLES = load_value("INT_CYCLES");
  20.883 +
  20.884 +	CPU_STOPPED = 0;
  20.885 +	temp           = load_value("STOPPED");
  20.886 +	if(temp) CPU_STOPPED |= STOP_LEVEL_STOP;
  20.887 +	temp           = load_value("HALTED");
  20.888 +	if(temp) CPU_STOPPED |= STOP_LEVEL_HALT;
  20.889 +
  20.890 +	CPU_PREF_ADDR  = load_value("PREF_ADDR");
  20.891 +	CPU_PREF_DATA  = load_value("PREF_DATA");
  20.892 +}
  20.893 +
  20.894 +
  20.895 +
  20.896 +/* ======================================================================== */
  20.897 +/* ============================== END OF FILE ============================= */
  20.898 +/* ======================================================================== */

    21.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68kcpu.h
    21.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    21.3 +++ b/src/musashi/m68kcpu.h	Sat Nov 27 01:13:12 2010 +0000
    21.4 @@ -0,0 +1,1838 @@
    21.5 +#include <stdio.h>
    21.6 +/* ======================================================================== */
    21.7 +/* ========================= LICENSING & COPYRIGHT ======================== */
    21.8 +/* ======================================================================== */
    21.9 +/*
   21.10 + *                                  MUSASHI
   21.11 + *                                Version 3.3
   21.12 + *
   21.13 + * A portable Motorola M680x0 processor emulation engine.
   21.14 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   21.15 + *
   21.16 + * This code may be freely used for non-commercial purposes as long as this
   21.17 + * copyright notice remains unaltered in the source code and any binary files
   21.18 + * containing this code in compiled form.
   21.19 + *
   21.20 + * All other lisencing terms must be negotiated with the author
   21.21 + * (Karl Stenerud).
   21.22 + *
   21.23 + * The latest version of this code can be obtained at:
   21.24 + * http://kstenerud.cjb.net
   21.25 + */
   21.26 +
   21.27 +
   21.28 +
   21.29 +
   21.30 +#ifndef M68KCPU__HEADER
   21.31 +#define M68KCPU__HEADER
   21.32 +
   21.33 +#include "m68k.h"
   21.34 +#include <limits.h>
   21.35 +
   21.36 +#if M68K_EMULATE_ADDRESS_ERROR
   21.37 +#include <setjmp.h>
   21.38 +#endif /* M68K_EMULATE_ADDRESS_ERROR */
   21.39 +
   21.40 +/* ======================================================================== */
   21.41 +/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
   21.42 +/* ======================================================================== */
   21.43 +
   21.44 +/* Check for > 32bit sizes */
   21.45 +#if UINT_MAX > 0xffffffff
   21.46 +	#define M68K_INT_GT_32_BIT  1
   21.47 +#endif
   21.48 +
   21.49 +/* Data types used in this emulation core */
   21.50 +#undef sint8
   21.51 +#undef sint16
   21.52 +#undef sint32
   21.53 +#undef sint64
   21.54 +#undef uint8
   21.55 +#undef uint16
   21.56 +#undef uint32
   21.57 +#undef uint64
   21.58 +#undef sint
   21.59 +#undef uint
   21.60 +
   21.61 +#define sint8  signed   char			/* ASG: changed from char to signed char */
   21.62 +#define sint16 signed   short
   21.63 +#define sint32 signed   long
   21.64 +#define uint8  unsigned char
   21.65 +#define uint16 unsigned short
   21.66 +#define uint32 unsigned long
   21.67 +
   21.68 +/* signed and unsigned int must be at least 32 bits wide */
   21.69 +#define sint   signed   int
   21.70 +#define uint   unsigned int
   21.71 +
   21.72 +
   21.73 +#if M68K_USE_64_BIT
   21.74 +#define sint64 signed   long long
   21.75 +#define uint64 unsigned long long
   21.76 +#else
   21.77 +#define sint64 sint32
   21.78 +#define uint64 uint32
   21.79 +#endif /* M68K_USE_64_BIT */
   21.80 +
   21.81 +
   21.82 +
   21.83 +/* Allow for architectures that don't have 8-bit sizes */
   21.84 +#if UCHAR_MAX == 0xff
   21.85 +	#define MAKE_INT_8(A) (sint8)(A)
   21.86 +#else
   21.87 +	#undef  sint8
   21.88 +	#define sint8  signed   int
   21.89 +	#undef  uint8
   21.90 +	#define uint8  unsigned int
   21.91 +	INLINE sint MAKE_INT_8(uint value)
   21.92 +	{
   21.93 +		return (value & 0x80) ? value | ~0xff : value & 0xff;
   21.94 +	}
   21.95 +#endif /* UCHAR_MAX == 0xff */
   21.96 +
   21.97 +
   21.98 +/* Allow for architectures that don't have 16-bit sizes */
   21.99 +#if USHRT_MAX == 0xffff
  21.100 +	#define MAKE_INT_16(A) (sint16)(A)
  21.101 +#else
  21.102 +	#undef  sint16
  21.103 +	#define sint16 signed   int
  21.104 +	#undef  uint16
  21.105 +	#define uint16 unsigned int
  21.106 +	INLINE sint MAKE_INT_16(uint value)
  21.107 +	{
  21.108 +		return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
  21.109 +	}
  21.110 +#endif /* USHRT_MAX == 0xffff */
  21.111 +
  21.112 +
  21.113 +/* Allow for architectures that don't have 32-bit sizes */
  21.114 +#if ULONG_MAX == 0xffffffff
  21.115 +	#define MAKE_INT_32(A) (sint32)(A)
  21.116 +#else
  21.117 +	#undef  sint32
  21.118 +	#define sint32  signed   int
  21.119 +	#undef  uint32
  21.120 +	#define uint32  unsigned int
  21.121 +	INLINE sint MAKE_INT_32(uint value)
  21.122 +	{
  21.123 +		return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
  21.124 +	}
  21.125 +#endif /* ULONG_MAX == 0xffffffff */
  21.126 +
  21.127 +
  21.128 +
  21.129 +
  21.130 +/* ======================================================================== */
  21.131 +/* ============================ GENERAL DEFINES =========================== */
  21.132 +/* ======================================================================== */
  21.133 +
  21.134 +/* Exception Vectors handled by emulation */
  21.135 +#define EXCEPTION_BUS_ERROR                2 /* This one is not emulated! */
  21.136 +#define EXCEPTION_ADDRESS_ERROR            3 /* This one is partially emulated (doesn't stack a proper frame yet) */
  21.137 +#define EXCEPTION_ILLEGAL_INSTRUCTION      4
  21.138 +#define EXCEPTION_ZERO_DIVIDE              5
  21.139 +#define EXCEPTION_CHK                      6
  21.140 +#define EXCEPTION_TRAPV                    7
  21.141 +#define EXCEPTION_PRIVILEGE_VIOLATION      8
  21.142 +#define EXCEPTION_TRACE                    9
  21.143 +#define EXCEPTION_1010                    10
  21.144 +#define EXCEPTION_1111                    11
  21.145 +#define EXCEPTION_FORMAT_ERROR            14
  21.146 +#define EXCEPTION_UNINITIALIZED_INTERRUPT 15
  21.147 +#define EXCEPTION_SPURIOUS_INTERRUPT      24
  21.148 +#define EXCEPTION_INTERRUPT_AUTOVECTOR    24
  21.149 +#define EXCEPTION_TRAP_BASE               32
  21.150 +
  21.151 +/* Function codes set by CPU during data/address bus activity */
  21.152 +#define FUNCTION_CODE_USER_DATA          1
  21.153 +#define FUNCTION_CODE_USER_PROGRAM       2
  21.154 +#define FUNCTION_CODE_SUPERVISOR_DATA    5
  21.155 +#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
  21.156 +#define FUNCTION_CODE_CPU_SPACE          7
  21.157 +
  21.158 +/* CPU types for deciding what to emulate */
  21.159 +#define CPU_TYPE_000   1
  21.160 +#define CPU_TYPE_010   2
  21.161 +#define CPU_TYPE_EC020 4
  21.162 +#define CPU_TYPE_020   8
  21.163 +
  21.164 +/* Different ways to stop the CPU */
  21.165 +#define STOP_LEVEL_STOP 1
  21.166 +#define STOP_LEVEL_HALT 2
  21.167 +
  21.168 +#ifndef NULL
  21.169 +#define NULL ((void*)0)
  21.170 +#endif
  21.171 +
  21.172 +/* ======================================================================== */
  21.173 +/* ================================ MACROS ================================ */
  21.174 +/* ======================================================================== */
  21.175 +
  21.176 +
  21.177 +/* ---------------------------- General Macros ---------------------------- */
  21.178 +
  21.179 +/* Bit Isolation Macros */
  21.180 +#define BIT_0(A)  ((A) & 0x00000001)
  21.181 +#define BIT_1(A)  ((A) & 0x00000002)
  21.182 +#define BIT_2(A)  ((A) & 0x00000004)
  21.183 +#define BIT_3(A)  ((A) & 0x00000008)
  21.184 +#define BIT_4(A)  ((A) & 0x00000010)
  21.185 +#define BIT_5(A)  ((A) & 0x00000020)
  21.186 +#define BIT_6(A)  ((A) & 0x00000040)
  21.187 +#define BIT_7(A)  ((A) & 0x00000080)
  21.188 +#define BIT_8(A)  ((A) & 0x00000100)
  21.189 +#define BIT_9(A)  ((A) & 0x00000200)
  21.190 +#define BIT_A(A)  ((A) & 0x00000400)
  21.191 +#define BIT_B(A)  ((A) & 0x00000800)
  21.192 +#define BIT_C(A)  ((A) & 0x00001000)
  21.193 +#define BIT_D(A)  ((A) & 0x00002000)
  21.194 +#define BIT_E(A)  ((A) & 0x00004000)
  21.195 +#define BIT_F(A)  ((A) & 0x00008000)
  21.196 +#define BIT_10(A) ((A) & 0x00010000)
  21.197 +#define BIT_11(A) ((A) & 0x00020000)
  21.198 +#define BIT_12(A) ((A) & 0x00040000)
  21.199 +#define BIT_13(A) ((A) & 0x00080000)
  21.200 +#define BIT_14(A) ((A) & 0x00100000)
  21.201 +#define BIT_15(A) ((A) & 0x00200000)
  21.202 +#define BIT_16(A) ((A) & 0x00400000)
  21.203 +#define BIT_17(A) ((A) & 0x00800000)
  21.204 +#define BIT_18(A) ((A) & 0x01000000)
  21.205 +#define BIT_19(A) ((A) & 0x02000000)
  21.206 +#define BIT_1A(A) ((A) & 0x04000000)
  21.207 +#define BIT_1B(A) ((A) & 0x08000000)
  21.208 +#define BIT_1C(A) ((A) & 0x10000000)
  21.209 +#define BIT_1D(A) ((A) & 0x20000000)
  21.210 +#define BIT_1E(A) ((A) & 0x40000000)
  21.211 +#define BIT_1F(A) ((A) & 0x80000000)
  21.212 +
  21.213 +/* Get the most significant bit for specific sizes */
  21.214 +#define GET_MSB_8(A)  ((A) & 0x80)
  21.215 +#define GET_MSB_9(A)  ((A) & 0x100)
  21.216 +#define GET_MSB_16(A) ((A) & 0x8000)
  21.217 +#define GET_MSB_17(A) ((A) & 0x10000)
  21.218 +#define GET_MSB_32(A) ((A) & 0x80000000)
  21.219 +#if M68K_USE_64_BIT
  21.220 +#define GET_MSB_33(A) ((A) & 0x100000000)
  21.221 +#endif /* M68K_USE_64_BIT */
  21.222 +
  21.223 +/* Isolate nibbles */
  21.224 +#define LOW_NIBBLE(A)  ((A) & 0x0f)
  21.225 +#define HIGH_NIBBLE(A) ((A) & 0xf0)
  21.226 +
  21.227 +/* These are used to isolate 8, 16, and 32 bit sizes */
  21.228 +#define MASK_OUT_ABOVE_2(A)  ((A) & 3)
  21.229 +#define MASK_OUT_ABOVE_8(A)  ((A) & 0xff)
  21.230 +#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
  21.231 +#define MASK_OUT_BELOW_2(A)  ((A) & ~3)
  21.232 +#define MASK_OUT_BELOW_8(A)  ((A) & ~0xff)
  21.233 +#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
  21.234 +
  21.235 +/* No need to mask if we are 32 bit */
  21.236 +#if M68K_INT_GT_32BIT || M68K_USE_64_BIT
  21.237 +	#define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
  21.238 +	#define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
  21.239 +#else
  21.240 +	#define MASK_OUT_ABOVE_32(A) (A)
  21.241 +	#define MASK_OUT_BELOW_32(A) 0
  21.242 +#endif /* M68K_INT_GT_32BIT || M68K_USE_64_BIT */
  21.243 +
  21.244 +/* Simulate address lines of 68k family */
  21.245 +#define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
  21.246 +
  21.247 +
  21.248 +/* Shift & Rotate Macros. */
  21.249 +#define LSL(A, C) ((A) << (C))
  21.250 +#define LSR(A, C) ((A) >> (C))
  21.251 +
  21.252 +/* Some > 32-bit optimizations */
  21.253 +#if M68K_INT_GT_32BIT
  21.254 +	/* Shift left and right */
  21.255 +	#define LSR_32(A, C) ((A) >> (C))
  21.256 +	#define LSL_32(A, C) ((A) << (C))
  21.257 +#else
  21.258 +	/* We have to do this because the morons at ANSI decided that shifts
  21.259 +	 * by >= data size are undefined.
  21.260 +	 */
  21.261 +	#define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
  21.262 +	#define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
  21.263 +#endif /* M68K_INT_GT_32BIT */
  21.264 +
  21.265 +#if M68K_USE_64_BIT
  21.266 +	#define LSL_32_64(A, C) ((A) << (C))
  21.267 +	#define LSR_32_64(A, C) ((A) >> (C))
  21.268 +	#define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
  21.269 +	#define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
  21.270 +#endif /* M68K_USE_64_BIT */
  21.271 +
  21.272 +#define ROL_8(A, C)      MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
  21.273 +#define ROL_9(A, C)                      (LSL(A, C) | LSR(A, 9-(C)))
  21.274 +#define ROL_16(A, C)    MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
  21.275 +#define ROL_17(A, C)                     (LSL(A, C) | LSR(A, 17-(C)))
  21.276 +#define ROL_32(A, C)    MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
  21.277 +#define ROL_33(A, C)                     (LSL_32(A, C) | LSR_32(A, 33-(C)))
  21.278 +
  21.279 +#define ROR_8(A, C)      MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
  21.280 +#define ROR_9(A, C)                      (LSR(A, C) | LSL(A, 9-(C)))
  21.281 +#define ROR_16(A, C)    MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
  21.282 +#define ROR_17(A, C)                     (LSR(A, C) | LSL(A, 17-(C)))
  21.283 +#define ROR_32(A, C)    MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
  21.284 +#define ROR_33(A, C)                     (LSR_32(A, C) | LSL_32(A, 33-(C)))
  21.285 +
  21.286 +
  21.287 +
  21.288 +/* ------------------------------ CPU Access ------------------------------ */
  21.289 +
  21.290 +/* Access the CPU registers */
  21.291 +#define CPU_TYPE         m68ki_cpu.cpu_type
  21.292 +
  21.293 +#define REG_DA           m68ki_cpu.dar /* easy access to data and address regs */
  21.294 +#define REG_D            m68ki_cpu.dar
  21.295 +#define REG_A            (m68ki_cpu.dar+8)
  21.296 +#define REG_PPC 		 m68ki_cpu.ppc
  21.297 +#define REG_PC           m68ki_cpu.pc
  21.298 +#define REG_SP_BASE      m68ki_cpu.sp
  21.299 +#define REG_USP          m68ki_cpu.sp[0]
  21.300 +#define REG_ISP          m68ki_cpu.sp[4]
  21.301 +#define REG_MSP          m68ki_cpu.sp[6]
  21.302 +#define REG_SP           m68ki_cpu.dar[15]
  21.303 +#define REG_VBR          m68ki_cpu.vbr
  21.304 +#define REG_SFC          m68ki_cpu.sfc
  21.305 +#define REG_DFC          m68ki_cpu.dfc
  21.306 +#define REG_CACR         m68ki_cpu.cacr
  21.307 +#define REG_CAAR         m68ki_cpu.caar
  21.308 +#define REG_IR           m68ki_cpu.ir
  21.309 +
  21.310 +#define FLAG_T1          m68ki_cpu.t1_flag
  21.311 +#define FLAG_T0          m68ki_cpu.t0_flag
  21.312 +#define FLAG_S           m68ki_cpu.s_flag
  21.313 +#define FLAG_M           m68ki_cpu.m_flag
  21.314 +#define FLAG_X           m68ki_cpu.x_flag
  21.315 +#define FLAG_N           m68ki_cpu.n_flag
  21.316 +#define FLAG_Z           m68ki_cpu.not_z_flag
  21.317 +#define FLAG_V           m68ki_cpu.v_flag
  21.318 +#define FLAG_C           m68ki_cpu.c_flag
  21.319 +#define FLAG_INT_MASK    m68ki_cpu.int_mask
  21.320 +
  21.321 +#define CPU_INT_LEVEL    m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
  21.322 +#define CPU_INT_CYCLES   m68ki_cpu.int_cycles /* ASG */
  21.323 +#define CPU_STOPPED      m68ki_cpu.stopped
  21.324 +#define CPU_PREF_ADDR    m68ki_cpu.pref_addr
  21.325 +#define CPU_PREF_DATA    m68ki_cpu.pref_data
  21.326 +#define CPU_ADDRESS_MASK m68ki_cpu.address_mask
  21.327 +#define CPU_SR_MASK      m68ki_cpu.sr_mask
  21.328 +
  21.329 +#define CYC_INSTRUCTION  m68ki_cpu.cyc_instruction
  21.330 +#define CYC_EXCEPTION    m68ki_cpu.cyc_exception
  21.331 +#define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
  21.332 +#define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
  21.333 +#define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
  21.334 +#define CYC_DBCC_F_EXP   m68ki_cpu.cyc_dbcc_f_exp
  21.335 +#define CYC_SCC_R_FALSE  m68ki_cpu.cyc_scc_r_false
  21.336 +#define CYC_MOVEM_W      m68ki_cpu.cyc_movem_w
  21.337 +#define CYC_MOVEM_L      m68ki_cpu.cyc_movem_l
  21.338 +#define CYC_SHIFT        m68ki_cpu.cyc_shift
  21.339 +#define CYC_RESET        m68ki_cpu.cyc_reset
  21.340 +
  21.341 +
  21.342 +#define CALLBACK_INT_ACK     m68ki_cpu.int_ack_callback
  21.343 +#define CALLBACK_BKPT_ACK    m68ki_cpu.bkpt_ack_callback
  21.344 +#define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
  21.345 +#define CALLBACK_PC_CHANGED  m68ki_cpu.pc_changed_callback
  21.346 +#define CALLBACK_SET_FC      m68ki_cpu.set_fc_callback
  21.347 +#define CALLBACK_INSTR_HOOK  m68ki_cpu.instr_hook_callback
  21.348 +
  21.349 +
  21.350 +
  21.351 +/* ----------------------------- Configuration ---------------------------- */
  21.352 +
  21.353 +/* These defines are dependant on the configuration defines in m68kconf.h */
  21.354 +
  21.355 +/* Disable certain comparisons if we're not using all CPU types */
  21.356 +#if M68K_EMULATE_020
  21.357 +	#define CPU_TYPE_IS_020_PLUS(A)    ((A) & CPU_TYPE_020)
  21.358 +	#define CPU_TYPE_IS_020_LESS(A)    1
  21.359 +#else
  21.360 +	#define CPU_TYPE_IS_020_PLUS(A)    0
  21.361 +	#define CPU_TYPE_IS_020_LESS(A)    1
  21.362 +#endif
  21.363 +
  21.364 +#if M68K_EMULATE_EC020
  21.365 +	#define CPU_TYPE_IS_EC020_PLUS(A)  ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
  21.366 +	#define CPU_TYPE_IS_EC020_LESS(A)  ((A) & (CPU_TYPE_000 | CPU_TYPE_010 | CPU_TYPE_EC020))
  21.367 +#else
  21.368 +	#define CPU_TYPE_IS_EC020_PLUS(A)  CPU_TYPE_IS_020_PLUS(A)
  21.369 +	#define CPU_TYPE_IS_EC020_LESS(A)  CPU_TYPE_IS_020_LESS(A)
  21.370 +#endif
  21.371 +
  21.372 +#if M68K_EMULATE_010
  21.373 +	#define CPU_TYPE_IS_010(A)         ((A) == CPU_TYPE_010)
  21.374 +	#define CPU_TYPE_IS_010_PLUS(A)    ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020))
  21.375 +	#define CPU_TYPE_IS_010_LESS(A)    ((A) & (CPU_TYPE_000 | CPU_TYPE_010))
  21.376 +#else
  21.377 +	#define CPU_TYPE_IS_010(A)         0
  21.378 +	#define CPU_TYPE_IS_010_PLUS(A)    CPU_TYPE_IS_EC020_PLUS(A)
  21.379 +	#define CPU_TYPE_IS_010_LESS(A)    CPU_TYPE_IS_EC020_LESS(A)
  21.380 +#endif
  21.381 +
  21.382 +#if M68K_EMULATE_020 || M68K_EMULATE_EC020
  21.383 +	#define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
  21.384 +#else
  21.385 +	#define CPU_TYPE_IS_020_VARIANT(A) 0
  21.386 +#endif
  21.387 +
  21.388 +#if M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
  21.389 +	#define CPU_TYPE_IS_000(A)         ((A) == CPU_TYPE_000)
  21.390 +#else
  21.391 +	#define CPU_TYPE_IS_000(A)         1
  21.392 +#endif
  21.393 +
  21.394 +
  21.395 +#if !M68K_SEPARATE_READS
  21.396 +#define m68k_read_immediate_16(A) m68ki_read_program_16(A)
  21.397 +#define m68k_read_immediate_32(A) m68ki_read_program_32(A)
  21.398 +
  21.399 +#define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
  21.400 +#define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
  21.401 +#define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
  21.402 +#endif /* M68K_SEPARATE_READS */
  21.403 +
  21.404 +
  21.405 +/* Enable or disable callback functions */
  21.406 +#if M68K_EMULATE_INT_ACK
  21.407 +	#if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
  21.408 +		#define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
  21.409 +	#else
  21.410 +		#define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
  21.411 +	#endif
  21.412 +#else
  21.413 +	/* Default action is to used autovector mode, which is most common */
  21.414 +	#define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
  21.415 +#endif /* M68K_EMULATE_INT_ACK */
  21.416 +
  21.417 +#if M68K_EMULATE_BKPT_ACK
  21.418 +	#if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
  21.419 +		#define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
  21.420 +	#else
  21.421 +		#define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
  21.422 +	#endif
  21.423 +#else
  21.424 +	#define m68ki_bkpt_ack(A)
  21.425 +#endif /* M68K_EMULATE_BKPT_ACK */
  21.426 +
  21.427 +#if M68K_EMULATE_RESET
  21.428 +	#if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
  21.429 +		#define m68ki_output_reset() M68K_RESET_CALLBACK()
  21.430 +	#else
  21.431 +		#define m68ki_output_reset() CALLBACK_RESET_INSTR()
  21.432 +	#endif
  21.433 +#else
  21.434 +	#define m68ki_output_reset()
  21.435 +#endif /* M68K_EMULATE_RESET */
  21.436 +
  21.437 +#if M68K_INSTRUCTION_HOOK
  21.438 +	#if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
  21.439 +		#define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
  21.440 +	#else
  21.441 +		#define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
  21.442 +	#endif
  21.443 +#else
  21.444 +	#define m68ki_instr_hook()
  21.445 +#endif /* M68K_INSTRUCTION_HOOK */
  21.446 +
  21.447 +#if M68K_MONITOR_PC
  21.448 +	#if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
  21.449 +		#define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
  21.450 +	#else
  21.451 +		#define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
  21.452 +	#endif
  21.453 +#else
  21.454 +	#define m68ki_pc_changed(A)
  21.455 +#endif /* M68K_MONITOR_PC */
  21.456 +
  21.457 +
  21.458 +/* Enable or disable function code emulation */
  21.459 +#if M68K_EMULATE_FC
  21.460 +	#if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
  21.461 +		#define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
  21.462 +	#else
  21.463 +		#define m68ki_set_fc(A) CALLBACK_SET_FC(A)
  21.464 +	#endif
  21.465 +	#define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
  21.466 +	#define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
  21.467 +	#define m68ki_get_address_space() m68ki_address_space
  21.468 +#else
  21.469 +	#define m68ki_set_fc(A)
  21.470 +	#define m68ki_use_data_space()
  21.471 +	#define m68ki_use_program_space()
  21.472 +	#define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
  21.473 +#endif /* M68K_EMULATE_FC */
  21.474 +
  21.475 +
  21.476 +/* Enable or disable trace emulation */
  21.477 +#if M68K_EMULATE_TRACE
  21.478 +	/* Initiates trace checking before each instruction (t1) */
  21.479 +	#define m68ki_trace_t1() m68ki_tracing = FLAG_T1
  21.480 +	/* adds t0 to trace checking if we encounter change of flow */
  21.481 +	#define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
  21.482 +	/* Clear all tracing */
  21.483 +	#define m68ki_clear_trace() m68ki_tracing = 0
  21.484 +	/* Cause a trace exception if we are tracing */
  21.485 +	#define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
  21.486 +#else
  21.487 +	#define m68ki_trace_t1()
  21.488 +	#define m68ki_trace_t0()
  21.489 +	#define m68ki_clear_trace()
  21.490 +	#define m68ki_exception_if_trace()
  21.491 +#endif /* M68K_EMULATE_TRACE */
  21.492 +
  21.493 +
  21.494 +
  21.495 +/* Address error */
  21.496 +#if M68K_EMULATE_ADDRESS_ERROR
  21.497 +	extern jmp_buf m68ki_address_error_trap;
  21.498 +	#define m68ki_set_address_error_trap() if(setjmp(m68ki_address_error_trap)) m68ki_exception_address_error();
  21.499 +	#define m68ki_check_address_error(A) if((A)&1) longjmp(m68ki_address_error_jump, 1);
  21.500 +#else
  21.501 +	#define m68ki_set_address_error_trap()
  21.502 +	#define m68ki_check_address_error(A)
  21.503 +#endif /* M68K_ADDRESS_ERROR */
  21.504 +
  21.505 +/* Logging */
  21.506 +#if M68K_LOG_ENABLE
  21.507 +	#include <stdio.h>
  21.508 +	extern FILE* M68K_LOG_FILEHANDLE
  21.509 +	extern char* m68ki_cpu_names[];
  21.510 +
  21.511 +	#define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
  21.512 +	#if M68K_LOG_1010_1111
  21.513 +		#define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
  21.514 +	#else
  21.515 +		#define M68K_DO_LOG_EMU(A)
  21.516 +	#endif
  21.517 +#else
  21.518 +	#define M68K_DO_LOG(A)
  21.519 +	#define M68K_DO_LOG_EMU(A)
  21.520 +#endif
  21.521 +
  21.522 +
  21.523 +
  21.524 +/* -------------------------- EA / Operand Access ------------------------- */
  21.525 +
  21.526 +/*
  21.527 + * The general instruction format follows this pattern:
  21.528 + * .... XXX. .... .YYY
  21.529 + * where XXX is register X and YYY is register Y
  21.530 + */
  21.531 +/* Data Register Isolation */
  21.532 +#define DX (REG_D[(REG_IR >> 9) & 7])
  21.533 +#define DY (REG_D[REG_IR & 7])
  21.534 +/* Address Register Isolation */
  21.535 +#define AX (REG_A[(REG_IR >> 9) & 7])
  21.536 +#define AY (REG_A[REG_IR & 7])
  21.537 +
  21.538 +
  21.539 +/* Effective Address Calculations */
  21.540 +#define EA_AY_AI_8()   AY                                    /* address register indirect */
  21.541 +#define EA_AY_AI_16()  EA_AY_AI_8()
  21.542 +#define EA_AY_AI_32()  EA_AY_AI_8()
  21.543 +#define EA_AY_PI_8()   (AY++)                                /* postincrement (size = byte) */
  21.544 +#define EA_AY_PI_16()  ((AY+=2)-2)                           /* postincrement (size = word) */
  21.545 +#define EA_AY_PI_32()  ((AY+=4)-4)                           /* postincrement (size = long) */
  21.546 +#define EA_AY_PD_8()   (--AY)                                /* predecrement (size = byte) */
  21.547 +#define EA_AY_PD_16()  (AY-=2)                               /* predecrement (size = word) */
  21.548 +#define EA_AY_PD_32()  (AY-=4)                               /* predecrement (size = long) */
  21.549 +#define EA_AY_DI_8()   (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
  21.550 +#define EA_AY_DI_16()  EA_AY_DI_8()
  21.551 +#define EA_AY_DI_32()  EA_AY_DI_8()
  21.552 +#define EA_AY_IX_8()   m68ki_get_ea_ix(AY)                   /* indirect + index */
  21.553 +#define EA_AY_IX_16()  EA_AY_IX_8()
  21.554 +#define EA_AY_IX_32()  EA_AY_IX_8()
  21.555 +
  21.556 +#define EA_AX_AI_8()   AX
  21.557 +#define EA_AX_AI_16()  EA_AX_AI_8()
  21.558 +#define EA_AX_AI_32()  EA_AX_AI_8()
  21.559 +#define EA_AX_PI_8()   (AX++)
  21.560 +#define EA_AX_PI_16()  ((AX+=2)-2)
  21.561 +#define EA_AX_PI_32()  ((AX+=4)-4)
  21.562 +#define EA_AX_PD_8()   (--AX)
  21.563 +#define EA_AX_PD_16()  (AX-=2)
  21.564 +#define EA_AX_PD_32()  (AX-=4)
  21.565 +#define EA_AX_DI_8()   (AX+MAKE_INT_16(m68ki_read_imm_16()))
  21.566 +#define EA_AX_DI_16()  EA_AX_DI_8()
  21.567 +#define EA_AX_DI_32()  EA_AX_DI_8()
  21.568 +#define EA_AX_IX_8()   m68ki_get_ea_ix(AX)
  21.569 +#define EA_AX_IX_16()  EA_AX_IX_8()
  21.570 +#define EA_AX_IX_32()  EA_AX_IX_8()
  21.571 +
  21.572 +#define EA_A7_PI_8()   ((REG_A[7]+=2)-2)
  21.573 +#define EA_A7_PD_8()   (REG_A[7]-=2)
  21.574 +
  21.575 +#define EA_AW_8()      MAKE_INT_16(m68ki_read_imm_16())      /* absolute word */
  21.576 +#define EA_AW_16()     EA_AW_8()
  21.577 +#define EA_AW_32()     EA_AW_8()
  21.578 +#define EA_AL_8()      m68ki_read_imm_32()                   /* absolute long */
  21.579 +#define EA_AL_16()     EA_AL_8()
  21.580 +#define EA_AL_32()     EA_AL_8()
  21.581 +#define EA_PCDI_8()    m68ki_get_ea_pcdi()                   /* pc indirect + displacement */
  21.582 +#define EA_PCDI_16()   EA_PCDI_8()
  21.583 +#define EA_PCDI_32()   EA_PCDI_8()
  21.584 +#define EA_PCIX_8()    m68ki_get_ea_pcix()                   /* pc indirect + index */
  21.585 +#define EA_PCIX_16()   EA_PCIX_8()
  21.586 +#define EA_PCIX_32()   EA_PCIX_8()
  21.587 +
  21.588 +
  21.589 +#define OPER_I_8()     m68ki_read_imm_8()
  21.590 +#define OPER_I_16()    m68ki_read_imm_16()
  21.591 +#define OPER_I_32()    m68ki_read_imm_32()
  21.592 +
  21.593 +
  21.594 +
  21.595 +/* --------------------------- Status Register ---------------------------- */
  21.596 +
  21.597 +/* Flag Calculation Macros */
  21.598 +#define CFLAG_8(A) (A)
  21.599 +#define CFLAG_16(A) ((A)>>8)
  21.600 +
  21.601 +#if M68K_INT_GT_32_BIT
  21.602 +	#define CFLAG_ADD_32(S, D, R) ((R)>>24)
  21.603 +	#define CFLAG_SUB_32(S, D, R) ((R)>>24)
  21.604 +#else
  21.605 +	#define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
  21.606 +	#define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
  21.607 +#endif /* M68K_INT_GT_32_BIT */
  21.608 +
  21.609 +#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
  21.610 +#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
  21.611 +#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
  21.612 +
  21.613 +#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
  21.614 +#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
  21.615 +#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
  21.616 +
  21.617 +#define NFLAG_8(A) (A)
  21.618 +#define NFLAG_16(A) ((A)>>8)
  21.619 +#define NFLAG_32(A) ((A)>>24)
  21.620 +#define NFLAG_64(A) ((A)>>56)
  21.621 +
  21.622 +#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
  21.623 +#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
  21.624 +#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
  21.625 +
  21.626 +
  21.627 +/* Flag values */
  21.628 +#define NFLAG_SET   0x80
  21.629 +#define NFLAG_CLEAR 0
  21.630 +#define CFLAG_SET   0x100
  21.631 +#define CFLAG_CLEAR 0
  21.632 +#define XFLAG_SET   0x100
  21.633 +#define XFLAG_CLEAR 0
  21.634 +#define VFLAG_SET   0x80
  21.635 +#define VFLAG_CLEAR 0
  21.636 +#define ZFLAG_SET   0
  21.637 +#define ZFLAG_CLEAR 0xffffffff
  21.638 +
  21.639 +#define SFLAG_SET   4
  21.640 +#define SFLAG_CLEAR 0
  21.641 +#define MFLAG_SET   2
  21.642 +#define MFLAG_CLEAR 0
  21.643 +
  21.644 +/* Turn flag values into 1 or 0 */
  21.645 +#define XFLAG_AS_1() ((FLAG_X>>8)&1)
  21.646 +#define NFLAG_AS_1() ((FLAG_N>>7)&1)
  21.647 +#define VFLAG_AS_1() ((FLAG_V>>7)&1)
  21.648 +#define ZFLAG_AS_1() (!FLAG_Z)
  21.649 +#define CFLAG_AS_1() ((FLAG_C>>8)&1)
  21.650 +
  21.651 +
  21.652 +/* Conditions */
  21.653 +#define COND_CS() (FLAG_C&0x100)
  21.654 +#define COND_CC() (!COND_CS())
  21.655 +#define COND_VS() (FLAG_V&0x80)
  21.656 +#define COND_VC() (!COND_VS())
  21.657 +#define COND_NE() FLAG_Z
  21.658 +#define COND_EQ() (!COND_NE())
  21.659 +#define COND_MI() (FLAG_N&0x80)
  21.660 +#define COND_PL() (!COND_MI())
  21.661 +#define COND_LT() ((FLAG_N^FLAG_V)&0x80)
  21.662 +#define COND_GE() (!COND_LT())
  21.663 +#define COND_HI() (COND_CC() && COND_NE())
  21.664 +#define COND_LS() (COND_CS() || COND_EQ())
  21.665 +#define COND_GT() (COND_GE() && COND_NE())
  21.666 +#define COND_LE() (COND_LT() || COND_EQ())
  21.667 +
  21.668 +/* Reversed conditions */
  21.669 +#define COND_NOT_CS() COND_CC()
  21.670 +#define COND_NOT_CC() COND_CS()
  21.671 +#define COND_NOT_VS() COND_VC()
  21.672 +#define COND_NOT_VC() COND_VS()
  21.673 +#define COND_NOT_NE() COND_EQ()
  21.674 +#define COND_NOT_EQ() COND_NE()
  21.675 +#define COND_NOT_MI() COND_PL()
  21.676 +#define COND_NOT_PL() COND_MI()
  21.677 +#define COND_NOT_LT() COND_GE()
  21.678 +#define COND_NOT_GE() COND_LT()
  21.679 +#define COND_NOT_HI() COND_LS()
  21.680 +#define COND_NOT_LS() COND_HI()
  21.681 +#define COND_NOT_GT() COND_LE()
  21.682 +#define COND_NOT_LE() COND_GT()
  21.683 +
  21.684 +/* Not real conditions, but here for convenience */
  21.685 +#define COND_XS() (FLAG_X&0x100)
  21.686 +#define COND_XC() (!COND_XS)
  21.687 +
  21.688 +
  21.689 +/* Get the condition code register */
  21.690 +#define m68ki_get_ccr() ((COND_XS() >> 4) | \
  21.691 +						 (COND_MI() >> 4) | \
  21.692 +						 (COND_EQ() << 2) | \
  21.693 +						 (COND_VS() >> 6) | \
  21.694 +						 (COND_CS() >> 8))
  21.695 +
  21.696 +/* Get the status register */
  21.697 +#define m68ki_get_sr() ( FLAG_T1              | \
  21.698 +						 FLAG_T0              | \
  21.699 +						(FLAG_S        << 11) | \
  21.700 +						(FLAG_M        << 11) | \
  21.701 +						 FLAG_INT_MASK        | \
  21.702 +						 m68ki_get_ccr())
  21.703 +
  21.704 +
  21.705 +
  21.706 +/* ---------------------------- Cycle Counting ---------------------------- */
  21.707 +
  21.708 +#define ADD_CYCLES(A)    m68ki_remaining_cycles += (A)
  21.709 +#define USE_CYCLES(A)    m68ki_remaining_cycles -= (A)
  21.710 +#define SET_CYCLES(A)    m68ki_remaining_cycles = A
  21.711 +#define GET_CYCLES()     m68ki_remaining_cycles
  21.712 +#define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
  21.713 +
  21.714 +
  21.715 +
  21.716 +/* ----------------------------- Read / Write ----------------------------- */
  21.717 +
  21.718 +/* Read from the current address space */
  21.719 +#define m68ki_read_8(A)  m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
  21.720 +#define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
  21.721 +#define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
  21.722 +
  21.723 +/* Write to the current data space */
  21.724 +#define m68ki_write_8(A, V)  m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  21.725 +#define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  21.726 +#define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  21.727 +
  21.728 +/* map read immediate 8 to read immediate 16 */
  21.729 +#define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
  21.730 +
  21.731 +/* Map PC-relative reads */
  21.732 +#define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
  21.733 +#define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
  21.734 +#define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
  21.735 +
  21.736 +/* Read from the program space */
  21.737 +#define m68ki_read_program_8(A) 	m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  21.738 +#define m68ki_read_program_16(A) 	m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  21.739 +#define m68ki_read_program_32(A) 	m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  21.740 +
  21.741 +/* Read from the data space */
  21.742 +#define m68ki_read_data_8(A) 	m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  21.743 +#define m68ki_read_data_16(A) 	m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  21.744 +#define m68ki_read_data_32(A) 	m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  21.745 +
  21.746 +
  21.747 +
  21.748 +/* ======================================================================== */
  21.749 +/* =============================== PROTOTYPES ============================= */
  21.750 +/* ======================================================================== */
  21.751 +
  21.752 +typedef struct
  21.753 +{
  21.754 +	uint cpu_type;     /* CPU Type: 68000, 68010, 68EC020, or 68020 */
  21.755 +	uint dar[16];      /* Data and Address Registers */
  21.756 +	uint ppc;		   /* Previous program counter */
  21.757 +	uint pc;           /* Program Counter */
  21.758 +	uint sp[7];        /* User, Interrupt, and Master Stack Pointers */
  21.759 +	uint vbr;          /* Vector Base Register (m68010+) */
  21.760 +	uint sfc;          /* Source Function Code Register (m68010+) */
  21.761 +	uint dfc;          /* Destination Function Code Register (m68010+) */
  21.762 +	uint cacr;         /* Cache Control Register (m68020, unemulated) */
  21.763 +	uint caar;         /* Cache Address Register (m68020, unemulated) */
  21.764 +	uint ir;           /* Instruction Register */
  21.765 +	uint t1_flag;      /* Trace 1 */
  21.766 +	uint t0_flag;      /* Trace 0 */
  21.767 +	uint s_flag;       /* Supervisor */
  21.768 +	uint m_flag;       /* Master/Interrupt state */
  21.769 +	uint x_flag;       /* Extend */
  21.770 +	uint n_flag;       /* Negative */
  21.771 +	uint not_z_flag;   /* Zero, inverted for speedups */
  21.772 +	uint v_flag;       /* Overflow */
  21.773 +	uint c_flag;       /* Carry */
  21.774 +	uint int_mask;     /* I0-I2 */
  21.775 +	uint int_level;    /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
  21.776 +	uint int_cycles;   /* ASG: extra cycles from generated interrupts */
  21.777 +	uint stopped;      /* Stopped state */
  21.778 +	uint pref_addr;    /* Last prefetch address */
  21.779 +	uint pref_data;    /* Data in the prefetch queue */
  21.780 +	uint address_mask; /* Available address pins */
  21.781 +	uint sr_mask;      /* Implemented status register bits */
  21.782 +
  21.783 +	/* Clocks required for instructions / exceptions */
  21.784 +	uint cyc_bcc_notake_b;
  21.785 +	uint cyc_bcc_notake_w;
  21.786 +	uint cyc_dbcc_f_noexp;
  21.787 +	uint cyc_dbcc_f_exp;
  21.788 +	uint cyc_scc_r_false;
  21.789 +	uint cyc_movem_w;
  21.790 +	uint cyc_movem_l;
  21.791 +	uint cyc_shift;
  21.792 +	uint cyc_reset;
  21.793 +	uint8* cyc_instruction;
  21.794 +	uint8* cyc_exception;
  21.795 +
  21.796 +	/* Callbacks to host */
  21.797 +	int  (*int_ack_callback)(int int_line);           /* Interrupt Acknowledge */
  21.798 +	void (*bkpt_ack_callback)(unsigned int data);     /* Breakpoint Acknowledge */
  21.799 +	void (*reset_instr_callback)(void);               /* Called when a RESET instruction is encountered */
  21.800 +	void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
  21.801 +	void (*set_fc_callback)(unsigned int new_fc);     /* Called when the CPU function code changes */
  21.802 +	void (*instr_hook_callback)(void);                /* Called every instruction cycle prior to execution */
  21.803 +
  21.804 +} m68ki_cpu_core;
  21.805 +
  21.806 +
  21.807 +extern m68ki_cpu_core m68ki_cpu;
  21.808 +extern sint           m68ki_remaining_cycles;
  21.809 +extern uint           m68ki_tracing;
  21.810 +extern uint8          m68ki_shift_8_table[];
  21.811 +extern uint16         m68ki_shift_16_table[];
  21.812 +extern uint           m68ki_shift_32_table[];
  21.813 +extern uint8          m68ki_exception_cycle_table[][256];
  21.814 +extern uint           m68ki_address_space;
  21.815 +extern uint8          m68ki_ea_idx_cycle_table[];
  21.816 +
  21.817 +
  21.818 +/* Read data immediately after the program counter */
  21.819 +INLINE uint m68ki_read_imm_16(void);
  21.820 +INLINE uint m68ki_read_imm_32(void);
  21.821 +
  21.822 +/* Read data with specific function code */
  21.823 +INLINE uint m68ki_read_8_fc  (uint address, uint fc);
  21.824 +INLINE uint m68ki_read_16_fc (uint address, uint fc);
  21.825 +INLINE uint m68ki_read_32_fc (uint address, uint fc);
  21.826 +
  21.827 +/* Write data with specific function code */
  21.828 +INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
  21.829 +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
  21.830 +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
  21.831 +
  21.832 +/* Indexed and PC-relative ea fetching */
  21.833 +INLINE uint m68ki_get_ea_pcdi(void);
  21.834 +INLINE uint m68ki_get_ea_pcix(void);
  21.835 +INLINE uint m68ki_get_ea_ix(uint An);
  21.836 +
  21.837 +/* Operand fetching */
  21.838 +INLINE uint OPER_AY_AI_8(void);
  21.839 +INLINE uint OPER_AY_AI_16(void);
  21.840 +INLINE uint OPER_AY_AI_32(void);
  21.841 +INLINE uint OPER_AY_PI_8(void);
  21.842 +INLINE uint OPER_AY_PI_16(void);
  21.843 +INLINE uint OPER_AY_PI_32(void);
  21.844 +INLINE uint OPER_AY_PD_8(void);
  21.845 +INLINE uint OPER_AY_PD_16(void);
  21.846 +INLINE uint OPER_AY_PD_32(void);
  21.847 +INLINE uint OPER_AY_DI_8(void);
  21.848 +INLINE uint OPER_AY_DI_16(void);
  21.849 +INLINE uint OPER_AY_DI_32(void);
  21.850 +INLINE uint OPER_AY_IX_8(void);
  21.851 +INLINE uint OPER_AY_IX_16(void);
  21.852 +INLINE uint OPER_AY_IX_32(void);
  21.853 +
  21.854 +INLINE uint OPER_AX_AI_8(void);
  21.855 +INLINE uint OPER_AX_AI_16(void);
  21.856 +INLINE uint OPER_AX_AI_32(void);
  21.857 +INLINE uint OPER_AX_PI_8(void);
  21.858 +INLINE uint OPER_AX_PI_16(void);
  21.859 +INLINE uint OPER_AX_PI_32(void);
  21.860 +INLINE uint OPER_AX_PD_8(void);
  21.861 +INLINE uint OPER_AX_PD_16(void);
  21.862 +INLINE uint OPER_AX_PD_32(void);
  21.863 +INLINE uint OPER_AX_DI_8(void);
  21.864 +INLINE uint OPER_AX_DI_16(void);
  21.865 +INLINE uint OPER_AX_DI_32(void);
  21.866 +INLINE uint OPER_AX_IX_8(void);
  21.867 +INLINE uint OPER_AX_IX_16(void);
  21.868 +INLINE uint OPER_AX_IX_32(void);
  21.869 +
  21.870 +INLINE uint OPER_A7_PI_8(void);
  21.871 +INLINE uint OPER_A7_PD_8(void);
  21.872 +
  21.873 +INLINE uint OPER_AW_8(void);
  21.874 +INLINE uint OPER_AW_16(void);
  21.875 +INLINE uint OPER_AW_32(void);
  21.876 +INLINE uint OPER_AL_8(void);
  21.877 +INLINE uint OPER_AL_16(void);
  21.878 +INLINE uint OPER_AL_32(void);
  21.879 +INLINE uint OPER_PCDI_8(void);
  21.880 +INLINE uint OPER_PCDI_16(void);
  21.881 +INLINE uint OPER_PCDI_32(void);
  21.882 +INLINE uint OPER_PCIX_8(void);
  21.883 +INLINE uint OPER_PCIX_16(void);
  21.884 +INLINE uint OPER_PCIX_32(void);
  21.885 +
  21.886 +/* Stack operations */
  21.887 +INLINE void m68ki_push_16(uint value);
  21.888 +INLINE void m68ki_push_32(uint value);
  21.889 +INLINE uint m68ki_pull_16(void);
  21.890 +INLINE uint m68ki_pull_32(void);
  21.891 +
  21.892 +/* Program flow operations */
  21.893 +INLINE void m68ki_jump(uint new_pc);
  21.894 +INLINE void m68ki_jump_vector(uint vector);
  21.895 +INLINE void m68ki_branch_8(uint offset);
  21.896 +INLINE void m68ki_branch_16(uint offset);
  21.897 +INLINE void m68ki_branch_32(uint offset);
  21.898 +
  21.899 +/* Status register operations. */
  21.900 +INLINE void m68ki_set_s_flag(uint value);            /* Only bit 2 of value should be set (i.e. 4 or 0) */
  21.901 +INLINE void m68ki_set_sm_flag(uint value);           /* only bits 1 and 2 of value should be set */
  21.902 +INLINE void m68ki_set_ccr(uint value);               /* set the condition code register */
  21.903 +INLINE void m68ki_set_sr(uint value);                /* set the status register */
  21.904 +INLINE void m68ki_set_sr_noint(uint value);          /* set the status register */
  21.905 +
  21.906 +/* Exception processing */
  21.907 +INLINE uint m68ki_init_exception(void);              /* Initial exception processing */
  21.908 +
  21.909 +INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
  21.910 +INLINE void m68ki_stack_frame_buserr(uint pc, uint sr, uint address, uint write, uint instruction, uint fc);
  21.911 +
  21.912 +INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
  21.913 +INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
  21.914 +INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
  21.915 +INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
  21.916 +INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
  21.917 +INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
  21.918 +
  21.919 +INLINE void m68ki_exception_trap(uint vector);
  21.920 +INLINE void m68ki_exception_trapN(uint vector);
  21.921 +INLINE void m68ki_exception_trace(void);
  21.922 +INLINE void m68ki_exception_privilege_violation(void);
  21.923 +INLINE void m68ki_exception_1010(void);
  21.924 +INLINE void m68ki_exception_1111(void);
  21.925 +INLINE void m68ki_exception_illegal(void);
  21.926 +INLINE void m68ki_exception_format_error(void);
  21.927 +INLINE void m68ki_exception_address_error(void);
  21.928 +INLINE void m68ki_exception_interrupt(uint int_level);
  21.929 +INLINE void m68ki_check_interrupts(void);            /* ASG: check for interrupts */
  21.930 +
  21.931 +/* quick disassembly (used for logging) */
  21.932 +char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
  21.933 +
  21.934 +
  21.935 +/* ======================================================================== */
  21.936 +/* =========================== UTILITY FUNCTIONS ========================== */
  21.937 +/* ======================================================================== */
  21.938 +
  21.939 +
  21.940 +/* ---------------------------- Read Immediate ---------------------------- */
  21.941 +
  21.942 +/* Handles all immediate reads, does address error check, function code setting,
  21.943 + * and prefetching if they are enabled in m68kconf.h
  21.944 + */
  21.945 +INLINE uint m68ki_read_imm_16(void)
  21.946 +{
  21.947 +	m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  21.948 +	m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */
  21.949 +#if M68K_EMULATE_PREFETCH
  21.950 +	if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  21.951 +	{
  21.952 +		CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  21.953 +		CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  21.954 +	}
  21.955 +	REG_PC += 2;
  21.956 +	return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
  21.957 +#else
  21.958 +	REG_PC += 2;
  21.959 +	return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
  21.960 +#endif /* M68K_EMULATE_PREFETCH */
  21.961 +}
  21.962 +INLINE uint m68ki_read_imm_32(void)
  21.963 +{
  21.964 +#if M68K_EMULATE_PREFETCH
  21.965 +	uint temp_val;
  21.966 +
  21.967 +	m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  21.968 +	m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */
  21.969 +	if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  21.970 +	{
  21.971 +		CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  21.972 +		CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  21.973 +	}
  21.974 +	temp_val = CPU_PREF_DATA;
  21.975 +	REG_PC += 2;
  21.976 +	if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  21.977 +	{
  21.978 +		CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  21.979 +		CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  21.980 +		temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
  21.981 +	}
  21.982 +	REG_PC += 2;
  21.983 +
  21.984 +	return temp_val;
  21.985 +#else
  21.986 +	m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  21.987 +	m68ki_check_address_error(REG_PC); /* auto-disable (see m68kcpu.h) */
  21.988 +	REG_PC += 4;
  21.989 +	return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
  21.990 +#endif /* M68K_EMULATE_PREFETCH */
  21.991 +}
  21.992 +
  21.993 +
  21.994 +
  21.995 +/* ------------------------- Top level read/write ------------------------- */
  21.996 +
  21.997 +/* Handles all memory accesses (except for immediate reads if they are
  21.998 + * configured to use separate functions in m68kconf.h).
  21.999 + * All memory accesses must go through these top level functions.
 21.1000 + * These functions will also check for address error and set the function
 21.1001 + * code if they are enabled in m68kconf.h.
 21.1002 + */
 21.1003 +INLINE uint m68ki_read_8_fc(uint address, uint fc)
 21.1004 +{
 21.1005 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1006 +	return m68k_read_memory_8(ADDRESS_68K(address));
 21.1007 +}
 21.1008 +INLINE uint m68ki_read_16_fc(uint address, uint fc)
 21.1009 +{
 21.1010 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1011 +	m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */
 21.1012 +	return m68k_read_memory_16(ADDRESS_68K(address));
 21.1013 +}
 21.1014 +INLINE uint m68ki_read_32_fc(uint address, uint fc)
 21.1015 +{
 21.1016 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1017 +	m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */
 21.1018 +	return m68k_read_memory_32(ADDRESS_68K(address));
 21.1019 +}
 21.1020 +
 21.1021 +INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
 21.1022 +{
 21.1023 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1024 +	m68k_write_memory_8(ADDRESS_68K(address), value);
 21.1025 +}
 21.1026 +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
 21.1027 +{
 21.1028 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1029 +	m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */
 21.1030 +	m68k_write_memory_16(ADDRESS_68K(address), value);
 21.1031 +}
 21.1032 +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
 21.1033 +{
 21.1034 +	m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
 21.1035 +	m68ki_check_address_error(address); /* auto-disable (see m68kcpu.h) */
 21.1036 +	m68k_write_memory_32(ADDRESS_68K(address), value);
 21.1037 +}
 21.1038 +
 21.1039 +
 21.1040 +
 21.1041 +/* --------------------- Effective Address Calculation -------------------- */
 21.1042 +
 21.1043 +/* The program counter relative addressing modes cause operands to be
 21.1044 + * retrieved from program space, not data space.
 21.1045 + */
 21.1046 +INLINE uint m68ki_get_ea_pcdi(void)
 21.1047 +{
 21.1048 +	uint old_pc = REG_PC;
 21.1049 +	m68ki_use_program_space(); /* auto-disable */
 21.1050 +	return old_pc + MAKE_INT_16(m68ki_read_imm_16());
 21.1051 +}
 21.1052 +
 21.1053 +
 21.1054 +INLINE uint m68ki_get_ea_pcix(void)
 21.1055 +{
 21.1056 +	m68ki_use_program_space(); /* auto-disable */
 21.1057 +	return m68ki_get_ea_ix(REG_PC);
 21.1058 +}
 21.1059 +
 21.1060 +/* Indexed addressing modes are encoded as follows:
 21.1061 + *
 21.1062 + * Base instruction format:
 21.1063 + * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
 21.1064 + * x x x x x x x x x x | 1 1 0 | BASE REGISTER      (An)
 21.1065 + *
 21.1066 + * Base instruction format for destination EA in move instructions:
 21.1067 + * F E D C | B A 9    | 8 7 6 | 5 4 3 2 1 0
 21.1068 + * x x x x | BASE REG | 1 1 0 | X X X X X X       (An)
 21.1069 + *
 21.1070 + * Brief extension format:
 21.1071 + *  F  |  E D C   |  B  |  A 9  | 8 | 7 6 5 4 3 2 1 0
 21.1072 + * D/A | REGISTER | W/L | SCALE | 0 |  DISPLACEMENT
 21.1073 + *
 21.1074 + * Full extension format:
 21.1075 + *  F     E D C      B     A 9    8   7    6    5 4       3   2 1 0
 21.1076 + * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
 21.1077 + * BASE DISPLACEMENT (0, 16, 32 bit)                (bd)
 21.1078 + * OUTER DISPLACEMENT (0, 16, 32 bit)               (od)
 21.1079 + *
 21.1080 + * D/A:     0 = Dn, 1 = An                          (Xn)
 21.1081 + * W/L:     0 = W (sign extend), 1 = L              (.SIZE)
 21.1082 + * SCALE:   00=1, 01=2, 10=4, 11=8                  (*SCALE)
 21.1083 + * BS:      0=add base reg, 1=suppress base reg     (An suppressed)
 21.1084 + * IS:      0=add index, 1=suppress index           (Xn suppressed)
 21.1085 + * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long  (size of bd)
 21.1086 + *
 21.1087 + * IS I/IS Operation
 21.1088 + * 0  000  No Memory Indirect
 21.1089 + * 0  001  indir prex with null outer
 21.1090 + * 0  010  indir prex with word outer
 21.1091 + * 0  011  indir prex with long outer
 21.1092 + * 0  100  reserved
 21.1093 + * 0  101  indir postx with null outer
 21.1094 + * 0  110  indir postx with word outer
 21.1095 + * 0  111  indir postx with long outer
 21.1096 + * 1  000  no memory indirect
 21.1097 + * 1  001  mem indir with null outer
 21.1098 + * 1  010  mem indir with word outer
 21.1099 + * 1  011  mem indir with long outer
 21.1100 + * 1  100-111  reserved
 21.1101 + */
 21.1102 +INLINE uint m68ki_get_ea_ix(uint An)
 21.1103 +{
 21.1104 +	/* An = base register */
 21.1105 +	uint extension = m68ki_read_imm_16();
 21.1106 +	uint Xn = 0;                        /* Index register */
 21.1107 +	uint bd = 0;                        /* Base Displacement */
 21.1108 +	uint od = 0;                        /* Outer Displacement */
 21.1109 +
 21.1110 +	if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
 21.1111 +	{
 21.1112 +		/* Calculate index */
 21.1113 +		Xn = REG_DA[extension>>12];     /* Xn */
 21.1114 +		if(!BIT_B(extension))           /* W/L */
 21.1115 +			Xn = MAKE_INT_16(Xn);
 21.1116 +
 21.1117 +		/* Add base register and displacement and return */
 21.1118 +		return An + Xn + MAKE_INT_8(extension);
 21.1119 +	}
 21.1120 +
 21.1121 +	/* Brief extension format */
 21.1122 +	if(!BIT_8(extension))
 21.1123 +	{
 21.1124 +		/* Calculate index */
 21.1125 +		Xn = REG_DA[extension>>12];     /* Xn */
 21.1126 +		if(!BIT_B(extension))           /* W/L */
 21.1127 +			Xn = MAKE_INT_16(Xn);
 21.1128 +		/* Add scale if proper CPU type */
 21.1129 +		if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 21.1130 +			Xn <<= (extension>>9) & 3;  /* SCALE */
 21.1131 +
 21.1132 +		/* Add base register and displacement and return */
 21.1133 +		return An + Xn + MAKE_INT_8(extension);
 21.1134 +	}
 21.1135 +
 21.1136 +	/* Full extension format */
 21.1137 +
 21.1138 +	USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
 21.1139 +
 21.1140 +	/* Check if base register is present */
 21.1141 +	if(BIT_7(extension))                /* BS */
 21.1142 +		An = 0;                         /* An */
 21.1143 +
 21.1144 +	/* Check if index is present */
 21.1145 +	if(!BIT_6(extension))               /* IS */
 21.1146 +	{
 21.1147 +		Xn = REG_DA[extension>>12];     /* Xn */
 21.1148 +		if(!BIT_B(extension))           /* W/L */
 21.1149 +			Xn = MAKE_INT_16(Xn);
 21.1150 +		Xn <<= (extension>>9) & 3;      /* SCALE */
 21.1151 +	}
 21.1152 +
 21.1153 +	/* Check if base displacement is present */
 21.1154 +	if(BIT_5(extension))                /* BD SIZE */
 21.1155 +		bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
 21.1156 +
 21.1157 +	/* If no indirect action, we are done */
 21.1158 +	if(!(extension&7))                  /* No Memory Indirect */
 21.1159 +		return An + bd + Xn;
 21.1160 +
 21.1161 +	/* Check if outer displacement is present */
 21.1162 +	if(BIT_1(extension))                /* I/IS:  od */
 21.1163 +		od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
 21.1164 +
 21.1165 +	/* Postindex */
 21.1166 +	if(BIT_2(extension))                /* I/IS:  0 = preindex, 1 = postindex */
 21.1167 +		return m68ki_read_32(An + bd) + Xn + od;
 21.1168 +
 21.1169 +	/* Preindex */
 21.1170 +	return m68ki_read_32(An + bd + Xn) + od;
 21.1171 +}
 21.1172 +
 21.1173 +
 21.1174 +/* Fetch operands */
 21.1175 +INLINE uint OPER_AY_AI_8(void)  {uint ea = EA_AY_AI_8();  return m68ki_read_8(ea); }
 21.1176 +INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
 21.1177 +INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
 21.1178 +INLINE uint OPER_AY_PI_8(void)  {uint ea = EA_AY_PI_8();  return m68ki_read_8(ea); }
 21.1179 +INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
 21.1180 +INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
 21.1181 +INLINE uint OPER_AY_PD_8(void)  {uint ea = EA_AY_PD_8();  return m68ki_read_8(ea); }
 21.1182 +INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
 21.1183 +INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
 21.1184 +INLINE uint OPER_AY_DI_8(void)  {uint ea = EA_AY_DI_8();  return m68ki_read_8(ea); }
 21.1185 +INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
 21.1186 +INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
 21.1187 +INLINE uint OPER_AY_IX_8(void)  {uint ea = EA_AY_IX_8();  return m68ki_read_8(ea); }
 21.1188 +INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
 21.1189 +INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
 21.1190 +
 21.1191 +INLINE uint OPER_AX_AI_8(void)  {uint ea = EA_AX_AI_8();  return m68ki_read_8(ea); }
 21.1192 +INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
 21.1193 +INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
 21.1194 +INLINE uint OPER_AX_PI_8(void)  {uint ea = EA_AX_PI_8();  return m68ki_read_8(ea); }
 21.1195 +INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
 21.1196 +INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
 21.1197 +INLINE uint OPER_AX_PD_8(void)  {uint ea = EA_AX_PD_8();  return m68ki_read_8(ea); }
 21.1198 +INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
 21.1199 +INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
 21.1200 +INLINE uint OPER_AX_DI_8(void)  {uint ea = EA_AX_DI_8();  return m68ki_read_8(ea); }
 21.1201 +INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
 21.1202 +INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
 21.1203 +INLINE uint OPER_AX_IX_8(void)  {uint ea = EA_AX_IX_8();  return m68ki_read_8(ea); }
 21.1204 +INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
 21.1205 +INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
 21.1206 +
 21.1207 +INLINE uint OPER_A7_PI_8(void)  {uint ea = EA_A7_PI_8();  return m68ki_read_8(ea); }
 21.1208 +INLINE uint OPER_A7_PD_8(void)  {uint ea = EA_A7_PD_8();  return m68ki_read_8(ea); }
 21.1209 +
 21.1210 +INLINE uint OPER_AW_8(void)     {uint ea = EA_AW_8();     return m68ki_read_8(ea); }
 21.1211 +INLINE uint OPER_AW_16(void)    {uint ea = EA_AW_16();    return m68ki_read_16(ea);}
 21.1212 +INLINE uint OPER_AW_32(void)    {uint ea = EA_AW_32();    return m68ki_read_32(ea);}
 21.1213 +INLINE uint OPER_AL_8(void)     {uint ea = EA_AL_8();     return m68ki_read_8(ea); }
 21.1214 +INLINE uint OPER_AL_16(void)    {uint ea = EA_AL_16();    return m68ki_read_16(ea);}
 21.1215 +INLINE uint OPER_AL_32(void)    {uint ea = EA_AL_32();    return m68ki_read_32(ea);}
 21.1216 +INLINE uint OPER_PCDI_8(void)   {uint ea = EA_PCDI_8();   return m68ki_read_pcrel_8(ea); }
 21.1217 +INLINE uint OPER_PCDI_16(void)  {uint ea = EA_PCDI_16();  return m68ki_read_pcrel_16(ea);}
 21.1218 +INLINE uint OPER_PCDI_32(void)  {uint ea = EA_PCDI_32();  return m68ki_read_pcrel_32(ea);}
 21.1219 +INLINE uint OPER_PCIX_8(void)   {uint ea = EA_PCIX_8();   return m68ki_read_pcrel_8(ea); }
 21.1220 +INLINE uint OPER_PCIX_16(void)  {uint ea = EA_PCIX_16();  return m68ki_read_pcrel_16(ea);}
 21.1221 +INLINE uint OPER_PCIX_32(void)  {uint ea = EA_PCIX_32();  return m68ki_read_pcrel_32(ea);}
 21.1222 +
 21.1223 +
 21.1224 +
 21.1225 +/* ---------------------------- Stack Functions --------------------------- */
 21.1226 +
 21.1227 +/* Push/pull data from the stack */
 21.1228 +INLINE void m68ki_push_16(uint value)
 21.1229 +{
 21.1230 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
 21.1231 +	m68ki_write_16(REG_SP, value);
 21.1232 +}
 21.1233 +
 21.1234 +INLINE void m68ki_push_32(uint value)
 21.1235 +{
 21.1236 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
 21.1237 +	m68ki_write_32(REG_SP, value);
 21.1238 +}
 21.1239 +
 21.1240 +INLINE uint m68ki_pull_16(void)
 21.1241 +{
 21.1242 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
 21.1243 +	return m68ki_read_16(REG_SP-2);
 21.1244 +}
 21.1245 +
 21.1246 +INLINE uint m68ki_pull_32(void)
 21.1247 +{
 21.1248 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
 21.1249 +	return m68ki_read_32(REG_SP-4);
 21.1250 +}
 21.1251 +
 21.1252 +
 21.1253 +/* Increment/decrement the stack as if doing a push/pull but
 21.1254 + * don't do any memory access.
 21.1255 + */
 21.1256 +INLINE void m68ki_fake_push_16(void)
 21.1257 +{
 21.1258 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
 21.1259 +}
 21.1260 +
 21.1261 +INLINE void m68ki_fake_push_32(void)
 21.1262 +{
 21.1263 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
 21.1264 +}
 21.1265 +
 21.1266 +INLINE void m68ki_fake_pull_16(void)
 21.1267 +{
 21.1268 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
 21.1269 +}
 21.1270 +
 21.1271 +INLINE void m68ki_fake_pull_32(void)
 21.1272 +{
 21.1273 +	REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
 21.1274 +}
 21.1275 +
 21.1276 +
 21.1277 +/* ----------------------------- Program Flow ----------------------------- */
 21.1278 +
 21.1279 +/* Jump to a new program location or vector.
 21.1280 + * These functions will also call the pc_changed callback if it was enabled
 21.1281 + * in m68kconf.h.
 21.1282 + */
 21.1283 +INLINE void m68ki_jump(uint new_pc)
 21.1284 +{
 21.1285 +	REG_PC = new_pc;
 21.1286 +	m68ki_pc_changed(REG_PC);
 21.1287 +}
 21.1288 +
 21.1289 +INLINE void m68ki_jump_vector(uint vector)
 21.1290 +{
 21.1291 +	REG_PC = (vector<<2) + REG_VBR;
 21.1292 +	REG_PC = m68ki_read_data_32(REG_PC);
 21.1293 +	m68ki_pc_changed(REG_PC);
 21.1294 +}
 21.1295 +
 21.1296 +
 21.1297 +/* Branch to a new memory location.
 21.1298 + * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
 21.1299 + * So far I've found no problems with not calling pc_changed for 8 or 16
 21.1300 + * bit branches.
 21.1301 + */
 21.1302 +INLINE void m68ki_branch_8(uint offset)
 21.1303 +{
 21.1304 +	REG_PC += MAKE_INT_8(offset);
 21.1305 +}
 21.1306 +
 21.1307 +INLINE void m68ki_branch_16(uint offset)
 21.1308 +{
 21.1309 +	REG_PC += MAKE_INT_16(offset);
 21.1310 +}
 21.1311 +
 21.1312 +INLINE void m68ki_branch_32(uint offset)
 21.1313 +{
 21.1314 +	REG_PC += offset;
 21.1315 +	m68ki_pc_changed(REG_PC);
 21.1316 +}
 21.1317 +
 21.1318 +
 21.1319 +
 21.1320 +/* ---------------------------- Status Register --------------------------- */
 21.1321 +
 21.1322 +/* Set the S flag and change the active stack pointer.
 21.1323 + * Note that value MUST be 4 or 0.
 21.1324 + */
 21.1325 +INLINE void m68ki_set_s_flag(uint value)
 21.1326 +{
 21.1327 +	/* Backup the old stack pointer */
 21.1328 +	REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
 21.1329 +	/* Set the S flag */
 21.1330 +	FLAG_S = value;
 21.1331 +	/* Set the new stack pointer */
 21.1332 +	REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
 21.1333 +}
 21.1334 +
 21.1335 +/* Set the S and M flags and change the active stack pointer.
 21.1336 + * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
 21.1337 + */
 21.1338 +INLINE void m68ki_set_sm_flag(uint value)
 21.1339 +{
 21.1340 +	/* Backup the old stack pointer */
 21.1341 +	REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
 21.1342 +	/* Set the S and M flags */
 21.1343 +	FLAG_S = value & SFLAG_SET;
 21.1344 +	FLAG_M = value & MFLAG_SET;
 21.1345 +	/* Set the new stack pointer */
 21.1346 +	REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
 21.1347 +}
 21.1348 +
 21.1349 +
 21.1350 +/* Set the condition code register */
 21.1351 +INLINE void m68ki_set_ccr(uint value)
 21.1352 +{
 21.1353 +	FLAG_X = BIT_4(value)  << 4;
 21.1354 +	FLAG_N = BIT_3(value)  << 4;
 21.1355 +	FLAG_Z = !BIT_2(value);
 21.1356 +	FLAG_V = BIT_1(value)  << 6;
 21.1357 +	FLAG_C = BIT_0(value)  << 8;
 21.1358 +}
 21.1359 +
 21.1360 +/* Set the status register but don't check for interrupts */
 21.1361 +INLINE void m68ki_set_sr_noint(uint value)
 21.1362 +{
 21.1363 +	/* Mask out the "unimplemented" bits */
 21.1364 +	value &= CPU_SR_MASK;
 21.1365 +
 21.1366 +	/* Now set the status register */
 21.1367 +	FLAG_T1 = BIT_F(value);
 21.1368 +	FLAG_T0 = BIT_E(value);
 21.1369 +	FLAG_INT_MASK = value & 0x0700;
 21.1370 +	m68ki_set_ccr(value);
 21.1371 +	m68ki_set_sm_flag((value >> 11) & 6);
 21.1372 +}
 21.1373 +
 21.1374 +/* Set the status register and check for interrupts */
 21.1375 +INLINE void m68ki_set_sr(uint value)
 21.1376 +{
 21.1377 +	m68ki_set_sr_noint(value);
 21.1378 +	m68ki_check_interrupts();
 21.1379 +}
 21.1380 +
 21.1381 +
 21.1382 +/* ------------------------- Exception Processing ------------------------- */
 21.1383 +
 21.1384 +/* Initiate exception processing */
 21.1385 +INLINE uint m68ki_init_exception(void)
 21.1386 +{
 21.1387 +	/* Save the old status register */
 21.1388 +	uint sr = m68ki_get_sr();
 21.1389 +
 21.1390 +	/* Turn off trace flag, clear pending traces */
 21.1391 +	FLAG_T1 = FLAG_T0 = 0;
 21.1392 +	m68ki_clear_trace();
 21.1393 +	/* Enter supervisor mode */
 21.1394 +	m68ki_set_s_flag(SFLAG_SET);
 21.1395 +
 21.1396 +	return sr;
 21.1397 +}
 21.1398 +
 21.1399 +/* 3 word stack frame (68000 only) */
 21.1400 +INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
 21.1401 +{
 21.1402 +	m68ki_push_32(pc);
 21.1403 +	m68ki_push_16(sr);
 21.1404 +}
 21.1405 +
 21.1406 +/* Format 0 stack frame.
 21.1407 + * This is the standard stack frame for 68010+.
 21.1408 + */
 21.1409 +INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
 21.1410 +{
 21.1411 +	/* Stack a 3-word frame if we are 68000 */
 21.1412 +	if(CPU_TYPE == CPU_TYPE_000)
 21.1413 +	{
 21.1414 +		m68ki_stack_frame_3word(pc, sr);
 21.1415 +		return;
 21.1416 +	}
 21.1417 +	m68ki_push_16(vector<<2);
 21.1418 +	m68ki_push_32(pc);
 21.1419 +	m68ki_push_16(sr);
 21.1420 +}
 21.1421 +
 21.1422 +/* Format 1 stack frame (68020).
 21.1423 + * For 68020, this is the 4 word throwaway frame.
 21.1424 + */
 21.1425 +INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
 21.1426 +{
 21.1427 +	m68ki_push_16(0x1000 | (vector<<2));
 21.1428 +	m68ki_push_32(pc);
 21.1429 +	m68ki_push_16(sr);
 21.1430 +}
 21.1431 +
 21.1432 +/* Format 2 stack frame.
 21.1433 + * This is used only by 68020 for trap exceptions.
 21.1434 + */
 21.1435 +INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
 21.1436 +{
 21.1437 +	m68ki_push_32(REG_PPC);
 21.1438 +	m68ki_push_16(0x2000 | (vector<<2));
 21.1439 +	m68ki_push_32(REG_PC);
 21.1440 +	m68ki_push_16(sr);
 21.1441 +}
 21.1442 +
 21.1443 +
 21.1444 +/* Bus error stack frame (68000 only).
 21.1445 + */
 21.1446 +INLINE void m68ki_stack_frame_buserr(uint pc, uint sr, uint address, uint write, uint instruction, uint fc)
 21.1447 +{
 21.1448 +	m68ki_push_32(pc);
 21.1449 +	m68ki_push_16(sr);
 21.1450 +	m68ki_push_16(REG_IR);
 21.1451 +	m68ki_push_32(address);	/* access address */
 21.1452 +	/* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
 21.1453 +	 * R/W  0 = write, 1 = read
 21.1454 +	 * I/N  0 = instruction, 1 = not
 21.1455 +	 * FC   3-bit function code
 21.1456 +	 */
 21.1457 +	m68ki_push_16(((!write)<<4) | ((!instruction)<<3) | fc);
 21.1458 +}
 21.1459 +
 21.1460 +/* Format 8 stack frame (68010).
 21.1461 + * 68010 only.  This is the 29 word bus/address error frame.
 21.1462 + */
 21.1463 +void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
 21.1464 +{
 21.1465 +	/* VERSION
 21.1466 +	 * NUMBER
 21.1467 +	 * INTERNAL INFORMATION, 16 WORDS
 21.1468 +	 */
 21.1469 +	m68ki_fake_push_32();
 21.1470 +	m68ki_fake_push_32();
 21.1471 +	m68ki_fake_push_32();
 21.1472 +	m68ki_fake_push_32();
 21.1473 +	m68ki_fake_push_32();
 21.1474 +	m68ki_fake_push_32();
 21.1475 +	m68ki_fake_push_32();
 21.1476 +	m68ki_fake_push_32();
 21.1477 +
 21.1478 +	/* INSTRUCTION INPUT BUFFER */
 21.1479 +	m68ki_push_16(0);
 21.1480 +
 21.1481 +	/* UNUSED, RESERVED (not written) */
 21.1482 +	m68ki_fake_push_16();
 21.1483 +
 21.1484 +	/* DATA INPUT BUFFER */
 21.1485 +	m68ki_push_16(0);
 21.1486 +
 21.1487 +	/* UNUSED, RESERVED (not written) */
 21.1488 +	m68ki_fake_push_16();
 21.1489 +
 21.1490 +	/* DATA OUTPUT BUFFER */
 21.1491 +	m68ki_push_16(0);
 21.1492 +
 21.1493 +	/* UNUSED, RESERVED (not written) */
 21.1494 +	m68ki_fake_push_16();
 21.1495 +
 21.1496 +	/* FAULT ADDRESS */
 21.1497 +	m68ki_push_32(0);
 21.1498 +
 21.1499 +	/* SPECIAL STATUS WORD */
 21.1500 +	m68ki_push_16(0);
 21.1501 +
 21.1502 +	/* 1000, VECTOR OFFSET */
 21.1503 +	m68ki_push_16(0x8000 | (vector<<2));
 21.1504 +
 21.1505 +	/* PROGRAM COUNTER */
 21.1506 +	m68ki_push_32(pc);
 21.1507 +
 21.1508 +	/* STATUS REGISTER */
 21.1509 +	m68ki_push_16(sr);
 21.1510 +}
 21.1511 +
 21.1512 +/* Format A stack frame (short bus fault).
 21.1513 + * This is used only by 68020 for bus fault and address error
 21.1514 + * if the error happens at an instruction boundary.
 21.1515 + * PC stacked is address of next instruction.
 21.1516 + */
 21.1517 +void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
 21.1518 +{
 21.1519 +	/* INTERNAL REGISTER */
 21.1520 +	m68ki_push_16(0);
 21.1521 +
 21.1522 +	/* INTERNAL REGISTER */
 21.1523 +	m68ki_push_16(0);
 21.1524 +
 21.1525 +	/* DATA OUTPUT BUFFER (2 words) */
 21.1526 +	m68ki_push_32(0);
 21.1527 +
 21.1528 +	/* INTERNAL REGISTER */
 21.1529 +	m68ki_push_16(0);
 21.1530 +
 21.1531 +	/* INTERNAL REGISTER */
 21.1532 +	m68ki_push_16(0);
 21.1533 +
 21.1534 +	/* DATA CYCLE FAULT ADDRESS (2 words) */
 21.1535 +	m68ki_push_32(0);
 21.1536 +
 21.1537 +	/* INSTRUCTION PIPE STAGE B */
 21.1538 +	m68ki_push_16(0);
 21.1539 +
 21.1540 +	/* INSTRUCTION PIPE STAGE C */
 21.1541 +	m68ki_push_16(0);
 21.1542 +
 21.1543 +	/* SPECIAL STATUS REGISTER */
 21.1544 +	m68ki_push_16(0);
 21.1545 +
 21.1546 +	/* INTERNAL REGISTER */
 21.1547 +	m68ki_push_16(0);
 21.1548 +
 21.1549 +	/* 1010, VECTOR OFFSET */
 21.1550 +	m68ki_push_16(0xa000 | (vector<<2));
 21.1551 +
 21.1552 +	/* PROGRAM COUNTER */
 21.1553 +	m68ki_push_32(pc);
 21.1554 +
 21.1555 +	/* STATUS REGISTER */
 21.1556 +	m68ki_push_16(sr);
 21.1557 +}
 21.1558 +
 21.1559 +/* Format B stack frame (long bus fault).
 21.1560 + * This is used only by 68020 for bus fault and address error
 21.1561 + * if the error happens during instruction execution.
 21.1562 + * PC stacked is address of instruction in progress.
 21.1563 + */
 21.1564 +void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
 21.1565 +{
 21.1566 +	/* INTERNAL REGISTERS (18 words) */
 21.1567 +	m68ki_push_32(0);
 21.1568 +	m68ki_push_32(0);
 21.1569 +	m68ki_push_32(0);
 21.1570 +	m68ki_push_32(0);
 21.1571 +	m68ki_push_32(0);
 21.1572 +	m68ki_push_32(0);
 21.1573 +	m68ki_push_32(0);
 21.1574 +	m68ki_push_32(0);
 21.1575 +	m68ki_push_32(0);
 21.1576 +
 21.1577 +	/* VERSION# (4 bits), INTERNAL INFORMATION */
 21.1578 +	m68ki_push_16(0);
 21.1579 +
 21.1580 +	/* INTERNAL REGISTERS (3 words) */
 21.1581 +	m68ki_push_32(0);
 21.1582 +	m68ki_push_16(0);
 21.1583 +
 21.1584 +	/* DATA INTPUT BUFFER (2 words) */
 21.1585 +	m68ki_push_32(0);
 21.1586 +
 21.1587 +	/* INTERNAL REGISTERS (2 words) */
 21.1588 +	m68ki_push_32(0);
 21.1589 +
 21.1590 +	/* STAGE B ADDRESS (2 words) */
 21.1591 +	m68ki_push_32(0);
 21.1592 +
 21.1593 +	/* INTERNAL REGISTER (4 words) */
 21.1594 +	m68ki_push_32(0);
 21.1595 +	m68ki_push_32(0);
 21.1596 +
 21.1597 +	/* DATA OUTPUT BUFFER (2 words) */
 21.1598 +	m68ki_push_32(0);
 21.1599 +
 21.1600 +	/* INTERNAL REGISTER */
 21.1601 +	m68ki_push_16(0);
 21.1602 +
 21.1603 +	/* INTERNAL REGISTER */
 21.1604 +	m68ki_push_16(0);
 21.1605 +
 21.1606 +	/* DATA CYCLE FAULT ADDRESS (2 words) */
 21.1607 +	m68ki_push_32(0);
 21.1608 +
 21.1609 +	/* INSTRUCTION PIPE STAGE B */
 21.1610 +	m68ki_push_16(0);
 21.1611 +
 21.1612 +	/* INSTRUCTION PIPE STAGE C */
 21.1613 +	m68ki_push_16(0);
 21.1614 +
 21.1615 +	/* SPECIAL STATUS REGISTER */
 21.1616 +	m68ki_push_16(0);
 21.1617 +
 21.1618 +	/* INTERNAL REGISTER */
 21.1619 +	m68ki_push_16(0);
 21.1620 +
 21.1621 +	/* 1011, VECTOR OFFSET */
 21.1622 +	m68ki_push_16(0xb000 | (vector<<2));
 21.1623 +
 21.1624 +	/* PROGRAM COUNTER */
 21.1625 +	m68ki_push_32(pc);
 21.1626 +
 21.1627 +	/* STATUS REGISTER */
 21.1628 +	m68ki_push_16(sr);
 21.1629 +}
 21.1630 +
 21.1631 +
 21.1632 +/* Used for Group 2 exceptions.
 21.1633 + * These stack a type 2 frame on the 020.
 21.1634 + */
 21.1635 +INLINE void m68ki_exception_trap(uint vector)
 21.1636 +{
 21.1637 +	uint sr = m68ki_init_exception();
 21.1638 +
 21.1639 +	if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
 21.1640 +		m68ki_stack_frame_0000(REG_PC, sr, vector);
 21.1641 +	else
 21.1642 +		m68ki_stack_frame_0010(sr, vector);
 21.1643 +
 21.1644 +	m68ki_jump_vector(vector);
 21.1645 +
 21.1646 +	/* Use up some clock cycles */
 21.1647 +	USE_CYCLES(CYC_EXCEPTION[vector]);
 21.1648 +}
 21.1649 +
 21.1650 +/* Trap#n stacks a 0 frame but behaves like group2 otherwise */
 21.1651 +INLINE void m68ki_exception_trapN(uint vector)
 21.1652 +{
 21.1653 +	uint sr = m68ki_init_exception();
 21.1654 +	m68ki_stack_frame_0000(REG_PC, sr, vector);
 21.1655 +	m68ki_jump_vector(vector);
 21.1656 +
 21.1657 +	/* Use up some clock cycles */
 21.1658 +	USE_CYCLES(CYC_EXCEPTION[vector]);
 21.1659 +}
 21.1660 +
 21.1661 +/* Exception for trace mode */
 21.1662 +INLINE void m68ki_exception_trace(void)
 21.1663 +{
 21.1664 +	uint sr = m68ki_init_exception();
 21.1665 +
 21.1666 +	if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
 21.1667 +		m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
 21.1668 +	else
 21.1669 +		m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
 21.1670 +
 21.1671 +	m68ki_jump_vector(EXCEPTION_TRACE);
 21.1672 +
 21.1673 +	/* Trace nullifies a STOP instruction */
 21.1674 +	CPU_STOPPED &= ~STOP_LEVEL_STOP;
 21.1675 +
 21.1676 +	/* Use up some clock cycles */
 21.1677 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
 21.1678 +}
 21.1679 +
 21.1680 +/* Exception for privilege violation */
 21.1681 +INLINE void m68ki_exception_privilege_violation(void)
 21.1682 +{
 21.1683 +	uint sr = m68ki_init_exception();
 21.1684 +	m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
 21.1685 +	m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
 21.1686 +
 21.1687 +	/* Use up some clock cycles and undo the instruction's cycles */
 21.1688 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
 21.1689 +}
 21.1690 +
 21.1691 +/* Exception for A-Line instructions */
 21.1692 +INLINE void m68ki_exception_1010(void)
 21.1693 +{
 21.1694 +	uint sr;
 21.1695 +#if M68K_LOG_1010_1111 == OPT_ON
 21.1696 +	M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
 21.1697 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
 21.1698 +					 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
 21.1699 +#endif
 21.1700 +
 21.1701 +	sr = m68ki_init_exception();
 21.1702 +	m68ki_stack_frame_0000(REG_PC-2, sr, EXCEPTION_1010);
 21.1703 +	m68ki_jump_vector(EXCEPTION_1010);
 21.1704 +
 21.1705 +	/* Use up some clock cycles and undo the instruction's cycles */
 21.1706 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
 21.1707 +}
 21.1708 +
 21.1709 +/* Exception for F-Line instructions */
 21.1710 +INLINE void m68ki_exception_1111(void)
 21.1711 +{
 21.1712 +	uint sr;
 21.1713 +
 21.1714 +#if M68K_LOG_1010_1111 == OPT_ON
 21.1715 +	M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
 21.1716 +					 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
 21.1717 +					 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
 21.1718 +#endif
 21.1719 +
 21.1720 +	sr = m68ki_init_exception();
 21.1721 +	m68ki_stack_frame_0000(REG_PC-2, sr, EXCEPTION_1111);
 21.1722 +	m68ki_jump_vector(EXCEPTION_1111);
 21.1723 +
 21.1724 +	/* Use up some clock cycles and undo the instruction's cycles */
 21.1725 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
 21.1726 +}
 21.1727 +
 21.1728 +/* Exception for illegal instructions */
 21.1729 +INLINE void m68ki_exception_illegal(void)
 21.1730 +{
 21.1731 +	uint sr;
 21.1732 +
 21.1733 +	M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
 21.1734 +				 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
 21.1735 +				 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
 21.1736 +
 21.1737 +	sr = m68ki_init_exception();
 21.1738 +	m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
 21.1739 +	m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
 21.1740 +
 21.1741 +	/* Use up some clock cycles and undo the instruction's cycles */
 21.1742 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
 21.1743 +}
 21.1744 +
 21.1745 +/* Exception for format errror in RTE */
 21.1746 +INLINE void m68ki_exception_format_error(void)
 21.1747 +{
 21.1748 +	uint sr = m68ki_init_exception();
 21.1749 +	m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
 21.1750 +	m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
 21.1751 +
 21.1752 +	/* Use up some clock cycles and undo the instruction's cycles */
 21.1753 +	USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
 21.1754 +}
 21.1755 +
 21.1756 +/* Exception for address error */
 21.1757 +INLINE void m68ki_exception_address_error(void)
 21.1758 +{
 21.1759 +	/* Not emulated yet */
 21.1760 +}
 21.1761 +
 21.1762 +
 21.1763 +/* Service an interrupt request and start exception processing */
 21.1764 +void m68ki_exception_interrupt(uint int_level)
 21.1765 +{
 21.1766 +	uint vector;
 21.1767 +	uint sr;
 21.1768 +	uint new_pc;
 21.1769 +
 21.1770 +	/* Turn off the stopped state */
 21.1771 +	CPU_STOPPED &= ~STOP_LEVEL_STOP;
 21.1772 +
 21.1773 +	/* If we are halted, don't do anything */
 21.1774 +	if(CPU_STOPPED)
 21.1775 +		return;
 21.1776 +
 21.1777 +	/* Acknowledge the interrupt */
 21.1778 +	vector = m68ki_int_ack(int_level);
 21.1779 +
 21.1780 +	/* Get the interrupt vector */
 21.1781 +	if(vector == M68K_INT_ACK_AUTOVECTOR)
 21.1782 +		/* Use the autovectors.  This is the most commonly used implementation */
 21.1783 +		vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
 21.1784 +	else if(vector == M68K_INT_ACK_SPURIOUS)
 21.1785 +		/* Called if no devices respond to the interrupt acknowledge */
 21.1786 +		vector = EXCEPTION_SPURIOUS_INTERRUPT;
 21.1787 +	else if(vector > 255)
 21.1788 +	{
 21.1789 +		M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
 21.1790 +				 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
 21.1791 +		return;
 21.1792 +	}
 21.1793 +
 21.1794 +	/* Start exception processing */
 21.1795 +	sr = m68ki_init_exception();
 21.1796 +
 21.1797 +	/* Set the interrupt mask to the level of the one being serviced */
 21.1798 +	FLAG_INT_MASK = int_level<<8;
 21.1799 +
 21.1800 +	/* Get the new PC */
 21.1801 +	new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
 21.1802 +
 21.1803 +	/* If vector is uninitialized, call the uninitialized interrupt vector */
 21.1804 +	if(new_pc == 0)
 21.1805 +		new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
 21.1806 +
 21.1807 +	/* Generate a stack frame */
 21.1808 +	m68ki_stack_frame_0000(REG_PC, sr, vector);
 21.1809 +	if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
 21.1810 +	{
 21.1811 +		/* Create throwaway frame */
 21.1812 +		m68ki_set_sm_flag(FLAG_S);	/* clear M */
 21.1813 +		sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
 21.1814 +		m68ki_stack_frame_0001(REG_PC, sr, vector);
 21.1815 +	}
 21.1816 +
 21.1817 +	m68ki_jump(new_pc);
 21.1818 +
 21.1819 +	/* Defer cycle counting until later */
 21.1820 +	CPU_INT_CYCLES += CYC_EXCEPTION[vector];
 21.1821 +
 21.1822 +#if !M68K_EMULATE_INT_ACK
 21.1823 +	/* Automatically clear IRQ if we are not using an acknowledge scheme */
 21.1824 +	CPU_INT_LEVEL = 0;
 21.1825 +#endif /* M68K_EMULATE_INT_ACK */
 21.1826 +}
 21.1827 +
 21.1828 +
 21.1829 +/* ASG: Check for interrupts */
 21.1830 +INLINE void m68ki_check_interrupts(void)
 21.1831 +{
 21.1832 +	if(CPU_INT_LEVEL > FLAG_INT_MASK)
 21.1833 +		m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
 21.1834 +}
 21.1835 +
 21.1836 +
 21.1837 +
 21.1838 +/* ======================================================================== */
 21.1839 +/* ============================== END OF FILE ============================= */
 21.1840 +/* ======================================================================== */
 21.1841 +
 21.1842 +#endif /* M68KCPU__HEADER */

    22.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68kdasm.c
    22.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    22.3 +++ b/src/musashi/m68kdasm.c	Sat Nov 27 01:13:12 2010 +0000
    22.4 @@ -0,0 +1,3443 @@
    22.5 +/* ======================================================================== */
    22.6 +/* ========================= LICENSING & COPYRIGHT ======================== */
    22.7 +/* ======================================================================== */
    22.8 +/*
    22.9 + *                                  MUSASHI
   22.10 + *                                Version 3.3
   22.11 + *
   22.12 + * A portable Motorola M680x0 processor emulation engine.
   22.13 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   22.14 + *
   22.15 + * This code may be freely used for non-commercial purposes as long as this
   22.16 + * copyright notice remains unaltered in the source code and any binary files
   22.17 + * containing this code in compiled form.
   22.18 + *
   22.19 + * All other lisencing terms must be negotiated with the author
   22.20 + * (Karl Stenerud).
   22.21 + *
   22.22 + * The latest version of this code can be obtained at:
   22.23 + * http://kstenerud.cjb.net
   22.24 + */
   22.25 +
   22.26 +
   22.27 +
   22.28 +/* ======================================================================== */
   22.29 +/* ================================ INCLUDES ============================== */
   22.30 +/* ======================================================================== */
   22.31 +
   22.32 +#include <stdlib.h>
   22.33 +#include <stdio.h>
   22.34 +#include <string.h>
   22.35 +#include "m68k.h"
   22.36 +
   22.37 +/* ======================================================================== */
   22.38 +/* ============================ GENERAL DEFINES =========================== */
   22.39 +/* ======================================================================== */
   22.40 +
   22.41 +/* unsigned int and int must be at least 32 bits wide */
   22.42 +#undef uint
   22.43 +#define uint unsigned int
   22.44 +
   22.45 +/* Bit Isolation Functions */
   22.46 +#define BIT_0(A)  ((A) & 0x00000001)
   22.47 +#define BIT_1(A)  ((A) & 0x00000002)
   22.48 +#define BIT_2(A)  ((A) & 0x00000004)
   22.49 +#define BIT_3(A)  ((A) & 0x00000008)
   22.50 +#define BIT_4(A)  ((A) & 0x00000010)
   22.51 +#define BIT_5(A)  ((A) & 0x00000020)
   22.52 +#define BIT_6(A)  ((A) & 0x00000040)
   22.53 +#define BIT_7(A)  ((A) & 0x00000080)
   22.54 +#define BIT_8(A)  ((A) & 0x00000100)
   22.55 +#define BIT_9(A)  ((A) & 0x00000200)
   22.56 +#define BIT_A(A)  ((A) & 0x00000400)
   22.57 +#define BIT_B(A)  ((A) & 0x00000800)
   22.58 +#define BIT_C(A)  ((A) & 0x00001000)
   22.59 +#define BIT_D(A)  ((A) & 0x00002000)
   22.60 +#define BIT_E(A)  ((A) & 0x00004000)
   22.61 +#define BIT_F(A)  ((A) & 0x00008000)
   22.62 +#define BIT_10(A) ((A) & 0x00010000)
   22.63 +#define BIT_11(A) ((A) & 0x00020000)
   22.64 +#define BIT_12(A) ((A) & 0x00040000)
   22.65 +#define BIT_13(A) ((A) & 0x00080000)
   22.66 +#define BIT_14(A) ((A) & 0x00100000)
   22.67 +#define BIT_15(A) ((A) & 0x00200000)
   22.68 +#define BIT_16(A) ((A) & 0x00400000)
   22.69 +#define BIT_17(A) ((A) & 0x00800000)
   22.70 +#define BIT_18(A) ((A) & 0x01000000)
   22.71 +#define BIT_19(A) ((A) & 0x02000000)
   22.72 +#define BIT_1A(A) ((A) & 0x04000000)
   22.73 +#define BIT_1B(A) ((A) & 0x08000000)
   22.74 +#define BIT_1C(A) ((A) & 0x10000000)
   22.75 +#define BIT_1D(A) ((A) & 0x20000000)
   22.76 +#define BIT_1E(A) ((A) & 0x40000000)
   22.77 +#define BIT_1F(A) ((A) & 0x80000000)
   22.78 +
   22.79 +/* These are the CPU types understood by this disassembler */
   22.80 +#define TYPE_68000 1
   22.81 +#define TYPE_68010 2
   22.82 +#define TYPE_68020 4
   22.83 +#define TYPE_68030 8
   22.84 +#define TYPE_68040 16
   22.85 +
   22.86 +#define M68000_ONLY		TYPE_68000
   22.87 +
   22.88 +#define M68010_ONLY		TYPE_68010
   22.89 +#define M68010_LESS		(TYPE_68000 | TYPE_68010)
   22.90 +#define M68010_PLUS		(TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
   22.91 +
   22.92 +#define M68020_ONLY 	TYPE_68020
   22.93 +#define M68020_LESS 	(TYPE_68010 | TYPE_68020)
   22.94 +#define M68020_PLUS		(TYPE_68020 | TYPE_68030 | TYPE_68040)
   22.95 +
   22.96 +#define M68030_ONLY 	TYPE_68030
   22.97 +#define M68030_LESS 	(TYPE_68010 | TYPE_68020 | TYPE_68030)
   22.98 +#define M68030_PLUS		(TYPE_68030 | TYPE_68040)
   22.99 +
  22.100 +#define M68040_PLUS		TYPE_68040
  22.101 +
  22.102 +
  22.103 +/* Extension word formats */
  22.104 +#define EXT_8BIT_DISPLACEMENT(A)          ((A)&0xff)
  22.105 +#define EXT_FULL(A)                       BIT_8(A)
  22.106 +#define EXT_EFFECTIVE_ZERO(A)             (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
  22.107 +#define EXT_BASE_REGISTER_PRESENT(A)      (!BIT_7(A))
  22.108 +#define EXT_INDEX_REGISTER_PRESENT(A)     (!BIT_6(A))
  22.109 +#define EXT_INDEX_REGISTER(A)             (((A)>>12)&7)
  22.110 +#define EXT_INDEX_PRE_POST(A)             (EXT_INDEX_PRESENT(A) && (A)&3)
  22.111 +#define EXT_INDEX_PRE(A)                  (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
  22.112 +#define EXT_INDEX_POST(A)                 (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
  22.113 +#define EXT_INDEX_SCALE(A)                (((A)>>9)&3)
  22.114 +#define EXT_INDEX_LONG(A)                 BIT_B(A)
  22.115 +#define EXT_INDEX_AR(A)                   BIT_F(A)
  22.116 +#define EXT_BASE_DISPLACEMENT_PRESENT(A)  (((A)&0x30) > 0x10)
  22.117 +#define EXT_BASE_DISPLACEMENT_WORD(A)     (((A)&0x30) == 0x20)
  22.118 +#define EXT_BASE_DISPLACEMENT_LONG(A)     (((A)&0x30) == 0x30)
  22.119 +#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
  22.120 +#define EXT_OUTER_DISPLACEMENT_WORD(A)    (((A)&3) == 2 && ((A)&0x47) < 0x44)
  22.121 +#define EXT_OUTER_DISPLACEMENT_LONG(A)    (((A)&3) == 3 && ((A)&0x47) < 0x44)
  22.122 +
  22.123 +
  22.124 +
  22.125 +/* ======================================================================== */
  22.126 +/* =============================== PROTOTYPES ============================= */
  22.127 +/* ======================================================================== */
  22.128 +
  22.129 +/* Read data at the PC and increment PC */
  22.130 +uint  read_imm_8(void);
  22.131 +uint  read_imm_16(void);
  22.132 +uint  read_imm_32(void);
  22.133 +
  22.134 +/* Read data at the PC but don't imcrement the PC */
  22.135 +uint  peek_imm_8(void);
  22.136 +uint  peek_imm_16(void);
  22.137 +uint  peek_imm_32(void);
  22.138 +
  22.139 +/* make signed integers 100% portably */
  22.140 +static int make_int_8(int value);
  22.141 +static int make_int_16(int value);
  22.142 +
  22.143 +/* make a string of a hex value */
  22.144 +static char* make_signed_hex_str_8(uint val);
  22.145 +static char* make_signed_hex_str_16(uint val);
  22.146 +static char* make_signed_hex_str_32(uint val);
  22.147 +
  22.148 +/* make string of ea mode */
  22.149 +static char* get_ea_mode_str(uint instruction, uint size);
  22.150 +
  22.151 +char* get_ea_mode_str_8(uint instruction);
  22.152 +char* get_ea_mode_str_16(uint instruction);
  22.153 +char* get_ea_mode_str_32(uint instruction);
  22.154 +
  22.155 +/* make string of immediate value */
  22.156 +static char* get_imm_str_s(uint size);
  22.157 +static char* get_imm_str_u(uint size);
  22.158 +
  22.159 +char* get_imm_str_s8(void);
  22.160 +char* get_imm_str_s16(void);
  22.161 +char* get_imm_str_s32(void);
  22.162 +
  22.163 +/* Stuff to build the opcode handler jump table */
  22.164 +static void  build_opcode_table(void);
  22.165 +static int   valid_ea(uint opcode, uint mask);
  22.166 +static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
  22.167 +
  22.168 +/* used to build opcode handler jump table */
  22.169 +typedef struct
  22.170 +{
  22.171 +	void (*opcode_handler)(void); /* handler function */
  22.172 +	uint mask;                    /* mask on opcode */
  22.173 +	uint match;                   /* what to match after masking */
  22.174 +	uint ea_mask;                 /* what ea modes are allowed */
  22.175 +} opcode_struct;
  22.176 +
  22.177 +
  22.178 +
  22.179 +/* ======================================================================== */
  22.180 +/* ================================= DATA ================================= */
  22.181 +/* ======================================================================== */
  22.182 +
  22.183 +/* Opcode handler jump table */
  22.184 +static void (*g_instruction_table[0x10000])(void);
  22.185 +/* Flag if disassembler initialized */
  22.186 +static int  g_initialized = 0;
  22.187 +
  22.188 +/* Address mask to simulate address lines */
  22.189 +static unsigned int g_address_mask = 0xffffffff;
  22.190 +
  22.191 +static char g_dasm_str[100]; /* string to hold disassembly */
  22.192 +static char g_helper_str[100]; /* string to hold helpful info */
  22.193 +static uint g_cpu_pc;        /* program counter */
  22.194 +static uint g_cpu_ir;        /* instruction register */
  22.195 +static uint g_cpu_type;
  22.196 +
  22.197 +/* used by ops like asr, ror, addq, etc */
  22.198 +static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
  22.199 +
  22.200 +static uint g_5bit_data_table[32] =
  22.201 +{
  22.202 +	32,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
  22.203 +	16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
  22.204 +};
  22.205 +
  22.206 +static char* g_cc[16] =
  22.207 +{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
  22.208 +
  22.209 +static char* g_cpcc[64] =
  22.210 +{/* 000    001    010    011    100    101    110    111 */
  22.211 +	  "f",  "eq", "ogt", "oge", "olt", "ole", "ogl",  "or", /* 000 */
  22.212 +	 "un", "ueq", "ugt", "uge", "ult", "ule",  "ne",   "t", /* 001 */
  22.213 +	 "sf", "seq",  "gt",  "ge",  "lt",  "le",  "gl"  "gle", /* 010 */
  22.214 +  "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne",  "st", /* 011 */
  22.215 +	  "?",   "?",   "?",   "?",   "?",   "?",   "?",   "?", /* 100 */
  22.216 +	  "?",   "?",   "?",   "?",   "?",   "?",   "?",   "?", /* 101 */
  22.217 +	  "?",   "?",   "?",   "?",   "?",   "?",   "?",   "?", /* 110 */
  22.218 +	  "?",   "?",   "?",   "?",   "?",   "?",   "?",   "?"  /* 111 */
  22.219 +};
  22.220 +
  22.221 +
  22.222 +/* ======================================================================== */
  22.223 +/* =========================== UTILITY FUNCTIONS ========================== */
  22.224 +/* ======================================================================== */
  22.225 +
  22.226 +#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES)	\
  22.227 +	if(!(g_cpu_type & ALLOWED_CPU_TYPES))	\
  22.228 +	{										\
  22.229 +		d68000_illegal();					\
  22.230 +		return;								\
  22.231 +	}
  22.232 +
  22.233 +#define read_imm_8()  (m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)&0xff)
  22.234 +#define read_imm_16() m68k_read_disassembler_16(((g_cpu_pc+=2)-2)&g_address_mask)
  22.235 +#define read_imm_32() m68k_read_disassembler_32(((g_cpu_pc+=4)-4)&g_address_mask)
  22.236 +
  22.237 +#define peek_imm_8()  (m68k_read_disassembler_16(g_cpu_pc & g_address_mask)&0xff)
  22.238 +#define peek_imm_16() m68k_read_disassembler_16(g_cpu_pc & g_address_mask)
  22.239 +#define peek_imm_32() m68k_read_disassembler_32(g_cpu_pc & g_address_mask)
  22.240 +
  22.241 +/* Fake a split interface */
  22.242 +#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
  22.243 +#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
  22.244 +#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
  22.245 +
  22.246 +#define get_imm_str_s8() get_imm_str_s(0)
  22.247 +#define get_imm_str_s16() get_imm_str_s(1)
  22.248 +#define get_imm_str_s32() get_imm_str_s(2)
  22.249 +
  22.250 +#define get_imm_str_u8() get_imm_str_u(0)
  22.251 +#define get_imm_str_u16() get_imm_str_u(1)
  22.252 +#define get_imm_str_u32() get_imm_str_u(2)
  22.253 +
  22.254 +
  22.255 +/* 100% portable signed int generators */
  22.256 +static int make_int_8(int value)
  22.257 +{
  22.258 +	return (value & 0x80) ? value | ~0xff : value & 0xff;
  22.259 +}
  22.260 +
  22.261 +static int make_int_16(int value)
  22.262 +{
  22.263 +	return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
  22.264 +}
  22.265 +
  22.266 +
  22.267 +/* Get string representation of hex values */
  22.268 +static char* make_signed_hex_str_8(uint val)
  22.269 +{
  22.270 +	static char str[20];
  22.271 +
  22.272 +	val &= 0xff;
  22.273 +
  22.274 +	if(val == 0x80)
  22.275 +		sprintf(str, "-$80");
  22.276 +	else if(val & 0x80)
  22.277 +		sprintf(str, "-$%x", (0-val) & 0x7f);
  22.278 +	else
  22.279 +		sprintf(str, "$%x", val & 0x7f);
  22.280 +
  22.281 +	return str;
  22.282 +}
  22.283 +
  22.284 +static char* make_signed_hex_str_16(uint val)
  22.285 +{
  22.286 +	static char str[20];
  22.287 +
  22.288 +	val &= 0xffff;
  22.289 +
  22.290 +	if(val == 0x8000)
  22.291 +		sprintf(str, "-$8000");
  22.292 +	else if(val & 0x8000)
  22.293 +		sprintf(str, "-$%x", (0-val) & 0x7fff);
  22.294 +	else
  22.295 +		sprintf(str, "$%x", val & 0x7fff);
  22.296 +
  22.297 +	return str;
  22.298 +}
  22.299 +
  22.300 +static char* make_signed_hex_str_32(uint val)
  22.301 +{
  22.302 +	static char str[20];
  22.303 +
  22.304 +	val &= 0xffffffff;
  22.305 +
  22.306 +	if(val == 0x80000000)
  22.307 +		sprintf(str, "-$80000000");
  22.308 +	else if(val & 0x80000000)
  22.309 +		sprintf(str, "-$%x", (0-val) & 0x7fffffff);
  22.310 +	else
  22.311 +		sprintf(str, "$%x", val & 0x7fffffff);
  22.312 +
  22.313 +	return str;
  22.314 +}
  22.315 +
  22.316 +
  22.317 +/* make string of immediate value */
  22.318 +static char* get_imm_str_s(uint size)
  22.319 +{
  22.320 +	static char str[15];
  22.321 +	if(size == 0)
  22.322 +		sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
  22.323 +	else if(size == 1)
  22.324 +		sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
  22.325 +	else
  22.326 +		sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
  22.327 +	return str;
  22.328 +}
  22.329 +
  22.330 +static char* get_imm_str_u(uint size)
  22.331 +{
  22.332 +	static char str[15];
  22.333 +	if(size == 0)
  22.334 +		sprintf(str, "#$%x", read_imm_8() & 0xff);
  22.335 +	else if(size == 1)
  22.336 +		sprintf(str, "#$%x", read_imm_16() & 0xffff);
  22.337 +	else
  22.338 +		sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
  22.339 +	return str;
  22.340 +}
  22.341 +
  22.342 +/* Make string of effective address mode */
  22.343 +static char* get_ea_mode_str(uint instruction, uint size)
  22.344 +{
  22.345 +	static char b1[64];
  22.346 +	static char b2[64];
  22.347 +	static char* mode = b2;
  22.348 +	uint extension;
  22.349 +	uint base;
  22.350 +	uint outer;
  22.351 +	char base_reg[4];
  22.352 +	char index_reg[8];
  22.353 +	uint preindex;
  22.354 +	uint postindex;
  22.355 +	uint comma = 0;
  22.356 +	uint temp_value;
  22.357 +
  22.358 +	/* Switch buffers so we don't clobber on a double-call to this function */
  22.359 +	mode = mode == b1 ? b2 : b1;
  22.360 +
  22.361 +	switch(instruction & 0x3f)
  22.362 +	{
  22.363 +		case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
  22.364 +		/* data register direct */
  22.365 +			sprintf(mode, "D%d", instruction&7);
  22.366 +			break;
  22.367 +		case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
  22.368 +		/* address register direct */
  22.369 +			sprintf(mode, "A%d", instruction&7);
  22.370 +			break;
  22.371 +		case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
  22.372 +		/* address register indirect */
  22.373 +			sprintf(mode, "(A%d)", instruction&7);
  22.374 +			break;
  22.375 +		case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
  22.376 +		/* address register indirect with postincrement */
  22.377 +			sprintf(mode, "(A%d)+", instruction&7);
  22.378 +			break;
  22.379 +		case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
  22.380 +		/* address register indirect with predecrement */
  22.381 +			sprintf(mode, "-(A%d)", instruction&7);
  22.382 +			break;
  22.383 +		case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
  22.384 +		/* address register indirect with displacement*/
  22.385 +			sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
  22.386 +			break;
  22.387 +		case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
  22.388 +		/* address register indirect with index */
  22.389 +			extension = read_imm_16();
  22.390 +
  22.391 +			if(EXT_FULL(extension))
  22.392 +			{
  22.393 +				if(EXT_EFFECTIVE_ZERO(extension))
  22.394 +				{
  22.395 +					strcpy(mode, "0");
  22.396 +					break;
  22.397 +				}
  22.398 +				base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
  22.399 +				outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
  22.400 +				if(EXT_BASE_REGISTER_PRESENT(extension))
  22.401 +					sprintf(base_reg, "A%d", instruction&7);
  22.402 +				else
  22.403 +					*base_reg = 0;
  22.404 +				if(EXT_INDEX_REGISTER_PRESENT(extension))
  22.405 +				{
  22.406 +					sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.407 +					if(EXT_INDEX_SCALE(extension))
  22.408 +						sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
  22.409 +				}
  22.410 +				else
  22.411 +					*index_reg = 0;
  22.412 +				preindex = (extension&7) > 0 && (extension&7) < 4;
  22.413 +				postindex = (extension&7) > 4;
  22.414 +
  22.415 +				strcpy(mode, "(");
  22.416 +				if(preindex || postindex)
  22.417 +					strcat(mode, "[");
  22.418 +				if(base)
  22.419 +				{
  22.420 +					strcat(mode, make_signed_hex_str_16(base));
  22.421 +					comma = 1;
  22.422 +				}
  22.423 +				if(*base_reg)
  22.424 +				{
  22.425 +					if(comma)
  22.426 +						strcat(mode, ",");
  22.427 +					strcat(mode, base_reg);
  22.428 +					comma = 1;
  22.429 +				}
  22.430 +				if(postindex)
  22.431 +				{
  22.432 +					strcat(mode, "]");
  22.433 +					comma = 1;
  22.434 +				}
  22.435 +				if(*index_reg)
  22.436 +				{
  22.437 +					if(comma)
  22.438 +						strcat(mode, ",");
  22.439 +					strcat(mode, index_reg);
  22.440 +					comma = 1;
  22.441 +				}
  22.442 +				if(preindex)
  22.443 +				{
  22.444 +					strcat(mode, "]");
  22.445 +					comma = 1;
  22.446 +				}
  22.447 +				if(outer)
  22.448 +				{
  22.449 +					if(comma)
  22.450 +						strcat(mode, ",");
  22.451 +					strcat(mode, make_signed_hex_str_16(outer));
  22.452 +				}
  22.453 +				strcat(mode, ")");
  22.454 +				break;
  22.455 +			}
  22.456 +
  22.457 +			if(EXT_8BIT_DISPLACEMENT(extension) == 0)
  22.458 +				sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.459 +			else
  22.460 +				sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.461 +			if(EXT_INDEX_SCALE(extension))
  22.462 +				sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
  22.463 +			strcat(mode, ")");
  22.464 +			break;
  22.465 +		case 0x38:
  22.466 +		/* absolute short address */
  22.467 +			sprintf(mode, "$%x.w", read_imm_16());
  22.468 +			break;
  22.469 +		case 0x39:
  22.470 +		/* absolute long address */
  22.471 +			sprintf(mode, "$%x.l", read_imm_32());
  22.472 +			break;
  22.473 +		case 0x3a:
  22.474 +		/* program counter with displacement */
  22.475 +			temp_value = read_imm_16();
  22.476 +			sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
  22.477 +			sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
  22.478 +			break;
  22.479 +		case 0x3b:
  22.480 +		/* program counter with index */
  22.481 +			extension = read_imm_16();
  22.482 +
  22.483 +			if(EXT_FULL(extension))
  22.484 +			{
  22.485 +				if(EXT_EFFECTIVE_ZERO(extension))
  22.486 +				{
  22.487 +					strcpy(mode, "0");
  22.488 +					break;
  22.489 +				}
  22.490 +				base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
  22.491 +				outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
  22.492 +				if(EXT_BASE_REGISTER_PRESENT(extension))
  22.493 +					strcpy(base_reg, "PC");
  22.494 +				else
  22.495 +					*base_reg = 0;
  22.496 +				if(EXT_INDEX_REGISTER_PRESENT(extension))
  22.497 +				{
  22.498 +					sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.499 +					if(EXT_INDEX_SCALE(extension))
  22.500 +						sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
  22.501 +				}
  22.502 +				else
  22.503 +					*index_reg = 0;
  22.504 +				preindex = (extension&7) > 0 && (extension&7) < 4;
  22.505 +				postindex = (extension&7) > 4;
  22.506 +
  22.507 +				strcpy(mode, "(");
  22.508 +				if(preindex || postindex)
  22.509 +					strcat(mode, "[");
  22.510 +				if(base)
  22.511 +				{
  22.512 +					strcat(mode, make_signed_hex_str_16(base));
  22.513 +					comma = 1;
  22.514 +				}
  22.515 +				if(*base_reg)
  22.516 +				{
  22.517 +					if(comma)
  22.518 +						strcat(mode, ",");
  22.519 +					strcat(mode, base_reg);
  22.520 +					comma = 1;
  22.521 +				}
  22.522 +				if(postindex)
  22.523 +				{
  22.524 +					strcat(mode, "]");
  22.525 +					comma = 1;
  22.526 +				}
  22.527 +				if(*index_reg)
  22.528 +				{
  22.529 +					if(comma)
  22.530 +						strcat(mode, ",");
  22.531 +					strcat(mode, index_reg);
  22.532 +					comma = 1;
  22.533 +				}
  22.534 +				if(preindex)
  22.535 +				{
  22.536 +					strcat(mode, "]");
  22.537 +					comma = 1;
  22.538 +				}
  22.539 +				if(outer)
  22.540 +				{
  22.541 +					if(comma)
  22.542 +						strcat(mode, ",");
  22.543 +					strcat(mode, make_signed_hex_str_16(outer));
  22.544 +				}
  22.545 +				strcat(mode, ")");
  22.546 +				break;
  22.547 +			}
  22.548 +
  22.549 +			if(EXT_8BIT_DISPLACEMENT(extension) == 0)
  22.550 +				sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.551 +			else
  22.552 +				sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
  22.553 +			if(EXT_INDEX_SCALE(extension))
  22.554 +				sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
  22.555 +			strcat(mode, ")");
  22.556 +			break;
  22.557 +		case 0x3c:
  22.558 +		/* Immediate */
  22.559 +			sprintf(mode, "%s", get_imm_str_u(size));
  22.560 +			break;
  22.561 +		default:
  22.562 +			sprintf(mode, "INVALID %x", instruction & 0x3f);
  22.563 +	}
  22.564 +	return mode;
  22.565 +}
  22.566 +
  22.567 +
  22.568 +
  22.569 +/* ======================================================================== */
  22.570 +/* ========================= INSTRUCTION HANDLERS ========================= */
  22.571 +/* ======================================================================== */
  22.572 +/* Instruction handler function names follow this convention:
  22.573 + *
  22.574 + * d68000_NAME_EXTENSIONS(void)
  22.575 + * where NAME is the name of the opcode it handles and EXTENSIONS are any
  22.576 + * extensions for special instances of that opcode.
  22.577 + *
  22.578 + * Examples:
  22.579 + *   d68000_add_er_8(): add opcode, from effective address to register,
  22.580 + *                      size = byte
  22.581 + *
  22.582 + *   d68000_asr_s_8(): arithmetic shift right, static count, size = byte
  22.583 + *
  22.584 + *
  22.585 + * Common extensions:
  22.586 + * 8   : size = byte
  22.587 + * 16  : size = word
  22.588 + * 32  : size = long
  22.589 + * rr  : register to register
  22.590 + * mm  : memory to memory
  22.591 + * r   : register
  22.592 + * s   : static
  22.593 + * er  : effective address -> register
  22.594 + * re  : register -> effective address
  22.595 + * ea  : using effective address mode of operation
  22.596 + * d   : data register direct
  22.597 + * a   : address register direct
  22.598 + * ai  : address register indirect
  22.599 + * pi  : address register indirect with postincrement
  22.600 + * pd  : address register indirect with predecrement
  22.601 + * di  : address register indirect with displacement
  22.602 + * ix  : address register indirect with index
  22.603 + * aw  : absolute word
  22.604 + * al  : absolute long
  22.605 + */
  22.606 +
  22.607 +static void d68000_illegal(void)
  22.608 +{
  22.609 +	sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
  22.610 +}
  22.611 +
  22.612 +static void d68000_1010(void)
  22.613 +{
  22.614 +	sprintf(g_dasm_str, "dc.w    $%04x; opcode 1010", g_cpu_ir);
  22.615 +}
  22.616 +
  22.617 +
  22.618 +static void d68000_1111(void)
  22.619 +{
  22.620 +	sprintf(g_dasm_str, "dc.w    $%04x; opcode 1111", g_cpu_ir);
  22.621 +}
  22.622 +
  22.623 +
  22.624 +static void d68000_abcd_rr(void)
  22.625 +{
  22.626 +	sprintf(g_dasm_str, "abcd    D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.627 +}
  22.628 +
  22.629 +
  22.630 +static void d68000_abcd_mm(void)
  22.631 +{
  22.632 +	sprintf(g_dasm_str, "abcd    -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.633 +}
  22.634 +
  22.635 +static void d68000_add_er_8(void)
  22.636 +{
  22.637 +	sprintf(g_dasm_str, "add.b   %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.638 +}
  22.639 +
  22.640 +
  22.641 +static void d68000_add_er_16(void)
  22.642 +{
  22.643 +	sprintf(g_dasm_str, "add.w   %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.644 +}
  22.645 +
  22.646 +static void d68000_add_er_32(void)
  22.647 +{
  22.648 +	sprintf(g_dasm_str, "add.l   %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.649 +}
  22.650 +
  22.651 +static void d68000_add_re_8(void)
  22.652 +{
  22.653 +	sprintf(g_dasm_str, "add.b   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
  22.654 +}
  22.655 +
  22.656 +static void d68000_add_re_16(void)
  22.657 +{
  22.658 +	sprintf(g_dasm_str, "add.w   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
  22.659 +}
  22.660 +
  22.661 +static void d68000_add_re_32(void)
  22.662 +{
  22.663 +	sprintf(g_dasm_str, "add.l   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
  22.664 +}
  22.665 +
  22.666 +static void d68000_adda_16(void)
  22.667 +{
  22.668 +	sprintf(g_dasm_str, "adda.w  %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.669 +}
  22.670 +
  22.671 +static void d68000_adda_32(void)
  22.672 +{
  22.673 +	sprintf(g_dasm_str, "adda.l  %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.674 +}
  22.675 +
  22.676 +static void d68000_addi_8(void)
  22.677 +{
  22.678 +	char* str = get_imm_str_s8();
  22.679 +	sprintf(g_dasm_str, "addi.b  %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
  22.680 +}
  22.681 +
  22.682 +static void d68000_addi_16(void)
  22.683 +{
  22.684 +	char* str = get_imm_str_s16();
  22.685 +	sprintf(g_dasm_str, "addi.w  %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
  22.686 +}
  22.687 +
  22.688 +static void d68000_addi_32(void)
  22.689 +{
  22.690 +	char* str = get_imm_str_s32();
  22.691 +	sprintf(g_dasm_str, "addi.l  %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
  22.692 +}
  22.693 +
  22.694 +static void d68000_addq_8(void)
  22.695 +{
  22.696 +	sprintf(g_dasm_str, "addq.b  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
  22.697 +}
  22.698 +
  22.699 +static void d68000_addq_16(void)
  22.700 +{
  22.701 +	sprintf(g_dasm_str, "addq.w  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
  22.702 +}
  22.703 +
  22.704 +static void d68000_addq_32(void)
  22.705 +{
  22.706 +	sprintf(g_dasm_str, "addq.l  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
  22.707 +}
  22.708 +
  22.709 +static void d68000_addx_rr_8(void)
  22.710 +{
  22.711 +	sprintf(g_dasm_str, "addx.b  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.712 +}
  22.713 +
  22.714 +static void d68000_addx_rr_16(void)
  22.715 +{
  22.716 +	sprintf(g_dasm_str, "addx.w  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.717 +}
  22.718 +
  22.719 +static void d68000_addx_rr_32(void)
  22.720 +{
  22.721 +	sprintf(g_dasm_str, "addx.l  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.722 +}
  22.723 +
  22.724 +static void d68000_addx_mm_8(void)
  22.725 +{
  22.726 +	sprintf(g_dasm_str, "addx.b  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.727 +}
  22.728 +
  22.729 +static void d68000_addx_mm_16(void)
  22.730 +{
  22.731 +	sprintf(g_dasm_str, "addx.w  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.732 +}
  22.733 +
  22.734 +static void d68000_addx_mm_32(void)
  22.735 +{
  22.736 +	sprintf(g_dasm_str, "addx.l  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
  22.737 +}
  22.738 +
  22.739 +static void d68000_and_er_8(void)
  22.740 +{
  22.741 +	sprintf(g_dasm_str, "and.b   %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.742 +}
  22.743 +
  22.744 +static void d68000_and_er_16(void)
  22.745 +{
  22.746 +	sprintf(g_dasm_str, "and.w   %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.747 +}
  22.748 +
  22.749 +static void d68000_and_er_32(void)
  22.750 +{
  22.751 +	sprintf(g_dasm_str, "and.l   %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
  22.752 +}
  22.753 +
  22.754 +static void d68000_and_re_8(void)
  22.755 +{
  22.756 +	sprintf(g_dasm_str, "and.b   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
  22.757 +}
  22.758 +
  22.759 +static void d68000_and_re_16(void)
  22.760 +{
  22.761 +	sprintf(g_dasm_str, "and.w   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
  22.762 +}
  22.763 +
  22.764 +static void d68000_and_re_32(void)
  22.765 +{
  22.766 +	sprintf(g_dasm_str, "and.l   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
  22.767 +}
  22.768 +
  22.769 +static void d68000_andi_8(void)
  22.770 +{
  22.771 +	char* str = get_imm_str_u8();
  22.772 +	sprintf(g_dasm_str, "andi.b  %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
  22.773 +}
  22.774 +
  22.775 +static void d68000_andi_16(void)
  22.776 +{
  22.777 +	char* str = get_imm_str_u16();
  22.778 +	sprintf(g_dasm_str, "andi.w  %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
  22.779 +}
  22.780 +
  22.781 +static void d68000_andi_32(void)
  22.782 +{
  22.783 +	char* str = get_imm_str_u32();
  22.784 +	sprintf(g_dasm_str, "andi.l  %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
  22.785 +}
  22.786 +
  22.787 +static void d68000_andi_to_ccr(void)
  22.788 +{
  22.789 +	sprintf(g_dasm_str, "andi    %s, CCR", get_imm_str_u8());
  22.790 +}
  22.791 +
  22.792 +static void d68000_andi_to_sr(void)
  22.793 +{
  22.794 +	sprintf(g_dasm_str, "andi    %s, SR", get_imm_str_u16());
  22.795 +}
  22.796 +
  22.797 +static void d68000_asr_s_8(void)
  22.798 +{
  22.799 +	sprintf(g_dasm_str, "asr.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.800 +}
  22.801 +
  22.802 +static void d68000_asr_s_16(void)
  22.803 +{
  22.804 +	sprintf(g_dasm_str, "asr.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.805 +}
  22.806 +
  22.807 +static void d68000_asr_s_32(void)
  22.808 +{
  22.809 +	sprintf(g_dasm_str, "asr.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.810 +}
  22.811 +
  22.812 +static void d68000_asr_r_8(void)
  22.813 +{
  22.814 +	sprintf(g_dasm_str, "asr.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.815 +}
  22.816 +
  22.817 +static void d68000_asr_r_16(void)
  22.818 +{
  22.819 +	sprintf(g_dasm_str, "asr.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.820 +}
  22.821 +
  22.822 +static void d68000_asr_r_32(void)
  22.823 +{
  22.824 +	sprintf(g_dasm_str, "asr.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.825 +}
  22.826 +
  22.827 +static void d68000_asr_ea(void)
  22.828 +{
  22.829 +	sprintf(g_dasm_str, "asr.w   %s", get_ea_mode_str_16(g_cpu_ir));
  22.830 +}
  22.831 +
  22.832 +static void d68000_asl_s_8(void)
  22.833 +{
  22.834 +	sprintf(g_dasm_str, "asl.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.835 +}
  22.836 +
  22.837 +static void d68000_asl_s_16(void)
  22.838 +{
  22.839 +	sprintf(g_dasm_str, "asl.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.840 +}
  22.841 +
  22.842 +static void d68000_asl_s_32(void)
  22.843 +{
  22.844 +	sprintf(g_dasm_str, "asl.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
  22.845 +}
  22.846 +
  22.847 +static void d68000_asl_r_8(void)
  22.848 +{
  22.849 +	sprintf(g_dasm_str, "asl.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.850 +}
  22.851 +
  22.852 +static void d68000_asl_r_16(void)
  22.853 +{
  22.854 +	sprintf(g_dasm_str, "asl.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.855 +}
  22.856 +
  22.857 +static void d68000_asl_r_32(void)
  22.858 +{
  22.859 +	sprintf(g_dasm_str, "asl.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
  22.860 +}
  22.861 +
  22.862 +static void d68000_asl_ea(void)
  22.863 +{
  22.864 +	sprintf(g_dasm_str, "asl.w   %s", get_ea_mode_str_16(g_cpu_ir));
  22.865 +}
  22.866 +
  22.867 +static void d68000_bcc_8(void)
  22.868 +{
  22.869 +	uint temp_pc = g_cpu_pc;
  22.870 +	sprintf(g_dasm_str, "b%-2s     %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
  22.871 +}
  22.872 +
  22.873 +static void d68000_bcc_16(void)
  22.874 +{
  22.875 +	uint temp_pc = g_cpu_pc;
  22.876 +	sprintf(g_dasm_str, "b%-2s     %x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
  22.877 +}
  22.878 +
  22.879 +static void d68020_bcc_32(void)
  22.880 +{
  22.881 +	uint temp_pc = g_cpu_pc;
  22.882 +	LIMIT_CPU_TYPES(M68020_PLUS);
  22.883 +	sprintf(g_dasm_str, "b%-2s     %x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
  22.884 +}
  22.885 +
  22.886 +static void d68000_bchg_r(void)
  22.887 +{
  22.888 +	sprintf(g_dasm_str, "bchg    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
  22.889 +}
  22.890 +
  22.891 +static void d68000_bchg_s(void)
  22.892 +{
  22.893 +	char* str = get_imm_str_u8();
  22.894 +	sprintf(g_dasm_str, "bchg    %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
  22.895 +}
  22.896 +
  22.897 +static void d68000_bclr_r(void)
  22.898 +{
  22.899 +	sprintf(g_dasm_str, "bclr    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
  22.900 +}
  22.901 +
  22.902 +static void d68000_bclr_s(void)
  22.903 +{
  22.904 +	char* str = get_imm_str_u8();
  22.905 +	sprintf(g_dasm_str, "bclr    %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
  22.906 +}
  22.907 +
  22.908 +static void d68010_bkpt(void)
  22.909 +{
  22.910 +	LIMIT_CPU_TYPES(M68010_PLUS);
  22.911 +	sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
  22.912 +}
  22.913 +
  22.914 +static void d68020_bfchg(void)
  22.915 +{
  22.916 +	uint extension;
  22.917 +	char offset[3];
  22.918 +	char width[3];
  22.919 +
  22.920 +	LIMIT_CPU_TYPES(M68020_PLUS);
  22.921 +
  22.922 +	extension = read_imm_16();
  22.923 +
  22.924 +	if(BIT_B(extension))
  22.925 +		sprintf(offset, "D%d", (extension>>6)&7);
  22.926 +	else
  22.927 +		sprintf(offset, "%d", (extension>>6)&31);
  22.928 +	if(BIT_5(extension))
  22.929 +		sprintf(width, "D%d", extension&7);
  22.930 +	else
  22.931 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
  22.932 +	sprintf(g_dasm_str, "bfchg   %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
  22.933 +}
  22.934 +
  22.935 +static void d68020_bfclr(void)
  22.936 +{
  22.937 +	uint extension;
  22.938 +	char offset[3];
  22.939 +	char width[3];
  22.940 +
  22.941 +	LIMIT_CPU_TYPES(M68020_PLUS);
  22.942 +
  22.943 +	extension = read_imm_16();
  22.944 +
  22.945 +	if(BIT_B(extension))
  22.946 +		sprintf(offset, "D%d", (extension>>6)&7);
  22.947 +	else
  22.948 +		sprintf(offset, "%d", (extension>>6)&31);
  22.949 +	if(BIT_5(extension))
  22.950 +		sprintf(width, "D%d", extension&7);
  22.951 +	else
  22.952 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
  22.953 +	sprintf(g_dasm_str, "bfclr   %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
  22.954 +}
  22.955 +
  22.956 +static void d68020_bfexts(void)
  22.957 +{
  22.958 +	uint extension;
  22.959 +	char offset[3];
  22.960 +	char width[3];
  22.961 +
  22.962 +	LIMIT_CPU_TYPES(M68020_PLUS);
  22.963 +
  22.964 +	extension = read_imm_16();
  22.965 +
  22.966 +	if(BIT_B(extension))
  22.967 +		sprintf(offset, "D%d", (extension>>6)&7);
  22.968 +	else
  22.969 +		sprintf(offset, "%d", (extension>>6)&31);
  22.970 +	if(BIT_5(extension))
  22.971 +		sprintf(width, "D%d", extension&7);
  22.972 +	else
  22.973 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
  22.974 +	sprintf(g_dasm_str, "bfexts  D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
  22.975 +}
  22.976 +
  22.977 +static void d68020_bfextu(void)
  22.978 +{
  22.979 +	uint extension;
  22.980 +	char offset[3];
  22.981 +	char width[3];
  22.982 +
  22.983 +	LIMIT_CPU_TYPES(M68020_PLUS);
  22.984 +
  22.985 +	extension = read_imm_16();
  22.986 +
  22.987 +	if(BIT_B(extension))
  22.988 +		sprintf(offset, "D%d", (extension>>6)&7);
  22.989 +	else
  22.990 +		sprintf(offset, "%d", (extension>>6)&31);
  22.991 +	if(BIT_5(extension))
  22.992 +		sprintf(width, "D%d", extension&7);
  22.993 +	else
  22.994 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
  22.995 +	sprintf(g_dasm_str, "bfextu  D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
  22.996 +}
  22.997 +
  22.998 +static void d68020_bfffo(void)
  22.999 +{
 22.1000 +	uint extension;
 22.1001 +	char offset[3];
 22.1002 +	char width[3];
 22.1003 +
 22.1004 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1005 +
 22.1006 +	extension = read_imm_16();
 22.1007 +
 22.1008 +	if(BIT_B(extension))
 22.1009 +		sprintf(offset, "D%d", (extension>>6)&7);
 22.1010 +	else
 22.1011 +		sprintf(offset, "%d", (extension>>6)&31);
 22.1012 +	if(BIT_5(extension))
 22.1013 +		sprintf(width, "D%d", extension&7);
 22.1014 +	else
 22.1015 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
 22.1016 +	sprintf(g_dasm_str, "bfffo   D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
 22.1017 +}
 22.1018 +
 22.1019 +static void d68020_bfins(void)
 22.1020 +{
 22.1021 +	uint extension;
 22.1022 +	char offset[3];
 22.1023 +	char width[3];
 22.1024 +
 22.1025 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1026 +
 22.1027 +	extension = read_imm_16();
 22.1028 +
 22.1029 +	if(BIT_B(extension))
 22.1030 +		sprintf(offset, "D%d", (extension>>6)&7);
 22.1031 +	else
 22.1032 +		sprintf(offset, "%d", (extension>>6)&31);
 22.1033 +	if(BIT_5(extension))
 22.1034 +		sprintf(width, "D%d", extension&7);
 22.1035 +	else
 22.1036 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
 22.1037 +	sprintf(g_dasm_str, "bfins   D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
 22.1038 +}
 22.1039 +
 22.1040 +static void d68020_bfset(void)
 22.1041 +{
 22.1042 +	uint extension;
 22.1043 +	char offset[3];
 22.1044 +	char width[3];
 22.1045 +
 22.1046 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1047 +
 22.1048 +	extension = read_imm_16();
 22.1049 +
 22.1050 +	if(BIT_B(extension))
 22.1051 +		sprintf(offset, "D%d", (extension>>6)&7);
 22.1052 +	else
 22.1053 +		sprintf(offset, "%d", (extension>>6)&31);
 22.1054 +	if(BIT_5(extension))
 22.1055 +		sprintf(width, "D%d", extension&7);
 22.1056 +	else
 22.1057 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
 22.1058 +	sprintf(g_dasm_str, "bfset   %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
 22.1059 +}
 22.1060 +
 22.1061 +static void d68020_bftst(void)
 22.1062 +{
 22.1063 +	uint extension;
 22.1064 +	char offset[3];
 22.1065 +	char width[3];
 22.1066 +
 22.1067 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1068 +
 22.1069 +	extension = read_imm_16();
 22.1070 +
 22.1071 +	if(BIT_B(extension))
 22.1072 +		sprintf(offset, "D%d", (extension>>6)&7);
 22.1073 +	else
 22.1074 +		sprintf(offset, "%d", (extension>>6)&31);
 22.1075 +	if(BIT_5(extension))
 22.1076 +		sprintf(width, "D%d", extension&7);
 22.1077 +	else
 22.1078 +		sprintf(width, "%d", g_5bit_data_table[extension&31]);
 22.1079 +	sprintf(g_dasm_str, "bftst   %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
 22.1080 +}
 22.1081 +
 22.1082 +static void d68000_bra_8(void)
 22.1083 +{
 22.1084 +	uint temp_pc = g_cpu_pc;
 22.1085 +	sprintf(g_dasm_str, "bra     %x", temp_pc + make_int_8(g_cpu_ir));
 22.1086 +}
 22.1087 +
 22.1088 +static void d68000_bra_16(void)
 22.1089 +{
 22.1090 +	uint temp_pc = g_cpu_pc;
 22.1091 +	sprintf(g_dasm_str, "bra     %x", temp_pc + make_int_16(read_imm_16()));
 22.1092 +}
 22.1093 +
 22.1094 +static void d68020_bra_32(void)
 22.1095 +{
 22.1096 +	uint temp_pc = g_cpu_pc;
 22.1097 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1098 +	sprintf(g_dasm_str, "bra     %x; (2+)", temp_pc + read_imm_32());
 22.1099 +}
 22.1100 +
 22.1101 +static void d68000_bset_r(void)
 22.1102 +{
 22.1103 +	sprintf(g_dasm_str, "bset    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1104 +}
 22.1105 +
 22.1106 +static void d68000_bset_s(void)
 22.1107 +{
 22.1108 +	char* str = get_imm_str_u8();
 22.1109 +	sprintf(g_dasm_str, "bset    %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.1110 +}
 22.1111 +
 22.1112 +static void d68000_bsr_8(void)
 22.1113 +{
 22.1114 +	uint temp_pc = g_cpu_pc;
 22.1115 +	sprintf(g_dasm_str, "bsr     %x", temp_pc + make_int_8(g_cpu_ir));
 22.1116 +}
 22.1117 +
 22.1118 +static void d68000_bsr_16(void)
 22.1119 +{
 22.1120 +	uint temp_pc = g_cpu_pc;
 22.1121 +	sprintf(g_dasm_str, "bsr     %x", temp_pc + make_int_16(read_imm_16()));
 22.1122 +}
 22.1123 +
 22.1124 +static void d68020_bsr_32(void)
 22.1125 +{
 22.1126 +	uint temp_pc = g_cpu_pc;
 22.1127 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1128 +	sprintf(g_dasm_str, "bsr     %x; (2+)", temp_pc + peek_imm_32());
 22.1129 +}
 22.1130 +
 22.1131 +static void d68000_btst_r(void)
 22.1132 +{
 22.1133 +	sprintf(g_dasm_str, "btst    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1134 +}
 22.1135 +
 22.1136 +static void d68000_btst_s(void)
 22.1137 +{
 22.1138 +	char* str = get_imm_str_u8();
 22.1139 +	sprintf(g_dasm_str, "btst    %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.1140 +}
 22.1141 +
 22.1142 +static void d68020_callm(void)
 22.1143 +{
 22.1144 +	char* str;
 22.1145 +	LIMIT_CPU_TYPES(M68020_ONLY);
 22.1146 +	str = get_imm_str_u8();
 22.1147 +
 22.1148 +	sprintf(g_dasm_str, "callm   %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));
 22.1149 +}
 22.1150 +
 22.1151 +static void d68020_cas_8(void)
 22.1152 +{
 22.1153 +	uint extension;
 22.1154 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1155 +	extension = read_imm_16();
 22.1156 +	sprintf(g_dasm_str, "cas.b   D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1157 +}
 22.1158 +
 22.1159 +static void d68020_cas_16(void)
 22.1160 +{
 22.1161 +	uint extension;
 22.1162 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1163 +	extension = read_imm_16();
 22.1164 +	sprintf(g_dasm_str, "cas.w   D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
 22.1165 +}
 22.1166 +
 22.1167 +static void d68020_cas_32(void)
 22.1168 +{
 22.1169 +	uint extension;
 22.1170 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1171 +	extension = read_imm_16();
 22.1172 +	sprintf(g_dasm_str, "cas.l   D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
 22.1173 +}
 22.1174 +
 22.1175 +static void d68020_cas2_16(void)
 22.1176 +{
 22.1177 +/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
 22.1178 +f e d c b a 9 8 7 6 5 4 3 2 1 0
 22.1179 + DARn1  0 0 0  Du1  0 0 0  Dc1
 22.1180 + DARn2  0 0 0  Du2  0 0 0  Dc2
 22.1181 +*/
 22.1182 +
 22.1183 +	uint extension;
 22.1184 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1185 +	extension = read_imm_32();
 22.1186 +	sprintf(g_dasm_str, "cas2.w  D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
 22.1187 +		(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
 22.1188 +		BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
 22.1189 +		BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.1190 +}
 22.1191 +
 22.1192 +static void d68020_cas2_32(void)
 22.1193 +{
 22.1194 +	uint extension;
 22.1195 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1196 +	extension = read_imm_32();
 22.1197 +	sprintf(g_dasm_str, "cas2.l  D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
 22.1198 +		(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
 22.1199 +		BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
 22.1200 +		BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.1201 +}
 22.1202 +
 22.1203 +static void d68000_chk_16(void)
 22.1204 +{
 22.1205 +	sprintf(g_dasm_str, "chk.w   %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1206 +}
 22.1207 +
 22.1208 +static void d68020_chk_32(void)
 22.1209 +{
 22.1210 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1211 +	sprintf(g_dasm_str, "chk.l   %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1212 +}
 22.1213 +
 22.1214 +static void d68020_chk2_cmp2_8(void)
 22.1215 +{
 22.1216 +	uint extension;
 22.1217 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1218 +	extension = read_imm_16();
 22.1219 +	sprintf(g_dasm_str, "%s.b  %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.1220 +}
 22.1221 +
 22.1222 +static void d68020_chk2_cmp2_16(void)
 22.1223 +{
 22.1224 +	uint extension;
 22.1225 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1226 +	extension = read_imm_16();
 22.1227 +	sprintf(g_dasm_str, "%s.w  %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.1228 +}
 22.1229 +
 22.1230 +static void d68020_chk2_cmp2_32(void)
 22.1231 +{
 22.1232 +	uint extension;
 22.1233 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1234 +	extension = read_imm_16();
 22.1235 +	sprintf(g_dasm_str, "%s.l  %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.1236 +}
 22.1237 +
 22.1238 +static void d68040_cinv(void)
 22.1239 +{
 22.1240 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.1241 +	switch((g_cpu_ir>>3)&3)
 22.1242 +	{
 22.1243 +		case 0:
 22.1244 +			sprintf(g_dasm_str, "cinv (illegal scope); (4)");
 22.1245 +			break;
 22.1246 +		case 1:
 22.1247 +			sprintf(g_dasm_str, "cinvl   %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
 22.1248 +			break;
 22.1249 +		case 2:
 22.1250 +			sprintf(g_dasm_str, "cinvp   %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
 22.1251 +			break;
 22.1252 +		case 3:
 22.1253 +			sprintf(g_dasm_str, "cinva   %d; (4)", (g_cpu_ir>>6)&3);
 22.1254 +			break;
 22.1255 +	}
 22.1256 +}
 22.1257 +
 22.1258 +static void d68000_clr_8(void)
 22.1259 +{
 22.1260 +	sprintf(g_dasm_str, "clr.b   %s", get_ea_mode_str_8(g_cpu_ir));
 22.1261 +}
 22.1262 +
 22.1263 +static void d68000_clr_16(void)
 22.1264 +{
 22.1265 +	sprintf(g_dasm_str, "clr.w   %s", get_ea_mode_str_16(g_cpu_ir));
 22.1266 +}
 22.1267 +
 22.1268 +static void d68000_clr_32(void)
 22.1269 +{
 22.1270 +	sprintf(g_dasm_str, "clr.l   %s", get_ea_mode_str_32(g_cpu_ir));
 22.1271 +}
 22.1272 +
 22.1273 +static void d68000_cmp_8(void)
 22.1274 +{
 22.1275 +	sprintf(g_dasm_str, "cmp.b   %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1276 +}
 22.1277 +
 22.1278 +static void d68000_cmp_16(void)
 22.1279 +{
 22.1280 +	sprintf(g_dasm_str, "cmp.w   %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1281 +}
 22.1282 +
 22.1283 +static void d68000_cmp_32(void)
 22.1284 +{
 22.1285 +	sprintf(g_dasm_str, "cmp.l   %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1286 +}
 22.1287 +
 22.1288 +static void d68000_cmpa_16(void)
 22.1289 +{
 22.1290 +	sprintf(g_dasm_str, "cmpa.w  %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1291 +}
 22.1292 +
 22.1293 +static void d68000_cmpa_32(void)
 22.1294 +{
 22.1295 +	sprintf(g_dasm_str, "cmpa.l  %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1296 +}
 22.1297 +
 22.1298 +static void d68000_cmpi_8(void)
 22.1299 +{
 22.1300 +	char* str = get_imm_str_s8();
 22.1301 +	sprintf(g_dasm_str, "cmpi.b  %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.1302 +}
 22.1303 +
 22.1304 +static void d68020_cmpi_pcdi_8(void)
 22.1305 +{
 22.1306 +	char* str;
 22.1307 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1308 +	str = get_imm_str_s8();
 22.1309 +	sprintf(g_dasm_str, "cmpi.b  %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
 22.1310 +}
 22.1311 +
 22.1312 +static void d68020_cmpi_pcix_8(void)
 22.1313 +{
 22.1314 +	char* str;
 22.1315 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1316 +	str = get_imm_str_s8();
 22.1317 +	sprintf(g_dasm_str, "cmpi.b  %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
 22.1318 +}
 22.1319 +
 22.1320 +static void d68000_cmpi_16(void)
 22.1321 +{
 22.1322 +	char* str;
 22.1323 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1324 +	str = get_imm_str_s16();
 22.1325 +	sprintf(g_dasm_str, "cmpi.w  %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
 22.1326 +}
 22.1327 +
 22.1328 +static void d68020_cmpi_pcdi_16(void)
 22.1329 +{
 22.1330 +	char* str;
 22.1331 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1332 +	str = get_imm_str_s16();
 22.1333 +	sprintf(g_dasm_str, "cmpi.w  %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
 22.1334 +}
 22.1335 +
 22.1336 +static void d68020_cmpi_pcix_16(void)
 22.1337 +{
 22.1338 +	char* str;
 22.1339 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1340 +	str = get_imm_str_s16();
 22.1341 +	sprintf(g_dasm_str, "cmpi.w  %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
 22.1342 +}
 22.1343 +
 22.1344 +static void d68000_cmpi_32(void)
 22.1345 +{
 22.1346 +	char* str;
 22.1347 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1348 +	str = get_imm_str_s32();
 22.1349 +	sprintf(g_dasm_str, "cmpi.l  %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
 22.1350 +}
 22.1351 +
 22.1352 +static void d68020_cmpi_pcdi_32(void)
 22.1353 +{
 22.1354 +	char* str;
 22.1355 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1356 +	str = get_imm_str_s32();
 22.1357 +	sprintf(g_dasm_str, "cmpi.l  %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
 22.1358 +}
 22.1359 +
 22.1360 +static void d68020_cmpi_pcix_32(void)
 22.1361 +{
 22.1362 +	char* str;
 22.1363 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1364 +	str = get_imm_str_s32();
 22.1365 +	sprintf(g_dasm_str, "cmpi.l  %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
 22.1366 +}
 22.1367 +
 22.1368 +static void d68000_cmpm_8(void)
 22.1369 +{
 22.1370 +	sprintf(g_dasm_str, "cmpm.b  (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.1371 +}
 22.1372 +
 22.1373 +static void d68000_cmpm_16(void)
 22.1374 +{
 22.1375 +	sprintf(g_dasm_str, "cmpm.w  (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.1376 +}
 22.1377 +
 22.1378 +static void d68000_cmpm_32(void)
 22.1379 +{
 22.1380 +	sprintf(g_dasm_str, "cmpm.l  (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.1381 +}
 22.1382 +
 22.1383 +static void d68020_cpbcc_16(void)
 22.1384 +{
 22.1385 +	uint extension;
 22.1386 +	uint new_pc = g_cpu_pc;
 22.1387 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1388 +	extension = read_imm_16();
 22.1389 +	new_pc += make_int_16(peek_imm_16());
 22.1390 +	sprintf(g_dasm_str, "%db%-4s  %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
 22.1391 +}
 22.1392 +
 22.1393 +static void d68020_cpbcc_32(void)
 22.1394 +{
 22.1395 +	uint extension;
 22.1396 +	uint new_pc = g_cpu_pc;
 22.1397 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1398 +	extension = read_imm_16();
 22.1399 +	new_pc += peek_imm_32();
 22.1400 +	sprintf(g_dasm_str, "%db%-4s  %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
 22.1401 +}
 22.1402 +
 22.1403 +static void d68020_cpdbcc(void)
 22.1404 +{
 22.1405 +	uint extension1;
 22.1406 +	uint extension2;
 22.1407 +	uint new_pc = g_cpu_pc;
 22.1408 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1409 +	extension1 = read_imm_16();
 22.1410 +	extension2 = read_imm_16();
 22.1411 +	new_pc += make_int_16(peek_imm_16());
 22.1412 +	sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);
 22.1413 +}
 22.1414 +
 22.1415 +static void d68020_cpgen(void)
 22.1416 +{
 22.1417 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1418 +	sprintf(g_dasm_str, "%dgen    %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());
 22.1419 +}
 22.1420 +
 22.1421 +static void d68020_cprestore(void)
 22.1422 +{
 22.1423 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1424 +	sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1425 +}
 22.1426 +
 22.1427 +static void d68020_cpsave(void)
 22.1428 +{
 22.1429 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1430 +	sprintf(g_dasm_str, "%dsave   %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1431 +}
 22.1432 +
 22.1433 +static void d68020_cpscc(void)
 22.1434 +{
 22.1435 +	uint extension1;
 22.1436 +	uint extension2;
 22.1437 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1438 +	extension1 = read_imm_16();
 22.1439 +	extension2 = read_imm_16();
 22.1440 +	sprintf(g_dasm_str, "%ds%-4s  %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);
 22.1441 +}
 22.1442 +
 22.1443 +static void d68020_cptrapcc_0(void)
 22.1444 +{
 22.1445 +	uint extension1;
 22.1446 +	uint extension2;
 22.1447 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1448 +	extension1 = read_imm_16();
 22.1449 +	extension2 = read_imm_16();
 22.1450 +	sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);
 22.1451 +}
 22.1452 +
 22.1453 +static void d68020_cptrapcc_16(void)
 22.1454 +{
 22.1455 +	uint extension1;
 22.1456 +	uint extension2;
 22.1457 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1458 +	extension1 = read_imm_16();
 22.1459 +	extension2 = read_imm_16();
 22.1460 +	sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);
 22.1461 +}
 22.1462 +
 22.1463 +static void d68020_cptrapcc_32(void)
 22.1464 +{
 22.1465 +	uint extension1;
 22.1466 +	uint extension2;
 22.1467 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1468 +	extension1 = read_imm_16();
 22.1469 +	extension2 = read_imm_16();
 22.1470 +	sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);
 22.1471 +}
 22.1472 +
 22.1473 +static void d68040_cpush(void)
 22.1474 +{
 22.1475 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.1476 +	switch((g_cpu_ir>>3)&3)
 22.1477 +	{
 22.1478 +		case 0:
 22.1479 +			sprintf(g_dasm_str, "cpush (illegal scope); (4)");
 22.1480 +			break;
 22.1481 +		case 1:
 22.1482 +			sprintf(g_dasm_str, "cpushl  %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
 22.1483 +			break;
 22.1484 +		case 2:
 22.1485 +			sprintf(g_dasm_str, "cpushp  %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
 22.1486 +			break;
 22.1487 +		case 3:
 22.1488 +			sprintf(g_dasm_str, "cpusha  %d; (4)", (g_cpu_ir>>6)&3);
 22.1489 +			break;
 22.1490 +	}
 22.1491 +}
 22.1492 +
 22.1493 +static void d68000_dbra(void)
 22.1494 +{
 22.1495 +	uint temp_pc = g_cpu_pc;
 22.1496 +	sprintf(g_dasm_str, "dbra    D%d, %x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
 22.1497 +}
 22.1498 +
 22.1499 +static void d68000_dbcc(void)
 22.1500 +{
 22.1501 +	uint temp_pc = g_cpu_pc;
 22.1502 +	sprintf(g_dasm_str, "db%-2s    D%d, %x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
 22.1503 +}
 22.1504 +
 22.1505 +static void d68000_divs(void)
 22.1506 +{
 22.1507 +	sprintf(g_dasm_str, "divs.w  %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1508 +}
 22.1509 +
 22.1510 +static void d68000_divu(void)
 22.1511 +{
 22.1512 +	sprintf(g_dasm_str, "divu.w  %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1513 +}
 22.1514 +
 22.1515 +static void d68020_divl(void)
 22.1516 +{
 22.1517 +	uint extension;
 22.1518 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1519 +	extension = read_imm_16();
 22.1520 +
 22.1521 +	if(BIT_A(extension))
 22.1522 +		sprintf(g_dasm_str, "div%c.l  %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
 22.1523 +	else if((extension&7) == ((extension>>12)&7))
 22.1524 +		sprintf(g_dasm_str, "div%c.l  %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
 22.1525 +	else
 22.1526 +		sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
 22.1527 +}
 22.1528 +
 22.1529 +static void d68000_eor_8(void)
 22.1530 +{
 22.1531 +	sprintf(g_dasm_str, "eor.b   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.1532 +}
 22.1533 +
 22.1534 +static void d68000_eor_16(void)
 22.1535 +{
 22.1536 +	sprintf(g_dasm_str, "eor.w   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
 22.1537 +}
 22.1538 +
 22.1539 +static void d68000_eor_32(void)
 22.1540 +{
 22.1541 +	sprintf(g_dasm_str, "eor.l   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
 22.1542 +}
 22.1543 +
 22.1544 +static void d68000_eori_8(void)
 22.1545 +{
 22.1546 +	char* str = get_imm_str_u8();
 22.1547 +	sprintf(g_dasm_str, "eori.b  %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.1548 +}
 22.1549 +
 22.1550 +static void d68000_eori_16(void)
 22.1551 +{
 22.1552 +	char* str = get_imm_str_u16();
 22.1553 +	sprintf(g_dasm_str, "eori.w  %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
 22.1554 +}
 22.1555 +
 22.1556 +static void d68000_eori_32(void)
 22.1557 +{
 22.1558 +	char* str = get_imm_str_u32();
 22.1559 +	sprintf(g_dasm_str, "eori.l  %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
 22.1560 +}
 22.1561 +
 22.1562 +static void d68000_eori_to_ccr(void)
 22.1563 +{
 22.1564 +	sprintf(g_dasm_str, "eori    %s, CCR", get_imm_str_u8());
 22.1565 +}
 22.1566 +
 22.1567 +static void d68000_eori_to_sr(void)
 22.1568 +{
 22.1569 +	sprintf(g_dasm_str, "eori    %s, SR", get_imm_str_u16());
 22.1570 +}
 22.1571 +
 22.1572 +static void d68000_exg_dd(void)
 22.1573 +{
 22.1574 +	sprintf(g_dasm_str, "exg     D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1575 +}
 22.1576 +
 22.1577 +static void d68000_exg_aa(void)
 22.1578 +{
 22.1579 +	sprintf(g_dasm_str, "exg     A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1580 +}
 22.1581 +
 22.1582 +static void d68000_exg_da(void)
 22.1583 +{
 22.1584 +	sprintf(g_dasm_str, "exg     D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1585 +}
 22.1586 +
 22.1587 +static void d68000_ext_16(void)
 22.1588 +{
 22.1589 +	sprintf(g_dasm_str, "ext.w   D%d", g_cpu_ir&7);
 22.1590 +}
 22.1591 +
 22.1592 +static void d68000_ext_32(void)
 22.1593 +{
 22.1594 +	sprintf(g_dasm_str, "ext.l   D%d", g_cpu_ir&7);
 22.1595 +}
 22.1596 +
 22.1597 +static void d68020_extb_32(void)
 22.1598 +{
 22.1599 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1600 +	sprintf(g_dasm_str, "extb.l  D%d; (2+)", g_cpu_ir&7);
 22.1601 +}
 22.1602 +
 22.1603 +static void d68000_jmp(void)
 22.1604 +{
 22.1605 +	sprintf(g_dasm_str, "jmp     %s", get_ea_mode_str_32(g_cpu_ir));
 22.1606 +}
 22.1607 +
 22.1608 +static void d68000_jsr(void)
 22.1609 +{
 22.1610 +	sprintf(g_dasm_str, "jsr     %s", get_ea_mode_str_32(g_cpu_ir));
 22.1611 +}
 22.1612 +
 22.1613 +static void d68000_lea(void)
 22.1614 +{
 22.1615 +	sprintf(g_dasm_str, "lea     %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1616 +}
 22.1617 +
 22.1618 +static void d68000_link_16(void)
 22.1619 +{
 22.1620 +	sprintf(g_dasm_str, "link    A%d, %s", g_cpu_ir&7, get_imm_str_s16());
 22.1621 +}
 22.1622 +
 22.1623 +static void d68020_link_32(void)
 22.1624 +{
 22.1625 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.1626 +	sprintf(g_dasm_str, "link    A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());
 22.1627 +}
 22.1628 +
 22.1629 +static void d68000_lsr_s_8(void)
 22.1630 +{
 22.1631 +	sprintf(g_dasm_str, "lsr.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1632 +}
 22.1633 +
 22.1634 +static void d68000_lsr_s_16(void)
 22.1635 +{
 22.1636 +	sprintf(g_dasm_str, "lsr.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1637 +}
 22.1638 +
 22.1639 +static void d68000_lsr_s_32(void)
 22.1640 +{
 22.1641 +	sprintf(g_dasm_str, "lsr.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1642 +}
 22.1643 +
 22.1644 +static void d68000_lsr_r_8(void)
 22.1645 +{
 22.1646 +	sprintf(g_dasm_str, "lsr.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1647 +}
 22.1648 +
 22.1649 +static void d68000_lsr_r_16(void)
 22.1650 +{
 22.1651 +	sprintf(g_dasm_str, "lsr.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1652 +}
 22.1653 +
 22.1654 +static void d68000_lsr_r_32(void)
 22.1655 +{
 22.1656 +	sprintf(g_dasm_str, "lsr.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1657 +}
 22.1658 +
 22.1659 +static void d68000_lsr_ea(void)
 22.1660 +{
 22.1661 +	sprintf(g_dasm_str, "lsr.w   %s", get_ea_mode_str_32(g_cpu_ir));
 22.1662 +}
 22.1663 +
 22.1664 +static void d68000_lsl_s_8(void)
 22.1665 +{
 22.1666 +	sprintf(g_dasm_str, "lsl.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1667 +}
 22.1668 +
 22.1669 +static void d68000_lsl_s_16(void)
 22.1670 +{
 22.1671 +	sprintf(g_dasm_str, "lsl.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1672 +}
 22.1673 +
 22.1674 +static void d68000_lsl_s_32(void)
 22.1675 +{
 22.1676 +	sprintf(g_dasm_str, "lsl.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.1677 +}
 22.1678 +
 22.1679 +static void d68000_lsl_r_8(void)
 22.1680 +{
 22.1681 +	sprintf(g_dasm_str, "lsl.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1682 +}
 22.1683 +
 22.1684 +static void d68000_lsl_r_16(void)
 22.1685 +{
 22.1686 +	sprintf(g_dasm_str, "lsl.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1687 +}
 22.1688 +
 22.1689 +static void d68000_lsl_r_32(void)
 22.1690 +{
 22.1691 +	sprintf(g_dasm_str, "lsl.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.1692 +}
 22.1693 +
 22.1694 +static void d68000_lsl_ea(void)
 22.1695 +{
 22.1696 +	sprintf(g_dasm_str, "lsl.w   %s", get_ea_mode_str_32(g_cpu_ir));
 22.1697 +}
 22.1698 +
 22.1699 +static void d68000_move_8(void)
 22.1700 +{
 22.1701 +	char* str = get_ea_mode_str_8(g_cpu_ir);
 22.1702 +	sprintf(g_dasm_str, "move.b  %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
 22.1703 +}
 22.1704 +
 22.1705 +static void d68000_move_16(void)
 22.1706 +{
 22.1707 +	char* str = get_ea_mode_str_16(g_cpu_ir);
 22.1708 +	sprintf(g_dasm_str, "move.w  %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
 22.1709 +}
 22.1710 +
 22.1711 +static void d68000_move_32(void)
 22.1712 +{
 22.1713 +	char* str = get_ea_mode_str_32(g_cpu_ir);
 22.1714 +	sprintf(g_dasm_str, "move.l  %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
 22.1715 +}
 22.1716 +
 22.1717 +static void d68000_movea_16(void)
 22.1718 +{
 22.1719 +	sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1720 +}
 22.1721 +
 22.1722 +static void d68000_movea_32(void)
 22.1723 +{
 22.1724 +	sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.1725 +}
 22.1726 +
 22.1727 +static void d68000_move_to_ccr(void)
 22.1728 +{
 22.1729 +	sprintf(g_dasm_str, "move    %s, CCR", get_ea_mode_str_8(g_cpu_ir));
 22.1730 +}
 22.1731 +
 22.1732 +static void d68010_move_fr_ccr(void)
 22.1733 +{
 22.1734 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.1735 +	sprintf(g_dasm_str, "move    CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));
 22.1736 +}
 22.1737 +
 22.1738 +static void d68000_move_fr_sr(void)
 22.1739 +{
 22.1740 +	sprintf(g_dasm_str, "move    SR, %s", get_ea_mode_str_16(g_cpu_ir));
 22.1741 +}
 22.1742 +
 22.1743 +static void d68000_move_to_sr(void)
 22.1744 +{
 22.1745 +	sprintf(g_dasm_str, "move    %s, SR", get_ea_mode_str_16(g_cpu_ir));
 22.1746 +}
 22.1747 +
 22.1748 +static void d68000_move_fr_usp(void)
 22.1749 +{
 22.1750 +	sprintf(g_dasm_str, "move    USP, A%d", g_cpu_ir&7);
 22.1751 +}
 22.1752 +
 22.1753 +static void d68000_move_to_usp(void)
 22.1754 +{
 22.1755 +	sprintf(g_dasm_str, "move    A%d, USP", g_cpu_ir&7);
 22.1756 +}
 22.1757 +
 22.1758 +static void d68010_movec(void)
 22.1759 +{
 22.1760 +	uint extension;
 22.1761 +	char* reg_name;
 22.1762 +	char* processor;
 22.1763 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.1764 +	extension = read_imm_16();
 22.1765 +
 22.1766 +	switch(extension & 0xfff)
 22.1767 +	{
 22.1768 +		case 0x000:
 22.1769 +			reg_name = "SFC";
 22.1770 +			processor = "1+";
 22.1771 +			break;
 22.1772 +		case 0x001:
 22.1773 +			reg_name = "DFC";
 22.1774 +			processor = "1+";
 22.1775 +			break;
 22.1776 +		case 0x800:
 22.1777 +			reg_name = "USP";
 22.1778 +			processor = "1+";
 22.1779 +			break;
 22.1780 +		case 0x801:
 22.1781 +			reg_name = "VBR";
 22.1782 +			processor = "1+";
 22.1783 +			break;
 22.1784 +		case 0x002:
 22.1785 +			reg_name = "CACR";
 22.1786 +			processor = "2+";
 22.1787 +			break;
 22.1788 +		case 0x802:
 22.1789 +			reg_name = "CAAR";
 22.1790 +			processor = "2,3";
 22.1791 +			break;
 22.1792 +		case 0x803:
 22.1793 +			reg_name = "MSP";
 22.1794 +			processor = "2+";
 22.1795 +			break;
 22.1796 +		case 0x804:
 22.1797 +			reg_name = "ISP";
 22.1798 +			processor = "2+";
 22.1799 +			break;
 22.1800 +		case 0x003:
 22.1801 +			reg_name = "TC";
 22.1802 +			processor = "4+";
 22.1803 +			break;
 22.1804 +		case 0x004:
 22.1805 +			reg_name = "ITT0";
 22.1806 +			processor = "4+";
 22.1807 +			break;
 22.1808 +		case 0x005:
 22.1809 +			reg_name = "ITT1";
 22.1810 +			processor = "4+";
 22.1811 +			break;
 22.1812 +		case 0x006:
 22.1813 +			reg_name = "DTT0";
 22.1814 +			processor = "4+";
 22.1815 +			break;
 22.1816 +		case 0x007:
 22.1817 +			reg_name = "DTT1";
 22.1818 +			processor = "4+";
 22.1819 +			break;
 22.1820 +		case 0x805:
 22.1821 +			reg_name = "MMUSR";
 22.1822 +			processor = "4+";
 22.1823 +			break;
 22.1824 +		case 0x806:
 22.1825 +			reg_name = "URP";
 22.1826 +			processor = "4+";
 22.1827 +			break;
 22.1828 +		case 0x807:
 22.1829 +			reg_name = "SRP";
 22.1830 +			processor = "4+";
 22.1831 +			break;
 22.1832 +		default:
 22.1833 +			reg_name = make_signed_hex_str_16(extension & 0xfff);
 22.1834 +			processor = "?";
 22.1835 +	}
 22.1836 +
 22.1837 +	if(BIT_1(g_cpu_ir))
 22.1838 +		sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
 22.1839 +	else
 22.1840 +		sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
 22.1841 +}
 22.1842 +
 22.1843 +static void d68000_movem_pd_16(void)
 22.1844 +{
 22.1845 +	uint data = read_imm_16();
 22.1846 +	char buffer[40];
 22.1847 +	uint first;
 22.1848 +	uint run_length;
 22.1849 +	uint i;
 22.1850 +
 22.1851 +	buffer[0] = 0;
 22.1852 +	for(i=0;i<8;i++)
 22.1853 +	{
 22.1854 +		if(data&(1<<(15-i)))
 22.1855 +		{
 22.1856 +			first = i;
 22.1857 +			run_length = 0;
 22.1858 +			for(i++;i<8;i++)
 22.1859 +				if(data&(1<<(15-i)))
 22.1860 +					run_length++;
 22.1861 +			if(buffer[0] != 0)
 22.1862 +				strcat(buffer, "/");
 22.1863 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.1864 +			if(run_length > 0)
 22.1865 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.1866 +		}
 22.1867 +	}
 22.1868 +	for(i=0;i<8;i++)
 22.1869 +	{
 22.1870 +		if(data&(1<<(7-i)))
 22.1871 +		{
 22.1872 +			first = i;
 22.1873 +			run_length = 0;
 22.1874 +			for(i++;i<8;i++)
 22.1875 +				if(data&(1<<(7-i)))
 22.1876 +					run_length++;
 22.1877 +			if(buffer[0] != 0)
 22.1878 +				strcat(buffer, "/");
 22.1879 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.1880 +			if(run_length > 0)
 22.1881 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.1882 +		}
 22.1883 +	}
 22.1884 +	sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
 22.1885 +}
 22.1886 +
 22.1887 +static void d68000_movem_pd_32(void)
 22.1888 +{
 22.1889 +	uint data = read_imm_16();
 22.1890 +	char buffer[40];
 22.1891 +	uint first;
 22.1892 +	uint run_length;
 22.1893 +	uint i;
 22.1894 +
 22.1895 +	buffer[0] = 0;
 22.1896 +	for(i=0;i<8;i++)
 22.1897 +	{
 22.1898 +		if(data&(1<<(15-i)))
 22.1899 +		{
 22.1900 +			first = i;
 22.1901 +			run_length = 0;
 22.1902 +			for(i++;i<8;i++)
 22.1903 +				if(data&(1<<(15-i)))
 22.1904 +					run_length++;
 22.1905 +			if(buffer[0] != 0)
 22.1906 +				strcat(buffer, "/");
 22.1907 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.1908 +			if(run_length > 0)
 22.1909 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.1910 +		}
 22.1911 +	}
 22.1912 +	for(i=0;i<8;i++)
 22.1913 +	{
 22.1914 +		if(data&(1<<(7-i)))
 22.1915 +		{
 22.1916 +			first = i;
 22.1917 +			run_length = 0;
 22.1918 +			for(i++;i<8;i++)
 22.1919 +				if(data&(1<<(7-i)))
 22.1920 +					run_length++;
 22.1921 +			if(buffer[0] != 0)
 22.1922 +				strcat(buffer, "/");
 22.1923 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.1924 +			if(run_length > 0)
 22.1925 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.1926 +		}
 22.1927 +	}
 22.1928 +	sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
 22.1929 +}
 22.1930 +
 22.1931 +static void d68000_movem_er_16(void)
 22.1932 +{
 22.1933 +	uint data = read_imm_16();
 22.1934 +	char buffer[40];
 22.1935 +	uint first;
 22.1936 +	uint run_length;
 22.1937 +	uint i;
 22.1938 +
 22.1939 +	buffer[0] = 0;
 22.1940 +	for(i=0;i<8;i++)
 22.1941 +	{
 22.1942 +		if(data&(1<<i))
 22.1943 +		{
 22.1944 +			first = i;
 22.1945 +			run_length = 0;
 22.1946 +			for(i++;i<8;i++)
 22.1947 +				if(data&(1<<i))
 22.1948 +					run_length++;
 22.1949 +			if(buffer[0] != 0)
 22.1950 +				strcat(buffer, "/");
 22.1951 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.1952 +			if(run_length > 0)
 22.1953 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.1954 +		}
 22.1955 +	}
 22.1956 +	for(i=0;i<8;i++)
 22.1957 +	{
 22.1958 +		if(data&(1<<(i+8)))
 22.1959 +		{
 22.1960 +			first = i;
 22.1961 +			run_length = 0;
 22.1962 +			for(i++;i<8;i++)
 22.1963 +				if(data&(1<<(i+8)))
 22.1964 +					run_length++;
 22.1965 +			if(buffer[0] != 0)
 22.1966 +				strcat(buffer, "/");
 22.1967 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.1968 +			if(run_length > 0)
 22.1969 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.1970 +		}
 22.1971 +	}
 22.1972 +	sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);
 22.1973 +}
 22.1974 +
 22.1975 +static void d68000_movem_er_32(void)
 22.1976 +{
 22.1977 +	uint data = read_imm_16();
 22.1978 +	char buffer[40];
 22.1979 +	uint first;
 22.1980 +	uint run_length;
 22.1981 +	uint i;
 22.1982 +
 22.1983 +	buffer[0] = 0;
 22.1984 +	for(i=0;i<8;i++)
 22.1985 +	{
 22.1986 +		if(data&(1<<i))
 22.1987 +		{
 22.1988 +			first = i;
 22.1989 +			run_length = 0;
 22.1990 +			for(i++;i<8;i++)
 22.1991 +				if(data&(1<<i))
 22.1992 +					run_length++;
 22.1993 +			if(buffer[0] != 0)
 22.1994 +				strcat(buffer, "/");
 22.1995 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.1996 +			if(run_length > 0)
 22.1997 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.1998 +		}
 22.1999 +	}
 22.2000 +	for(i=0;i<8;i++)
 22.2001 +	{
 22.2002 +		if(data&(1<<(i+8)))
 22.2003 +		{
 22.2004 +			first = i;
 22.2005 +			run_length = 0;
 22.2006 +			for(i++;i<8;i++)
 22.2007 +				if(data&(1<<(i+8)))
 22.2008 +					run_length++;
 22.2009 +			if(buffer[0] != 0)
 22.2010 +				strcat(buffer, "/");
 22.2011 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.2012 +			if(run_length > 0)
 22.2013 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.2014 +		}
 22.2015 +	}
 22.2016 +	sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);
 22.2017 +}
 22.2018 +
 22.2019 +static void d68000_movem_re_16(void)
 22.2020 +{
 22.2021 +	uint data = read_imm_16();
 22.2022 +	char buffer[40];
 22.2023 +	uint first;
 22.2024 +	uint run_length;
 22.2025 +	uint i;
 22.2026 +
 22.2027 +	buffer[0] = 0;
 22.2028 +	for(i=0;i<8;i++)
 22.2029 +	{
 22.2030 +		if(data&(1<<i))
 22.2031 +		{
 22.2032 +			first = i;
 22.2033 +			run_length = 0;
 22.2034 +			for(i++;i<8;i++)
 22.2035 +				if(data&(1<<i))
 22.2036 +					run_length++;
 22.2037 +			if(buffer[0] != 0)
 22.2038 +				strcat(buffer, "/");
 22.2039 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.2040 +			if(run_length > 0)
 22.2041 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.2042 +		}
 22.2043 +	}
 22.2044 +	for(i=0;i<8;i++)
 22.2045 +	{
 22.2046 +		if(data&(1<<(i+8)))
 22.2047 +		{
 22.2048 +			first = i;
 22.2049 +			run_length = 0;
 22.2050 +			for(i++;i<8;i++)
 22.2051 +				if(data&(1<<(i+8)))
 22.2052 +					run_length++;
 22.2053 +			if(buffer[0] != 0)
 22.2054 +				strcat(buffer, "/");
 22.2055 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.2056 +			if(run_length > 0)
 22.2057 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.2058 +		}
 22.2059 +	}
 22.2060 +	sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
 22.2061 +}
 22.2062 +
 22.2063 +static void d68000_movem_re_32(void)
 22.2064 +{
 22.2065 +	uint data = read_imm_16();
 22.2066 +	char buffer[40];
 22.2067 +	uint first;
 22.2068 +	uint run_length;
 22.2069 +	uint i;
 22.2070 +
 22.2071 +	buffer[0] = 0;
 22.2072 +	for(i=0;i<8;i++)
 22.2073 +	{
 22.2074 +		if(data&(1<<i))
 22.2075 +		{
 22.2076 +			first = i;
 22.2077 +			run_length = 0;
 22.2078 +			for(i++;i<8;i++)
 22.2079 +				if(data&(1<<i))
 22.2080 +					run_length++;
 22.2081 +			if(buffer[0] != 0)
 22.2082 +				strcat(buffer, "/");
 22.2083 +			sprintf(buffer+strlen(buffer), "D%d", first);
 22.2084 +			if(run_length > 0)
 22.2085 +				sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
 22.2086 +		}
 22.2087 +	}
 22.2088 +	for(i=0;i<8;i++)
 22.2089 +	{
 22.2090 +		if(data&(1<<(i+8)))
 22.2091 +		{
 22.2092 +			first = i;
 22.2093 +			run_length = 0;
 22.2094 +			for(i++;i<8;i++)
 22.2095 +				if(data&(1<<(i+8)))
 22.2096 +					run_length++;
 22.2097 +			if(buffer[0] != 0)
 22.2098 +				strcat(buffer, "/");
 22.2099 +			sprintf(buffer+strlen(buffer), "A%d", first);
 22.2100 +			if(run_length > 0)
 22.2101 +				sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
 22.2102 +		}
 22.2103 +	}
 22.2104 +	sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
 22.2105 +}
 22.2106 +
 22.2107 +static void d68000_movep_re_16(void)
 22.2108 +{
 22.2109 +	sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
 22.2110 +}
 22.2111 +
 22.2112 +static void d68000_movep_re_32(void)
 22.2113 +{
 22.2114 +	sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
 22.2115 +}
 22.2116 +
 22.2117 +static void d68000_movep_er_16(void)
 22.2118 +{
 22.2119 +	sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2120 +}
 22.2121 +
 22.2122 +static void d68000_movep_er_32(void)
 22.2123 +{
 22.2124 +	sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2125 +}
 22.2126 +
 22.2127 +static void d68010_moves_8(void)
 22.2128 +{
 22.2129 +	uint extension;
 22.2130 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.2131 +	extension = read_imm_16();
 22.2132 +	if(BIT_B(extension))
 22.2133 +		sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));
 22.2134 +	else
 22.2135 +		sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.2136 +}
 22.2137 +
 22.2138 +static void d68010_moves_16(void)
 22.2139 +{
 22.2140 +	uint extension;
 22.2141 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.2142 +	extension = read_imm_16();
 22.2143 +	if(BIT_B(extension))
 22.2144 +		sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));
 22.2145 +	else
 22.2146 +		sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.2147 +}
 22.2148 +
 22.2149 +static void d68010_moves_32(void)
 22.2150 +{
 22.2151 +	uint extension;
 22.2152 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.2153 +	extension = read_imm_16();
 22.2154 +	if(BIT_B(extension))
 22.2155 +		sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));
 22.2156 +	else
 22.2157 +		sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
 22.2158 +}
 22.2159 +
 22.2160 +static void d68000_moveq(void)
 22.2161 +{
 22.2162 +	sprintf(g_dasm_str, "moveq   #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2163 +}
 22.2164 +
 22.2165 +static void d68040_move16_pi_pi(void)
 22.2166 +{
 22.2167 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.2168 +	sprintf(g_dasm_str, "move16  (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);
 22.2169 +}
 22.2170 +
 22.2171 +static void d68040_move16_pi_al(void)
 22.2172 +{
 22.2173 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.2174 +	sprintf(g_dasm_str, "move16  (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());
 22.2175 +}
 22.2176 +
 22.2177 +static void d68040_move16_al_pi(void)
 22.2178 +{
 22.2179 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.2180 +	sprintf(g_dasm_str, "move16  %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);
 22.2181 +}
 22.2182 +
 22.2183 +static void d68040_move16_ai_al(void)
 22.2184 +{
 22.2185 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.2186 +	sprintf(g_dasm_str, "move16  (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());
 22.2187 +}
 22.2188 +
 22.2189 +static void d68040_move16_al_ai(void)
 22.2190 +{
 22.2191 +	LIMIT_CPU_TYPES(M68040_PLUS);
 22.2192 +	sprintf(g_dasm_str, "move16  %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);
 22.2193 +}
 22.2194 +
 22.2195 +static void d68000_muls(void)
 22.2196 +{
 22.2197 +	sprintf(g_dasm_str, "muls.w  %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2198 +}
 22.2199 +
 22.2200 +static void d68000_mulu(void)
 22.2201 +{
 22.2202 +	sprintf(g_dasm_str, "mulu.w  %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2203 +}
 22.2204 +
 22.2205 +static void d68020_mull(void)
 22.2206 +{
 22.2207 +	uint extension;
 22.2208 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2209 +	extension = read_imm_16();
 22.2210 +
 22.2211 +	if(BIT_A(extension))
 22.2212 +		sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
 22.2213 +	else
 22.2214 +		sprintf(g_dasm_str, "mul%c.l  %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
 22.2215 +}
 22.2216 +
 22.2217 +static void d68000_nbcd(void)
 22.2218 +{
 22.2219 +	sprintf(g_dasm_str, "nbcd    %s", get_ea_mode_str_8(g_cpu_ir));
 22.2220 +}
 22.2221 +
 22.2222 +static void d68000_neg_8(void)
 22.2223 +{
 22.2224 +	sprintf(g_dasm_str, "neg.b   %s", get_ea_mode_str_8(g_cpu_ir));
 22.2225 +}
 22.2226 +
 22.2227 +static void d68000_neg_16(void)
 22.2228 +{
 22.2229 +	sprintf(g_dasm_str, "neg.w   %s", get_ea_mode_str_16(g_cpu_ir));
 22.2230 +}
 22.2231 +
 22.2232 +static void d68000_neg_32(void)
 22.2233 +{
 22.2234 +	sprintf(g_dasm_str, "neg.l   %s", get_ea_mode_str_32(g_cpu_ir));
 22.2235 +}
 22.2236 +
 22.2237 +static void d68000_negx_8(void)
 22.2238 +{
 22.2239 +	sprintf(g_dasm_str, "negx.b  %s", get_ea_mode_str_8(g_cpu_ir));
 22.2240 +}
 22.2241 +
 22.2242 +static void d68000_negx_16(void)
 22.2243 +{
 22.2244 +	sprintf(g_dasm_str, "negx.w  %s", get_ea_mode_str_16(g_cpu_ir));
 22.2245 +}
 22.2246 +
 22.2247 +static void d68000_negx_32(void)
 22.2248 +{
 22.2249 +	sprintf(g_dasm_str, "negx.l  %s", get_ea_mode_str_32(g_cpu_ir));
 22.2250 +}
 22.2251 +
 22.2252 +static void d68000_nop(void)
 22.2253 +{
 22.2254 +	sprintf(g_dasm_str, "nop");
 22.2255 +}
 22.2256 +
 22.2257 +static void d68000_not_8(void)
 22.2258 +{
 22.2259 +	sprintf(g_dasm_str, "not.b   %s", get_ea_mode_str_8(g_cpu_ir));
 22.2260 +}
 22.2261 +
 22.2262 +static void d68000_not_16(void)
 22.2263 +{
 22.2264 +	sprintf(g_dasm_str, "not.w   %s", get_ea_mode_str_16(g_cpu_ir));
 22.2265 +}
 22.2266 +
 22.2267 +static void d68000_not_32(void)
 22.2268 +{
 22.2269 +	sprintf(g_dasm_str, "not.l   %s", get_ea_mode_str_32(g_cpu_ir));
 22.2270 +}
 22.2271 +
 22.2272 +static void d68000_or_er_8(void)
 22.2273 +{
 22.2274 +	sprintf(g_dasm_str, "or.b    %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2275 +}
 22.2276 +
 22.2277 +static void d68000_or_er_16(void)
 22.2278 +{
 22.2279 +	sprintf(g_dasm_str, "or.w    %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2280 +}
 22.2281 +
 22.2282 +static void d68000_or_er_32(void)
 22.2283 +{
 22.2284 +	sprintf(g_dasm_str, "or.l    %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2285 +}
 22.2286 +
 22.2287 +static void d68000_or_re_8(void)
 22.2288 +{
 22.2289 +	sprintf(g_dasm_str, "or.b    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.2290 +}
 22.2291 +
 22.2292 +static void d68000_or_re_16(void)
 22.2293 +{
 22.2294 +	sprintf(g_dasm_str, "or.w    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
 22.2295 +}
 22.2296 +
 22.2297 +static void d68000_or_re_32(void)
 22.2298 +{
 22.2299 +	sprintf(g_dasm_str, "or.l    D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
 22.2300 +}
 22.2301 +
 22.2302 +static void d68000_ori_8(void)
 22.2303 +{
 22.2304 +	char* str = get_imm_str_u8();
 22.2305 +	sprintf(g_dasm_str, "ori.b   %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.2306 +}
 22.2307 +
 22.2308 +static void d68000_ori_16(void)
 22.2309 +{
 22.2310 +	char* str = get_imm_str_u16();
 22.2311 +	sprintf(g_dasm_str, "ori.w   %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
 22.2312 +}
 22.2313 +
 22.2314 +static void d68000_ori_32(void)
 22.2315 +{
 22.2316 +	char* str = get_imm_str_u32();
 22.2317 +	sprintf(g_dasm_str, "ori.l   %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
 22.2318 +}
 22.2319 +
 22.2320 +static void d68000_ori_to_ccr(void)
 22.2321 +{
 22.2322 +	sprintf(g_dasm_str, "ori     %s, CCR", get_imm_str_u8());
 22.2323 +}
 22.2324 +
 22.2325 +static void d68000_ori_to_sr(void)
 22.2326 +{
 22.2327 +	sprintf(g_dasm_str, "ori     %s, SR", get_imm_str_u16());
 22.2328 +}
 22.2329 +
 22.2330 +static void d68020_pack_rr(void)
 22.2331 +{
 22.2332 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2333 +	sprintf(g_dasm_str, "pack    D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
 22.2334 +}
 22.2335 +
 22.2336 +static void d68020_pack_mm(void)
 22.2337 +{
 22.2338 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2339 +	sprintf(g_dasm_str, "pack    -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
 22.2340 +}
 22.2341 +
 22.2342 +static void d68000_pea(void)
 22.2343 +{
 22.2344 +	sprintf(g_dasm_str, "pea     %s", get_ea_mode_str_32(g_cpu_ir));
 22.2345 +}
 22.2346 +
 22.2347 +static void d68000_reset(void)
 22.2348 +{
 22.2349 +	sprintf(g_dasm_str, "reset");
 22.2350 +}
 22.2351 +
 22.2352 +static void d68000_ror_s_8(void)
 22.2353 +{
 22.2354 +	sprintf(g_dasm_str, "ror.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2355 +}
 22.2356 +
 22.2357 +static void d68000_ror_s_16(void)
 22.2358 +{
 22.2359 +	sprintf(g_dasm_str, "ror.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);
 22.2360 +}
 22.2361 +
 22.2362 +static void d68000_ror_s_32(void)
 22.2363 +{
 22.2364 +	sprintf(g_dasm_str, "ror.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2365 +}
 22.2366 +
 22.2367 +static void d68000_ror_r_8(void)
 22.2368 +{
 22.2369 +	sprintf(g_dasm_str, "ror.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2370 +}
 22.2371 +
 22.2372 +static void d68000_ror_r_16(void)
 22.2373 +{
 22.2374 +	sprintf(g_dasm_str, "ror.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2375 +}
 22.2376 +
 22.2377 +static void d68000_ror_r_32(void)
 22.2378 +{
 22.2379 +	sprintf(g_dasm_str, "ror.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2380 +}
 22.2381 +
 22.2382 +static void d68000_ror_ea(void)
 22.2383 +{
 22.2384 +	sprintf(g_dasm_str, "ror.w   %s", get_ea_mode_str_32(g_cpu_ir));
 22.2385 +}
 22.2386 +
 22.2387 +static void d68000_rol_s_8(void)
 22.2388 +{
 22.2389 +	sprintf(g_dasm_str, "rol.b   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2390 +}
 22.2391 +
 22.2392 +static void d68000_rol_s_16(void)
 22.2393 +{
 22.2394 +	sprintf(g_dasm_str, "rol.w   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2395 +}
 22.2396 +
 22.2397 +static void d68000_rol_s_32(void)
 22.2398 +{
 22.2399 +	sprintf(g_dasm_str, "rol.l   #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2400 +}
 22.2401 +
 22.2402 +static void d68000_rol_r_8(void)
 22.2403 +{
 22.2404 +	sprintf(g_dasm_str, "rol.b   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2405 +}
 22.2406 +
 22.2407 +static void d68000_rol_r_16(void)
 22.2408 +{
 22.2409 +	sprintf(g_dasm_str, "rol.w   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2410 +}
 22.2411 +
 22.2412 +static void d68000_rol_r_32(void)
 22.2413 +{
 22.2414 +	sprintf(g_dasm_str, "rol.l   D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2415 +}
 22.2416 +
 22.2417 +static void d68000_rol_ea(void)
 22.2418 +{
 22.2419 +	sprintf(g_dasm_str, "rol.w   %s", get_ea_mode_str_32(g_cpu_ir));
 22.2420 +}
 22.2421 +
 22.2422 +static void d68000_roxr_s_8(void)
 22.2423 +{
 22.2424 +	sprintf(g_dasm_str, "roxr.b  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2425 +}
 22.2426 +
 22.2427 +static void d68000_roxr_s_16(void)
 22.2428 +{
 22.2429 +	sprintf(g_dasm_str, "roxr.w  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2430 +}
 22.2431 +
 22.2432 +
 22.2433 +static void d68000_roxr_s_32(void)
 22.2434 +{
 22.2435 +	sprintf(g_dasm_str, "roxr.l  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2436 +}
 22.2437 +
 22.2438 +static void d68000_roxr_r_8(void)
 22.2439 +{
 22.2440 +	sprintf(g_dasm_str, "roxr.b  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2441 +}
 22.2442 +
 22.2443 +static void d68000_roxr_r_16(void)
 22.2444 +{
 22.2445 +	sprintf(g_dasm_str, "roxr.w  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2446 +}
 22.2447 +
 22.2448 +static void d68000_roxr_r_32(void)
 22.2449 +{
 22.2450 +	sprintf(g_dasm_str, "roxr.l  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2451 +}
 22.2452 +
 22.2453 +static void d68000_roxr_ea(void)
 22.2454 +{
 22.2455 +	sprintf(g_dasm_str, "roxr.w  %s", get_ea_mode_str_32(g_cpu_ir));
 22.2456 +}
 22.2457 +
 22.2458 +static void d68000_roxl_s_8(void)
 22.2459 +{
 22.2460 +	sprintf(g_dasm_str, "roxl.b  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2461 +}
 22.2462 +
 22.2463 +static void d68000_roxl_s_16(void)
 22.2464 +{
 22.2465 +	sprintf(g_dasm_str, "roxl.w  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2466 +}
 22.2467 +
 22.2468 +static void d68000_roxl_s_32(void)
 22.2469 +{
 22.2470 +	sprintf(g_dasm_str, "roxl.l  #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
 22.2471 +}
 22.2472 +
 22.2473 +static void d68000_roxl_r_8(void)
 22.2474 +{
 22.2475 +	sprintf(g_dasm_str, "roxl.b  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2476 +}
 22.2477 +
 22.2478 +static void d68000_roxl_r_16(void)
 22.2479 +{
 22.2480 +	sprintf(g_dasm_str, "roxl.w  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2481 +}
 22.2482 +
 22.2483 +static void d68000_roxl_r_32(void)
 22.2484 +{
 22.2485 +	sprintf(g_dasm_str, "roxl.l  D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
 22.2486 +}
 22.2487 +
 22.2488 +static void d68000_roxl_ea(void)
 22.2489 +{
 22.2490 +	sprintf(g_dasm_str, "roxl.w  %s", get_ea_mode_str_32(g_cpu_ir));
 22.2491 +}
 22.2492 +
 22.2493 +static void d68010_rtd(void)
 22.2494 +{
 22.2495 +	LIMIT_CPU_TYPES(M68010_PLUS);
 22.2496 +	sprintf(g_dasm_str, "rtd     %s; (1+)", get_imm_str_s16());
 22.2497 +}
 22.2498 +
 22.2499 +static void d68000_rte(void)
 22.2500 +{
 22.2501 +	sprintf(g_dasm_str, "rte");
 22.2502 +}
 22.2503 +
 22.2504 +static void d68020_rtm(void)
 22.2505 +{
 22.2506 +	LIMIT_CPU_TYPES(M68020_ONLY);
 22.2507 +	sprintf(g_dasm_str, "rtm     %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);
 22.2508 +}
 22.2509 +
 22.2510 +static void d68000_rtr(void)
 22.2511 +{
 22.2512 +	sprintf(g_dasm_str, "rtr");
 22.2513 +}
 22.2514 +
 22.2515 +static void d68000_rts(void)
 22.2516 +{
 22.2517 +	sprintf(g_dasm_str, "rts");
 22.2518 +}
 22.2519 +
 22.2520 +static void d68000_sbcd_rr(void)
 22.2521 +{
 22.2522 +	sprintf(g_dasm_str, "sbcd    D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2523 +}
 22.2524 +
 22.2525 +static void d68000_sbcd_mm(void)
 22.2526 +{
 22.2527 +	sprintf(g_dasm_str, "sbcd    -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2528 +}
 22.2529 +
 22.2530 +static void d68000_scc(void)
 22.2531 +{
 22.2532 +	sprintf(g_dasm_str, "s%-2s     %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));
 22.2533 +}
 22.2534 +
 22.2535 +static void d68000_stop(void)
 22.2536 +{
 22.2537 +	sprintf(g_dasm_str, "stop    %s", get_imm_str_s16());
 22.2538 +}
 22.2539 +
 22.2540 +static void d68000_sub_er_8(void)
 22.2541 +{
 22.2542 +	sprintf(g_dasm_str, "sub.b   %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2543 +}
 22.2544 +
 22.2545 +static void d68000_sub_er_16(void)
 22.2546 +{
 22.2547 +	sprintf(g_dasm_str, "sub.w   %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2548 +}
 22.2549 +
 22.2550 +static void d68000_sub_er_32(void)
 22.2551 +{
 22.2552 +	sprintf(g_dasm_str, "sub.l   %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2553 +}
 22.2554 +
 22.2555 +static void d68000_sub_re_8(void)
 22.2556 +{
 22.2557 +	sprintf(g_dasm_str, "sub.b   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
 22.2558 +}
 22.2559 +
 22.2560 +static void d68000_sub_re_16(void)
 22.2561 +{
 22.2562 +	sprintf(g_dasm_str, "sub.w   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
 22.2563 +}
 22.2564 +
 22.2565 +static void d68000_sub_re_32(void)
 22.2566 +{
 22.2567 +	sprintf(g_dasm_str, "sub.l   D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
 22.2568 +}
 22.2569 +
 22.2570 +static void d68000_suba_16(void)
 22.2571 +{
 22.2572 +	sprintf(g_dasm_str, "suba.w  %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2573 +}
 22.2574 +
 22.2575 +static void d68000_suba_32(void)
 22.2576 +{
 22.2577 +	sprintf(g_dasm_str, "suba.l  %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
 22.2578 +}
 22.2579 +
 22.2580 +static void d68000_subi_8(void)
 22.2581 +{
 22.2582 +	char* str = get_imm_str_s8();
 22.2583 +	sprintf(g_dasm_str, "subi.b  %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
 22.2584 +}
 22.2585 +
 22.2586 +static void d68000_subi_16(void)
 22.2587 +{
 22.2588 +	char* str = get_imm_str_s16();
 22.2589 +	sprintf(g_dasm_str, "subi.w  %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
 22.2590 +}
 22.2591 +
 22.2592 +static void d68000_subi_32(void)
 22.2593 +{
 22.2594 +	char* str = get_imm_str_s32();
 22.2595 +	sprintf(g_dasm_str, "subi.l  %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
 22.2596 +}
 22.2597 +
 22.2598 +static void d68000_subq_8(void)
 22.2599 +{
 22.2600 +	sprintf(g_dasm_str, "subq.b  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
 22.2601 +}
 22.2602 +
 22.2603 +static void d68000_subq_16(void)
 22.2604 +{
 22.2605 +	sprintf(g_dasm_str, "subq.w  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
 22.2606 +}
 22.2607 +
 22.2608 +static void d68000_subq_32(void)
 22.2609 +{
 22.2610 +	sprintf(g_dasm_str, "subq.l  #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
 22.2611 +}
 22.2612 +
 22.2613 +static void d68000_subx_rr_8(void)
 22.2614 +{
 22.2615 +	sprintf(g_dasm_str, "subx.b  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2616 +}
 22.2617 +
 22.2618 +static void d68000_subx_rr_16(void)
 22.2619 +{
 22.2620 +	sprintf(g_dasm_str, "subx.w  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2621 +}
 22.2622 +
 22.2623 +static void d68000_subx_rr_32(void)
 22.2624 +{
 22.2625 +	sprintf(g_dasm_str, "subx.l  D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2626 +}
 22.2627 +
 22.2628 +static void d68000_subx_mm_8(void)
 22.2629 +{
 22.2630 +	sprintf(g_dasm_str, "subx.b  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2631 +}
 22.2632 +
 22.2633 +static void d68000_subx_mm_16(void)
 22.2634 +{
 22.2635 +	sprintf(g_dasm_str, "subx.w  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2636 +}
 22.2637 +
 22.2638 +static void d68000_subx_mm_32(void)
 22.2639 +{
 22.2640 +	sprintf(g_dasm_str, "subx.l  -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
 22.2641 +}
 22.2642 +
 22.2643 +static void d68000_swap(void)
 22.2644 +{
 22.2645 +	sprintf(g_dasm_str, "swap    D%d", g_cpu_ir&7);
 22.2646 +}
 22.2647 +
 22.2648 +static void d68000_tas(void)
 22.2649 +{
 22.2650 +	sprintf(g_dasm_str, "tas     %s", get_ea_mode_str_8(g_cpu_ir));
 22.2651 +}
 22.2652 +
 22.2653 +static void d68000_trap(void)
 22.2654 +{
 22.2655 +	sprintf(g_dasm_str, "trap    #$%x", g_cpu_ir&0xf);
 22.2656 +}
 22.2657 +
 22.2658 +static void d68020_trapcc_0(void)
 22.2659 +{
 22.2660 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2661 +	sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);
 22.2662 +}
 22.2663 +
 22.2664 +static void d68020_trapcc_16(void)
 22.2665 +{
 22.2666 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2667 +	sprintf(g_dasm_str, "trap%-2s  %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());
 22.2668 +}
 22.2669 +
 22.2670 +static void d68020_trapcc_32(void)
 22.2671 +{
 22.2672 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2673 +	sprintf(g_dasm_str, "trap%-2s  %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());
 22.2674 +}
 22.2675 +
 22.2676 +static void d68000_trapv(void)
 22.2677 +{
 22.2678 +	sprintf(g_dasm_str, "trapv");
 22.2679 +}
 22.2680 +
 22.2681 +static void d68000_tst_8(void)
 22.2682 +{
 22.2683 +	sprintf(g_dasm_str, "tst.b   %s", get_ea_mode_str_8(g_cpu_ir));
 22.2684 +}
 22.2685 +
 22.2686 +static void d68020_tst_pcdi_8(void)
 22.2687 +{
 22.2688 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2689 +	sprintf(g_dasm_str, "tst.b   %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
 22.2690 +}
 22.2691 +
 22.2692 +static void d68020_tst_pcix_8(void)
 22.2693 +{
 22.2694 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2695 +	sprintf(g_dasm_str, "tst.b   %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
 22.2696 +}
 22.2697 +
 22.2698 +static void d68020_tst_i_8(void)
 22.2699 +{
 22.2700 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2701 +	sprintf(g_dasm_str, "tst.b   %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
 22.2702 +}
 22.2703 +
 22.2704 +static void d68000_tst_16(void)
 22.2705 +{
 22.2706 +	sprintf(g_dasm_str, "tst.w   %s", get_ea_mode_str_16(g_cpu_ir));
 22.2707 +}
 22.2708 +
 22.2709 +static void d68020_tst_a_16(void)
 22.2710 +{
 22.2711 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2712 +	sprintf(g_dasm_str, "tst.w   %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
 22.2713 +}
 22.2714 +
 22.2715 +static void d68020_tst_pcdi_16(void)
 22.2716 +{
 22.2717 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2718 +	sprintf(g_dasm_str, "tst.w   %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
 22.2719 +}
 22.2720 +
 22.2721 +static void d68020_tst_pcix_16(void)
 22.2722 +{
 22.2723 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2724 +	sprintf(g_dasm_str, "tst.w   %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
 22.2725 +}
 22.2726 +
 22.2727 +static void d68020_tst_i_16(void)
 22.2728 +{
 22.2729 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2730 +	sprintf(g_dasm_str, "tst.w   %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
 22.2731 +}
 22.2732 +
 22.2733 +static void d68000_tst_32(void)
 22.2734 +{
 22.2735 +	sprintf(g_dasm_str, "tst.l   %s", get_ea_mode_str_32(g_cpu_ir));
 22.2736 +}
 22.2737 +
 22.2738 +static void d68020_tst_a_32(void)
 22.2739 +{
 22.2740 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2741 +	sprintf(g_dasm_str, "tst.l   %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
 22.2742 +}
 22.2743 +
 22.2744 +static void d68020_tst_pcdi_32(void)
 22.2745 +{
 22.2746 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2747 +	sprintf(g_dasm_str, "tst.l   %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
 22.2748 +}
 22.2749 +
 22.2750 +static void d68020_tst_pcix_32(void)
 22.2751 +{
 22.2752 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2753 +	sprintf(g_dasm_str, "tst.l   %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
 22.2754 +}
 22.2755 +
 22.2756 +static void d68020_tst_i_32(void)
 22.2757 +{
 22.2758 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2759 +	sprintf(g_dasm_str, "tst.l   %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
 22.2760 +}
 22.2761 +
 22.2762 +static void d68000_unlk(void)
 22.2763 +{
 22.2764 +	sprintf(g_dasm_str, "unlk    A%d", g_cpu_ir&7);
 22.2765 +}
 22.2766 +
 22.2767 +static void d68020_unpk_rr(void)
 22.2768 +{
 22.2769 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2770 +	sprintf(g_dasm_str, "unpk    D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
 22.2771 +}
 22.2772 +
 22.2773 +static void d68020_unpk_mm(void)
 22.2774 +{
 22.2775 +	LIMIT_CPU_TYPES(M68020_PLUS);
 22.2776 +	sprintf(g_dasm_str, "unpk    -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
 22.2777 +}
 22.2778 +
 22.2779 +
 22.2780 +
 22.2781 +/* ======================================================================== */
 22.2782 +/* ======================= INSTRUCTION TABLE BUILDER ====================== */
 22.2783 +/* ======================================================================== */
 22.2784 +
 22.2785 +/* EA Masks:
 22.2786 +800 = data register direct
 22.2787 +400 = address register direct
 22.2788 +200 = address register indirect
 22.2789 +100 = ARI postincrement
 22.2790 + 80 = ARI pre-decrement
 22.2791 + 40 = ARI displacement
 22.2792 + 20 = ARI index
 22.2793 + 10 = absolute short
 22.2794 +  8 = absolute long
 22.2795 +  4 = immediate / sr
 22.2796 +  2 = pc displacement
 22.2797 +  1 = pc idx
 22.2798 +*/
 22.2799 +
 22.2800 +static opcode_struct g_opcode_info[] =
 22.2801 +{
 22.2802 +/*  opcode handler    mask    match   ea mask */
 22.2803 +	{d68000_1010         , 0xf000, 0xa000, 0x000},
 22.2804 +	{d68000_1111         , 0xf000, 0xf000, 0x000},
 22.2805 +	{d68000_abcd_rr      , 0xf1f8, 0xc100, 0x000},
 22.2806 +	{d68000_abcd_mm      , 0xf1f8, 0xc108, 0x000},
 22.2807 +	{d68000_add_er_8     , 0xf1c0, 0xd000, 0xbff},
 22.2808 +	{d68000_add_er_16    , 0xf1c0, 0xd040, 0xfff},
 22.2809 +	{d68000_add_er_32    , 0xf1c0, 0xd080, 0xfff},
 22.2810 +	{d68000_add_re_8     , 0xf1c0, 0xd100, 0x3f8},
 22.2811 +	{d68000_add_re_16    , 0xf1c0, 0xd140, 0x3f8},
 22.2812 +	{d68000_add_re_32    , 0xf1c0, 0xd180, 0x3f8},
 22.2813 +	{d68000_adda_16      , 0xf1c0, 0xd0c0, 0xfff},
 22.2814 +	{d68000_adda_32      , 0xf1c0, 0xd1c0, 0xfff},
 22.2815 +	{d68000_addi_8       , 0xffc0, 0x0600, 0xbf8},
 22.2816 +	{d68000_addi_16      , 0xffc0, 0x0640, 0xbf8},
 22.2817 +	{d68000_addi_32      , 0xffc0, 0x0680, 0xbf8},
 22.2818 +	{d68000_addq_8       , 0xf1c0, 0x5000, 0xbf8},
 22.2819 +	{d68000_addq_16      , 0xf1c0, 0x5040, 0xff8},
 22.2820 +	{d68000_addq_32      , 0xf1c0, 0x5080, 0xff8},
 22.2821 +	{d68000_addx_rr_8    , 0xf1f8, 0xd100, 0x000},
 22.2822 +	{d68000_addx_rr_16   , 0xf1f8, 0xd140, 0x000},
 22.2823 +	{d68000_addx_rr_32   , 0xf1f8, 0xd180, 0x000},
 22.2824 +	{d68000_addx_mm_8    , 0xf1f8, 0xd108, 0x000},
 22.2825 +	{d68000_addx_mm_16   , 0xf1f8, 0xd148, 0x000},
 22.2826 +	{d68000_addx_mm_32   , 0xf1f8, 0xd188, 0x000},
 22.2827 +	{d68000_and_er_8     , 0xf1c0, 0xc000, 0xbff},
 22.2828 +	{d68000_and_er_16    , 0xf1c0, 0xc040, 0xbff},
 22.2829 +	{d68000_and_er_32    , 0xf1c0, 0xc080, 0xbff},
 22.2830 +	{d68000_and_re_8     , 0xf1c0, 0xc100, 0x3f8},
 22.2831 +	{d68000_and_re_16    , 0xf1c0, 0xc140, 0x3f8},
 22.2832 +	{d68000_and_re_32    , 0xf1c0, 0xc180, 0x3f8},
 22.2833 +	{d68000_andi_to_ccr  , 0xffff, 0x023c, 0x000},
 22.2834 +	{d68000_andi_to_sr   , 0xffff, 0x027c, 0x000},
 22.2835 +	{d68000_andi_8       , 0xffc0, 0x0200, 0xbf8},
 22.2836 +	{d68000_andi_16      , 0xffc0, 0x0240, 0xbf8},
 22.2837 +	{d68000_andi_32      , 0xffc0, 0x0280, 0xbf8},
 22.2838 +	{d68000_asr_s_8      , 0xf1f8, 0xe000, 0x000},
 22.2839 +	{d68000_asr_s_16     , 0xf1f8, 0xe040, 0x000},
 22.2840 +	{d68000_asr_s_32     , 0xf1f8, 0xe080, 0x000},
 22.2841 +	{d68000_asr_r_8      , 0xf1f8, 0xe020, 0x000},
 22.2842 +	{d68000_asr_r_16     , 0xf1f8, 0xe060, 0x000},
 22.2843 +	{d68000_asr_r_32     , 0xf1f8, 0xe0a0, 0x000},
 22.2844 +	{d68000_asr_ea       , 0xffc0, 0xe0c0, 0x3f8},
 22.2845 +	{d68000_asl_s_8      , 0xf1f8, 0xe100, 0x000},
 22.2846 +	{d68000_asl_s_16     , 0xf1f8, 0xe140, 0x000},
 22.2847 +	{d68000_asl_s_32     , 0xf1f8, 0xe180, 0x000},
 22.2848 +	{d68000_asl_r_8      , 0xf1f8, 0xe120, 0x000},
 22.2849 +	{d68000_asl_r_16     , 0xf1f8, 0xe160, 0x000},
 22.2850 +	{d68000_asl_r_32     , 0xf1f8, 0xe1a0, 0x000},
 22.2851 +	{d68000_asl_ea       , 0xffc0, 0xe1c0, 0x3f8},
 22.2852 +	{d68000_bcc_8        , 0xf000, 0x6000, 0x000},
 22.2853 +	{d68000_bcc_16       , 0xf0ff, 0x6000, 0x000},
 22.2854 +	{d68020_bcc_32       , 0xf0ff, 0x60ff, 0x000},
 22.2855 +	{d68000_bchg_r       , 0xf1c0, 0x0140, 0xbf8},
 22.2856 +	{d68000_bchg_s       , 0xffc0, 0x0840, 0xbf8},
 22.2857 +	{d68000_bclr_r       , 0xf1c0, 0x0180, 0xbf8},
 22.2858 +	{d68000_bclr_s       , 0xffc0, 0x0880, 0xbf8},
 22.2859 +	{d68020_bfchg        , 0xffc0, 0xeac0, 0xa78},
 22.2860 +	{d68020_bfclr        , 0xffc0, 0xecc0, 0xa78},
 22.2861 +	{d68020_bfexts       , 0xffc0, 0xebc0, 0xa7b},
 22.2862 +	{d68020_bfextu       , 0xffc0, 0xe9c0, 0xa7b},
 22.2863 +	{d68020_bfffo        , 0xffc0, 0xedc0, 0xa7b},
 22.2864 +	{d68020_bfins        , 0xffc0, 0xefc0, 0xa78},
 22.2865 +	{d68020_bfset        , 0xffc0, 0xeec0, 0xa78},
 22.2866 +	{d68020_bftst        , 0xffc0, 0xe8c0, 0xa7b},
 22.2867 +	{d68010_bkpt         , 0xfff8, 0x4848, 0x000},
 22.2868 +	{d68000_bra_8        , 0xff00, 0x6000, 0x000},
 22.2869 +	{d68000_bra_16       , 0xffff, 0x6000, 0x000},
 22.2870 +	{d68020_bra_32       , 0xffff, 0x60ff, 0x000},
 22.2871 +	{d68000_bset_r       , 0xf1c0, 0x01c0, 0xbf8},
 22.2872 +	{d68000_bset_s       , 0xffc0, 0x08c0, 0xbf8},
 22.2873 +	{d68000_bsr_8        , 0xff00, 0x6100, 0x000},
 22.2874 +	{d68000_bsr_16       , 0xffff, 0x6100, 0x000},
 22.2875 +	{d68020_bsr_32       , 0xffff, 0x61ff, 0x000},
 22.2876 +	{d68000_btst_r       , 0xf1c0, 0x0100, 0xbff},
 22.2877 +	{d68000_btst_s       , 0xffc0, 0x0800, 0xbfb},
 22.2878 +	{d68020_callm        , 0xffc0, 0x06c0, 0x27b},
 22.2879 +	{d68020_cas_8        , 0xffc0, 0x0ac0, 0x3f8},
 22.2880 +	{d68020_cas_16       , 0xffc0, 0x0cc0, 0x3f8},
 22.2881 +	{d68020_cas_32       , 0xffc0, 0x0ec0, 0x3f8},
 22.2882 +	{d68020_cas2_16      , 0xffff, 0x0cfc, 0x000},
 22.2883 +	{d68020_cas2_32      , 0xffff, 0x0efc, 0x000},
 22.2884 +	{d68000_chk_16       , 0xf1c0, 0x4180, 0xbff},
 22.2885 +	{d68020_chk_32       , 0xf1c0, 0x4100, 0xbff},
 22.2886 +	{d68020_chk2_cmp2_8  , 0xffc0, 0x00c0, 0x27b},
 22.2887 +	{d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},
 22.2888 +	{d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},
 22.2889 +	{d68040_cinv         , 0xff20, 0xf400, 0x000},
 22.2890 +	{d68000_clr_8        , 0xffc0, 0x4200, 0xbf8},
 22.2891 +	{d68000_clr_16       , 0xffc0, 0x4240, 0xbf8},
 22.2892 +	{d68000_clr_32       , 0xffc0, 0x4280, 0xbf8},
 22.2893 +	{d68000_cmp_8        , 0xf1c0, 0xb000, 0xbff},
 22.2894 +	{d68000_cmp_16       , 0xf1c0, 0xb040, 0xfff},
 22.2895 +	{d68000_cmp_32       , 0xf1c0, 0xb080, 0xfff},
 22.2896 +	{d68000_cmpa_16      , 0xf1c0, 0xb0c0, 0xfff},
 22.2897 +	{d68000_cmpa_32      , 0xf1c0, 0xb1c0, 0xfff},
 22.2898 +	{d68000_cmpi_8       , 0xffc0, 0x0c00, 0xbf8},
 22.2899 +	{d68020_cmpi_pcdi_8  , 0xffff, 0x0c3a, 0x000},
 22.2900 +	{d68020_cmpi_pcix_8  , 0xffff, 0x0c3b, 0x000},
 22.2901 +	{d68000_cmpi_16      , 0xffc0, 0x0c40, 0xbf8},
 22.2902 +	{d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},
 22.2903 +	{d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},
 22.2904 +	{d68000_cmpi_32      , 0xffc0, 0x0c80, 0xbf8},
 22.2905 +	{d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},
 22.2906 +	{d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},
 22.2907 +	{d68000_cmpm_8       , 0xf1f8, 0xb108, 0x000},
 22.2908 +	{d68000_cmpm_16      , 0xf1f8, 0xb148, 0x000},
 22.2909 +	{d68000_cmpm_32      , 0xf1f8, 0xb188, 0x000},
 22.2910 +	{d68020_cpbcc_16     , 0xf1c0, 0xf080, 0x000},
 22.2911 +	{d68020_cpbcc_32     , 0xf1c0, 0xf0c0, 0x000},
 22.2912 +	{d68020_cpdbcc       , 0xf1f8, 0xf048, 0x000},
 22.2913 +	{d68020_cpgen        , 0xf1c0, 0xf000, 0x000},
 22.2914 +	{d68020_cprestore    , 0xf1c0, 0xf140, 0x37f},
 22.2915 +	{d68020_cpsave       , 0xf1c0, 0xf100, 0x2f8},
 22.2916 +	{d68020_cpscc        , 0xf1c0, 0xf040, 0xbf8},
 22.2917 +	{d68020_cptrapcc_0   , 0xf1ff, 0xf07c, 0x000},
 22.2918 +	{d68020_cptrapcc_16  , 0xf1ff, 0xf07a, 0x000},
 22.2919 +	{d68020_cptrapcc_32  , 0xf1ff, 0xf07b, 0x000},
 22.2920 +	{d68040_cpush        , 0xff20, 0xf420, 0x000},
 22.2921 +	{d68000_dbcc         , 0xf0f8, 0x50c8, 0x000},
 22.2922 +	{d68000_dbra         , 0xfff8, 0x51c8, 0x000},
 22.2923 +	{d68000_divs         , 0xf1c0, 0x81c0, 0xbff},
 22.2924 +	{d68000_divu         , 0xf1c0, 0x80c0, 0xbff},
 22.2925 +	{d68020_divl         , 0xffc0, 0x4c40, 0xbff},
 22.2926 +	{d68000_eor_8        , 0xf1c0, 0xb100, 0xbf8},
 22.2927 +	{d68000_eor_16       , 0xf1c0, 0xb140, 0xbf8},
 22.2928 +	{d68000_eor_32       , 0xf1c0, 0xb180, 0xbf8},
 22.2929 +	{d68000_eori_to_ccr  , 0xffff, 0x0a3c, 0x000},
 22.2930 +	{d68000_eori_to_sr   , 0xffff, 0x0a7c, 0x000},
 22.2931 +	{d68000_eori_8       , 0xffc0, 0x0a00, 0xbf8},
 22.2932 +	{d68000_eori_16      , 0xffc0, 0x0a40, 0xbf8},
 22.2933 +	{d68000_eori_32      , 0xffc0, 0x0a80, 0xbf8},
 22.2934 +	{d68000_exg_dd       , 0xf1f8, 0xc140, 0x000},
 22.2935 +	{d68000_exg_aa       , 0xf1f8, 0xc148, 0x000},
 22.2936 +	{d68000_exg_da       , 0xf1f8, 0xc188, 0x000},
 22.2937 +	{d68020_extb_32      , 0xfff8, 0x49c0, 0x000},
 22.2938 +	{d68000_ext_16       , 0xfff8, 0x4880, 0x000},
 22.2939 +	{d68000_ext_32       , 0xfff8, 0x48c0, 0x000},
 22.2940 +	{d68000_illegal      , 0xffff, 0x4afc, 0x000},
 22.2941 +	{d68000_jmp          , 0xffc0, 0x4ec0, 0x27b},
 22.2942 +	{d68000_jsr          , 0xffc0, 0x4e80, 0x27b},
 22.2943 +	{d68000_lea          , 0xf1c0, 0x41c0, 0x27b},
 22.2944 +	{d68000_link_16      , 0xfff8, 0x4e50, 0x000},
 22.2945 +	{d68020_link_32      , 0xfff8, 0x4808, 0x000},
 22.2946 +	{d68000_lsr_s_8      , 0xf1f8, 0xe008, 0x000},
 22.2947 +	{d68000_lsr_s_16     , 0xf1f8, 0xe048, 0x000},
 22.2948 +	{d68000_lsr_s_32     , 0xf1f8, 0xe088, 0x000},
 22.2949 +	{d68000_lsr_r_8      , 0xf1f8, 0xe028, 0x000},
 22.2950 +	{d68000_lsr_r_16     , 0xf1f8, 0xe068, 0x000},
 22.2951 +	{d68000_lsr_r_32     , 0xf1f8, 0xe0a8, 0x000},
 22.2952 +	{d68000_lsr_ea       , 0xffc0, 0xe2c0, 0x3f8},
 22.2953 +	{d68000_lsl_s_8      , 0xf1f8, 0xe108, 0x000},
 22.2954 +	{d68000_lsl_s_16     , 0xf1f8, 0xe148, 0x000},
 22.2955 +	{d68000_lsl_s_32     , 0xf1f8, 0xe188, 0x000},
 22.2956 +	{d68000_lsl_r_8      , 0xf1f8, 0xe128, 0x000},
 22.2957 +	{d68000_lsl_r_16     , 0xf1f8, 0xe168, 0x000},
 22.2958 +	{d68000_lsl_r_32     , 0xf1f8, 0xe1a8, 0x000},
 22.2959 +	{d68000_lsl_ea       , 0xffc0, 0xe3c0, 0x3f8},
 22.2960 +	{d68000_move_8       , 0xf000, 0x1000, 0xbff},
 22.2961 +	{d68000_move_16      , 0xf000, 0x3000, 0xfff},
 22.2962 +	{d68000_move_32      , 0xf000, 0x2000, 0xfff},
 22.2963 +	{d68000_movea_16     , 0xf1c0, 0x3040, 0xfff},
 22.2964 +	{d68000_movea_32     , 0xf1c0, 0x2040, 0xfff},
 22.2965 +	{d68000_move_to_ccr  , 0xffc0, 0x44c0, 0xbff},
 22.2966 +	{d68010_move_fr_ccr  , 0xffc0, 0x42c0, 0xbf8},
 22.2967 +	{d68000_move_to_sr   , 0xffc0, 0x46c0, 0xbff},
 22.2968 +	{d68000_move_fr_sr   , 0xffc0, 0x40c0, 0xbf8},
 22.2969 +	{d68000_move_to_usp  , 0xfff8, 0x4e60, 0x000},
 22.2970 +	{d68000_move_fr_usp  , 0xfff8, 0x4e68, 0x000},
 22.2971 +	{d68010_movec        , 0xfffe, 0x4e7a, 0x000},
 22.2972 +	{d68000_movem_pd_16  , 0xfff8, 0x48a0, 0x000},
 22.2973 +	{d68000_movem_pd_32  , 0xfff8, 0x48e0, 0x000},
 22.2974 +	{d68000_movem_re_16  , 0xffc0, 0x4880, 0x2f8},
 22.2975 +	{d68000_movem_re_32  , 0xffc0, 0x48c0, 0x2f8},
 22.2976 +	{d68000_movem_er_16  , 0xffc0, 0x4c80, 0x37b},
 22.2977 +	{d68000_movem_er_32  , 0xffc0, 0x4cc0, 0x37b},
 22.2978 +	{d68000_movep_er_16  , 0xf1f8, 0x0108, 0x000},
 22.2979 +	{d68000_movep_er_32  , 0xf1f8, 0x0148, 0x000},
 22.2980 +	{d68000_movep_re_16  , 0xf1f8, 0x0188, 0x000},
 22.2981 +	{d68000_movep_re_32  , 0xf1f8, 0x01c8, 0x000},
 22.2982 +	{d68010_moves_8      , 0xffc0, 0x0e00, 0x3f8},
 22.2983 +	{d68010_moves_16     , 0xffc0, 0x0e40, 0x3f8},
 22.2984 +	{d68010_moves_32     , 0xffc0, 0x0e80, 0x3f8},
 22.2985 +	{d68000_moveq        , 0xf100, 0x7000, 0x000},
 22.2986 +	{d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},
 22.2987 +	{d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},
 22.2988 +	{d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},
 22.2989 +	{d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},
 22.2990 +	{d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},
 22.2991 +	{d68000_muls         , 0xf1c0, 0xc1c0, 0xbff},
 22.2992 +	{d68000_mulu         , 0xf1c0, 0xc0c0, 0xbff},
 22.2993 +	{d68020_mull         , 0xffc0, 0x4c00, 0xbff},
 22.2994 +	{d68000_nbcd         , 0xffc0, 0x4800, 0xbf8},
 22.2995 +	{d68000_neg_8        , 0xffc0, 0x4400, 0xbf8},
 22.2996 +	{d68000_neg_16       , 0xffc0, 0x4440, 0xbf8},
 22.2997 +	{d68000_neg_32       , 0xffc0, 0x4480, 0xbf8},
 22.2998 +	{d68000_negx_8       , 0xffc0, 0x4000, 0xbf8},
 22.2999 +	{d68000_negx_16      , 0xffc0, 0x4040, 0xbf8},
 22.3000 +	{d68000_negx_32      , 0xffc0, 0x4080, 0xbf8},
 22.3001 +	{d68000_nop          , 0xffff, 0x4e71, 0x000},
 22.3002 +	{d68000_not_8        , 0xffc0, 0x4600, 0xbf8},
 22.3003 +	{d68000_not_16       , 0xffc0, 0x4640, 0xbf8},
 22.3004 +	{d68000_not_32       , 0xffc0, 0x4680, 0xbf8},
 22.3005 +	{d68000_or_er_8      , 0xf1c0, 0x8000, 0xbff},
 22.3006 +	{d68000_or_er_16     , 0xf1c0, 0x8040, 0xbff},
 22.3007 +	{d68000_or_er_32     , 0xf1c0, 0x8080, 0xbff},
 22.3008 +	{d68000_or_re_8      , 0xf1c0, 0x8100, 0x3f8},
 22.3009 +	{d68000_or_re_16     , 0xf1c0, 0x8140, 0x3f8},
 22.3010 +	{d68000_or_re_32     , 0xf1c0, 0x8180, 0x3f8},
 22.3011 +	{d68000_ori_to_ccr   , 0xffff, 0x003c, 0x000},
 22.3012 +	{d68000_ori_to_sr    , 0xffff, 0x007c, 0x000},
 22.3013 +	{d68000_ori_8        , 0xffc0, 0x0000, 0xbf8},
 22.3014 +	{d68000_ori_16       , 0xffc0, 0x0040, 0xbf8},
 22.3015 +	{d68000_ori_32       , 0xffc0, 0x0080, 0xbf8},
 22.3016 +	{d68020_pack_rr      , 0xf1f8, 0x8140, 0x000},
 22.3017 +	{d68020_pack_mm      , 0xf1f8, 0x8148, 0x000},
 22.3018 +	{d68000_pea          , 0xffc0, 0x4840, 0x27b},
 22.3019 +	{d68000_reset        , 0xffff, 0x4e70, 0x000},
 22.3020 +	{d68000_ror_s_8      , 0xf1f8, 0xe018, 0x000},
 22.3021 +	{d68000_ror_s_16     , 0xf1f8, 0xe058, 0x000},
 22.3022 +	{d68000_ror_s_32     , 0xf1f8, 0xe098, 0x000},
 22.3023 +	{d68000_ror_r_8      , 0xf1f8, 0xe038, 0x000},
 22.3024 +	{d68000_ror_r_16     , 0xf1f8, 0xe078, 0x000},
 22.3025 +	{d68000_ror_r_32     , 0xf1f8, 0xe0b8, 0x000},
 22.3026 +	{d68000_ror_ea       , 0xffc0, 0xe6c0, 0x3f8},
 22.3027 +	{d68000_rol_s_8      , 0xf1f8, 0xe118, 0x000},
 22.3028 +	{d68000_rol_s_16     , 0xf1f8, 0xe158, 0x000},
 22.3029 +	{d68000_rol_s_32     , 0xf1f8, 0xe198, 0x000},
 22.3030 +	{d68000_rol_r_8      , 0xf1f8, 0xe138, 0x000},
 22.3031 +	{d68000_rol_r_16     , 0xf1f8, 0xe178, 0x000},
 22.3032 +	{d68000_rol_r_32     , 0xf1f8, 0xe1b8, 0x000},
 22.3033 +	{d68000_rol_ea       , 0xffc0, 0xe7c0, 0x3f8},
 22.3034 +	{d68000_roxr_s_8     , 0xf1f8, 0xe010, 0x000},
 22.3035 +	{d68000_roxr_s_16    , 0xf1f8, 0xe050, 0x000},
 22.3036 +	{d68000_roxr_s_32    , 0xf1f8, 0xe090, 0x000},
 22.3037 +	{d68000_roxr_r_8     , 0xf1f8, 0xe030, 0x000},
 22.3038 +	{d68000_roxr_r_16    , 0xf1f8, 0xe070, 0x000},
 22.3039 +	{d68000_roxr_r_32    , 0xf1f8, 0xe0b0, 0x000},
 22.3040 +	{d68000_roxr_ea      , 0xffc0, 0xe4c0, 0x3f8},
 22.3041 +	{d68000_roxl_s_8     , 0xf1f8, 0xe110, 0x000},
 22.3042 +	{d68000_roxl_s_16    , 0xf1f8, 0xe150, 0x000},
 22.3043 +	{d68000_roxl_s_32    , 0xf1f8, 0xe190, 0x000},
 22.3044 +	{d68000_roxl_r_8     , 0xf1f8, 0xe130, 0x000},
 22.3045 +	{d68000_roxl_r_16    , 0xf1f8, 0xe170, 0x000},
 22.3046 +	{d68000_roxl_r_32    , 0xf1f8, 0xe1b0, 0x000},
 22.3047 +	{d68000_roxl_ea      , 0xffc0, 0xe5c0, 0x3f8},
 22.3048 +	{d68010_rtd          , 0xffff, 0x4e74, 0x000},
 22.3049 +	{d68000_rte          , 0xffff, 0x4e73, 0x000},
 22.3050 +	{d68020_rtm          , 0xfff0, 0x06c0, 0x000},
 22.3051 +	{d68000_rtr          , 0xffff, 0x4e77, 0x000},
 22.3052 +	{d68000_rts          , 0xffff, 0x4e75, 0x000},
 22.3053 +	{d68000_sbcd_rr      , 0xf1f8, 0x8100, 0x000},
 22.3054 +	{d68000_sbcd_mm      , 0xf1f8, 0x8108, 0x000},
 22.3055 +	{d68000_scc          , 0xf0c0, 0x50c0, 0xbf8},
 22.3056 +	{d68000_stop         , 0xffff, 0x4e72, 0x000},
 22.3057 +	{d68000_sub_er_8     , 0xf1c0, 0x9000, 0xbff},
 22.3058 +	{d68000_sub_er_16    , 0xf1c0, 0x9040, 0xfff},
 22.3059 +	{d68000_sub_er_32    , 0xf1c0, 0x9080, 0xfff},
 22.3060 +	{d68000_sub_re_8     , 0xf1c0, 0x9100, 0x3f8},
 22.3061 +	{d68000_sub_re_16    , 0xf1c0, 0x9140, 0x3f8},
 22.3062 +	{d68000_sub_re_32    , 0xf1c0, 0x9180, 0x3f8},
 22.3063 +	{d68000_suba_16      , 0xf1c0, 0x90c0, 0xfff},
 22.3064 +	{d68000_suba_32      , 0xf1c0, 0x91c0, 0xfff},
 22.3065 +	{d68000_subi_8       , 0xffc0, 0x0400, 0xbf8},
 22.3066 +	{d68000_subi_16      , 0xffc0, 0x0440, 0xbf8},
 22.3067 +	{d68000_subi_32      , 0xffc0, 0x0480, 0xbf8},
 22.3068 +	{d68000_subq_8       , 0xf1c0, 0x5100, 0xbf8},
 22.3069 +	{d68000_subq_16      , 0xf1c0, 0x5140, 0xff8},
 22.3070 +	{d68000_subq_32      , 0xf1c0, 0x5180, 0xff8},
 22.3071 +	{d68000_subx_rr_8    , 0xf1f8, 0x9100, 0x000},
 22.3072 +	{d68000_subx_rr_16   , 0xf1f8, 0x9140, 0x000},
 22.3073 +	{d68000_subx_rr_32   , 0xf1f8, 0x9180, 0x000},
 22.3074 +	{d68000_subx_mm_8    , 0xf1f8, 0x9108, 0x000},
 22.3075 +	{d68000_subx_mm_16   , 0xf1f8, 0x9148, 0x000},
 22.3076 +	{d68000_subx_mm_32   , 0xf1f8, 0x9188, 0x000},
 22.3077 +	{d68000_swap         , 0xfff8, 0x4840, 0x000},
 22.3078 +	{d68000_tas          , 0xffc0, 0x4ac0, 0xbf8},
 22.3079 +	{d68000_trap         , 0xfff0, 0x4e40, 0x000},
 22.3080 +	{d68020_trapcc_0     , 0xf0ff, 0x50fc, 0x000},
 22.3081 +	{d68020_trapcc_16    , 0xf0ff, 0x50fa, 0x000},
 22.3082 +	{d68020_trapcc_32    , 0xf0ff, 0x50fb, 0x000},
 22.3083 +	{d68000_trapv        , 0xffff, 0x4e76, 0x000},
 22.3084 +	{d68000_tst_8        , 0xffc0, 0x4a00, 0xbf8},
 22.3085 +	{d68020_tst_pcdi_8   , 0xffff, 0x4a3a, 0x000},
 22.3086 +	{d68020_tst_pcix_8   , 0xffff, 0x4a3b, 0x000},
 22.3087 +	{d68020_tst_i_8      , 0xffff, 0x4a3c, 0x000},
 22.3088 +	{d68000_tst_16       , 0xffc0, 0x4a40, 0xbf8},
 22.3089 +	{d68020_tst_a_16     , 0xfff8, 0x4a48, 0x000},
 22.3090 +	{d68020_tst_pcdi_16  , 0xffff, 0x4a7a, 0x000},
 22.3091 +	{d68020_tst_pcix_16  , 0xffff, 0x4a7b, 0x000},
 22.3092 +	{d68020_tst_i_16     , 0xffff, 0x4a7c, 0x000},
 22.3093 +	{d68000_tst_32       , 0xffc0, 0x4a80, 0xbf8},
 22.3094 +	{d68020_tst_a_32     , 0xfff8, 0x4a88, 0x000},
 22.3095 +	{d68020_tst_pcdi_32  , 0xffff, 0x4aba, 0x000},
 22.3096 +	{d68020_tst_pcix_32  , 0xffff, 0x4abb, 0x000},
 22.3097 +	{d68020_tst_i_32     , 0xffff, 0x4abc, 0x000},
 22.3098 +	{d68000_unlk         , 0xfff8, 0x4e58, 0x000},
 22.3099 +	{d68020_unpk_rr      , 0xf1f8, 0x8180, 0x000},
 22.3100 +	{d68020_unpk_mm      , 0xf1f8, 0x8188, 0x000},
 22.3101 +	{0, 0, 0, 0}
 22.3102 +};
 22.3103 +
 22.3104 +/* Check if opcode is using a valid ea mode */
 22.3105 +static int valid_ea(uint opcode, uint mask)
 22.3106 +{
 22.3107 +	if(mask == 0)
 22.3108 +		return 1;
 22.3109 +
 22.3110 +	switch(opcode & 0x3f)
 22.3111 +	{
 22.3112 +		case 0x00: case 0x01: case 0x02: case 0x03:
 22.3113 +		case 0x04: case 0x05: case 0x06: case 0x07:
 22.3114 +			return (mask & 0x800) != 0;
 22.3115 +		case 0x08: case 0x09: case 0x0a: case 0x0b:
 22.3116 +		case 0x0c: case 0x0d: case 0x0e: case 0x0f:
 22.3117 +			return (mask & 0x400) != 0;
 22.3118 +		case 0x10: case 0x11: case 0x12: case 0x13:
 22.3119 +		case 0x14: case 0x15: case 0x16: case 0x17:
 22.3120 +			return (mask & 0x200) != 0;
 22.3121 +		case 0x18: case 0x19: case 0x1a: case 0x1b:
 22.3122 +		case 0x1c: case 0x1d: case 0x1e: case 0x1f:
 22.3123 +			return (mask & 0x100) != 0;
 22.3124 +		case 0x20: case 0x21: case 0x22: case 0x23:
 22.3125 +		case 0x24: case 0x25: case 0x26: case 0x27:
 22.3126 +			return (mask & 0x080) != 0;
 22.3127 +		case 0x28: case 0x29: case 0x2a: case 0x2b:
 22.3128 +		case 0x2c: case 0x2d: case 0x2e: case 0x2f:
 22.3129 +			return (mask & 0x040) != 0;
 22.3130 +		case 0x30: case 0x31: case 0x32: case 0x33:
 22.3131 +		case 0x34: case 0x35: case 0x36: case 0x37:
 22.3132 +			return (mask & 0x020) != 0;
 22.3133 +		case 0x38:
 22.3134 +			return (mask & 0x010) != 0;
 22.3135 +		case 0x39:
 22.3136 +			return (mask & 0x008) != 0;
 22.3137 +		case 0x3a:
 22.3138 +			return (mask & 0x002) != 0;
 22.3139 +		case 0x3b:
 22.3140 +			return (mask & 0x001) != 0;
 22.3141 +		case 0x3c:
 22.3142 +			return (mask & 0x004) != 0;
 22.3143 +	}
 22.3144 +	return 0;
 22.3145 +
 22.3146 +}
 22.3147 +
 22.3148 +/* Used by qsort */
 22.3149 +static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
 22.3150 +{
 22.3151 +	uint a = ((const opcode_struct*)aptr)->mask;
 22.3152 +	uint b = ((const opcode_struct*)bptr)->mask;
 22.3153 +
 22.3154 +	a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
 22.3155 +	a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
 22.3156 +	a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);
 22.3157 +	a = ((a & 0xFF00) >> 8) + (a & 0x00FF);
 22.3158 +
 22.3159 +	b = ((b & 0xAAAA) >> 1) + (b & 0x5555);
 22.3160 +	b = ((b & 0xCCCC) >> 2) + (b & 0x3333);
 22.3161 +	b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);
 22.3162 +	b = ((b & 0xFF00) >> 8) + (b & 0x00FF);
 22.3163 +
 22.3164 +	return b - a; /* reversed to get greatest to least sorting */
 22.3165 +}
 22.3166 +
 22.3167 +/* build the opcode handler jump table */
 22.3168 +static void build_opcode_table(void)
 22.3169 +{
 22.3170 +	uint i;
 22.3171 +	uint opcode;
 22.3172 +	opcode_struct* ostruct;
 22.3173 +	uint opcode_info_length = 0;
 22.3174 +
 22.3175 +	for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
 22.3176 +		opcode_info_length++;
 22.3177 +
 22.3178 +	qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);
 22.3179 +
 22.3180 +	for(i=0;i<0x10000;i++)
 22.3181 +	{
 22.3182 +		g_instruction_table[i] = d68000_illegal; /* default to illegal */
 22.3183 +		opcode = i;
 22.3184 +		/* search through opcode info for a match */
 22.3185 +		for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
 22.3186 +		{
 22.3187 +			/* match opcode mask and allowed ea modes */
 22.3188 +			if((opcode & ostruct->mask) == ostruct->match)
 22.3189 +			{
 22.3190 +				/* Handle destination ea for move instructions */
 22.3191 +				if((ostruct->opcode_handler == d68000_move_8 ||
 22.3192 +					 ostruct->opcode_handler == d68000_move_16 ||
 22.3193 +					 ostruct->opcode_handler == d68000_move_32) &&
 22.3194 +					 !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
 22.3195 +						continue;
 22.3196 +				if(valid_ea(opcode, ostruct->ea_mask))
 22.3197 +				{
 22.3198 +					g_instruction_table[i] = ostruct->opcode_handler;
 22.3199 +					break;
 22.3200 +				}
 22.3201 +			}
 22.3202 +		}
 22.3203 +	}
 22.3204 +}
 22.3205 +
 22.3206 +
 22.3207 +
 22.3208 +/* ======================================================================== */
 22.3209 +/* ================================= API ================================== */
 22.3210 +/* ======================================================================== */
 22.3211 +
 22.3212 +/* Disasemble one instruction at pc and store in str_buff */
 22.3213 +unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
 22.3214 +{
 22.3215 +	if(!g_initialized)
 22.3216 +	{
 22.3217 +		build_opcode_table();
 22.3218 +		g_initialized = 1;
 22.3219 +	}
 22.3220 +	switch(cpu_type)
 22.3221 +	{
 22.3222 +		case M68K_CPU_TYPE_68000:
 22.3223 +			g_cpu_type = TYPE_68000;
 22.3224 +			g_address_mask = 0x00ffffff;
 22.3225 +			break;
 22.3226 +		case M68K_CPU_TYPE_68010:
 22.3227 +			g_cpu_type = TYPE_68010;
 22.3228 +			g_address_mask = 0x00ffffff;
 22.3229 +			break;
 22.3230 +		case M68K_CPU_TYPE_68EC020:
 22.3231 +			g_cpu_type = TYPE_68020;
 22.3232 +			g_address_mask = 0x00ffffff;
 22.3233 +			break;
 22.3234 +		case M68K_CPU_TYPE_68020:
 22.3235 +			g_cpu_type = TYPE_68020;
 22.3236 +			g_address_mask = 0xffffffff;
 22.3237 +			break;
 22.3238 +		case M68K_CPU_TYPE_68030:
 22.3239 +			g_cpu_type = TYPE_68030;
 22.3240 +			g_address_mask = 0xffffffff;
 22.3241 +			break;
 22.3242 +		case M68K_CPU_TYPE_68040:
 22.3243 +			g_cpu_type = TYPE_68040;
 22.3244 +			g_address_mask = 0xffffffff;
 22.3245 +			break;
 22.3246 +		default:
 22.3247 +			return 0;
 22.3248 +	}
 22.3249 +
 22.3250 +	g_cpu_pc = pc;
 22.3251 +	g_helper_str[0] = 0;
 22.3252 +	g_cpu_ir = read_imm_16();
 22.3253 +	g_instruction_table[g_cpu_ir]();
 22.3254 +	sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);
 22.3255 +	return g_cpu_pc - pc;
 22.3256 +}
 22.3257 +
 22.3258 +char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
 22.3259 +{
 22.3260 +	static char buff[100];
 22.3261 +	buff[0] = 0;
 22.3262 +	m68k_disassemble(buff, pc, cpu_type);
 22.3263 +	return buff;
 22.3264 +}
 22.3265 +
 22.3266 +/* Check if the instruction is a valid one */
 22.3267 +unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
 22.3268 +{
 22.3269 +	if(!g_initialized)
 22.3270 +	{
 22.3271 +		build_opcode_table();
 22.3272 +		g_initialized = 1;
 22.3273 +	}
 22.3274 +
 22.3275 +	instruction &= 0xffff;
 22.3276 +	if(g_instruction_table[instruction] == d68000_illegal)
 22.3277 +		return 0;
 22.3278 +
 22.3279 +	switch(cpu_type)
 22.3280 +	{
 22.3281 +		case M68K_CPU_TYPE_68000:
 22.3282 +			if(g_instruction_table[instruction] == d68010_bkpt)
 22.3283 +				return 0;
 22.3284 +			if(g_instruction_table[instruction] == d68010_move_fr_ccr)
 22.3285 +				return 0;
 22.3286 +			if(g_instruction_table[instruction] == d68010_movec)
 22.3287 +				return 0;
 22.3288 +			if(g_instruction_table[instruction] == d68010_moves_8)
 22.3289 +				return 0;
 22.3290 +			if(g_instruction_table[instruction] == d68010_moves_16)
 22.3291 +				return 0;
 22.3292 +			if(g_instruction_table[instruction] == d68010_moves_32)
 22.3293 +				return 0;
 22.3294 +			if(g_instruction_table[instruction] == d68010_rtd)
 22.3295 +				return 0;
 22.3296 +		case M68K_CPU_TYPE_68010:
 22.3297 +			if(g_instruction_table[instruction] == d68020_bcc_32)
 22.3298 +				return 0;
 22.3299 +			if(g_instruction_table[instruction] == d68020_bfchg)
 22.3300 +				return 0;
 22.3301 +			if(g_instruction_table[instruction] == d68020_bfclr)
 22.3302 +				return 0;
 22.3303 +			if(g_instruction_table[instruction] == d68020_bfexts)
 22.3304 +				return 0;
 22.3305 +			if(g_instruction_table[instruction] == d68020_bfextu)
 22.3306 +				return 0;
 22.3307 +			if(g_instruction_table[instruction] == d68020_bfffo)
 22.3308 +				return 0;
 22.3309 +			if(g_instruction_table[instruction] == d68020_bfins)
 22.3310 +				return 0;
 22.3311 +			if(g_instruction_table[instruction] == d68020_bfset)
 22.3312 +				return 0;
 22.3313 +			if(g_instruction_table[instruction] == d68020_bftst)
 22.3314 +				return 0;
 22.3315 +			if(g_instruction_table[instruction] == d68020_bra_32)
 22.3316 +				return 0;
 22.3317 +			if(g_instruction_table[instruction] == d68020_bsr_32)
 22.3318 +				return 0;
 22.3319 +			if(g_instruction_table[instruction] == d68020_callm)
 22.3320 +				return 0;
 22.3321 +			if(g_instruction_table[instruction] == d68020_cas_8)
 22.3322 +				return 0;
 22.3323 +			if(g_instruction_table[instruction] == d68020_cas_16)
 22.3324 +				return 0;
 22.3325 +			if(g_instruction_table[instruction] == d68020_cas_32)
 22.3326 +				return 0;
 22.3327 +			if(g_instruction_table[instruction] == d68020_cas2_16)
 22.3328 +				return 0;
 22.3329 +			if(g_instruction_table[instruction] == d68020_cas2_32)
 22.3330 +				return 0;
 22.3331 +			if(g_instruction_table[instruction] == d68020_chk_32)
 22.3332 +				return 0;
 22.3333 +			if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)
 22.3334 +				return 0;
 22.3335 +			if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)
 22.3336 +				return 0;
 22.3337 +			if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)
 22.3338 +				return 0;
 22.3339 +			if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)
 22.3340 +				return 0;
 22.3341 +			if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)
 22.3342 +				return 0;
 22.3343 +			if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)
 22.3344 +				return 0;
 22.3345 +			if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)
 22.3346 +				return 0;
 22.3347 +			if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)
 22.3348 +				return 0;
 22.3349 +			if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)
 22.3350 +				return 0;
 22.3351 +			if(g_instruction_table[instruction] == d68020_cpbcc_16)
 22.3352 +				return 0;
 22.3353 +			if(g_instruction_table[instruction] == d68020_cpbcc_32)
 22.3354 +				return 0;
 22.3355 +			if(g_instruction_table[instruction] == d68020_cpdbcc)
 22.3356 +				return 0;
 22.3357 +			if(g_instruction_table[instruction] == d68020_cpgen)
 22.3358 +				return 0;
 22.3359 +			if(g_instruction_table[instruction] == d68020_cprestore)
 22.3360 +				return 0;
 22.3361 +			if(g_instruction_table[instruction] == d68020_cpsave)
 22.3362 +				return 0;
 22.3363 +			if(g_instruction_table[instruction] == d68020_cpscc)
 22.3364 +				return 0;
 22.3365 +			if(g_instruction_table[instruction] == d68020_cptrapcc_0)
 22.3366 +				return 0;
 22.3367 +			if(g_instruction_table[instruction] == d68020_cptrapcc_16)
 22.3368 +				return 0;
 22.3369 +			if(g_instruction_table[instruction] == d68020_cptrapcc_32)
 22.3370 +				return 0;
 22.3371 +			if(g_instruction_table[instruction] == d68020_divl)
 22.3372 +				return 0;
 22.3373 +			if(g_instruction_table[instruction] == d68020_extb_32)
 22.3374 +				return 0;
 22.3375 +			if(g_instruction_table[instruction] == d68020_link_32)
 22.3376 +				return 0;
 22.3377 +			if(g_instruction_table[instruction] == d68020_mull)
 22.3378 +				return 0;
 22.3379 +			if(g_instruction_table[instruction] == d68020_pack_rr)
 22.3380 +				return 0;
 22.3381 +			if(g_instruction_table[instruction] == d68020_pack_mm)
 22.3382 +				return 0;
 22.3383 +			if(g_instruction_table[instruction] == d68020_rtm)
 22.3384 +				return 0;
 22.3385 +			if(g_instruction_table[instruction] == d68020_trapcc_0)
 22.3386 +				return 0;
 22.3387 +			if(g_instruction_table[instruction] == d68020_trapcc_16)
 22.3388 +				return 0;
 22.3389 +			if(g_instruction_table[instruction] == d68020_trapcc_32)
 22.3390 +				return 0;
 22.3391 +			if(g_instruction_table[instruction] == d68020_tst_pcdi_8)
 22.3392 +				return 0;
 22.3393 +			if(g_instruction_table[instruction] == d68020_tst_pcix_8)
 22.3394 +				return 0;
 22.3395 +			if(g_instruction_table[instruction] == d68020_tst_i_8)
 22.3396 +				return 0;
 22.3397 +			if(g_instruction_table[instruction] == d68020_tst_a_16)
 22.3398 +				return 0;
 22.3399 +			if(g_instruction_table[instruction] == d68020_tst_pcdi_16)
 22.3400 +				return 0;
 22.3401 +			if(g_instruction_table[instruction] == d68020_tst_pcix_16)
 22.3402 +				return 0;
 22.3403 +			if(g_instruction_table[instruction] == d68020_tst_i_16)
 22.3404 +				return 0;
 22.3405 +			if(g_instruction_table[instruction] == d68020_tst_a_32)
 22.3406 +				return 0;
 22.3407 +			if(g_instruction_table[instruction] == d68020_tst_pcdi_32)
 22.3408 +				return 0;
 22.3409 +			if(g_instruction_table[instruction] == d68020_tst_pcix_32)
 22.3410 +				return 0;
 22.3411 +			if(g_instruction_table[instruction] == d68020_tst_i_32)
 22.3412 +				return 0;
 22.3413 +			if(g_instruction_table[instruction] == d68020_unpk_rr)
 22.3414 +				return 0;
 22.3415 +			if(g_instruction_table[instruction] == d68020_unpk_mm)
 22.3416 +				return 0;
 22.3417 +		case M68K_CPU_TYPE_68EC020:
 22.3418 +		case M68K_CPU_TYPE_68020:
 22.3419 +		case M68K_CPU_TYPE_68030:
 22.3420 +			if(g_instruction_table[instruction] == d68040_cinv)
 22.3421 +				return 0;
 22.3422 +			if(g_instruction_table[instruction] == d68040_cpush)
 22.3423 +				return 0;
 22.3424 +			if(g_instruction_table[instruction] == d68040_move16_pi_pi)
 22.3425 +				return 0;
 22.3426 +			if(g_instruction_table[instruction] == d68040_move16_pi_al)
 22.3427 +				return 0;
 22.3428 +			if(g_instruction_table[instruction] == d68040_move16_al_pi)
 22.3429 +				return 0;
 22.3430 +			if(g_instruction_table[instruction] == d68040_move16_ai_al)
 22.3431 +				return 0;
 22.3432 +			if(g_instruction_table[instruction] == d68040_move16_al_ai)
 22.3433 +				return 0;
 22.3434 +	}
 22.3435 +	if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
 22.3436 +	  (g_instruction_table[instruction] == d68020_callm ||
 22.3437 +	  g_instruction_table[instruction] == d68020_rtm))
 22.3438 +		return 0;
 22.3439 +
 22.3440 +	return 1;
 22.3441 +}
 22.3442 +
 22.3443 +
 22.3444 +
 22.3445 +/* ======================================================================== */
 22.3446 +/* ============================== END OF FILE ============================= */
 22.3447 +/* ======================================================================== */

    23.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/m68kmake.c
    23.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    23.3 +++ b/src/musashi/m68kmake.c	Sat Nov 27 01:13:12 2010 +0000
    23.4 @@ -0,0 +1,1414 @@
    23.5 +/* ======================================================================== */
    23.6 +/* ========================= LICENSING & COPYRIGHT ======================== */
    23.7 +/* ======================================================================== */
    23.8 +/*
    23.9 + *                                  MUSASHI
   23.10 + *                                Version 3.3
   23.11 + *
   23.12 + * A portable Motorola M680x0 processor emulation engine.
   23.13 + * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   23.14 + *
   23.15 + * This code may be freely used for non-commercial purposes as long as this
   23.16 + * copyright notice remains unaltered in the source code and any binary files
   23.17 + * containing this code in compiled form.
   23.18 + *
   23.19 + * All other lisencing terms must be negotiated with the author
   23.20 + * (Karl Stenerud).
   23.21 + *
   23.22 + * The latest version of this code can be obtained at:
   23.23 + * http://kstenerud.cjb.net
   23.24 + */
   23.25 +
   23.26 +
   23.27 +
   23.28 +/* ======================================================================== */
   23.29 +/* ============================ CODE GENERATOR ============================ */
   23.30 +/* ======================================================================== */
   23.31 +/*
   23.32 + * This is the code generator program which will generate the opcode table
   23.33 + * and the final opcode handlers.
   23.34 + *
   23.35 + * It requires an input file to function (default m68k_in.c), but you can
   23.36 + * specify your own like so:
   23.37 + *
   23.38 + * m68kmake <output path> <input file>
   23.39 + *
   23.40 + * where output path is the path where the output files should be placed, and
   23.41 + * input file is the file to use for input.
   23.42 + *
   23.43 + * If you modify the input file greatly from its released form, you may have
   23.44 + * to tweak the configuration section a bit since I'm using static allocation
   23.45 + * to keep things simple.
   23.46 + *
   23.47 + *
   23.48 + * TODO: - build a better code generator for the move instruction.
   23.49 + *       - Add callm and rtm instructions
   23.50 + *       - Fix RTE to handle other format words
   23.51 + *       - Add address error (and bus error?) handling
   23.52 + */
   23.53 +
   23.54 +
   23.55 +char* g_version = "3.3";
   23.56 +
   23.57 +/* ======================================================================== */
   23.58 +/* =============================== INCLUDES =============================== */
   23.59 +/* ======================================================================== */
   23.60 +
   23.61 +#include <stdio.h>
   23.62 +#include <stdlib.h>
   23.63 +#include <string.h>
   23.64 +#include <ctype.h>
   23.65 +#include <stdarg.h>
   23.66 +
   23.67 +
   23.68 +
   23.69 +/* ======================================================================== */
   23.70 +/* ============================= CONFIGURATION ============================ */
   23.71 +/* ======================================================================== */
   23.72 +
   23.73 +#define MAX_PATH 1024
   23.74 +#define MAX_DIR  1024
   23.75 +
   23.76 +#define NUM_CPUS                          3	/* 000, 010, 020 */
   23.77 +#define MAX_LINE_LENGTH                 200	/* length of 1 line */
   23.78 +#define MAX_BODY_LENGTH                 300	/* Number of lines in 1 function */
   23.79 +#define MAX_REPLACE_LENGTH               30	/* Max number of replace strings */
   23.80 +#define MAX_INSERT_LENGTH              5000	/* Max size of insert piece */
   23.81 +#define MAX_NAME_LENGTH                  30	/* Max length of ophandler name */
   23.82 +#define MAX_SPEC_PROC_LENGTH              4	/* Max length of special processing str */
   23.83 +#define MAX_SPEC_EA_LENGTH                5	/* Max length of specified EA str */
   23.84 +#define EA_ALLOWED_LENGTH                11	/* Max length of ea allowed str */
   23.85 +#define MAX_OPCODE_INPUT_TABLE_LENGTH  1000	/* Max length of opcode handler tbl */
   23.86 +#define MAX_OPCODE_OUTPUT_TABLE_LENGTH 3000	/* Max length of opcode handler tbl */
   23.87 +
   23.88 +/* Default filenames */
   23.89 +#define FILENAME_INPUT      "m68k_in.c"
   23.90 +#define FILENAME_PROTOTYPE  "m68kops.h"
   23.91 +#define FILENAME_TABLE      "m68kops.c"
   23.92 +#define FILENAME_OPS_AC     "m68kopac.c"
   23.93 +#define FILENAME_OPS_DM     "m68kopdm.c"
   23.94 +#define FILENAME_OPS_NZ     "m68kopnz.c"
   23.95 +
   23.96 +
   23.97 +/* Identifier sequences recognized by this program */
   23.98 +
   23.99 +#define ID_INPUT_SEPARATOR "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX"
  23.100 +
  23.101 +#define ID_BASE                 "M68KMAKE"
  23.102 +#define ID_PROTOTYPE_HEADER     ID_BASE "_PROTOTYPE_HEADER"
  23.103 +#define ID_PROTOTYPE_FOOTER     ID_BASE "_PROTOTYPE_FOOTER"
  23.104 +#define ID_TABLE_HEADER         ID_BASE "_TABLE_HEADER"
  23.105 +#define ID_TABLE_FOOTER         ID_BASE "_TABLE_FOOTER"
  23.106 +#define ID_TABLE_BODY           ID_BASE "_TABLE_BODY"
  23.107 +#define ID_TABLE_START          ID_BASE "_TABLE_START"
  23.108 +#define ID_OPHANDLER_HEADER     ID_BASE "_OPCODE_HANDLER_HEADER"
  23.109 +#define ID_OPHANDLER_FOOTER     ID_BASE "_OPCODE_HANDLER_FOOTER"
  23.110 +#define ID_OPHANDLER_BODY       ID_BASE "_OPCODE_HANDLER_BODY"
  23.111 +#define ID_END                  ID_BASE "_END"
  23.112 +
  23.113 +#define ID_OPHANDLER_NAME       ID_BASE "_OP"
  23.114 +#define ID_OPHANDLER_EA_AY_8    ID_BASE "_GET_EA_AY_8"
  23.115 +#define ID_OPHANDLER_EA_AY_16   ID_BASE "_GET_EA_AY_16"
  23.116 +#define ID_OPHANDLER_EA_AY_32   ID_BASE "_GET_EA_AY_32"
  23.117 +#define ID_OPHANDLER_OPER_AY_8  ID_BASE "_GET_OPER_AY_8"
  23.118 +#define ID_OPHANDLER_OPER_AY_16 ID_BASE "_GET_OPER_AY_16"
  23.119 +#define ID_OPHANDLER_OPER_AY_32 ID_BASE "_GET_OPER_AY_32"
  23.120 +#define ID_OPHANDLER_CC         ID_BASE "_CC"
  23.121 +#define ID_OPHANDLER_NOT_CC     ID_BASE "_NOT_CC"
  23.122 +
  23.123 +
  23.124 +#ifndef DECL_SPEC
  23.125 +#define DECL_SPEC
  23.126 +#endif /* DECL_SPEC */
  23.127 +
  23.128 +
  23.129 +
  23.130 +/* ======================================================================== */
  23.131 +/* ============================== PROTOTYPES ============================== */
  23.132 +/* ======================================================================== */
  23.133 +
  23.134 +#define CPU_TYPE_000 0
  23.135 +#define CPU_TYPE_010 1
  23.136 +#define CPU_TYPE_020 2
  23.137 +
  23.138 +#define UNSPECIFIED "."
  23.139 +#define UNSPECIFIED_CH '.'
  23.140 +
  23.141 +#define HAS_NO_EA_MODE(A) (strcmp(A, "..........") == 0)
  23.142 +#define HAS_EA_AI(A)   ((A)[0] == 'A')
  23.143 +#define HAS_EA_PI(A)   ((A)[1] == '+')
  23.144 +#define HAS_EA_PD(A)   ((A)[2] == '-')
  23.145 +#define HAS_EA_DI(A)   ((A)[3] == 'D')
  23.146 +#define HAS_EA_IX(A)   ((A)[4] == 'X')
  23.147 +#define HAS_EA_AW(A)   ((A)[5] == 'W')
  23.148 +#define HAS_EA_AL(A)   ((A)[6] == 'L')
  23.149 +#define HAS_EA_PCDI(A) ((A)[7] == 'd')
  23.150 +#define HAS_EA_PCIX(A) ((A)[8] == 'x')
  23.151 +#define HAS_EA_I(A)    ((A)[9] == 'I')
  23.152 +
  23.153 +enum
  23.154 +{
  23.155 +	EA_MODE_NONE,	/* No special addressing mode */
  23.156 +	EA_MODE_AI,		/* Address register indirect */
  23.157 +	EA_MODE_PI,		/* Address register indirect with postincrement */
  23.158 +	EA_MODE_PI7,	/* Address register 7 indirect with postincrement */
  23.159 +	EA_MODE_PD,		/* Address register indirect with predecrement */
  23.160 +	EA_MODE_PD7,	/* Address register 7 indirect with predecrement */
  23.161 +	EA_MODE_DI,		/* Address register indirect with displacement */
  23.162 +	EA_MODE_IX,		/* Address register indirect with index */
  23.163 +	EA_MODE_AW,		/* Absolute word */
  23.164 +	EA_MODE_AL,		/* Absolute long */
  23.165 +	EA_MODE_PCDI,	/* Program counter indirect with displacement */
  23.166 +	EA_MODE_PCIX,	/* Program counter indirect with index */
  23.167 +	EA_MODE_I		/* Immediate */
  23.168 +};
  23.169 +
  23.170 +
  23.171 +/* Everything we need to know about an opcode */
  23.172 +typedef struct
  23.173 +{
  23.174 +	char name[MAX_NAME_LENGTH];           /* opcode handler name */
  23.175 +	unsigned int size;                    /* Size of operation */
  23.176 +	char spec_proc[MAX_SPEC_PROC_LENGTH]; /* Special processing mode */
  23.177 +	char spec_ea[MAX_SPEC_EA_LENGTH];     /* Specified effective addressing mode */
  23.178 +	unsigned int bits;                    /* Number of significant bits (used for sorting the table) */
  23.179 +	unsigned int op_mask;                 /* Mask to apply for matching an opcode to a handler */
  23.180 +	unsigned int op_match;                /* Value to match after masking */
  23.181 +	char ea_allowed[EA_ALLOWED_LENGTH];   /* Effective addressing modes allowed */
  23.182 +	char cpu_mode[NUM_CPUS];              /* User or supervisor mode */
  23.183 +	char cpus[NUM_CPUS+1];                /* Allowed CPUs */
  23.184 +	unsigned int cycles[NUM_CPUS];        /* cycles for 000, 010, 020 */
  23.185 +} opcode_struct;
  23.186 +
  23.187 +
  23.188 +/* All modifications necessary for a specific EA mode of an instruction */
  23.189 +typedef struct
  23.190 +{
  23.191 +	char* fname_add;
  23.192 +	char* ea_add;
  23.193 +	unsigned int mask_add;
  23.194 +	unsigned int match_add;
  23.195 +} ea_info_struct;
  23.196 +
  23.197 +
  23.198 +/* Holds the body of a function */
  23.199 +typedef struct
  23.200 +{
  23.201 +	char body[MAX_BODY_LENGTH][MAX_LINE_LENGTH+1];
  23.202 +	int length;
  23.203 +} body_struct;
  23.204 +
  23.205 +
  23.206 +/* Holds a sequence of search / replace strings */
  23.207 +typedef struct
  23.208 +{
  23.209 +	char replace[MAX_REPLACE_LENGTH][2][MAX_LINE_LENGTH+1];
  23.210 +	int length;
  23.211 +} replace_struct;
  23.212 +
  23.213 +
  23.214 +/* Function Prototypes */
  23.215 +void error_exit(char* fmt, ...);
  23.216 +void perror_exit(char* fmt, ...);
  23.217 +int check_strsncpy(char* dst, char* src, int maxlength);
  23.218 +int check_atoi(char* str, int *result);
  23.219 +int skip_spaces(char* str);
  23.220 +int num_bits(int value);
  23.221 +int atoh(char* buff);
  23.222 +int fgetline(char* buff, int nchars, FILE* file);
  23.223 +int get_oper_cycles(opcode_struct* op, int ea_mode, int cpu_type);
  23.224 +opcode_struct* find_opcode(char* name, int size, char* spec_proc, char* spec_ea);
  23.225 +opcode_struct* find_illegal_opcode(void);
  23.226 +int extract_opcode_info(char* src, char* name, int* size, char* spec_proc, char* spec_ea);
  23.227 +void add_replace_string(replace_struct* replace, char* search_str, char* replace_str);
  23.228 +void write_body(FILE* filep, body_struct* body, replace_struct* replace);
  23.229 +void get_base_name(char* base_name, opcode_struct* op);
  23.230 +void write_prototype(FILE* filep, char* base_name);
  23.231 +void write_function_name(FILE* filep, char* base_name);
  23.232 +void add_opcode_output_table_entry(opcode_struct* op, char* name);
  23.233 +static int DECL_SPEC compare_nof_true_bits(const void* aptr, const void* bptr);
  23.234 +void print_opcode_output_table(FILE* filep);
  23.235 +void write_table_entry(FILE* filep, opcode_struct* op);
  23.236 +void set_opcode_struct(opcode_struct* src, opcode_struct* dst, int ea_mode);
  23.237 +void generate_opcode_handler(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* opinfo, int ea_mode);
  23.238 +void generate_opcode_ea_variants(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* op);
  23.239 +void generate_opcode_cc_variants(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* op_in, int offset);
  23.240 +void process_opcode_handlers(void);
  23.241 +void populate_table(void);
  23.242 +void read_insert(char* insert);
  23.243 +
  23.244 +
  23.245 +
  23.246 +/* ======================================================================== */
  23.247 +/* ================================= DATA ================================= */
  23.248 +/* ======================================================================== */
  23.249 +
  23.250 +/* Name of the input file */
  23.251 +char g_input_filename[MAX_PATH] = FILENAME_INPUT;
  23.252 +
  23.253 +/* File handles */
  23.254 +FILE* g_input_file = NULL;
  23.255 +FILE* g_prototype_file = NULL;
  23.256 +FILE* g_table_file = NULL;
  23.257 +FILE* g_ops_ac_file = NULL;
  23.258 +FILE* g_ops_dm_file = NULL;
  23.259 +FILE* g_ops_nz_file = NULL;
  23.260 +
  23.261 +int g_num_functions = 0;  /* Number of functions processed */
  23.262 +int g_num_primitives = 0; /* Number of function primitives read */
  23.263 +int g_line_number = 1;    /* Current line number */
  23.264 +
  23.265 +/* Opcode handler table */
  23.266 +opcode_struct g_opcode_input_table[MAX_OPCODE_INPUT_TABLE_LENGTH];
  23.267 +
  23.268 +opcode_struct g_opcode_output_table[MAX_OPCODE_OUTPUT_TABLE_LENGTH];
  23.269 +int g_opcode_output_table_length = 0;
  23.270 +
  23.271 +ea_info_struct g_ea_info_table[13] =
  23.272 +{/* fname    ea        mask  match */
  23.273 +	{"",     "",       0x00, 0x00}, /* EA_MODE_NONE */
  23.274 +	{"ai",   "AY_AI",  0x38, 0x10}, /* EA_MODE_AI   */
  23.275 +	{"pi",   "AY_PI",  0x38, 0x18}, /* EA_MODE_PI   */
  23.276 +	{"pi7",  "A7_PI",  0x3f, 0x1f}, /* EA_MODE_PI7  */
  23.277 +	{"pd",   "AY_PD",  0x38, 0x20}, /* EA_MODE_PD   */
  23.278 +	{"pd7",  "A7_PD",  0x3f, 0x27}, /* EA_MODE_PD7  */
  23.279 +	{"di",   "AY_DI",  0x38, 0x28}, /* EA_MODE_DI   */
  23.280 +	{"ix",   "AY_IX",  0x38, 0x30}, /* EA_MODE_IX   */
  23.281 +	{"aw",   "AW",     0x3f, 0x38}, /* EA_MODE_AW   */
  23.282 +	{"al",   "AL",     0x3f, 0x39}, /* EA_MODE_AL   */
  23.283 +	{"pcdi", "PCDI",   0x3f, 0x3a}, /* EA_MODE_PCDI */
  23.284 +	{"pcix", "PCIX",   0x3f, 0x3b}, /* EA_MODE_PCIX */
  23.285 +	{"i",    "I",      0x3f, 0x3c}, /* EA_MODE_I    */
  23.286 +};
  23.287 +
  23.288 +
  23.289 +char* g_cc_table[16][2] =
  23.290 +{
  23.291 +	{ "t",  "T"}, /* 0000 */
  23.292 +	{ "f",  "F"}, /* 0001 */
  23.293 +	{"hi", "HI"}, /* 0010 */
  23.294 +	{"ls", "LS"}, /* 0011 */
  23.295 +	{"cc", "CC"}, /* 0100 */
  23.296 +	{"cs", "CS"}, /* 0101 */
  23.297 +	{"ne", "NE"}, /* 0110 */
  23.298 +	{"eq", "EQ"}, /* 0111 */
  23.299 +	{"vc", "VC"}, /* 1000 */
  23.300 +	{"vs", "VS"}, /* 1001 */
  23.301 +	{"pl", "PL"}, /* 1010 */
  23.302 +	{"mi", "MI"}, /* 1011 */
  23.303 +	{"ge", "GE"}, /* 1100 */
  23.304 +	{"lt", "LT"}, /* 1101 */
  23.305 +	{"gt", "GT"}, /* 1110 */
  23.306 +	{"le", "LE"}, /* 1111 */
  23.307 +};
  23.308 +
  23.309 +/* size to index translator (0 -> 0, 8 and 16 -> 1, 32 -> 2) */
  23.310 +int g_size_select_table[33] =
  23.311 +{
  23.312 +	0,												/* unsized */
  23.313 +	0, 0, 0, 0, 0, 0, 0, 1,							/*    8    */
  23.314 +	0, 0, 0, 0, 0, 0, 0, 1,							/*   16    */
  23.315 +	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2	/*   32    */
  23.316 +};
  23.317 +
  23.318 +/* Extra cycles required for certain EA modes */
  23.319 +int g_ea_cycle_table[13][NUM_CPUS][3] =
  23.320 +{/*       000           010           020   */
  23.321 +	{{ 0,  0,  0}, { 0,  0,  0}, { 0,  0,  0}}, /* EA_MODE_NONE */
  23.322 +	{{ 0,  4,  8}, { 0,  4,  8}, { 0,  4,  4}}, /* EA_MODE_AI   */
  23.323 +	{{ 0,  4,  8}, { 0,  4,  8}, { 0,  4,  4}}, /* EA_MODE_PI   */
  23.324 +	{{ 0,  4,  8}, { 0,  4,  8}, { 0,  4,  4}}, /* EA_MODE_PI7  */
  23.325 +	{{ 0,  6, 10}, { 0,  6, 10}, { 0,  5,  5}}, /* EA_MODE_PD   */
  23.326 +	{{ 0,  6, 10}, { 0,  6, 10}, { 0,  5,  5}}, /* EA_MODE_PD7  */
  23.327 +	{{ 0,  8, 12}, { 0,  8, 12}, { 0,  5,  5}}, /* EA_MODE_DI   */
  23.328 +	{{ 0, 10, 14}, { 0, 10, 14}, { 0,  7,  7}}, /* EA_MODE_IX   */
  23.329 +	{{ 0,  8, 12}, { 0,  8, 12}, { 0,  4,  4}}, /* EA_MODE_AW   */
  23.330 +	{{ 0, 12, 16}, { 0, 12, 16}, { 0,  4,  4}}, /* EA_MODE_AL   */
  23.331 +	{{ 0,  8, 12}, { 0,  8, 12}, { 0,  5,  5}}, /* EA_MODE_PCDI */
  23.332 +	{{ 0, 10, 14}, { 0, 10, 14}, { 0,  7,  7}}, /* EA_MODE_PCIX */
  23.333 +	{{ 0,  4,  8}, { 0,  4,  8}, { 0,  2,  4}}, /* EA_MODE_I    */
  23.334 +};
  23.335 +
  23.336 +/* Extra cycles for JMP instruction (000, 010) */
  23.337 +int g_jmp_cycle_table[13] =
  23.338 +{
  23.339 +	 0, /* EA_MODE_NONE */
  23.340 +	 4, /* EA_MODE_AI   */
  23.341 +	 0, /* EA_MODE_PI   */
  23.342 +	 0, /* EA_MODE_PI7  */
  23.343 +	 0, /* EA_MODE_PD   */
  23.344 +	 0, /* EA_MODE_PD7  */
  23.345 +	 6, /* EA_MODE_DI   */
  23.346 +	 8, /* EA_MODE_IX   */
  23.347 +	 6, /* EA_MODE_AW   */
  23.348 +	 8, /* EA_MODE_AL   */
  23.349 +	 6, /* EA_MODE_PCDI */
  23.350 +	10, /* EA_MODE_PCIX */
  23.351 +	 0, /* EA_MODE_I    */
  23.352 +};
  23.353 +
  23.354 +/* Extra cycles for JSR instruction (000, 010) */
  23.355 +int g_jsr_cycle_table[13] =
  23.356 +{
  23.357 +	 0, /* EA_MODE_NONE */
  23.358 +	 4, /* EA_MODE_AI   */
  23.359 +	 0, /* EA_MODE_PI   */
  23.360 +	 0, /* EA_MODE_PI7  */
  23.361 +	 0, /* EA_MODE_PD   */
  23.362 +	 0, /* EA_MODE_PD7  */
  23.363 +	 6, /* EA_MODE_DI   */
  23.364 +	10, /* EA_MODE_IX   */
  23.365 +	 6, /* EA_MODE_AW   */
  23.366 +	 8, /* EA_MODE_AL   */
  23.367 +	 6, /* EA_MODE_PCDI */
  23.368 +	10, /* EA_MODE_PCIX */
  23.369 +	 0, /* EA_MODE_I    */
  23.370 +};
  23.371 +
  23.372 +/* Extra cycles for LEA instruction (000, 010) */
  23.373 +int g_lea_cycle_table[13] =
  23.374 +{
  23.375 +	 0, /* EA_MODE_NONE */
  23.376 +	 4, /* EA_MODE_AI   */
  23.377 +	 0, /* EA_MODE_PI   */
  23.378 +	 0, /* EA_MODE_PI7  */
  23.379 +	 0, /* EA_MODE_PD   */
  23.380 +	 0, /* EA_MODE_PD7  */
  23.381 +	 8, /* EA_MODE_DI   */
  23.382 +	12, /* EA_MODE_IX   */
  23.383 +	 8, /* EA_MODE_AW   */
  23.384 +	12, /* EA_MODE_AL   */
  23.385 +	 8, /* EA_MODE_PCDI */
  23.386 +	12, /* EA_MODE_PCIX */
  23.387 +	 0, /* EA_MODE_I    */
  23.388 +};
  23.389 +
  23.390 +/* Extra cycles for PEA instruction (000, 010) */
  23.391 +int g_pea_cycle_table[13] =
  23.392 +{
  23.393 +	 0, /* EA_MODE_NONE */
  23.394 +	 4, /* EA_MODE_AI   */
  23.395 +	 0, /* EA_MODE_PI   */
  23.396 +	 0, /* EA_MODE_PI7  */
  23.397 +	 0, /* EA_MODE_PD   */
  23.398 +	 0, /* EA_MODE_PD7  */
  23.399 +	10, /* EA_MODE_DI   */
  23.400 +	14, /* EA_MODE_IX   */
  23.401 +	10, /* EA_MODE_AW   */
  23.402 +	14, /* EA_MODE_AL   */
  23.403 +	10, /* EA_MODE_PCDI */
  23.404 +	14, /* EA_MODE_PCIX */
  23.405 +	 0, /* EA_MODE_I    */
  23.406 +};
  23.407 +
  23.408 +/* Extra cycles for MOVES instruction (010) */
  23.409 +int g_moves_cycle_table[13][3] =
  23.410 +{
  23.411 +	{ 0,  0,  0}, /* EA_MODE_NONE */
  23.412 +	{ 0,  4,  6}, /* EA_MODE_AI   */
  23.413 +	{ 0,  4,  6}, /* EA_MODE_PI   */
  23.414 +	{ 0,  4,  6}, /* EA_MODE_PI7  */
  23.415 +	{ 0,  6, 12}, /* EA_MODE_PD   */
  23.416 +	{ 0,  6, 12}, /* EA_MODE_PD7  */
  23.417 +	{ 0, 12, 16}, /* EA_MODE_DI   */
  23.418 +	{ 0, 16, 20}, /* EA_MODE_IX   */
  23.419 +	{ 0, 12, 16}, /* EA_MODE_AW   */
  23.420 +	{ 0, 16, 20}, /* EA_MODE_AL   */
  23.421 +	{ 0,  0,  0}, /* EA_MODE_PCDI */
  23.422 +	{ 0,  0,  0}, /* EA_MODE_PCIX */
  23.423 +	{ 0,  0,  0}, /* EA_MODE_I    */
  23.424 +};
  23.425 +
  23.426 +/* Extra cycles for CLR instruction (010) */
  23.427 +int g_clr_cycle_table[13][3] =
  23.428 +{
  23.429 +	{ 0,  0,  0}, /* EA_MODE_NONE */
  23.430 +	{ 0,  4,  6}, /* EA_MODE_AI   */
  23.431 +	{ 0,  4,  6}, /* EA_MODE_PI   */
  23.432 +	{ 0,  4,  6}, /* EA_MODE_PI7  */
  23.433 +	{ 0,  6,  8}, /* EA_MODE_PD   */
  23.434 +	{ 0,  6,  8}, /* EA_MODE_PD7  */
  23.435 +	{ 0,  8, 10}, /* EA_MODE_DI   */
  23.436 +	{ 0, 10, 14}, /* EA_MODE_IX   */
  23.437 +	{ 0,  8, 10}, /* EA_MODE_AW   */
  23.438 +	{ 0, 10, 14}, /* EA_MODE_AL   */
  23.439 +	{ 0,  0,  0}, /* EA_MODE_PCDI */
  23.440 +	{ 0,  0,  0}, /* EA_MODE_PCIX */
  23.441 +	{ 0,  0,  0}, /* EA_MODE_I    */
  23.442 +};
  23.443 +
  23.444 +
  23.445 +
  23.446 +/* ======================================================================== */
  23.447 +/* =========================== UTILITY FUNCTIONS ========================== */
  23.448 +/* ======================================================================== */
  23.449 +
  23.450 +/* Print an error message and exit with status error */
  23.451 +void error_exit(char* fmt, ...)
  23.452 +{
  23.453 +	va_list args;
  23.454 +	fprintf(stderr, "In %s, near or on line %d:\n\t", g_input_filename, g_line_number);
  23.455 +	va_start(args, fmt);
  23.456 +	vfprintf(stderr, fmt, args);
  23.457 +	va_end(args);
  23.458 +	fprintf(stderr, "\n");
  23.459 +
  23.460 +	if(g_prototype_file) fclose(g_prototype_file);
  23.461 +	if(g_table_file) fclose(g_table_file);
  23.462 +	if(g_ops_ac_file) fclose(g_ops_ac_file);
  23.463 +	if(g_ops_dm_file) fclose(g_ops_dm_file);
  23.464 +	if(g_ops_nz_file) fclose(g_ops_nz_file);
  23.465 +	if(g_input_file) fclose(g_input_file);
  23.466 +
  23.467 +	exit(EXIT_FAILURE);
  23.468 +}
  23.469 +
  23.470 +/* Print an error message, call perror(), and exit with status error */
  23.471 +void perror_exit(char* fmt, ...)
  23.472 +{
  23.473 +	va_list args;
  23.474 +	va_start(args, fmt);
  23.475 +	vfprintf(stderr, fmt, args);
  23.476 +	va_end(args);
  23.477 +	perror("");
  23.478 +
  23.479 +	if(g_prototype_file) fclose(g_prototype_file);
  23.480 +	if(g_table_file) fclose(g_table_file);
  23.481 +	if(g_ops_ac_file) fclose(g_ops_ac_file);
  23.482 +	if(g_ops_dm_file) fclose(g_ops_dm_file);
  23.483 +	if(g_ops_nz_file) fclose(g_ops_nz_file);
  23.484 +	if(g_input_file) fclose(g_input_file);
  23.485 +
  23.486 +	exit(EXIT_FAILURE);
  23.487 +}
  23.488 +
  23.489 +
  23.490 +/* copy until 0 or space and exit with error if we read too far */
  23.491 +int check_strsncpy(char* dst, char* src, int maxlength)
  23.492 +{
  23.493 +	char* p = dst;
  23.494 +	while(*src && *src != ' ')
  23.495 +	{
  23.496 +		*p++ = *src++;
  23.497 +		if(p - dst > maxlength)
  23.498 +			error_exit("Field too long");
  23.499 +	}
  23.500 +	*p = 0;
  23.501 +	return p - dst;
  23.502 +}
  23.503 +
  23.504 +/* copy until 0 or specified character and exit with error if we read too far */
  23.505 +int check_strcncpy(char* dst, char* src, char delim, int maxlength)
  23.506 +{
  23.507 +	char* p = dst;
  23.508 +	while(*src && *src != delim)
  23.509 +	{
  23.510 +		*p++ = *src++;
  23.511 +		if(p - dst > maxlength)
  23.512 +			error_exit("Field too long");
  23.513 +	}
  23.514 +	*p = 0;
  23.515 +	return p - dst;
  23.516 +}
  23.517 +
  23.518 +/* convert ascii to integer and exit with error if we find invalid data */
  23.519 +int check_atoi(char* str, int *result)
  23.520 +{
  23.521 +	int accum = 0;
  23.522 +	char* p = str;
  23.523 +	while(*p >= '0' && *p <= '9')
  23.524 +	{
  23.525 +		accum *= 10;
  23.526 +		accum += *p++ - '0';
  23.527 +	}
  23.528 +	if(*p != ' ' && *p != 0)
  23.529 +		error_exit("Malformed integer value (%c)", *p);
  23.530 +	*result = accum;
  23.531 +	return p - str;
  23.532 +}
  23.533 +
  23.534 +/* Skip past spaces in a string */
  23.535 +int skip_spaces(char* str)
  23.536 +{
  23.537 +	char* p = str;
  23.538 +
  23.539 +	while(*p == ' ')
  23.540 +		p++;
  23.541 +
  23.542 +	return p - str;
  23.543 +}
  23.544 +
  23.545 +/* Count the number of set bits in a value */
  23.546 +int num_bits(int value)
  23.547 +{
  23.548 +    value = ((value & 0xaaaa) >> 1) + (value & 0x5555);
  23.549 +    value = ((value & 0xcccc) >> 2) + (value & 0x3333);
  23.550 +    value = ((value & 0xf0f0) >> 4) + (value & 0x0f0f);
  23.551 +    value = ((value & 0xff00) >> 8) + (value & 0x00ff);
  23.552 +	return value;
  23.553 +}
  23.554 +
  23.555 +/* Convert a hex value written in ASCII */
  23.556 +int atoh(char* buff)
  23.557 +{
  23.558 +	int accum = 0;
  23.559 +
  23.560 +	for(;;buff++)
  23.561 +	{
  23.562 +		if(*buff >= '0' && *buff <= '9')
  23.563 +		{
  23.564 +			accum <<= 4;
  23.565 +			accum += *buff - '0';
  23.566 +		}
  23.567 +		else if(*buff >= 'a' && *buff <= 'f')
  23.568 +		{
  23.569 +			accum <<= 4;
  23.570 +			accum += *buff - 'a' + 10;
  23.571 +		}
  23.572 +		else break;
  23.573 +	}
  23.574 +	return accum;
  23.575 +}
  23.576 +
  23.577 +/* Get a line of text from a file, discarding any end-of-line characters */
  23.578 +int fgetline(char* buff, int nchars, FILE* file)
  23.579 +{
  23.580 +	int length;
  23.581 +
  23.582 +	if(fgets(buff, nchars, file) == NULL)
  23.583 +		return -1;
  23.584 +	if(buff[0] == '\r')
  23.585 +		memcpy(buff, buff + 1, nchars - 1);
  23.586 +
  23.587 +	length = strlen(buff);
  23.588 +	while(length && (buff[length-1] == '\r' || buff[length-1] == '\n'))
  23.589 +		length--;
  23.590 +	buff[length] = 0;
  23.591 +	g_line_number++;
  23.592 +
  23.593 +	return length;
  23.594 +}
  23.595 +
  23.596 +
  23.597 +
  23.598 +/* ======================================================================== */
  23.599 +/* =========================== HELPER FUNCTIONS =========================== */
  23.600 +/* ======================================================================== */
  23.601 +
  23.602 +/* Calculate the number of cycles an opcode requires */
  23.603 +int get_oper_cycles(opcode_struct* op, int ea_mode, int cpu_type)
  23.604 +{
  23.605 +	int size = g_size_select_table[op->size];
  23.606 +
  23.607 +	if(op->cpus[cpu_type] == '.')
  23.608 +		return 0;
  23.609 +
  23.610 +	if(cpu_type < CPU_TYPE_020)
  23.611 +	{
  23.612 +		if(cpu_type == CPU_TYPE_010)
  23.613 +		{
  23.614 +			if(strcmp(op->name, "moves") == 0)
  23.615 +				return op->cycles[cpu_type] + g_moves_cycle_table[ea_mode][size];
  23.616 +			if(strcmp(op->name, "clr") == 0)
  23.617 +				return op->cycles[cpu_type] + g_clr_cycle_table[ea_mode][size];
  23.618 +		}
  23.619 +
  23.620 +		/* ASG: added these cases -- immediate modes take 2 extra cycles here */
  23.621 +		if(cpu_type == CPU_TYPE_000 && ea_mode == EA_MODE_I &&
  23.622 +		   ((strcmp(op->name, "add") == 0 && strcmp(op->spec_proc, "er") == 0) ||
  23.623 +			strcmp(op->name, "adda")   == 0                                    ||
  23.624 +			(strcmp(op->name, "and") == 0 && strcmp(op->spec_proc, "er") == 0) ||
  23.625 +			(strcmp(op->name, "or") == 0 && strcmp(op->spec_proc, "er") == 0)  ||
  23.626 +			(strcmp(op->name, "sub") == 0 && strcmp(op->spec_proc, "er") == 0) ||
  23.627 +			strcmp(op->name, "suba")   == 0))
  23.628 +			return op->cycles[cpu_type] + g_ea_cycle_table[ea_mode][cpu_type][size] + 2;
  23.629 +
  23.630 +		if(strcmp(op->name, "jmp") == 0)
  23.631 +			return op->cycles[cpu_type] + g_jmp_cycle_table[ea_mode];
  23.632 +		if(strcmp(op->name, "jsr") == 0)
  23.633 +			return op->cycles[cpu_type] + g_jsr_cycle_table[ea_mode];
  23.634 +		if(strcmp(op->name, "lea") == 0)
  23.635 +			return op->cycles[cpu_type] + g_lea_cycle_table[ea_mode];
  23.636 +		if(strcmp(op->name, "pea") == 0)
  23.637 +			return op->cycles[cpu_type] + g_pea_cycle_table[ea_mode];
  23.638 +	}
  23.639 +	return op->cycles[cpu_type] + g_ea_cycle_table[ea_mode][cpu_type][size];
  23.640 +}
  23.641 +
  23.642 +/* Find an opcode in the opcode handler list */
  23.643 +opcode_struct* find_opcode(char* name, int size, char* spec_proc, char* spec_ea)
  23.644 +{
  23.645 +	opcode_struct* op;
  23.646 +
  23.647 +
  23.648 +	for(op = g_opcode_input_table;op->name != NULL;op++)
  23.649 +	{
  23.650 +		if(	strcmp(name, op->name) == 0 &&
  23.651 +			(size == (int)op->size) &&
  23.652 +			strcmp(spec_proc, op->spec_proc) == 0 &&
  23.653 +			strcmp(spec_ea, op->spec_ea) == 0)
  23.654 +				return op;
  23.655 +	}
  23.656 +	return NULL;
  23.657 +}
  23.658 +
  23.659 +/* Specifically find the illegal opcode in the list */
  23.660 +opcode_struct* find_illegal_opcode(void)
  23.661 +{
  23.662 +	opcode_struct* op;
  23.663 +
  23.664 +	for(op = g_opcode_input_table;op->name != NULL;op++)
  23.665 +	{
  23.666 +		if(strcmp(op->name, "illegal") == 0)
  23.667 +			return op;
  23.668 +	}
  23.669 +	return NULL;
  23.670 +}
  23.671 +
  23.672 +/* Parse an opcode handler name */
  23.673 +int extract_opcode_info(char* src, char* name, int* size, char* spec_proc, char* spec_ea)
  23.674 +{
  23.675 +	char* ptr = strstr(src, ID_OPHANDLER_NAME);
  23.676 +
  23.677 +	if(ptr == NULL)
  23.678 +		return 0;
  23.679 +
  23.680 +	ptr += strlen(ID_OPHANDLER_NAME) + 1;
  23.681 +
  23.682 +	ptr += check_strcncpy(name, ptr, ',', MAX_NAME_LENGTH);
  23.683 +	if(*ptr != ',') return 0;
  23.684 +	ptr++;
  23.685 +	ptr += skip_spaces(ptr);
  23.686 +
  23.687 +	*size = atoi(ptr);
  23.688 +	ptr = strstr(ptr, ",");
  23.689 +	if(ptr == NULL) return 0;
  23.690 +    ptr++;
  23.691 +	ptr += skip_spaces(ptr);
  23.692 +
  23.693 +	ptr += check_strcncpy(spec_proc, ptr, ',', MAX_SPEC_PROC_LENGTH);
  23.694 +	if(*ptr != ',') return 0;
  23.695 +	ptr++;
  23.696 +	ptr += skip_spaces(ptr);
  23.697 +
  23.698 +	ptr += check_strcncpy(spec_ea, ptr, ')', MAX_SPEC_EA_LENGTH);
  23.699 +	if(*ptr != ')') return 0;
  23.700 +
  23.701 +	return 1;
  23.702 +}
  23.703 +
  23.704 +
  23.705 +/* Add a search/replace pair to a replace structure */
  23.706 +void add_replace_string(replace_struct* replace, char* search_str, char* replace_str)
  23.707 +{
  23.708 +	if(replace->length >= MAX_REPLACE_LENGTH)
  23.709 +		error_exit("overflow in replace structure");
  23.710 +
  23.711 +	strcpy(replace->replace[replace->length][0], search_str);
  23.712 +	strcpy(replace->replace[replace->length++][1], replace_str);
  23.713 +}
  23.714 +
  23.715 +/* Write a function body while replacing any selected strings */
  23.716 +void write_body(FILE* filep, body_struct* body, replace_struct* replace)
  23.717 +{
  23.718 +	int i;
  23.719 +	int j;
  23.720 +	char* ptr;
  23.721 +	char output[MAX_LINE_LENGTH+1];
  23.722 +	char temp_buff[MAX_LINE_LENGTH+1];
  23.723 +	int found;
  23.724 +
  23.725 +	for(i=0;i<body->length;i++)
  23.726 +	{
  23.727 +		strcpy(output, body->body[i]);
  23.728 +		/* Check for the base directive header */
  23.729 +		if(strstr(output, ID_BASE) != NULL)
  23.730 +		{
  23.731 +			/* Search for any text we need to replace */
  23.732 +			found = 0;
  23.733 +			for(j=0;j<replace->length;j++)
  23.734 +			{
  23.735 +				ptr = strstr(output, replace->replace[j][0]);
  23.736 +				if(ptr)
  23.737 +				{
  23.738 +					/* We found something to replace */
  23.739 +					found = 1;
  23.740 +					strcpy(temp_buff, ptr+strlen(replace->replace[j][0]));
  23.741 +					strcpy(ptr, replace->replace[j][1]);
  23.742 +					strcat(ptr, temp_buff);
  23.743 +				}
  23.744 +			}
  23.745 +			/* Found a directive with no matching replace string */
  23.746 +			if(!found)
  23.747 +				error_exit("Unknown " ID_BASE " directive");
  23.748 +		}
  23.749 +		fprintf(filep, "%s\n", output);
  23.750 +	}
  23.751 +	fprintf(filep, "\n\n");
  23.752 +}
  23.753 +
  23.754 +/* Generate a base function name from an opcode struct */
  23.755 +void get_base_name(char* base_name, opcode_struct* op)
  23.756 +{
  23.757 +	sprintf(base_name, "m68k_op_%s", op->name);
  23.758 +	if(op->size > 0)
  23.759 +		sprintf(base_name+strlen(base_name), "_%d", op->size);
  23.760 +	if(strcmp(op->spec_proc, UNSPECIFIED) != 0)
  23.761 +		sprintf(base_name+strlen(base_name), "_%s", op->spec_proc);
  23.762 +	if(strcmp(op->spec_ea, UNSPECIFIED) != 0)
  23.763 +		sprintf(base_name+strlen(base_name), "_%s", op->spec_ea);
  23.764 +}
  23.765 +
  23.766 +/* Write the prototype of an opcode handler function */
  23.767 +void write_prototype(FILE* filep, char* base_name)
  23.768 +{
  23.769 +	fprintf(filep, "void %s(void);\n", base_name);
  23.770 +}
  23.771 +
  23.772 +/* Write the name of an opcode handler function */
  23.773 +void write_function_name(FILE* filep, char* base_name)
  23.774 +{
  23.775 +	fprintf(filep, "void %s(void)\n", base_name);
  23.776 +}
  23.777 +
  23.778 +void add_opcode_output_table_entry(opcode_struct* op, char* name)
  23.779 +{
  23.780 +	opcode_struct* ptr;
  23.781 +	if(g_opcode_output_table_length > MAX_OPCODE_OUTPUT_TABLE_LENGTH)
  23.782 +		error_exit("Opcode output table overflow");
  23.783 +
  23.784 +	ptr = g_opcode_output_table + g_opcode_output_table_length++;
  23.785 +
  23.786 +	*ptr = *op;
  23.787 +	strcpy(ptr->name, name);
  23.788 +	ptr->bits = num_bits(ptr->op_mask);
  23.789 +}
  23.790 +
  23.791 +/*
  23.792 + * Comparison function for qsort()
  23.793 + * For entries with an equal number of set bits in
  23.794 + * the mask compare the match values
  23.795 + */
  23.796 +static int DECL_SPEC compare_nof_true_bits(const void* aptr, const void* bptr)
  23.797 +{
  23.798 +	const opcode_struct *a = aptr, *b = bptr;
  23.799 +	if(a->bits != b->bits)
  23.800 +		return a->bits - b->bits;
  23.801 +	if(a->op_mask != b->op_mask)
  23.802 +		return a->op_mask - b->op_mask;
  23.803 +	return a->op_match - b->op_match;
  23.804 +}
  23.805 +
  23.806 +void print_opcode_output_table(FILE* filep)
  23.807 +{
  23.808 +	int i;
  23.809 +	qsort((void *)g_opcode_output_table, g_opcode_output_table_length, sizeof(g_opcode_output_table[0]), compare_nof_true_bits);
  23.810 +
  23.811 +	for(i=0;i<g_opcode_output_table_length;i++)
  23.812 +		write_table_entry(filep, g_opcode_output_table+i);
  23.813 +}
  23.814 +
  23.815 +/* Write an entry in the opcode handler table */
  23.816 +void write_table_entry(FILE* filep, opcode_struct* op)
  23.817 +{
  23.818 +	int i;
  23.819 +
  23.820 +	fprintf(filep, "\t{%-28s, 0x%04x, 0x%04x, {",
  23.821 +		op->name, op->op_mask, op->op_match);
  23.822 +
  23.823 +	for(i=0;i<NUM_CPUS;i++)
  23.824 +	{
  23.825 +		fprintf(filep, "%3d", op->cycles[i]);
  23.826 +		if(i < NUM_CPUS-1)
  23.827 +			fprintf(filep, ", ");
  23.828 +	}
  23.829 +
  23.830 +	fprintf(filep, "}},\n");
  23.831 +}
  23.832 +
  23.833 +/* Fill out an opcode struct with a specific addressing mode of the source opcode struct */
  23.834 +void set_opcode_struct(opcode_struct* src, opcode_struct* dst, int ea_mode)
  23.835 +{
  23.836 +	int i;
  23.837 +
  23.838 +	*dst = *src;
  23.839 +
  23.840 +	for(i=0;i<NUM_CPUS;i++)
  23.841 +		dst->cycles[i] = get_oper_cycles(dst, ea_mode, i);
  23.842 +	if(strcmp(dst->spec_ea, UNSPECIFIED) == 0 && ea_mode != EA_MODE_NONE)
  23.843 +		sprintf(dst->spec_ea, "%s", g_ea_info_table[ea_mode].fname_add);
  23.844 +	dst->op_mask |= g_ea_info_table[ea_mode].mask_add;
  23.845 +	dst->op_match |= g_ea_info_table[ea_mode].match_add;
  23.846 +}
  23.847 +
  23.848 +
  23.849 +/* Generate a final opcode handler from the provided data */
  23.850 +void generate_opcode_handler(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* opinfo, int ea_mode)
  23.851 +{
  23.852 +	char str[MAX_LINE_LENGTH+1];
  23.853 +	opcode_struct* op = malloc(sizeof(opcode_struct));
  23.854 +
  23.855 +	/* Set the opcode structure and write the tables, prototypes, etc */
  23.856 +	set_opcode_struct(opinfo, op, ea_mode);
  23.857 +	get_base_name(str, op);
  23.858 +	write_prototype(g_prototype_file, str);
  23.859 +	add_opcode_output_table_entry(op, str);
  23.860 +	write_function_name(filep, str);
  23.861 +
  23.862 +	/* Add any replace strings needed */
  23.863 +	if(ea_mode != EA_MODE_NONE)
  23.864 +	{
  23.865 +		sprintf(str, "EA_%s_8()", g_ea_info_table[ea_mode].ea_add);
  23.866 +		add_replace_string(replace, ID_OPHANDLER_EA_AY_8, str);
  23.867 +		sprintf(str, "EA_%s_16()", g_ea_info_table[ea_mode].ea_add);
  23.868 +		add_replace_string(replace, ID_OPHANDLER_EA_AY_16, str);
  23.869 +		sprintf(str, "EA_%s_32()", g_ea_info_table[ea_mode].ea_add);
  23.870 +		add_replace_string(replace, ID_OPHANDLER_EA_AY_32, str);
  23.871 +		sprintf(str, "OPER_%s_8()", g_ea_info_table[ea_mode].ea_add);
  23.872 +		add_replace_string(replace, ID_OPHANDLER_OPER_AY_8, str);
  23.873 +		sprintf(str, "OPER_%s_16()", g_ea_info_table[ea_mode].ea_add);
  23.874 +		add_replace_string(replace, ID_OPHANDLER_OPER_AY_16, str);
  23.875 +		sprintf(str, "OPER_%s_32()", g_ea_info_table[ea_mode].ea_add);
  23.876 +		add_replace_string(replace, ID_OPHANDLER_OPER_AY_32, str);
  23.877 +	}
  23.878 +
  23.879 +	/* Now write the function body with the selected replace strings */
  23.880 +	write_body(filep, body, replace);
  23.881 +	g_num_functions++;
  23.882 +	free(op);
  23.883 +}
  23.884 +
  23.885 +/* Generate opcode variants based on available addressing modes */
  23.886 +void generate_opcode_ea_variants(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* op)
  23.887 +{
  23.888 +	int old_length = replace->length;
  23.889 +
  23.890 +	/* No ea modes available for this opcode */
  23.891 +	if(HAS_NO_EA_MODE(op->ea_allowed))
  23.892 +	{
  23.893 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_NONE);
  23.894 +		return;
  23.895 +	}
  23.896 +
  23.897 +	/* Check for and create specific opcodes for each available addressing mode */
  23.898 +	if(HAS_EA_AI(op->ea_allowed))
  23.899 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_AI);
  23.900 +	replace->length = old_length;
  23.901 +	if(HAS_EA_PI(op->ea_allowed))
  23.902 +	{
  23.903 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_PI);
  23.904 +		replace->length = old_length;
  23.905 +		if(op->size == 8)
  23.906 +			generate_opcode_handler(filep, body, replace, op, EA_MODE_PI7);
  23.907 +	}
  23.908 +	replace->length = old_length;
  23.909 +	if(HAS_EA_PD(op->ea_allowed))
  23.910 +	{
  23.911 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_PD);
  23.912 +		replace->length = old_length;
  23.913 +		if(op->size == 8)
  23.914 +			generate_opcode_handler(filep, body, replace, op, EA_MODE_PD7);
  23.915 +	}
  23.916 +	replace->length = old_length;
  23.917 +	if(HAS_EA_DI(op->ea_allowed))
  23.918 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_DI);
  23.919 +	replace->length = old_length;
  23.920 +	if(HAS_EA_IX(op->ea_allowed))
  23.921 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_IX);
  23.922 +	replace->length = old_length;
  23.923 +	if(HAS_EA_AW(op->ea_allowed))
  23.924 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_AW);
  23.925 +	replace->length = old_length;
  23.926 +	if(HAS_EA_AL(op->ea_allowed))
  23.927 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_AL);
  23.928 +	replace->length = old_length;
  23.929 +	if(HAS_EA_PCDI(op->ea_allowed))
  23.930 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_PCDI);
  23.931 +	replace->length = old_length;
  23.932 +	if(HAS_EA_PCIX(op->ea_allowed))
  23.933 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_PCIX);
  23.934 +	replace->length = old_length;
  23.935 +	if(HAS_EA_I(op->ea_allowed))
  23.936 +		generate_opcode_handler(filep, body, replace, op, EA_MODE_I);
  23.937 +	replace->length = old_length;
  23.938 +}
  23.939 +
  23.940 +/* Generate variants of condition code opcodes */
  23.941 +void generate_opcode_cc_variants(FILE* filep, body_struct* body, replace_struct* replace, opcode_struct* op_in, int offset)
  23.942 +{
  23.943 +	char repl[20];
  23.944 +	char replnot[20];
  23.945 +	int i;
  23.946 +	int old_length = replace->length;
  23.947 +	opcode_struct* op = malloc(sizeof(opcode_struct));
  23.948 +
  23.949 +	*op = *op_in;
  23.950 +
  23.951 +	op->op_mask |= 0x0f00;
  23.952 +
  23.953 +	/* Do all condition codes except t and f */
  23.954 +	for(i=2;i<16;i++)
  23.955 +	{
  23.956 +		/* Add replace strings for this condition code */
  23.957 +		sprintf(repl, "COND_%s()", g_cc_table[i][1]);
  23.958 +		sprintf(replnot, "COND_NOT_%s()", g_cc_table[i][1]);
  23.959 +
  23.960 +		add_replace_string(replace, ID_OPHANDLER_CC, repl);
  23.961 +		add_replace_string(replace, ID_OPHANDLER_NOT_CC, replnot);
  23.962 +
  23.963 +		/* Set the new opcode info */
  23.964 +		strcpy(op->name+offset, g_cc_table[i][0]);
  23.965 +
  23.966 +		op->op_match = (op->op_match & 0xf0ff) | (i<<8);
  23.967 +
  23.968 +		/* Generate all opcode variants for this modified opcode */
  23.969 +		generate_opcode_ea_variants(filep, body, replace, op);
  23.970 +		/* Remove the above replace strings */
  23.971 +		replace->length = old_length;
  23.972 +	}
  23.973 +	free(op);
  23.974 +}
  23.975 +
  23.976 +/* Process the opcode handlers section of the input file */
  23.977 +void process_opcode_handlers(void)
  23.978 +{
  23.979 +	FILE* input_file = g_input_file;
  23.980 +	FILE* output_file;
  23.981 +	char func_name[MAX_LINE_LENGTH+1];
  23.982 +	char oper_name[MAX_LINE_LENGTH+1];
  23.983 +	int  oper_size;
  23.984 +	char oper_spec_proc[MAX_LINE_LENGTH+1];
  23.985 +	char oper_spec_ea[MAX_LINE_LENGTH+1];
  23.986 +	opcode_struct* opinfo;
  23.987 +	replace_struct* replace = malloc(sizeof(replace_struct));
  23.988 +	body_struct* body = malloc(sizeof(body_struct));
  23.989 +
  23.990 +
  23.991 +	output_file = g_ops_ac_file;
  23.992 +
  23.993 +	for(;;)
  23.994 +	{
  23.995 +		/* Find the first line of the function */
  23.996 +		func_name[0] = 0;
  23.997 +		while(strstr(func_name, ID_OPHANDLER_NAME) == NULL)
  23.998 +		{
  23.999 +			if(strcmp(func_name, ID_INPUT_SEPARATOR) == 0)
 23.1000 +			{
 23.1001 +				free(replace);
 23.1002 +				free(body);
 23.1003 +				return; /* all done */
 23.1004 +			}
 23.1005 +			if(fgetline(func_name, MAX_LINE_LENGTH, input_file) < 0)
 23.1006 +				error_exit("Premature end of file when getting function name");
 23.1007 +		}
 23.1008 +		/* Get the rest of the function */
 23.1009 +		for(body->length=0;;body->length++)
 23.1010 +		{
 23.1011 +			if(body->length > MAX_BODY_LENGTH)
 23.1012 +				error_exit("Function too long");
 23.1013 +
 23.1014 +			if(fgetline(body->body[body->length], MAX_LINE_LENGTH, input_file) < 0)
 23.1015 +				error_exit("Premature end of file when getting function body");
 23.1016 +
 23.1017 +			if(body->body[body->length][0] == '}')
 23.1018 +			{
 23.1019 +				body->length++;
 23.1020 +				break;
 23.1021 +			}
 23.1022 +		}
 23.1023 +
 23.1024 +		g_num_primitives++;
 23.1025 +
 23.1026 +		/* Extract the function name information */
 23.1027 +		if(!extract_opcode_info(func_name, oper_name, &oper_size, oper_spec_proc, oper_spec_ea))
 23.1028 +			error_exit("Invalid " ID_OPHANDLER_NAME " format");
 23.1029 +
 23.1030 +		/* Find the corresponding table entry */
 23.1031 +		opinfo = find_opcode(oper_name, oper_size, oper_spec_proc, oper_spec_ea);
 23.1032 +		if(opinfo == NULL)
 23.1033 +			error_exit("Unable to find matching table entry for %s", func_name);
 23.1034 +
 23.1035 +        /* Change output files if we pass 'c' or 'n' */
 23.1036 +		if(output_file == g_ops_ac_file && oper_name[0] > 'c')
 23.1037 +			output_file = g_ops_dm_file;
 23.1038 +		else if(output_file == g_ops_dm_file && oper_name[0] > 'm')
 23.1039 +			output_file = g_ops_nz_file;
 23.1040 +
 23.1041 +		replace->length = 0;
 23.1042 +
 23.1043 +		/* Generate opcode variants */
 23.1044 +		if(strcmp(opinfo->name, "bcc") == 0 || strcmp(opinfo->name, "scc") == 0)
 23.1045 +			generate_opcode_cc_variants(output_file, body, replace, opinfo, 1);
 23.1046 +		else if(strcmp(opinfo->name, "dbcc") == 0)
 23.1047 +			generate_opcode_cc_variants(output_file, body, replace, opinfo, 2);
 23.1048 +		else if(strcmp(opinfo->name, "trapcc") == 0)
 23.1049 +			generate_opcode_cc_variants(output_file, body, replace, opinfo, 4);
 23.1050 +		else
 23.1051 +			generate_opcode_ea_variants(output_file, body, replace, opinfo);
 23.1052 +	}
 23.1053 +}
 23.1054 +
 23.1055 +
 23.1056 +/* Populate the opcode handler table from the input file */
 23.1057 +void populate_table(void)
 23.1058 +{
 23.1059 +	char* ptr;
 23.1060 +	char bitpattern[17];
 23.1061 +	opcode_struct* op;
 23.1062 +	char buff[MAX_LINE_LENGTH];
 23.1063 +	int i;
 23.1064 +	int temp;
 23.1065 +
 23.1066 +	buff[0] = 0;
 23.1067 +
 23.1068 +	/* Find the start of the table */
 23.1069 +	while(strcmp(buff, ID_TABLE_START) != 0)
 23.1070 +		if(fgetline(buff, MAX_LINE_LENGTH, g_input_file) < 0)
 23.1071 +			error_exit("Premature EOF while reading table");
 23.1072 +
 23.1073 +	/* Process the entire table */
 23.1074 +	for(op = g_opcode_input_table;;op++)
 23.1075 +	{
 23.1076 +		if(fgetline(buff, MAX_LINE_LENGTH, g_input_file) < 0)
 23.1077 +			error_exit("Premature EOF while reading table");
 23.1078 +		if(strlen(buff) == 0)
 23.1079 +			continue;
 23.1080 +		/* We finish when we find an input separator */
 23.1081 +		if(strcmp(buff, ID_INPUT_SEPARATOR) == 0)
 23.1082 +			break;
 23.1083 +
 23.1084 +		/* Extract the info from the table */
 23.1085 +		ptr = buff;
 23.1086 +
 23.1087 +		/* Name */
 23.1088 +		ptr += skip_spaces(ptr);
 23.1089 +		ptr += check_strsncpy(op->name, ptr, MAX_NAME_LENGTH);
 23.1090 +
 23.1091 +		/* Size */
 23.1092 +		ptr += skip_spaces(ptr);
 23.1093 +		ptr += check_atoi(ptr, &temp);
 23.1094 +		op->size = (unsigned char)temp;
 23.1095 +
 23.1096 +		/* Special processing */
 23.1097 +		ptr += skip_spaces(ptr);
 23.1098 +		ptr += check_strsncpy(op->spec_proc, ptr, MAX_SPEC_PROC_LENGTH);
 23.1099 +
 23.1100 +		/* Specified EA Mode */
 23.1101 +		ptr += skip_spaces(ptr);
 23.1102 +		ptr += check_strsncpy(op->spec_ea, ptr, MAX_SPEC_EA_LENGTH);
 23.1103 +
 23.1104 +		/* Bit Pattern (more processing later) */
 23.1105 +		ptr += skip_spaces(ptr);
 23.1106 +		ptr += check_strsncpy(bitpattern, ptr, 17);
 23.1107 +
 23.1108 +		/* Allowed Addressing Mode List */
 23.1109 +		ptr += skip_spaces(ptr);
 23.1110 +		ptr += check_strsncpy(op->ea_allowed, ptr, EA_ALLOWED_LENGTH);
 23.1111 +
 23.1112 +		/* CPU operating mode (U = user or supervisor, S = supervisor only */
 23.1113 +		ptr += skip_spaces(ptr);
 23.1114 +		for(i=0;i<NUM_CPUS;i++)
 23.1115 +		{
 23.1116 +			op->cpu_mode[i] = *ptr++;
 23.1117 +			ptr += skip_spaces(ptr);
 23.1118 +		}
 23.1119 +
 23.1120 +		/* Allowed CPUs for this instruction */
 23.1121 +		for(i=0;i<NUM_CPUS;i++)
 23.1122 +		{
 23.1123 +			ptr += skip_spaces(ptr);
 23.1124 +			if(*ptr == UNSPECIFIED_CH)
 23.1125 +			{
 23.1126 +				op->cpus[i] = UNSPECIFIED_CH;
 23.1127 +				op->cycles[i] = 0;
 23.1128 +				ptr++;
 23.1129 +			}
 23.1130 +			else
 23.1131 +			{
 23.1132 +				op->cpus[i] = (char)('0' + i);
 23.1133 +				ptr += check_atoi(ptr, &temp);
 23.1134 +				op->cycles[i] = (unsigned char)temp;
 23.1135 +			}
 23.1136 +		}
 23.1137 +
 23.1138 +		/* generate mask and match from bitpattern */
 23.1139 +		op->op_mask = 0;
 23.1140 +		op->op_match = 0;
 23.1141 +		for(i=0;i<16;i++)
 23.1142 +		{
 23.1143 +			op->op_mask |= (bitpattern[i] != '.') << (15-i);
 23.1144 +			op->op_match |= (bitpattern[i] == '1') << (15-i);
 23.1145 +		}
 23.1146 +	}
 23.1147 +	/* Terminate the list */
 23.1148 +	op->name[0] = 0;
 23.1149 +}
 23.1150 +
 23.1151 +/* Read a header or footer insert from the input file */
 23.1152 +void read_insert(char* insert)
 23.1153 +{
 23.1154 +	char* ptr = insert;
 23.1155 +	char* overflow = insert + MAX_INSERT_LENGTH - MAX_LINE_LENGTH;
 23.1156 +	int length;
 23.1157 +	char* first_blank = NULL;
 23.1158 +
 23.1159 +	/* Skip any leading blank lines */
 23.1160 +	for(length = 0;length == 0;length = fgetline(ptr, MAX_LINE_LENGTH, g_input_file))
 23.1161 +		if(ptr >= overflow)
 23.1162 +			error_exit("Buffer overflow reading inserts");
 23.1163 +	if(length < 0)
 23.1164 +		error_exit("Premature EOF while reading inserts");
 23.1165 +
 23.1166 +	/* Advance and append newline */
 23.1167 +	ptr += length;
 23.1168 +	strcpy(ptr++, "\n");
 23.1169 +
 23.1170 +	/* Read until next separator */
 23.1171 +	for(;;)
 23.1172 +	{
 23.1173 +		/* Read a new line */
 23.1174 +		if(ptr >= overflow)
 23.1175 +			error_exit("Buffer overflow reading inserts");
 23.1176 +		if((length = fgetline(ptr, MAX_LINE_LENGTH, g_input_file)) < 0)
 23.1177 +			error_exit("Premature EOF while reading inserts");
 23.1178 +
 23.1179 +		/* Stop if we read a separator */
 23.1180 +		if(strcmp(ptr, ID_INPUT_SEPARATOR) == 0)
 23.1181 +			break;
 23.1182 +
 23.1183 +		/* keep track in case there are trailing blanks */
 23.1184 +		if(length == 0)
 23.1185 +		{
 23.1186 +			if(first_blank == NULL)
 23.1187 +				first_blank = ptr;
 23.1188 +		}
 23.1189 +		else
 23.1190 +			first_blank = NULL;
 23.1191 +
 23.1192 +		/* Advance and append newline */
 23.1193 +		ptr += length;
 23.1194 +		strcpy(ptr++, "\n");
 23.1195 +	}
 23.1196 +
 23.1197 +	/* kill any trailing blank lines */
 23.1198 +	if(first_blank)
 23.1199 +		ptr = first_blank;
 23.1200 +	*ptr = 0;
 23.1201 +}
 23.1202 +
 23.1203 +
 23.1204 +
 23.1205 +/* ======================================================================== */
 23.1206 +/* ============================= MAIN FUNCTION ============================ */
 23.1207 +/* ======================================================================== */
 23.1208 +
 23.1209 +int main(int argc, char **argv)
 23.1210 +{
 23.1211 +	/* File stuff */
 23.1212 +	char output_path[MAX_DIR] = "";
 23.1213 +	char filename[MAX_PATH];
 23.1214 +	/* Section identifier */
 23.1215 +	char section_id[MAX_LINE_LENGTH+1];
 23.1216 +	/* Inserts */
 23.1217 +	char temp_insert[MAX_INSERT_LENGTH+1];
 23.1218 +	char prototype_footer_insert[MAX_INSERT_LENGTH+1];
 23.1219 +	char table_footer_insert[MAX_INSERT_LENGTH+1];
 23.1220 +	char ophandler_footer_insert[MAX_INSERT_LENGTH+1];
 23.1221 +	/* Flags if we've processed certain parts already */
 23.1222 +	int prototype_header_read = 0;
 23.1223 +	int prototype_footer_read = 0;
 23.1224 +	int table_header_read = 0;
 23.1225 +	int table_footer_read = 0;
 23.1226 +	int ophandler_header_read = 0;
 23.1227 +	int ophandler_footer_read = 0;
 23.1228 +	int table_body_read = 0;
 23.1229 +	int ophandler_body_read = 0;
 23.1230 +
 23.1231 +	printf("\n\t\tMusashi v%s 68000, 68010, 68EC020, 68020 emulator\n", g_version);
 23.1232 +	printf("\t\tCopyright 1998-2000 Karl Stenerud (karl@mame.net)\n\n");
 23.1233 +
 23.1234 +	/* Check if output path and source for the input file are given */
 23.1235 +    if(argc > 1)
 23.1236 +	{
 23.1237 +		char *ptr;
 23.1238 +		strcpy(output_path, argv[1]);
 23.1239 +
 23.1240 +		for(ptr = strchr(output_path, '\\'); ptr; ptr = strchr(ptr, '\\'))
 23.1241 +			*ptr = '/';
 23.1242 +        if(output_path[strlen(output_path)-1] != '/')
 23.1243 +			strcat(output_path, "/");
 23.1244 +		if(argc > 2)
 23.1245 +			strcpy(g_input_filename, argv[2]);
 23.1246 +	}
 23.1247 +
 23.1248 +
 23.1249 +	/* Open the files we need */
 23.1250 +	sprintf(filename, "%s%s", output_path, FILENAME_PROTOTYPE);
 23.1251 +	if((g_prototype_file = fopen(filename, "wt")) == NULL)
 23.1252 +		perror_exit("Unable to create prototype file (%s)\n", filename);
 23.1253 +
 23.1254 +	sprintf(filename, "%s%s", output_path, FILENAME_TABLE);
 23.1255 +	if((g_table_file = fopen(filename, "wt")) == NULL)
 23.1256 +		perror_exit("Unable to create table file (%s)\n", filename);
 23.1257 +
 23.1258 +	sprintf(filename, "%s%s", output_path, FILENAME_OPS_AC);
 23.1259 +	if((g_ops_ac_file = fopen(filename, "wt")) == NULL)
 23.1260 +		perror_exit("Unable to create ops ac file (%s)\n", filename);
 23.1261 +
 23.1262 +	sprintf(filename, "%s%s", output_path, FILENAME_OPS_DM);
 23.1263 +	if((g_ops_dm_file = fopen(filename, "wt")) == NULL)
 23.1264 +		perror_exit("Unable to create ops dm file (%s)\n", filename);
 23.1265 +
 23.1266 +	sprintf(filename, "%s%s", output_path, FILENAME_OPS_NZ);
 23.1267 +	if((g_ops_nz_file = fopen(filename, "wt")) == NULL)
 23.1268 +		perror_exit("Unable to create ops nz file (%s)\n", filename);
 23.1269 +
 23.1270 +	if((g_input_file=fopen(g_input_filename, "rt")) == NULL)
 23.1271 +		perror_exit("can't open %s for input", g_input_filename);
 23.1272 +
 23.1273 +
 23.1274 +	/* Get to the first section of the input file */
 23.1275 +	section_id[0] = 0;
 23.1276 +	while(strcmp(section_id, ID_INPUT_SEPARATOR) != 0)
 23.1277 +		if(fgetline(section_id, MAX_LINE_LENGTH, g_input_file) < 0)
 23.1278 +			error_exit("Premature EOF while reading input file");
 23.1279 +
 23.1280 +	/* Now process all sections */
 23.1281 +	for(;;)
 23.1282 +	{
 23.1283 +		if(fgetline(section_id, MAX_LINE_LENGTH, g_input_file) < 0)
 23.1284 +			error_exit("Premature EOF while reading input file");
 23.1285 +		if(strcmp(section_id, ID_PROTOTYPE_HEADER) == 0)
 23.1286 +		{
 23.1287 +			if(prototype_header_read)
 23.1288 +				error_exit("Duplicate prototype header");
 23.1289 +			read_insert(temp_insert);
 23.1290 +			fprintf(g_prototype_file, "%s\n\n", temp_insert);
 23.1291 +			prototype_header_read = 1;
 23.1292 +		}
 23.1293 +		else if(strcmp(section_id, ID_TABLE_HEADER) == 0)
 23.1294 +		{
 23.1295 +			if(table_header_read)
 23.1296 +				error_exit("Duplicate table header");
 23.1297 +			read_insert(temp_insert);
 23.1298 +			fprintf(g_table_file, "%s", temp_insert);
 23.1299 +			table_header_read = 1;
 23.1300 +		}
 23.1301 +		else if(strcmp(section_id, ID_OPHANDLER_HEADER) == 0)
 23.1302 +		{
 23.1303 +			if(ophandler_header_read)
 23.1304 +				error_exit("Duplicate opcode handler header");
 23.1305 +			read_insert(temp_insert);
 23.1306 +			fprintf(g_ops_ac_file, "%s\n\n", temp_insert);
 23.1307 +			fprintf(g_ops_dm_file, "%s\n\n", temp_insert);
 23.1308 +			fprintf(g_ops_nz_file, "%s\n\n", temp_insert);
 23.1309 +			ophandler_header_read = 1;
 23.1310 +		}
 23.1311 +		else if(strcmp(section_id, ID_PROTOTYPE_FOOTER) == 0)
 23.1312 +		{
 23.1313 +			if(prototype_footer_read)
 23.1314 +				error_exit("Duplicate prototype footer");
 23.1315 +			read_insert(prototype_footer_insert);
 23.1316 +			prototype_footer_read = 1;
 23.1317 +		}
 23.1318 +		else if(strcmp(section_id, ID_TABLE_FOOTER) == 0)
 23.1319 +		{
 23.1320 +			if(table_footer_read)
 23.1321 +				error_exit("Duplicate table footer");
 23.1322 +			read_insert(table_footer_insert);
 23.1323 +			table_footer_read = 1;
 23.1324 +		}
 23.1325 +		else if(strcmp(section_id, ID_OPHANDLER_FOOTER) == 0)
 23.1326 +		{
 23.1327 +			if(ophandler_footer_read)
 23.1328 +				error_exit("Duplicate opcode handler footer");
 23.1329 +			read_insert(ophandler_footer_insert);
 23.1330 +			ophandler_footer_read = 1;
 23.1331 +		}
 23.1332 +		else if(strcmp(section_id, ID_TABLE_BODY) == 0)
 23.1333 +		{
 23.1334 +			if(!prototype_header_read)
 23.1335 +				error_exit("Table body encountered before prototype header");
 23.1336 +			if(!table_header_read)
 23.1337 +				error_exit("Table body encountered before table header");
 23.1338 +			if(!ophandler_header_read)
 23.1339 +				error_exit("Table body encountered before opcode handler header");
 23.1340 +
 23.1341 +			if(table_body_read)
 23.1342 +				error_exit("Duplicate table body");
 23.1343 +
 23.1344 +			populate_table();
 23.1345 +			table_body_read = 1;
 23.1346 +		}
 23.1347 +		else if(strcmp(section_id, ID_OPHANDLER_BODY) == 0)
 23.1348 +		{
 23.1349 +			if(!prototype_header_read)
 23.1350 +				error_exit("Opcode handlers encountered before prototype header");
 23.1351 +			if(!table_header_read)
 23.1352 +				error_exit("Opcode handlers encountered before table header");
 23.1353 +			if(!ophandler_header_read)
 23.1354 +				error_exit("Opcode handlers encountered before opcode handler header");
 23.1355 +			if(!table_body_read)
 23.1356 +				error_exit("Opcode handlers encountered before table body");
 23.1357 +
 23.1358 +			if(ophandler_body_read)
 23.1359 +				error_exit("Duplicate opcode handler section");
 23.1360 +
 23.1361 +			process_opcode_handlers();
 23.1362 +
 23.1363 +			ophandler_body_read = 1;
 23.1364 +		}
 23.1365 +		else if(strcmp(section_id, ID_END) == 0)
 23.1366 +		{
 23.1367 +			/* End of input file.  Do a sanity check and then write footers */
 23.1368 +			if(!prototype_header_read)
 23.1369 +				error_exit("Missing prototype header");
 23.1370 +			if(!prototype_footer_read)
 23.1371 +				error_exit("Missing prototype footer");
 23.1372 +			if(!table_header_read)
 23.1373 +				error_exit("Missing table header");
 23.1374 +			if(!table_footer_read)
 23.1375 +				error_exit("Missing table footer");
 23.1376 +			if(!table_body_read)
 23.1377 +				error_exit("Missing table body");
 23.1378 +			if(!ophandler_header_read)
 23.1379 +				error_exit("Missing opcode handler header");
 23.1380 +			if(!ophandler_footer_read)
 23.1381 +				error_exit("Missing opcode handler footer");
 23.1382 +			if(!ophandler_body_read)
 23.1383 +				error_exit("Missing opcode handler body");
 23.1384 +
 23.1385 +			print_opcode_output_table(g_table_file);
 23.1386 +
 23.1387 +			fprintf(g_prototype_file, "%s\n\n", prototype_footer_insert);
 23.1388 +			fprintf(g_table_file, "%s\n\n", table_footer_insert);
 23.1389 +			fprintf(g_ops_ac_file, "%s\n\n", ophandler_footer_insert);
 23.1390 +			fprintf(g_ops_dm_file, "%s\n\n", ophandler_footer_insert);
 23.1391 +			fprintf(g_ops_nz_file, "%s\n\n", ophandler_footer_insert);
 23.1392 +
 23.1393 +			break;
 23.1394 +		}
 23.1395 +		else
 23.1396 +		{
 23.1397 +			error_exit("Unknown section identifier: %s", section_id);
 23.1398 +		}
 23.1399 +	}
 23.1400 +
 23.1401 +	/* Close all files and exit */
 23.1402 +	fclose(g_prototype_file);
 23.1403 +	fclose(g_table_file);
 23.1404 +	fclose(g_ops_ac_file);
 23.1405 +	fclose(g_ops_dm_file);
 23.1406 +	fclose(g_ops_nz_file);
 23.1407 +	fclose(g_input_file);
 23.1408 +
 23.1409 +	printf("Generated %d opcode handlers from %d primitives\n", g_num_functions, g_num_primitives);
 23.1410 +
 23.1411 +	return 0;
 23.1412 +}
 23.1413 +
 23.1414 +
 23.1415 +
 23.1416 +/* ======================================================================== */
 23.1417 +/* ============================== END OF FILE ============================= */
 23.1418 +/* ======================================================================== */

    24.1 diff -r 000000000000 -r 8bf1bf91a36d src/musashi/readme.txt
    24.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.3 +++ b/src/musashi/readme.txt	Sat Nov 27 01:13:12 2010 +0000
    24.4 @@ -0,0 +1,315 @@
    24.5 +                                    MUSASHI
    24.6 +                                    =======
    24.7 +
    24.8 +                                  Version 3.3
    24.9 +
   24.10 +             A portable Motorola M680x0 processor emulation engine.
   24.11 +            Copyright 1998-2001 Karl Stenerud.  All rights reserved.
   24.12 +
   24.13 +
   24.14 +
   24.15 +INTRODUCTION:
   24.16 +------------
   24.17 +
   24.18 +Musashi is a Motorola 68000, 68010, 68EC020, and 68020 emulator written in C.
   24.19 +This emulator was written with two goals in mind: portability and speed.
   24.20 +
   24.21 +The emulator is written to ANSI C specifications with the exception that I use
   24.22 +inline functions.  This is not compliant to the ANSI spec, but will be
   24.23 +compliant to the ANSI C9X spec.
   24.24 +
   24.25 +It has been successfully running in the MAME project (www.mame.net) for over 2
   24.26 +years and so has had time to mature.
   24.27 +
   24.28 +
   24.29 +
   24.30 +LICENSE AND COPYRIGHT:
   24.31 +---------------------
   24.32 +
   24.33 +The Musashi M680x0 emulator is copyright 1998-2001 Karl Stenerud.
   24.34 +
   24.35 +The source code included in this archive is provided AS-IS, free for any
   24.36 +non-commercial purpose.
   24.37 +
   24.38 +If you build a program using this core, please give credit to the author.
   24.39 +
   24.40 +If you wish to use this core in a commercial environment, please contact
   24.41 +the author to discuss commercial licensing.
   24.42 +
   24.43 +
   24.44 +
   24.45 +AVAILABILITY:
   24.46 +------------
   24.47 +The latest version of this code can be obtained at:
   24.48 +http://kstenerud.cjb.net
   24.49 +
   24.50 +
   24.51 +
   24.52 +CONTACTING THE AUTHOR:
   24.53 +---------------------
   24.54 +I can be reached at kstenerud@mame.net
   24.55 +
   24.56 +
   24.57 +
   24.58 +BASIC CONFIGURATION:
   24.59 +-------------------
   24.60 +The basic configuration will give you a standard 68000 that has sufficient
   24.61 +functionality to work in a primitive environment.
   24.62 +
   24.63 +This setup assumes that you only have 1 device interrupting it, that the
   24.64 +device will always request an autovectored interrupt, and it will always clear
   24.65 +the interrupt before the interrupt service routine finishes (but could
   24.66 +possibly re-assert the interrupt).
   24.67 +You will have only one address space, no tracing, and no instruction prefetch.
   24.68 +
   24.69 +To implement the basic configuration:
   24.70 +
   24.71 +- Open m68kconf.h and verify that the settings for INLINE and DECL_SPEC will
   24.72 +  work with your compiler. (They are set for gcc)
   24.73 +
   24.74 +- In your host program, implement the following functions:
   24.75 +    unsigned int  m68k_read_memory_8(unsigned int address);
   24.76 +    unsigned int  m68k_read_memory_16(unsigned int address);
   24.77 +    unsigned int  m68k_read_memory_32(unsigned int address);
   24.78 +    void m68k_write_memory_8(unsigned int address, unsigned int value);
   24.79 +    void m68k_write_memory_16(unsigned int address, unsigned int value);
   24.80 +    void m68k_write_memory_32(unsigned int address, unsigned int value);
   24.81 +
   24.82 +- In your host program, be sure to call m68k_pulse_reset() once before calling
   24.83 +  any of the other functions as this initializes the core.
   24.84 +
   24.85 +- Use m68k_execute() to execute instructions and m68k_set_irq() to cause an
   24.86 +  interrupt.
   24.87 +
   24.88 +
   24.89 +
   24.90 +ADDING PROPER INTERRUPT HANDLING:
   24.91 +--------------------------------
   24.92 +The interrupt handling in the basic configuration doesn't emulate the
   24.93 +interrupt acknowledge phase of the CPU and automatically clears an interrupt
   24.94 +request during interrupt processing.
   24.95 +While this works for most systems, you may need more accurate interrupt
   24.96 +handling.
   24.97 +
   24.98 +To add proper interrupt handling:
   24.99 +
  24.100 +- In m68kconf.h, set M68K_EMULATE_INT_ACK to OPT_SPECIFY_HANDLER
  24.101 +
  24.102 +- In m68kconf.h, set M68K_INT_ACK_CALLBACK(A) to your interrupt acknowledge
  24.103 +  routine
  24.104 +
  24.105 +- Your interrupt acknowledge routine must return an interrupt vector,
  24.106 +  M68K_INT_ACK_AUTOVECTOR, or M68K_INT_ACK_SPURIOUS.  most m68k
  24.107 +  implementations just use autovectored interrupts.
  24.108 +
  24.109 +- When the interrupting device is satisfied, you must call m68k_set_irq(0) to
  24.110 +  remove the interrupt request.
  24.111 +
  24.112 +
  24.113 +
  24.114 +MULTIPLE INTERRUPTS:
  24.115 +-------------------
  24.116 +The above system will work if you have only one device interrupting the CPU,
  24.117 +but if you have more than one device, you must do a bit more.
  24.118 +
  24.119 +To add multiple interrupts:
  24.120 +
  24.121 +- You must make an interrupt arbitration device that will take the highest
  24.122 +  priority interrupt and encode it onto the IRQ pins on the CPU.
  24.123 +
  24.124 +- The interrupt arbitration device should use m68k_set_irq() to set the
  24.125 +  highest pending interrupt, or 0 for no interrupts pending.
  24.126 +
  24.127 +
  24.128 +
  24.129 +SEPARATE IMMEDIATE AND PC-RELATIVE READS:
  24.130 +----------------------------------------
  24.131 +You can write faster memory access functions if you know whether you are
  24.132 +fetching from ROM or RAM.  Immediate reads are always from the program space
  24.133 +(Always in ROM unless it is running self-modifying code).
  24.134 +This will also separate the pc-relative reads, since some systems treat
  24.135 +PROGRAM mode reads and DATA mode reads differently (for program encryption,
  24.136 +for instance).  See the section below (ADDRESS SPACE) for an explanation of
  24.137 +PROGRAM and DATA mode.
  24.138 +
  24.139 +To enable separate reads:
  24.140 +
  24.141 +- In m68kconf.h, turn on M68K_SEPARATE_READS.
  24.142 +
  24.143 +- In your host program, implement the following functions:
  24.144 +    unsigned int  m68k_read_immediate_16(unsigned int address);
  24.145 +    unsigned int  m68k_read_immediate_32(unsigned int address);
  24.146 +
  24.147 +    unsigned int  m68k_read_pcrelative_8(unsigned int address);
  24.148 +    unsigned int  m68k_read_pcrelative_16(unsigned int address);
  24.149 +    unsigned int  m68k_read_pcrelative_32(unsigned int address);
  24.150 +
  24.151 +- If you need to know the current PC (for banking and such), set
  24.152 +  M68K_MONITOR_PC to OPT_SPECIFY_HANDLER, and set M68K_SET_PC_CALLBACK(A) to
  24.153 +  your routine.
  24.154 +
  24.155 +
  24.156 +
  24.157 +ADDRESS SPACES:
  24.158 +--------------
  24.159 +Most systems will only implement one address space, placing ROM at the lower
  24.160 +addresses and RAM at the higher.  However, there is the possibility that a
  24.161 +system will implement ROM and RAM in the same address range, but in different
  24.162 +address spaces, or will have different mamory types that require different
  24.163 +handling for the program and the data.
  24.164 +
  24.165 +The 68k accomodates this by allowing different program spaces, the most
  24.166 +important to us being PROGRAM and DATA space.  Here is a breakdown of
  24.167 +how information is fetched:
  24.168 +
  24.169 +- All immediate reads are fetched from PROGRAM space.
  24.170 +
  24.171 +- All PC-relative reads are fetched from PROGRAM space.
  24.172 +
  24.173 +- The initial stack pointer and program counter are fetched from PROGRAM space.
  24.174 +
  24.175 +- All other reads (except for those from the moves instruction for 68020)
  24.176 +   are fetched from DATA space.
  24.177 +
  24.178 +The m68k deals with this by encoding the requested address space on the
  24.179 +function code pins:
  24.180 +
  24.181 +                       FC
  24.182 +    Address Space      210
  24.183 +    ------------------ ---
  24.184 +    USER DATA          001
  24.185 +    USER PROGRAM       010
  24.186 +    SUPERVISOR DATA    101
  24.187 +    SUPERVISOR PROGRAM 110
  24.188 +    CPU SPACE          111 <-- not emulated in this core since we emulate
  24.189 +                               interrupt acknowledge in another way.
  24.190 +
  24.191 +Problems arise here if you need to emulate this distinction (if, for example,
  24.192 +your ROM and RAM are at the same address range, with RAM and ROM enable
  24.193 +wired to the function code pins).
  24.194 +
  24.195 +There are 2 ways to deal with this situation using Musashi:
  24.196 +
  24.197 +1. If you only need the distinction between PROGRAM and DATA (the most common),
  24.198 +   you can just separate the reads (see the preceeding section).  This is the
  24.199 +   faster solution.
  24.200 +
  24.201 +2. You can emulate the function code pins entirely.
  24.202 +
  24.203 +To emulate the function code pins:
  24.204 +
  24.205 +- In m68kconf.h, set M68K_EMULATE_FC to OPT_SPECIFY_HANDLER and set
  24.206 +  M68K_SET_FC_CALLBACK(A) to your function code handler function.
  24.207 +
  24.208 +- Your function code handler should select the proper address space for
  24.209 +  subsequent calls to m68k_read_xx (and m68k_write_xx for 68010+).
  24.210 +
  24.211 +Note: immediate reads are always done from program space, so technically you
  24.212 +      don't need to implement the separate immediate reads, although you could
  24.213 +      gain more speed improvements leaving them in and doing some clever
  24.214 +      programming.
  24.215 +
  24.216 +
  24.217 +
  24.218 +USING DIFFERENT CPU TYPES:
  24.219 +-------------------------
  24.220 +The default is to enable only the 68000 cpu type.  To change this, change the
  24.221 +settings for M68K_EMULATE_010 etc in m68kconf.h.
  24.222 +
  24.223 +To set the CPU type you want to use:
  24.224 +
  24.225 +- Make sure it is enabled in m68kconf.h.  Current switches are:
  24.226 +    M68K_EMULATE_010
  24.227 +    M68K_EMULATE_EC020
  24.228 +    M68K_EMULATE_020
  24.229 +
  24.230 +- In your host program, call m68k_set_cpu_type() and then call
  24.231 +  m68k_pulse_reset().  Valid CPU types are:
  24.232 +    M68K_CPU_TYPE_68000,
  24.233 +    M68K_CPU_TYPE_68010,
  24.234 +    M68K_CPU_TYPE_68EC020,
  24.235 +    M68K_CPU_TYPE_68020
  24.236 +
  24.237 +
  24.238 +
  24.239 +CLOCK FREQUENCY:
  24.240 +---------------
  24.241 +In order to emulate the correct clock frequency, you will have to calculate
  24.242 +how long it takes the emulation to execute a certain number of "cycles" and
  24.243 +vary your calls to m68k_execute() accordingly.
  24.244 +As well, it is a good idea to take away the CPU's timeslice when it writes to
  24.245 +a memory-mapped port in order to give the device it wrote to a chance to
  24.246 +react.
  24.247 +
  24.248 +You can use the functions m68k_cycles_run(), m68k_cycles_remaining(),
  24.249 +m68k_modify_timeslice(), and m68k_end_timeslice() to do this.
  24.250 +Try to use large cycle values in your calls to m68k_execute() since it will
  24.251 +increase throughput.  You can always take away the timeslice later.
  24.252 +
  24.253 +
  24.254 +
  24.255 +MORE CORRECT EMULATION:
  24.256 +----------------------
  24.257 +You may need to enable these in order to properly emulate some of the more
  24.258 +obscure functions of the m68k:
  24.259 +
  24.260 +- M68K_EMULATE_BKPT_ACK causes the CPU to call a breakpoint handler on a BKPT
  24.261 +  instruction
  24.262 +
  24.263 +- M68K_EMULATE_TRACE causes the CPU to generate trace exceptions when the
  24.264 +  trace bits are set
  24.265 +
  24.266 +- M68K_EMULATE_RESET causes the CPU to call a reset handler on a RESET
  24.267 +  instruction.
  24.268 +
  24.269 +- M68K_EMULATE_PREFETCH emulates the 4-word instruction prefetch that is part
  24.270 +  of the 68000/68010 (needed for Amiga emulation).
  24.271 +
  24.272 +- call m68k_pulse_halt() to emulate the HALT pin.
  24.273 +
  24.274 +
  24.275 +
  24.276 +CONVENIENCE FUNCTIONS:
  24.277 +---------------------
  24.278 +These are in here for programmer convenience:
  24.279 +
  24.280 +- M68K_INSTRUCTION_HOOK lets you call a handler before each instruction.
  24.281 +
  24.282 +- M68K_LOG_ENABLE and M68K_LOG_1010_1111 lets you log illegal and A/F-line
  24.283 +  instructions.
  24.284 +
  24.285 +
  24.286 +
  24.287 +MULTIPLE CPU EMULATION:
  24.288 +----------------------
  24.289 +The default is to use only one CPU.  To use more than one CPU in this core,
  24.290 +there are some things to keep in mind:
  24.291 +
  24.292 +- To have different cpus call different functions, use OPT_ON instead of
  24.293 +  OPT_SPECIFY_HANDLER, and use the m68k_set_xxx_callback() functions to set
  24.294 +  your callback handlers on a per-cpu basis.
  24.295 +
  24.296 +- Be sure to call set_cpu_type() for each CPU you use.
  24.297 +
  24.298 +- Use m68k_set_context() and m68k_get_context() to switch to another CPU.
  24.299 +
  24.300 +
  24.301 +
  24.302 +LOAD AND SAVE CPU CONTEXTS FROM DISK:
  24.303 +------------------------------------
  24.304 +You can use them68k_load_context() and m68k_save_context() functions to load
  24.305 +and save the CPU state to disk.
  24.306 +
  24.307 +
  24.308 +
  24.309 +GET/SET INFORMATION FROM THE CPU:
  24.310 +--------------------------------
  24.311 +You can use m68k_get_reg() and m68k_set_reg() to gain access to the internals
  24.312 +of the CPU.
  24.313 +
  24.314 +
  24.315 +
  24.316 +EXAMPLE:
  24.317 +-------
  24.318 +
  24.319 +I have included a file example.zip that contains a full example.

    25.1 diff -r 000000000000 -r 8bf1bf91a36d src/version.h.in
    25.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    25.3 +++ b/src/version.h.in	Sat Nov 27 01:13:12 2010 +0000
    25.4 @@ -0,0 +1,16 @@
    25.5 +#define VER_COMPILE_DATE	"@@date@@"
    25.6 +#define VER_COMPILE_TIME	"@@time@@"
    25.7 +#define VER_COMPILE_BY		"@@whoami@@"
    25.8 +#define VER_COMPILE_HOST	"@@hostname@@"
    25.9 +#define VER_COMPILER		"@@compiler@@"
   25.10 +#define VER_BUILD_TYPE		"@@buildtype@@"
   25.11 +#define VER_CFLAGS			"@@cflags@@"
   25.12 +
   25.13 +#define VER_MAJOR			@@majorver@@
   25.14 +#define VER_MINOR			@@minorver@@
   25.15 +#define VER_BUILDNUM		@@buildnum@@
   25.16 +#define VER_EXTRA			"@@extraver@@"
   25.17 +#define VER_VCSREV			"@@vcsstr@@"
   25.18 +
   25.19 +#define VER_FULLSTR			"@@fullverstr@@"
   25.20 +
.hgignore		file \| annotate \| diff \| revisions
Makefile		file \| annotate \| diff \| revisions
dep/.keepme		file \| annotate \| diff \| revisions
dep/musashi/.keepme		file \| annotate \| diff \| revisions
obj/.keepme		file \| annotate \| diff \| revisions
obj/musashi/.keepme		file \| annotate \| diff \| revisions
src/main.c		file \| annotate \| diff \| revisions
src/musashi/LICENSE		file \| annotate \| diff \| revisions
src/musashi/example/Makefile		file \| annotate \| diff \| revisions
src/musashi/example/example.txt		file \| annotate \| diff \| revisions
src/musashi/example/history.txt		file \| annotate \| diff \| revisions
src/musashi/example/program.bin		file \| annotate \| diff \| revisions
src/musashi/example/readme.txt		file \| annotate \| diff \| revisions
src/musashi/example/sim.c		file \| annotate \| diff \| revisions
src/musashi/example/sim.h		file \| annotate \| diff \| revisions
src/musashi/history.txt		file \| annotate \| diff \| revisions
src/musashi/m68k.h		file \| annotate \| diff \| revisions
src/musashi/m68k_in.c		file \| annotate \| diff \| revisions
src/musashi/m68kconf.h		file \| annotate \| diff \| revisions
src/musashi/m68kcpu.c		file \| annotate \| diff \| revisions
src/musashi/m68kcpu.h		file \| annotate \| diff \| revisions
src/musashi/m68kdasm.c		file \| annotate \| diff \| revisions
src/musashi/m68kmake.c		file \| annotate \| diff \| revisions
src/musashi/readme.txt		file \| annotate \| diff \| revisions
src/version.h.in		file \| annotate \| diff \| revisions