changelog
reduce size of caches to fit in DE1 FPGA
- Mon, 05 Apr 2010 21:00:31 +0100
- by Philip Pemberton <philpem@philpem.me.uk> [Mon, 05 Apr 2010 21:00:31 +0100] rev 6
- reduce size of caches to fit in DE1 FPGA
The default cache size makes the Icache and Dcache "just a bit" too big to
fit in the EP2C20 FPGA on the DE1 board. This commit reduces the Icache and
Dcache sizes to the defaults shown in the LatticeMico32 Processor Reference
Manual (pages 36 and 37).