IPCores/lm32_cpu / file diff

     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/lm32_logic_op.v	Sun Apr 04 20:40:03 2010 +0100
     1.3 @@ -0,0 +1,76 @@
     1.4 +// =============================================================================
     1.5 +//                           COPYRIGHT NOTICE
     1.6 +// Copyright 2006 (c) Lattice Semiconductor Corporation
     1.7 +// ALL RIGHTS RESERVED
     1.8 +// This confidential and proprietary software may be used only as authorised by
     1.9 +// a licensing agreement from Lattice Semiconductor Corporation.
    1.10 +// The entire notice above must be reproduced on all authorized copies and
    1.11 +// copies may only be made to the extent permitted by a licensing agreement from
    1.12 +// Lattice Semiconductor Corporation.
    1.13 +//
    1.14 +// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    1.15 +// 5555 NE Moore Court                            408-826-6000 (other locations)
    1.16 +// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    1.17 +// U.S.A                                   email: techsupport@latticesemi.com
    1.18 +// =============================================================================/
    1.19 +//                         FILE DETAILS
    1.20 +// Project          : LatticeMico32
    1.21 +// File             : lm32_logic_op.v
    1.22 +// Title            : Logic operations (and / or / not etc)
    1.23 +// Dependencies     : lm32_include.v
    1.24 +// Version          : 6.1.17
    1.25 +//                  : Initial Release
    1.26 +// Version          : 7.0SP2, 3.0
    1.27 +//                  : No Change
    1.28 +// Version          : 3.1
    1.29 +//                  : No Change
    1.30 +// =============================================================================
    1.31 +
    1.32 +`include "lm32_include.v"
    1.33 +
    1.34 +/////////////////////////////////////////////////////
    1.35 +// Module interface
    1.36 +/////////////////////////////////////////////////////
    1.37 +
    1.38 +module lm32_logic_op (
    1.39 +    // ----- Inputs -------
    1.40 +    logic_op_x,
    1.41 +    operand_0_x,
    1.42 +    operand_1_x,
    1.43 +    // ----- Outputs -------
    1.44 +    logic_result_x
    1.45 +    );
    1.46 +
    1.47 +/////////////////////////////////////////////////////
    1.48 +// Inputs
    1.49 +/////////////////////////////////////////////////////
    1.50 +
    1.51 +input [`LM32_LOGIC_OP_RNG] logic_op_x;
    1.52 +input [`LM32_WORD_RNG] operand_0_x;
    1.53 +input [`LM32_WORD_RNG] operand_1_x;
    1.54 +
    1.55 +/////////////////////////////////////////////////////
    1.56 +// Outputs
    1.57 +/////////////////////////////////////////////////////
    1.58 +
    1.59 +output [`LM32_WORD_RNG] logic_result_x;
    1.60 +reg    [`LM32_WORD_RNG] logic_result_x;
    1.61 +    
    1.62 +/////////////////////////////////////////////////////
    1.63 +// Internal nets and registers 
    1.64 +/////////////////////////////////////////////////////
    1.65 +
    1.66 +integer logic_idx;
    1.67 +
    1.68 +/////////////////////////////////////////////////////
    1.69 +// Combinational Logic
    1.70 +/////////////////////////////////////////////////////
    1.71 +
    1.72 +always @(*)
    1.73 +begin
    1.74 +    for(logic_idx = 0; logic_idx < `LM32_WORD_WIDTH; logic_idx = logic_idx + 1)
    1.75 +        logic_result_x[logic_idx] = logic_op_x[{operand_1_x[logic_idx], operand_0_x[logic_idx]}];
    1.76 +end
    1.77 +    
    1.78 +endmodule
    1.79 +