IPCores/lm32_cpu / file diff

     1.1 diff -r 000000000000 -r cd0b58aa6f83 lm32_logic_op.v
     1.2 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 +++ b/lm32_logic_op.v	Sun Apr 04 20:40:03 2010 +0100
     1.4 @@ -0,0 +1,76 @@
     1.5 +// =============================================================================
     1.6 +//                           COPYRIGHT NOTICE
     1.7 +// Copyright 2006 (c) Lattice Semiconductor Corporation
     1.8 +// ALL RIGHTS RESERVED
     1.9 +// This confidential and proprietary software may be used only as authorised by
    1.10 +// a licensing agreement from Lattice Semiconductor Corporation.
    1.11 +// The entire notice above must be reproduced on all authorized copies and
    1.12 +// copies may only be made to the extent permitted by a licensing agreement from
    1.13 +// Lattice Semiconductor Corporation.
    1.14 +//
    1.15 +// Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
    1.16 +// 5555 NE Moore Court                            408-826-6000 (other locations)
    1.17 +// Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
    1.18 +// U.S.A                                   email: techsupport@latticesemi.com
    1.19 +// =============================================================================/
    1.20 +//                         FILE DETAILS
    1.21 +// Project          : LatticeMico32
    1.22 +// File             : lm32_logic_op.v
    1.23 +// Title            : Logic operations (and / or / not etc)
    1.24 +// Dependencies     : lm32_include.v
    1.25 +// Version          : 6.1.17
    1.26 +//                  : Initial Release
    1.27 +// Version          : 7.0SP2, 3.0
    1.28 +//                  : No Change
    1.29 +// Version          : 3.1
    1.30 +//                  : No Change
    1.31 +// =============================================================================
    1.32 +
    1.33 +`include "lm32_include.v"
    1.34 +
    1.35 +/////////////////////////////////////////////////////
    1.36 +// Module interface
    1.37 +/////////////////////////////////////////////////////
    1.38 +
    1.39 +module lm32_logic_op (
    1.40 +    // ----- Inputs -------
    1.41 +    logic_op_x,
    1.42 +    operand_0_x,
    1.43 +    operand_1_x,
    1.44 +    // ----- Outputs -------
    1.45 +    logic_result_x
    1.46 +    );
    1.47 +
    1.48 +/////////////////////////////////////////////////////
    1.49 +// Inputs
    1.50 +/////////////////////////////////////////////////////
    1.51 +
    1.52 +input [`LM32_LOGIC_OP_RNG] logic_op_x;
    1.53 +input [`LM32_WORD_RNG] operand_0_x;
    1.54 +input [`LM32_WORD_RNG] operand_1_x;
    1.55 +
    1.56 +/////////////////////////////////////////////////////
    1.57 +// Outputs
    1.58 +/////////////////////////////////////////////////////
    1.59 +
    1.60 +output [`LM32_WORD_RNG] logic_result_x;
    1.61 +reg    [`LM32_WORD_RNG] logic_result_x;
    1.62 +    
    1.63 +/////////////////////////////////////////////////////
    1.64 +// Internal nets and registers 
    1.65 +/////////////////////////////////////////////////////
    1.66 +
    1.67 +integer logic_idx;
    1.68 +
    1.69 +/////////////////////////////////////////////////////
    1.70 +// Combinational Logic
    1.71 +/////////////////////////////////////////////////////
    1.72 +
    1.73 +always @(*)
    1.74 +begin
    1.75 +    for(logic_idx = 0; logic_idx < `LM32_WORD_WIDTH; logic_idx = logic_idx + 1)
    1.76 +        logic_result_x[logic_idx] = logic_op_x[{operand_1_x[logic_idx], operand_0_x[logic_idx]}];
    1.77 +end
    1.78 +    
    1.79 +endmodule
    1.80 +