IPCores/lm32_cpu / file diff

     1.1 diff -r 0a26167af7e1 -r 0eb235b23d55 lm32_monitor.v
     1.2 --- a/lm32_monitor.v	Tue Apr 06 18:27:55 2010 +0100
     1.3 +++ b/lm32_monitor.v	Fri Aug 13 01:15:02 2010 +0100
     1.4 @@ -43,9 +43,6 @@
     1.5      MON_SEL_I,
     1.6      MON_STB_I,
     1.7      MON_WE_I,
     1.8 -    MON_LOCK_I,
     1.9 -    MON_CTI_I,
    1.10 -    MON_BTE_I,
    1.11      // ----- Outputs -------
    1.12      MON_ACK_O,
    1.13      MON_RTY_O,
    1.14 @@ -59,15 +56,12 @@
    1.15  
    1.16  input clk_i;                                        // Wishbone clock
    1.17  input rst_i;                                        // Wishbone reset
    1.18 -input [`LM32_WORD_RNG] MON_ADR_I;                   // Wishbone address
    1.19 +input [10:2] MON_ADR_I;                             // Wishbone address
    1.20  input MON_STB_I;                                    // Wishbone strobe
    1.21  input MON_CYC_I;                                    // Wishbone cycle
    1.22  input [`LM32_WORD_RNG] MON_DAT_I;                   // Wishbone write data
    1.23  input [`LM32_BYTE_SELECT_RNG] MON_SEL_I;            // Wishbone byte select
    1.24  input MON_WE_I;                                     // Wishbone write enable
    1.25 -input MON_LOCK_I;                                   // Wishbone locked transfer
    1.26 -input [`LM32_CTYPE_RNG] MON_CTI_I;                  // Wishbone cycle type
    1.27 -input [`LM32_BTYPE_RNG] MON_BTE_I;                  // Wishbone burst type
    1.28     
    1.29  /////////////////////////////////////////////////////
    1.30  // Outputs