drivers/device/MicoDMA.h

Fri, 13 Aug 2010 10:43:05 +0100

author
Philip Pemberton <philpem@philpem.me.uk>
date
Fri, 13 Aug 2010 10:43:05 +0100
changeset 0
11aef665a5d8
permissions
-rw-r--r--

Initial commit, DMAC version 3.1

     1 /****************************************************************************
     2 **
     3 **  Name: MicoDMA.h
     4 **
     5 **  Description:
     6 **        Declares prototypes of functions for manipulating LatticeMico32 DMA
     7 **
     8 **  Revision: 3.0
     9 **
    10 ** Disclaimer:
    11 **
    12 **   This source code is intended as a design reference which
    13 **   illustrates how these types of functions can be implemented.  It
    14 **   is the user's responsibility to verify their design for
    15 **   consistency and functionality through the use of formal
    16 **   verification methods.  Lattice Semiconductor provides no warranty
    17 **   regarding the use or functionality of this code.
    18 **
    19 ** --------------------------------------------------------------------
    20 **
    21 **                     Lattice Semiconductor Corporation
    22 **                     5555 NE Moore Court
    23 **                     Hillsboro, OR 97214
    24 **                     U.S.A
    25 **
    26 **                     TEL: 1-800-Lattice (USA and Canada)
    27 **                          (503)268-8001 (other locations)
    28 **
    29 **                     web:   http://www.latticesemi.com
    30 **                     email: techsupport@latticesemi.com
    31 **
    32 ** --------------------------------------------------------------------------
    33 **
    34 **  Change History (Latest changes on top)
    35 **
    36 **  Ver    Date        Description
    37 ** --------------------------------------------------------------------------
    38 **
    39 **  3.0   Mar-25-2008  Added Header
    40 **
    41 **---------------------------------------------------------------------------
    42 *****************************************************************************/
    44 #ifndef MICODMA_H_
    45 #define MICODMA_H_
    47 #include "DDStructs.h"
    49 #ifdef __cplusplus
    50 extern "C" {
    51 #endif
    53 /***************************************************************
    54  ***************************************************************
    55  *                                                             *
    56  *   DMA PHYSICAL DEVICE SPECIFIC INFORMATION                  *
    57  *                                                             *
    58  ***************************************************************
    59  ***************************************************************/
    61     /*
    62      ------------------------------------------------------
    63      - DMA registers specific bit definitions used        -
    64      - in the driver implementation                       -
    65      ------------------------------------------------------
    66      */
    67     /* CONTROL-REGISTER BIT-MASKS */
    68     #define MICODMA_CONTROL_SADDR_CONSTANT    (0x01)
    69     #define MICODMA_CONTROL_DADDR_CONSTANT    (0x02)
    70     #define MICODMA_CONTROL_USHORT_TRANSFER   (0x04)
    71     #define MICODMA_CONTROL_UINT_TRANSFER     (0x08)
    72     #define MICODMA_CONTROL_BURST_SIZE        (0x30)
    73     #define MICODMA_CONTROL_BURST_ENABLE      (0x40)
    75     /* STATUS-REGISTER BIT-MASKS */
    76     #define MICODMA_STATUS_BUSY         (0x01)
    77     #define MICODMA_STATUS_IE           (0x02)
    78     #define MICODMA_STATUS_SUCCESS      (0x04)
    79     #define MICODMA_STATUS_START        (0x08)
    82     /* DMA OPERATIONAL CODES (USED INTERNALLY) */
    83     #define MICODMA_STATE_SUCCESS       (0x00)
    84     #define MICODMA_STATE_PENDING       (0x01)
    85     #define MICODMA_STATE_ACTIVE        (0x02)
    86     #define MICODMA_STATE_ERROR         (0x03)
    87     #define MICODMA_STATE_ABORTED       (0x04)
    90     /*
    91      ------------------------------------------------------
    92      -                                                    -
    93      - DMA  Device Register-map                           -
    94      -                                                    -
    95      ------------------------------------------------------
    96      */
    97     typedef struct st_MicoDMA{
    98         /* address to read data from */
    99         volatile unsigned int sAddr;
   101         /* address to write data to */
   102         volatile unsigned int dAddr;
   104         /* dma-length */
   105         volatile unsigned int len;
   107         /* control register */
   108         volatile unsigned int control;
   110         /* status register */
   111         volatile unsigned int status;
   112     }MicoDMA_t;
   116 /***************************************************************
   117  ***************************************************************
   118  *                                                             *
   119  *  DMA  SOFTWARE DRIVER SPECIFIC INFORMATION                  *
   120  *                                                             *
   121  ***************************************************************
   122  ***************************************************************/
   124     /* DMA-TYPE QUALIFIERS */
   125 	/* DMA-type enumerator */
   126 	typedef enum e_DMAType_t{
   127 		DMA_CONSTANT_SRC_ADDR = 0x01,
   128 		DMA_CONSTANT_DST_ADDR = 0x02,
   129 		DMA_16BIT_TRANSFER    = 0x04,
   130 		DMA_32BIT_TRANSFER    = 0x08,
   131                 DMA_BURST_SIZE_4      = 0x40,
   132                 DMA_BURST_SIZE_8      = 0x50,
   133                 DMA_BURST_SIZE_16     = 0x60,
   134                 DMA_BURST_SIZE_32     = 0x70,
   135                 DMA_BURST_SIZE        = DMA_BURST_SIZE_8, /* Legacy: replaced by BURST_SIZE_X above */
   136                 DMA_BURST_ENABLE      = 0x40              /* Legacy: replaced by BURST_SIZE_X above */
   138         }DMAType_t;
   141     typedef struct st_DMADesc_t DMADesc_t;
   143     /* DMA Completion callback type */
   144     typedef void(*DMACallback_t)(DMADesc_t *desc, unsigned int status);
   147     /* DMA Descriptor that defines a DMA operation */
   148     struct st_DMADesc_t{
   149         /* address to read data from */
   150         unsigned int sAddr;
   152         /* address to write data to */
   153         unsigned int dAddr;
   155         /* length of transfer */
   156         unsigned int length;
   158         /* DMA transfer-qualifier */
   159         unsigned int type;
   161         /* User-provided private data */
   162         void *priv;
   164         /* descriptor state */
   165         unsigned int state;
   167         /* used internally by the driver: Stores byte-length */
   168         unsigned int reserved;
   170         /* used internally for chaining descriptors */
   171         DMACallback_t onCompletion;
   172         DMADesc_t *prev;
   173         DMADesc_t *next;
   174     };
   178     /*
   179      ------------------------------------------------------
   180      -                                                    -
   181      - FUNCTIONS                                          -
   182      -                                                    -
   183      ------------------------------------------------------
   184      */
   187     /* well-known DMA specific return values */
   188     #define MICODMA_ERR_INVALID_POINTERS        (1)
   189     #define MICODMA_ERR_DESCRIPTOR_NOT_PENDING  (2)
   190     #define MICODMA_ERR_DESC_LEN_ERR            (3)
   193     /* initialization routine */
   194     void MicoDMAInit(MicoDMACtx_t *ctx);
   196     /* queue a new descriptor */
   197     unsigned int MicoDMAQueueRequest(MicoDMACtx_t *ctx, DMADesc_t *desc, DMACallback_t callback);
   199     /* dequeue an existing queued descriptor */
   200     unsigned int MicoDMADequeueRequest(MicoDMACtx_t *ctx, DMADesc_t *desc, unsigned int callback);
   202     /* query status of a descriptor */
   203     unsigned int MicoDMAGetState(DMADesc_t *desc);
   205     /* pause DMA operations (after completion of the currently active descr.) */
   206     unsigned int MicoDMAPause(MicoDMACtx_t *ctx);
   208     /* resume DMA operations */
   209     unsigned int MicoDMAResume(MicoDMACtx_t *ctx);
   212 #ifdef __cplusplus
   213 }
   214 #endif
   217 #endif /*MICODMA_H_*/