Fri, 13 Aug 2010 10:43:05 +0100
Initial commit, DMAC version 3.1
| philpem@0 | 1 | /**************************************************************************** |
| philpem@0 | 2 | ** |
| philpem@0 | 3 | ** Name: MicoDMA.h |
| philpem@0 | 4 | ** |
| philpem@0 | 5 | ** Description: |
| philpem@0 | 6 | ** Declares prototypes of functions for manipulating LatticeMico32 DMA |
| philpem@0 | 7 | ** |
| philpem@0 | 8 | ** Revision: 3.0 |
| philpem@0 | 9 | ** |
| philpem@0 | 10 | ** Disclaimer: |
| philpem@0 | 11 | ** |
| philpem@0 | 12 | ** This source code is intended as a design reference which |
| philpem@0 | 13 | ** illustrates how these types of functions can be implemented. It |
| philpem@0 | 14 | ** is the user's responsibility to verify their design for |
| philpem@0 | 15 | ** consistency and functionality through the use of formal |
| philpem@0 | 16 | ** verification methods. Lattice Semiconductor provides no warranty |
| philpem@0 | 17 | ** regarding the use or functionality of this code. |
| philpem@0 | 18 | ** |
| philpem@0 | 19 | ** -------------------------------------------------------------------- |
| philpem@0 | 20 | ** |
| philpem@0 | 21 | ** Lattice Semiconductor Corporation |
| philpem@0 | 22 | ** 5555 NE Moore Court |
| philpem@0 | 23 | ** Hillsboro, OR 97214 |
| philpem@0 | 24 | ** U.S.A |
| philpem@0 | 25 | ** |
| philpem@0 | 26 | ** TEL: 1-800-Lattice (USA and Canada) |
| philpem@0 | 27 | ** (503)268-8001 (other locations) |
| philpem@0 | 28 | ** |
| philpem@0 | 29 | ** web: http://www.latticesemi.com |
| philpem@0 | 30 | ** email: techsupport@latticesemi.com |
| philpem@0 | 31 | ** |
| philpem@0 | 32 | ** -------------------------------------------------------------------------- |
| philpem@0 | 33 | ** |
| philpem@0 | 34 | ** Change History (Latest changes on top) |
| philpem@0 | 35 | ** |
| philpem@0 | 36 | ** Ver Date Description |
| philpem@0 | 37 | ** -------------------------------------------------------------------------- |
| philpem@0 | 38 | ** |
| philpem@0 | 39 | ** 3.0 Mar-25-2008 Added Header |
| philpem@0 | 40 | ** |
| philpem@0 | 41 | **--------------------------------------------------------------------------- |
| philpem@0 | 42 | *****************************************************************************/ |
| philpem@0 | 43 | |
| philpem@0 | 44 | #ifndef MICODMA_H_ |
| philpem@0 | 45 | #define MICODMA_H_ |
| philpem@0 | 46 | |
| philpem@0 | 47 | #include "DDStructs.h" |
| philpem@0 | 48 | |
| philpem@0 | 49 | #ifdef __cplusplus |
| philpem@0 | 50 | extern "C" { |
| philpem@0 | 51 | #endif |
| philpem@0 | 52 | |
| philpem@0 | 53 | /*************************************************************** |
| philpem@0 | 54 | *************************************************************** |
| philpem@0 | 55 | * * |
| philpem@0 | 56 | * DMA PHYSICAL DEVICE SPECIFIC INFORMATION * |
| philpem@0 | 57 | * * |
| philpem@0 | 58 | *************************************************************** |
| philpem@0 | 59 | ***************************************************************/ |
| philpem@0 | 60 | |
| philpem@0 | 61 | /* |
| philpem@0 | 62 | ------------------------------------------------------ |
| philpem@0 | 63 | - DMA registers specific bit definitions used - |
| philpem@0 | 64 | - in the driver implementation - |
| philpem@0 | 65 | ------------------------------------------------------ |
| philpem@0 | 66 | */ |
| philpem@0 | 67 | /* CONTROL-REGISTER BIT-MASKS */ |
| philpem@0 | 68 | #define MICODMA_CONTROL_SADDR_CONSTANT (0x01) |
| philpem@0 | 69 | #define MICODMA_CONTROL_DADDR_CONSTANT (0x02) |
| philpem@0 | 70 | #define MICODMA_CONTROL_USHORT_TRANSFER (0x04) |
| philpem@0 | 71 | #define MICODMA_CONTROL_UINT_TRANSFER (0x08) |
| philpem@0 | 72 | #define MICODMA_CONTROL_BURST_SIZE (0x30) |
| philpem@0 | 73 | #define MICODMA_CONTROL_BURST_ENABLE (0x40) |
| philpem@0 | 74 | |
| philpem@0 | 75 | /* STATUS-REGISTER BIT-MASKS */ |
| philpem@0 | 76 | #define MICODMA_STATUS_BUSY (0x01) |
| philpem@0 | 77 | #define MICODMA_STATUS_IE (0x02) |
| philpem@0 | 78 | #define MICODMA_STATUS_SUCCESS (0x04) |
| philpem@0 | 79 | #define MICODMA_STATUS_START (0x08) |
| philpem@0 | 80 | |
| philpem@0 | 81 | |
| philpem@0 | 82 | /* DMA OPERATIONAL CODES (USED INTERNALLY) */ |
| philpem@0 | 83 | #define MICODMA_STATE_SUCCESS (0x00) |
| philpem@0 | 84 | #define MICODMA_STATE_PENDING (0x01) |
| philpem@0 | 85 | #define MICODMA_STATE_ACTIVE (0x02) |
| philpem@0 | 86 | #define MICODMA_STATE_ERROR (0x03) |
| philpem@0 | 87 | #define MICODMA_STATE_ABORTED (0x04) |
| philpem@0 | 88 | |
| philpem@0 | 89 | |
| philpem@0 | 90 | /* |
| philpem@0 | 91 | ------------------------------------------------------ |
| philpem@0 | 92 | - - |
| philpem@0 | 93 | - DMA Device Register-map - |
| philpem@0 | 94 | - - |
| philpem@0 | 95 | ------------------------------------------------------ |
| philpem@0 | 96 | */ |
| philpem@0 | 97 | typedef struct st_MicoDMA{ |
| philpem@0 | 98 | /* address to read data from */ |
| philpem@0 | 99 | volatile unsigned int sAddr; |
| philpem@0 | 100 | |
| philpem@0 | 101 | /* address to write data to */ |
| philpem@0 | 102 | volatile unsigned int dAddr; |
| philpem@0 | 103 | |
| philpem@0 | 104 | /* dma-length */ |
| philpem@0 | 105 | volatile unsigned int len; |
| philpem@0 | 106 | |
| philpem@0 | 107 | /* control register */ |
| philpem@0 | 108 | volatile unsigned int control; |
| philpem@0 | 109 | |
| philpem@0 | 110 | /* status register */ |
| philpem@0 | 111 | volatile unsigned int status; |
| philpem@0 | 112 | }MicoDMA_t; |
| philpem@0 | 113 | |
| philpem@0 | 114 | |
| philpem@0 | 115 | |
| philpem@0 | 116 | /*************************************************************** |
| philpem@0 | 117 | *************************************************************** |
| philpem@0 | 118 | * * |
| philpem@0 | 119 | * DMA SOFTWARE DRIVER SPECIFIC INFORMATION * |
| philpem@0 | 120 | * * |
| philpem@0 | 121 | *************************************************************** |
| philpem@0 | 122 | ***************************************************************/ |
| philpem@0 | 123 | |
| philpem@0 | 124 | /* DMA-TYPE QUALIFIERS */ |
| philpem@0 | 125 | /* DMA-type enumerator */ |
| philpem@0 | 126 | typedef enum e_DMAType_t{ |
| philpem@0 | 127 | DMA_CONSTANT_SRC_ADDR = 0x01, |
| philpem@0 | 128 | DMA_CONSTANT_DST_ADDR = 0x02, |
| philpem@0 | 129 | DMA_16BIT_TRANSFER = 0x04, |
| philpem@0 | 130 | DMA_32BIT_TRANSFER = 0x08, |
| philpem@0 | 131 | DMA_BURST_SIZE_4 = 0x40, |
| philpem@0 | 132 | DMA_BURST_SIZE_8 = 0x50, |
| philpem@0 | 133 | DMA_BURST_SIZE_16 = 0x60, |
| philpem@0 | 134 | DMA_BURST_SIZE_32 = 0x70, |
| philpem@0 | 135 | DMA_BURST_SIZE = DMA_BURST_SIZE_8, /* Legacy: replaced by BURST_SIZE_X above */ |
| philpem@0 | 136 | DMA_BURST_ENABLE = 0x40 /* Legacy: replaced by BURST_SIZE_X above */ |
| philpem@0 | 137 | |
| philpem@0 | 138 | }DMAType_t; |
| philpem@0 | 139 | |
| philpem@0 | 140 | |
| philpem@0 | 141 | typedef struct st_DMADesc_t DMADesc_t; |
| philpem@0 | 142 | |
| philpem@0 | 143 | /* DMA Completion callback type */ |
| philpem@0 | 144 | typedef void(*DMACallback_t)(DMADesc_t *desc, unsigned int status); |
| philpem@0 | 145 | |
| philpem@0 | 146 | |
| philpem@0 | 147 | /* DMA Descriptor that defines a DMA operation */ |
| philpem@0 | 148 | struct st_DMADesc_t{ |
| philpem@0 | 149 | /* address to read data from */ |
| philpem@0 | 150 | unsigned int sAddr; |
| philpem@0 | 151 | |
| philpem@0 | 152 | /* address to write data to */ |
| philpem@0 | 153 | unsigned int dAddr; |
| philpem@0 | 154 | |
| philpem@0 | 155 | /* length of transfer */ |
| philpem@0 | 156 | unsigned int length; |
| philpem@0 | 157 | |
| philpem@0 | 158 | /* DMA transfer-qualifier */ |
| philpem@0 | 159 | unsigned int type; |
| philpem@0 | 160 | |
| philpem@0 | 161 | /* User-provided private data */ |
| philpem@0 | 162 | void *priv; |
| philpem@0 | 163 | |
| philpem@0 | 164 | /* descriptor state */ |
| philpem@0 | 165 | unsigned int state; |
| philpem@0 | 166 | |
| philpem@0 | 167 | /* used internally by the driver: Stores byte-length */ |
| philpem@0 | 168 | unsigned int reserved; |
| philpem@0 | 169 | |
| philpem@0 | 170 | /* used internally for chaining descriptors */ |
| philpem@0 | 171 | DMACallback_t onCompletion; |
| philpem@0 | 172 | DMADesc_t *prev; |
| philpem@0 | 173 | DMADesc_t *next; |
| philpem@0 | 174 | }; |
| philpem@0 | 175 | |
| philpem@0 | 176 | |
| philpem@0 | 177 | |
| philpem@0 | 178 | /* |
| philpem@0 | 179 | ------------------------------------------------------ |
| philpem@0 | 180 | - - |
| philpem@0 | 181 | - FUNCTIONS - |
| philpem@0 | 182 | - - |
| philpem@0 | 183 | ------------------------------------------------------ |
| philpem@0 | 184 | */ |
| philpem@0 | 185 | |
| philpem@0 | 186 | |
| philpem@0 | 187 | /* well-known DMA specific return values */ |
| philpem@0 | 188 | #define MICODMA_ERR_INVALID_POINTERS (1) |
| philpem@0 | 189 | #define MICODMA_ERR_DESCRIPTOR_NOT_PENDING (2) |
| philpem@0 | 190 | #define MICODMA_ERR_DESC_LEN_ERR (3) |
| philpem@0 | 191 | |
| philpem@0 | 192 | |
| philpem@0 | 193 | /* initialization routine */ |
| philpem@0 | 194 | void MicoDMAInit(MicoDMACtx_t *ctx); |
| philpem@0 | 195 | |
| philpem@0 | 196 | /* queue a new descriptor */ |
| philpem@0 | 197 | unsigned int MicoDMAQueueRequest(MicoDMACtx_t *ctx, DMADesc_t *desc, DMACallback_t callback); |
| philpem@0 | 198 | |
| philpem@0 | 199 | /* dequeue an existing queued descriptor */ |
| philpem@0 | 200 | unsigned int MicoDMADequeueRequest(MicoDMACtx_t *ctx, DMADesc_t *desc, unsigned int callback); |
| philpem@0 | 201 | |
| philpem@0 | 202 | /* query status of a descriptor */ |
| philpem@0 | 203 | unsigned int MicoDMAGetState(DMADesc_t *desc); |
| philpem@0 | 204 | |
| philpem@0 | 205 | /* pause DMA operations (after completion of the currently active descr.) */ |
| philpem@0 | 206 | unsigned int MicoDMAPause(MicoDMACtx_t *ctx); |
| philpem@0 | 207 | |
| philpem@0 | 208 | /* resume DMA operations */ |
| philpem@0 | 209 | unsigned int MicoDMAResume(MicoDMACtx_t *ctx); |
| philpem@0 | 210 | |
| philpem@0 | 211 | |
| philpem@0 | 212 | #ifdef __cplusplus |
| philpem@0 | 213 | } |
| philpem@0 | 214 | #endif |
| philpem@0 | 215 | |
| philpem@0 | 216 | |
| philpem@0 | 217 | #endif /*MICODMA_H_*/ |
| philpem@0 | 218 |